1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_find_next(uint16_t port_id)
190 while (port_id < RTE_MAX_ETHPORTS &&
191 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
192 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
195 if (port_id >= RTE_MAX_ETHPORTS)
196 return RTE_MAX_ETHPORTS;
202 rte_eth_dev_shared_data_prepare(void)
204 const unsigned flags = 0;
205 const struct rte_memzone *mz;
207 rte_spinlock_lock(&rte_eth_shared_data_lock);
209 if (rte_eth_dev_shared_data == NULL) {
210 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
211 /* Allocate port data and ownership shared memory. */
212 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
213 sizeof(*rte_eth_dev_shared_data),
214 rte_socket_id(), flags);
216 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
218 rte_panic("Cannot allocate ethdev shared data\n");
220 rte_eth_dev_shared_data = mz->addr;
221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
222 rte_eth_dev_shared_data->next_owner_id =
223 RTE_ETH_DEV_NO_OWNER + 1;
224 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
225 memset(rte_eth_dev_shared_data->data, 0,
226 sizeof(rte_eth_dev_shared_data->data));
230 rte_spinlock_unlock(&rte_eth_shared_data_lock);
234 is_allocated(const struct rte_eth_dev *ethdev)
236 return ethdev->data->name[0] != '\0';
239 static struct rte_eth_dev *
240 _rte_eth_dev_allocated(const char *name)
244 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
245 if (rte_eth_devices[i].data != NULL &&
246 strcmp(rte_eth_devices[i].data->name, name) == 0)
247 return &rte_eth_devices[i];
253 rte_eth_dev_allocated(const char *name)
255 struct rte_eth_dev *ethdev;
257 rte_eth_dev_shared_data_prepare();
259 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
261 ethdev = _rte_eth_dev_allocated(name);
263 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
269 rte_eth_dev_find_free_port(void)
273 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
274 /* Using shared name field to find a free port. */
275 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
276 RTE_ASSERT(rte_eth_devices[i].state ==
281 return RTE_MAX_ETHPORTS;
284 static struct rte_eth_dev *
285 eth_dev_get(uint16_t port_id)
287 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
289 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
291 eth_dev_last_created_port = port_id;
297 rte_eth_dev_allocate(const char *name)
300 struct rte_eth_dev *eth_dev = NULL;
302 rte_eth_dev_shared_data_prepare();
304 /* Synchronize port creation between primary and secondary threads. */
305 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
307 if (_rte_eth_dev_allocated(name) != NULL) {
309 "Ethernet device with name %s already allocated\n",
314 port_id = rte_eth_dev_find_free_port();
315 if (port_id == RTE_MAX_ETHPORTS) {
317 "Reached maximum number of Ethernet ports\n");
321 eth_dev = eth_dev_get(port_id);
322 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
323 eth_dev->data->port_id = port_id;
324 eth_dev->data->mtu = ETHER_MTU;
327 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
333 * Attach to a port already registered by the primary process, which
334 * makes sure that the same device would have the same port id both
335 * in the primary and secondary process.
338 rte_eth_dev_attach_secondary(const char *name)
341 struct rte_eth_dev *eth_dev = NULL;
343 rte_eth_dev_shared_data_prepare();
345 /* Synchronize port attachment to primary port creation and release. */
346 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
348 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
349 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
352 if (i == RTE_MAX_ETHPORTS) {
354 "Device %s is not driven by the primary process\n",
357 eth_dev = eth_dev_get(i);
358 RTE_ASSERT(eth_dev->data->port_id == i);
361 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 rte_eth_dev_release_port_secondary(struct rte_eth_dev *eth_dev)
371 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
372 eth_dev->state = RTE_ETH_DEV_UNUSED;
378 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
383 rte_eth_dev_shared_data_prepare();
385 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
387 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
389 eth_dev->state = RTE_ETH_DEV_UNUSED;
391 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
392 rte_free(eth_dev->data->rx_queues);
393 rte_free(eth_dev->data->tx_queues);
394 rte_free(eth_dev->data->mac_addrs);
395 rte_free(eth_dev->data->hash_mac_addrs);
396 rte_free(eth_dev->data->dev_private);
397 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
400 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
406 rte_eth_dev_is_valid_port(uint16_t port_id)
408 if (port_id >= RTE_MAX_ETHPORTS ||
409 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
416 rte_eth_is_valid_owner_id(uint64_t owner_id)
418 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
419 rte_eth_dev_shared_data->next_owner_id <= owner_id)
425 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
427 while (port_id < RTE_MAX_ETHPORTS &&
428 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
429 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
430 rte_eth_devices[port_id].data->owner.id != owner_id))
433 if (port_id >= RTE_MAX_ETHPORTS)
434 return RTE_MAX_ETHPORTS;
439 int __rte_experimental
440 rte_eth_dev_owner_new(uint64_t *owner_id)
442 rte_eth_dev_shared_data_prepare();
444 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
446 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
448 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
453 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
454 const struct rte_eth_dev_owner *new_owner)
456 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
457 struct rte_eth_dev_owner *port_owner;
460 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
461 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
466 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
467 !rte_eth_is_valid_owner_id(old_owner_id)) {
469 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
470 old_owner_id, new_owner->id);
474 port_owner = &rte_eth_devices[port_id].data->owner;
475 if (port_owner->id != old_owner_id) {
477 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
478 port_id, port_owner->name, port_owner->id);
482 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
484 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
485 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
488 port_owner->id = new_owner->id;
490 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
491 port_id, new_owner->name, new_owner->id);
496 int __rte_experimental
497 rte_eth_dev_owner_set(const uint16_t port_id,
498 const struct rte_eth_dev_owner *owner)
502 rte_eth_dev_shared_data_prepare();
504 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
506 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
508 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 int __rte_experimental
513 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
515 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
516 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
519 rte_eth_dev_shared_data_prepare();
521 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
523 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
525 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
529 void __rte_experimental
530 rte_eth_dev_owner_delete(const uint64_t owner_id)
534 rte_eth_dev_shared_data_prepare();
536 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
538 if (rte_eth_is_valid_owner_id(owner_id)) {
539 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
540 if (rte_eth_devices[port_id].data->owner.id == owner_id)
541 memset(&rte_eth_devices[port_id].data->owner, 0,
542 sizeof(struct rte_eth_dev_owner));
543 RTE_ETHDEV_LOG(NOTICE,
544 "All port owners owned by %016"PRIx64" identifier have removed\n",
548 "Invalid owner id=%016"PRIx64"\n",
552 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
555 int __rte_experimental
556 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
559 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
561 rte_eth_dev_shared_data_prepare();
563 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
565 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
566 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
570 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
573 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
578 rte_eth_dev_socket_id(uint16_t port_id)
580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
581 return rte_eth_devices[port_id].data->numa_node;
585 rte_eth_dev_get_sec_ctx(uint16_t port_id)
587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
588 return rte_eth_devices[port_id].security_ctx;
592 rte_eth_dev_count(void)
594 return rte_eth_dev_count_avail();
598 rte_eth_dev_count_avail(void)
605 RTE_ETH_FOREACH_DEV(p)
611 uint16_t __rte_experimental
612 rte_eth_dev_count_total(void)
614 uint16_t port, count = 0;
616 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
617 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
624 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
631 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
635 /* shouldn't check 'rte_eth_devices[i].data',
636 * because it might be overwritten by VDEV PMD */
637 tmp = rte_eth_dev_shared_data->data[port_id].name;
643 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
648 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
652 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
653 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
654 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
664 eth_err(uint16_t port_id, int ret)
668 if (rte_eth_dev_is_removed(port_id))
673 /* attach the new device, then store port_id of the device */
675 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
677 int current = rte_eth_dev_count_total();
678 struct rte_devargs da;
681 memset(&da, 0, sizeof(da));
683 if ((devargs == NULL) || (port_id == NULL)) {
689 if (rte_devargs_parse(&da, devargs))
692 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
696 /* no point looking at the port count if no port exists */
697 if (!rte_eth_dev_count_total()) {
698 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
703 /* if nothing happened, there is a bug here, since some driver told us
704 * it did attach a device, but did not create a port.
705 * FIXME: race condition in case of plug-out of another device
707 if (current == rte_eth_dev_count_total()) {
712 *port_id = eth_dev_last_created_port;
720 /* detach the device, then store the name of the device */
722 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
724 struct rte_device *dev;
729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
731 dev_flags = rte_eth_devices[port_id].data->dev_flags;
732 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
734 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
738 dev = rte_eth_devices[port_id].device;
742 bus = rte_bus_find_by_device(dev);
746 ret = rte_eal_hotplug_remove(bus->name, dev->name);
750 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
755 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
757 uint16_t old_nb_queues = dev->data->nb_rx_queues;
761 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
762 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
763 sizeof(dev->data->rx_queues[0]) * nb_queues,
764 RTE_CACHE_LINE_SIZE);
765 if (dev->data->rx_queues == NULL) {
766 dev->data->nb_rx_queues = 0;
769 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
770 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
772 rxq = dev->data->rx_queues;
774 for (i = nb_queues; i < old_nb_queues; i++)
775 (*dev->dev_ops->rx_queue_release)(rxq[i]);
776 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
777 RTE_CACHE_LINE_SIZE);
780 if (nb_queues > old_nb_queues) {
781 uint16_t new_qs = nb_queues - old_nb_queues;
783 memset(rxq + old_nb_queues, 0,
784 sizeof(rxq[0]) * new_qs);
787 dev->data->rx_queues = rxq;
789 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
792 rxq = dev->data->rx_queues;
794 for (i = nb_queues; i < old_nb_queues; i++)
795 (*dev->dev_ops->rx_queue_release)(rxq[i]);
797 rte_free(dev->data->rx_queues);
798 dev->data->rx_queues = NULL;
800 dev->data->nb_rx_queues = nb_queues;
805 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
807 struct rte_eth_dev *dev;
809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
811 dev = &rte_eth_devices[port_id];
812 if (!dev->data->dev_started) {
814 "Port %u must be started before start any queue\n",
819 if (rx_queue_id >= dev->data->nb_rx_queues) {
820 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
826 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
828 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
829 rx_queue_id, port_id);
833 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
839 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
841 struct rte_eth_dev *dev;
843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
845 dev = &rte_eth_devices[port_id];
846 if (rx_queue_id >= dev->data->nb_rx_queues) {
847 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
853 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
855 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
856 rx_queue_id, port_id);
860 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
865 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
867 struct rte_eth_dev *dev;
869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
871 dev = &rte_eth_devices[port_id];
872 if (!dev->data->dev_started) {
874 "Port %u must be started before start any queue\n",
879 if (tx_queue_id >= dev->data->nb_tx_queues) {
880 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
886 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
888 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
889 tx_queue_id, port_id);
893 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
897 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
899 struct rte_eth_dev *dev;
901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
903 dev = &rte_eth_devices[port_id];
904 if (tx_queue_id >= dev->data->nb_tx_queues) {
905 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
911 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
913 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
914 tx_queue_id, port_id);
918 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
923 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
925 uint16_t old_nb_queues = dev->data->nb_tx_queues;
929 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
930 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
931 sizeof(dev->data->tx_queues[0]) * nb_queues,
932 RTE_CACHE_LINE_SIZE);
933 if (dev->data->tx_queues == NULL) {
934 dev->data->nb_tx_queues = 0;
937 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
938 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
940 txq = dev->data->tx_queues;
942 for (i = nb_queues; i < old_nb_queues; i++)
943 (*dev->dev_ops->tx_queue_release)(txq[i]);
944 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
945 RTE_CACHE_LINE_SIZE);
948 if (nb_queues > old_nb_queues) {
949 uint16_t new_qs = nb_queues - old_nb_queues;
951 memset(txq + old_nb_queues, 0,
952 sizeof(txq[0]) * new_qs);
955 dev->data->tx_queues = txq;
957 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
960 txq = dev->data->tx_queues;
962 for (i = nb_queues; i < old_nb_queues; i++)
963 (*dev->dev_ops->tx_queue_release)(txq[i]);
965 rte_free(dev->data->tx_queues);
966 dev->data->tx_queues = NULL;
968 dev->data->nb_tx_queues = nb_queues;
973 rte_eth_speed_bitflag(uint32_t speed, int duplex)
976 case ETH_SPEED_NUM_10M:
977 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
978 case ETH_SPEED_NUM_100M:
979 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
980 case ETH_SPEED_NUM_1G:
981 return ETH_LINK_SPEED_1G;
982 case ETH_SPEED_NUM_2_5G:
983 return ETH_LINK_SPEED_2_5G;
984 case ETH_SPEED_NUM_5G:
985 return ETH_LINK_SPEED_5G;
986 case ETH_SPEED_NUM_10G:
987 return ETH_LINK_SPEED_10G;
988 case ETH_SPEED_NUM_20G:
989 return ETH_LINK_SPEED_20G;
990 case ETH_SPEED_NUM_25G:
991 return ETH_LINK_SPEED_25G;
992 case ETH_SPEED_NUM_40G:
993 return ETH_LINK_SPEED_40G;
994 case ETH_SPEED_NUM_50G:
995 return ETH_LINK_SPEED_50G;
996 case ETH_SPEED_NUM_56G:
997 return ETH_LINK_SPEED_56G;
998 case ETH_SPEED_NUM_100G:
999 return ETH_LINK_SPEED_100G;
1005 const char * __rte_experimental
1006 rte_eth_dev_rx_offload_name(uint64_t offload)
1008 const char *name = "UNKNOWN";
1011 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1012 if (offload == rte_rx_offload_names[i].offload) {
1013 name = rte_rx_offload_names[i].name;
1021 const char * __rte_experimental
1022 rte_eth_dev_tx_offload_name(uint64_t offload)
1024 const char *name = "UNKNOWN";
1027 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1028 if (offload == rte_tx_offload_names[i].offload) {
1029 name = rte_tx_offload_names[i].name;
1038 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1039 const struct rte_eth_conf *dev_conf)
1041 struct rte_eth_dev *dev;
1042 struct rte_eth_dev_info dev_info;
1043 struct rte_eth_conf local_conf = *dev_conf;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1048 dev = &rte_eth_devices[port_id];
1050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1053 rte_eth_dev_info_get(port_id, &dev_info);
1055 /* If number of queues specified by application for both Rx and Tx is
1056 * zero, use driver preferred values. This cannot be done individually
1057 * as it is valid for either Tx or Rx (but not both) to be zero.
1058 * If driver does not provide any preferred valued, fall back on
1061 if (nb_rx_q == 0 && nb_tx_q == 0) {
1062 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1064 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1065 nb_tx_q = dev_info.default_txportconf.nb_queues;
1067 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1070 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1072 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1073 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1077 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1079 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1080 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1084 if (dev->data->dev_started) {
1086 "Port %u must be stopped to allow configuration\n",
1091 /* Copy the dev_conf parameter into the dev structure */
1092 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1095 * Check that the numbers of RX and TX queues are not greater
1096 * than the maximum number of RX and TX queues supported by the
1097 * configured device.
1099 if (nb_rx_q > dev_info.max_rx_queues) {
1100 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1101 port_id, nb_rx_q, dev_info.max_rx_queues);
1105 if (nb_tx_q > dev_info.max_tx_queues) {
1106 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1107 port_id, nb_tx_q, dev_info.max_tx_queues);
1111 /* Check that the device supports requested interrupts */
1112 if ((dev_conf->intr_conf.lsc == 1) &&
1113 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1114 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1115 dev->device->driver->name);
1118 if ((dev_conf->intr_conf.rmv == 1) &&
1119 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1120 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1121 dev->device->driver->name);
1126 * If jumbo frames are enabled, check that the maximum RX packet
1127 * length is supported by the configured device.
1129 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1130 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1132 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1133 port_id, dev_conf->rxmode.max_rx_pkt_len,
1134 dev_info.max_rx_pktlen);
1136 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1138 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1139 port_id, dev_conf->rxmode.max_rx_pkt_len,
1140 (unsigned)ETHER_MIN_LEN);
1144 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1145 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1146 /* Use default value */
1147 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1151 /* Any requested offloading must be within its device capabilities */
1152 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1153 local_conf.rxmode.offloads) {
1155 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1156 "capabilities 0x%"PRIx64" in %s()\n",
1157 port_id, local_conf.rxmode.offloads,
1158 dev_info.rx_offload_capa,
1162 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1163 local_conf.txmode.offloads) {
1165 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1166 "capabilities 0x%"PRIx64" in %s()\n",
1167 port_id, local_conf.txmode.offloads,
1168 dev_info.tx_offload_capa,
1173 /* Check that device supports requested rss hash functions. */
1174 if ((dev_info.flow_type_rss_offloads |
1175 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1176 dev_info.flow_type_rss_offloads) {
1178 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1179 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1180 dev_info.flow_type_rss_offloads);
1185 * Setup new number of RX/TX queues and reconfigure device.
1187 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1190 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1195 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1198 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1200 rte_eth_dev_rx_queue_config(dev, 0);
1204 diag = (*dev->dev_ops->dev_configure)(dev);
1206 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1208 rte_eth_dev_rx_queue_config(dev, 0);
1209 rte_eth_dev_tx_queue_config(dev, 0);
1210 return eth_err(port_id, diag);
1213 /* Initialize Rx profiling if enabled at compilation time. */
1214 diag = __rte_eth_dev_profile_init(port_id, dev);
1216 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1218 rte_eth_dev_rx_queue_config(dev, 0);
1219 rte_eth_dev_tx_queue_config(dev, 0);
1220 return eth_err(port_id, diag);
1227 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1229 if (dev->data->dev_started) {
1230 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1231 dev->data->port_id);
1235 rte_eth_dev_rx_queue_config(dev, 0);
1236 rte_eth_dev_tx_queue_config(dev, 0);
1238 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1242 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1243 struct rte_eth_dev_info *dev_info)
1245 struct ether_addr *addr;
1250 /* replay MAC address configuration including default MAC */
1251 addr = &dev->data->mac_addrs[0];
1252 if (*dev->dev_ops->mac_addr_set != NULL)
1253 (*dev->dev_ops->mac_addr_set)(dev, addr);
1254 else if (*dev->dev_ops->mac_addr_add != NULL)
1255 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1257 if (*dev->dev_ops->mac_addr_add != NULL) {
1258 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1259 addr = &dev->data->mac_addrs[i];
1261 /* skip zero address */
1262 if (is_zero_ether_addr(addr))
1266 pool_mask = dev->data->mac_pool_sel[i];
1269 if (pool_mask & 1ULL)
1270 (*dev->dev_ops->mac_addr_add)(dev,
1274 } while (pool_mask);
1280 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1281 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1283 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1284 rte_eth_dev_mac_restore(dev, dev_info);
1286 /* replay promiscuous configuration */
1287 if (rte_eth_promiscuous_get(port_id) == 1)
1288 rte_eth_promiscuous_enable(port_id);
1289 else if (rte_eth_promiscuous_get(port_id) == 0)
1290 rte_eth_promiscuous_disable(port_id);
1292 /* replay all multicast configuration */
1293 if (rte_eth_allmulticast_get(port_id) == 1)
1294 rte_eth_allmulticast_enable(port_id);
1295 else if (rte_eth_allmulticast_get(port_id) == 0)
1296 rte_eth_allmulticast_disable(port_id);
1300 rte_eth_dev_start(uint16_t port_id)
1302 struct rte_eth_dev *dev;
1303 struct rte_eth_dev_info dev_info;
1306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1308 dev = &rte_eth_devices[port_id];
1310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1312 if (dev->data->dev_started != 0) {
1313 RTE_ETHDEV_LOG(INFO,
1314 "Device with port_id=%"PRIu16" already started\n",
1319 rte_eth_dev_info_get(port_id, &dev_info);
1321 /* Lets restore MAC now if device does not support live change */
1322 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1323 rte_eth_dev_mac_restore(dev, &dev_info);
1325 diag = (*dev->dev_ops->dev_start)(dev);
1327 dev->data->dev_started = 1;
1329 return eth_err(port_id, diag);
1331 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1333 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1334 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1335 (*dev->dev_ops->link_update)(dev, 0);
1341 rte_eth_dev_stop(uint16_t port_id)
1343 struct rte_eth_dev *dev;
1345 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1346 dev = &rte_eth_devices[port_id];
1348 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1350 if (dev->data->dev_started == 0) {
1351 RTE_ETHDEV_LOG(INFO,
1352 "Device with port_id=%"PRIu16" already stopped\n",
1357 dev->data->dev_started = 0;
1358 (*dev->dev_ops->dev_stop)(dev);
1362 rte_eth_dev_set_link_up(uint16_t port_id)
1364 struct rte_eth_dev *dev;
1366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1368 dev = &rte_eth_devices[port_id];
1370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1371 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1375 rte_eth_dev_set_link_down(uint16_t port_id)
1377 struct rte_eth_dev *dev;
1379 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1381 dev = &rte_eth_devices[port_id];
1383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1384 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1388 rte_eth_dev_close(uint16_t port_id)
1390 struct rte_eth_dev *dev;
1392 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1393 dev = &rte_eth_devices[port_id];
1395 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1396 dev->data->dev_started = 0;
1397 (*dev->dev_ops->dev_close)(dev);
1399 dev->data->nb_rx_queues = 0;
1400 rte_free(dev->data->rx_queues);
1401 dev->data->rx_queues = NULL;
1402 dev->data->nb_tx_queues = 0;
1403 rte_free(dev->data->tx_queues);
1404 dev->data->tx_queues = NULL;
1408 rte_eth_dev_reset(uint16_t port_id)
1410 struct rte_eth_dev *dev;
1413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1414 dev = &rte_eth_devices[port_id];
1416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1418 rte_eth_dev_stop(port_id);
1419 ret = dev->dev_ops->dev_reset(dev);
1421 return eth_err(port_id, ret);
1424 int __rte_experimental
1425 rte_eth_dev_is_removed(uint16_t port_id)
1427 struct rte_eth_dev *dev;
1430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1432 dev = &rte_eth_devices[port_id];
1434 if (dev->state == RTE_ETH_DEV_REMOVED)
1437 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1439 ret = dev->dev_ops->is_removed(dev);
1441 /* Device is physically removed. */
1442 dev->state = RTE_ETH_DEV_REMOVED;
1448 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1449 uint16_t nb_rx_desc, unsigned int socket_id,
1450 const struct rte_eth_rxconf *rx_conf,
1451 struct rte_mempool *mp)
1454 uint32_t mbp_buf_size;
1455 struct rte_eth_dev *dev;
1456 struct rte_eth_dev_info dev_info;
1457 struct rte_eth_rxconf local_conf;
1460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1462 dev = &rte_eth_devices[port_id];
1463 if (rx_queue_id >= dev->data->nb_rx_queues) {
1464 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1472 * Check the size of the mbuf data buffer.
1473 * This value must be provided in the private data of the memory pool.
1474 * First check that the memory pool has a valid private data.
1476 rte_eth_dev_info_get(port_id, &dev_info);
1477 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1478 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1479 mp->name, (int)mp->private_data_size,
1480 (int)sizeof(struct rte_pktmbuf_pool_private));
1483 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1485 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1487 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1488 mp->name, (int)mbp_buf_size,
1489 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1490 (int)RTE_PKTMBUF_HEADROOM,
1491 (int)dev_info.min_rx_bufsize);
1495 /* Use default specified by driver, if nb_rx_desc is zero */
1496 if (nb_rx_desc == 0) {
1497 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1498 /* If driver default is also zero, fall back on EAL default */
1499 if (nb_rx_desc == 0)
1500 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1503 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1504 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1505 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1508 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1509 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1510 dev_info.rx_desc_lim.nb_min,
1511 dev_info.rx_desc_lim.nb_align);
1515 if (dev->data->dev_started &&
1516 !(dev_info.dev_capa &
1517 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1520 if (dev->data->dev_started &&
1521 (dev->data->rx_queue_state[rx_queue_id] !=
1522 RTE_ETH_QUEUE_STATE_STOPPED))
1525 rxq = dev->data->rx_queues;
1526 if (rxq[rx_queue_id]) {
1527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1529 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1530 rxq[rx_queue_id] = NULL;
1533 if (rx_conf == NULL)
1534 rx_conf = &dev_info.default_rxconf;
1536 local_conf = *rx_conf;
1539 * If an offloading has already been enabled in
1540 * rte_eth_dev_configure(), it has been enabled on all queues,
1541 * so there is no need to enable it in this queue again.
1542 * The local_conf.offloads input to underlying PMD only carries
1543 * those offloadings which are only enabled on this queue and
1544 * not enabled on all queues.
1546 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1549 * New added offloadings for this queue are those not enabled in
1550 * rte_eth_dev_configure() and they must be per-queue type.
1551 * A pure per-port offloading can't be enabled on a queue while
1552 * disabled on another queue. A pure per-port offloading can't
1553 * be enabled for any queue as new added one if it hasn't been
1554 * enabled in rte_eth_dev_configure().
1556 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1557 local_conf.offloads) {
1559 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1560 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1561 port_id, rx_queue_id, local_conf.offloads,
1562 dev_info.rx_queue_offload_capa,
1567 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1568 socket_id, &local_conf, mp);
1570 if (!dev->data->min_rx_buf_size ||
1571 dev->data->min_rx_buf_size > mbp_buf_size)
1572 dev->data->min_rx_buf_size = mbp_buf_size;
1575 return eth_err(port_id, ret);
1579 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1580 uint16_t nb_tx_desc, unsigned int socket_id,
1581 const struct rte_eth_txconf *tx_conf)
1583 struct rte_eth_dev *dev;
1584 struct rte_eth_dev_info dev_info;
1585 struct rte_eth_txconf local_conf;
1588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1590 dev = &rte_eth_devices[port_id];
1591 if (tx_queue_id >= dev->data->nb_tx_queues) {
1592 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1596 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1599 rte_eth_dev_info_get(port_id, &dev_info);
1601 /* Use default specified by driver, if nb_tx_desc is zero */
1602 if (nb_tx_desc == 0) {
1603 nb_tx_desc = dev_info.default_txportconf.ring_size;
1604 /* If driver default is zero, fall back on EAL default */
1605 if (nb_tx_desc == 0)
1606 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1608 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1609 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1610 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1612 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1613 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1614 dev_info.tx_desc_lim.nb_min,
1615 dev_info.tx_desc_lim.nb_align);
1619 if (dev->data->dev_started &&
1620 !(dev_info.dev_capa &
1621 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1624 if (dev->data->dev_started &&
1625 (dev->data->tx_queue_state[tx_queue_id] !=
1626 RTE_ETH_QUEUE_STATE_STOPPED))
1629 txq = dev->data->tx_queues;
1630 if (txq[tx_queue_id]) {
1631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1633 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1634 txq[tx_queue_id] = NULL;
1637 if (tx_conf == NULL)
1638 tx_conf = &dev_info.default_txconf;
1640 local_conf = *tx_conf;
1643 * If an offloading has already been enabled in
1644 * rte_eth_dev_configure(), it has been enabled on all queues,
1645 * so there is no need to enable it in this queue again.
1646 * The local_conf.offloads input to underlying PMD only carries
1647 * those offloadings which are only enabled on this queue and
1648 * not enabled on all queues.
1650 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1653 * New added offloadings for this queue are those not enabled in
1654 * rte_eth_dev_configure() and they must be per-queue type.
1655 * A pure per-port offloading can't be enabled on a queue while
1656 * disabled on another queue. A pure per-port offloading can't
1657 * be enabled for any queue as new added one if it hasn't been
1658 * enabled in rte_eth_dev_configure().
1660 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1661 local_conf.offloads) {
1663 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1664 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1665 port_id, tx_queue_id, local_conf.offloads,
1666 dev_info.tx_queue_offload_capa,
1671 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1672 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1676 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1677 void *userdata __rte_unused)
1681 for (i = 0; i < unsent; i++)
1682 rte_pktmbuf_free(pkts[i]);
1686 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1689 uint64_t *count = userdata;
1692 for (i = 0; i < unsent; i++)
1693 rte_pktmbuf_free(pkts[i]);
1699 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1700 buffer_tx_error_fn cbfn, void *userdata)
1702 buffer->error_callback = cbfn;
1703 buffer->error_userdata = userdata;
1708 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1715 buffer->size = size;
1716 if (buffer->error_callback == NULL) {
1717 ret = rte_eth_tx_buffer_set_err_callback(
1718 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1725 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1727 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1730 /* Validate Input Data. Bail if not valid or not supported. */
1731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1732 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1734 /* Call driver to free pending mbufs. */
1735 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1737 return eth_err(port_id, ret);
1741 rte_eth_promiscuous_enable(uint16_t port_id)
1743 struct rte_eth_dev *dev;
1745 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1746 dev = &rte_eth_devices[port_id];
1748 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1749 (*dev->dev_ops->promiscuous_enable)(dev);
1750 dev->data->promiscuous = 1;
1754 rte_eth_promiscuous_disable(uint16_t port_id)
1756 struct rte_eth_dev *dev;
1758 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1759 dev = &rte_eth_devices[port_id];
1761 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1762 dev->data->promiscuous = 0;
1763 (*dev->dev_ops->promiscuous_disable)(dev);
1767 rte_eth_promiscuous_get(uint16_t port_id)
1769 struct rte_eth_dev *dev;
1771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1773 dev = &rte_eth_devices[port_id];
1774 return dev->data->promiscuous;
1778 rte_eth_allmulticast_enable(uint16_t port_id)
1780 struct rte_eth_dev *dev;
1782 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1783 dev = &rte_eth_devices[port_id];
1785 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1786 (*dev->dev_ops->allmulticast_enable)(dev);
1787 dev->data->all_multicast = 1;
1791 rte_eth_allmulticast_disable(uint16_t port_id)
1793 struct rte_eth_dev *dev;
1795 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1796 dev = &rte_eth_devices[port_id];
1798 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1799 dev->data->all_multicast = 0;
1800 (*dev->dev_ops->allmulticast_disable)(dev);
1804 rte_eth_allmulticast_get(uint16_t port_id)
1806 struct rte_eth_dev *dev;
1808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1810 dev = &rte_eth_devices[port_id];
1811 return dev->data->all_multicast;
1815 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1817 struct rte_eth_dev *dev;
1819 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1820 dev = &rte_eth_devices[port_id];
1822 if (dev->data->dev_conf.intr_conf.lsc &&
1823 dev->data->dev_started)
1824 rte_eth_linkstatus_get(dev, eth_link);
1826 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1827 (*dev->dev_ops->link_update)(dev, 1);
1828 *eth_link = dev->data->dev_link;
1833 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1835 struct rte_eth_dev *dev;
1837 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1838 dev = &rte_eth_devices[port_id];
1840 if (dev->data->dev_conf.intr_conf.lsc &&
1841 dev->data->dev_started)
1842 rte_eth_linkstatus_get(dev, eth_link);
1844 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1845 (*dev->dev_ops->link_update)(dev, 0);
1846 *eth_link = dev->data->dev_link;
1851 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1853 struct rte_eth_dev *dev;
1855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1857 dev = &rte_eth_devices[port_id];
1858 memset(stats, 0, sizeof(*stats));
1860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1861 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1862 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1866 rte_eth_stats_reset(uint16_t port_id)
1868 struct rte_eth_dev *dev;
1870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1871 dev = &rte_eth_devices[port_id];
1873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1874 (*dev->dev_ops->stats_reset)(dev);
1875 dev->data->rx_mbuf_alloc_failed = 0;
1881 get_xstats_basic_count(struct rte_eth_dev *dev)
1883 uint16_t nb_rxqs, nb_txqs;
1886 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1887 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1889 count = RTE_NB_STATS;
1890 count += nb_rxqs * RTE_NB_RXQ_STATS;
1891 count += nb_txqs * RTE_NB_TXQ_STATS;
1897 get_xstats_count(uint16_t port_id)
1899 struct rte_eth_dev *dev;
1902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1903 dev = &rte_eth_devices[port_id];
1904 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1905 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1908 return eth_err(port_id, count);
1910 if (dev->dev_ops->xstats_get_names != NULL) {
1911 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1913 return eth_err(port_id, count);
1918 count += get_xstats_basic_count(dev);
1924 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1927 int cnt_xstats, idx_xstat;
1929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1932 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1937 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1942 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1943 if (cnt_xstats < 0) {
1944 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1948 /* Get id-name lookup table */
1949 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1951 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1952 port_id, xstats_names, cnt_xstats, NULL)) {
1953 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1957 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1958 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1967 /* retrieve basic stats names */
1969 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1970 struct rte_eth_xstat_name *xstats_names)
1972 int cnt_used_entries = 0;
1973 uint32_t idx, id_queue;
1976 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1977 snprintf(xstats_names[cnt_used_entries].name,
1978 sizeof(xstats_names[0].name),
1979 "%s", rte_stats_strings[idx].name);
1982 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1983 for (id_queue = 0; id_queue < num_q; id_queue++) {
1984 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1985 snprintf(xstats_names[cnt_used_entries].name,
1986 sizeof(xstats_names[0].name),
1988 id_queue, rte_rxq_stats_strings[idx].name);
1993 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1994 for (id_queue = 0; id_queue < num_q; id_queue++) {
1995 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1996 snprintf(xstats_names[cnt_used_entries].name,
1997 sizeof(xstats_names[0].name),
1999 id_queue, rte_txq_stats_strings[idx].name);
2003 return cnt_used_entries;
2006 /* retrieve ethdev extended statistics names */
2008 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2009 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2012 struct rte_eth_xstat_name *xstats_names_copy;
2013 unsigned int no_basic_stat_requested = 1;
2014 unsigned int no_ext_stat_requested = 1;
2015 unsigned int expected_entries;
2016 unsigned int basic_count;
2017 struct rte_eth_dev *dev;
2021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2022 dev = &rte_eth_devices[port_id];
2024 basic_count = get_xstats_basic_count(dev);
2025 ret = get_xstats_count(port_id);
2028 expected_entries = (unsigned int)ret;
2030 /* Return max number of stats if no ids given */
2033 return expected_entries;
2034 else if (xstats_names && size < expected_entries)
2035 return expected_entries;
2038 if (ids && !xstats_names)
2041 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2042 uint64_t ids_copy[size];
2044 for (i = 0; i < size; i++) {
2045 if (ids[i] < basic_count) {
2046 no_basic_stat_requested = 0;
2051 * Convert ids to xstats ids that PMD knows.
2052 * ids known by user are basic + extended stats.
2054 ids_copy[i] = ids[i] - basic_count;
2057 if (no_basic_stat_requested)
2058 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2059 xstats_names, ids_copy, size);
2062 /* Retrieve all stats */
2064 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2066 if (num_stats < 0 || num_stats > (int)expected_entries)
2069 return expected_entries;
2072 xstats_names_copy = calloc(expected_entries,
2073 sizeof(struct rte_eth_xstat_name));
2075 if (!xstats_names_copy) {
2076 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2081 for (i = 0; i < size; i++) {
2082 if (ids[i] >= basic_count) {
2083 no_ext_stat_requested = 0;
2089 /* Fill xstats_names_copy structure */
2090 if (ids && no_ext_stat_requested) {
2091 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2093 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2096 free(xstats_names_copy);
2102 for (i = 0; i < size; i++) {
2103 if (ids[i] >= expected_entries) {
2104 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2105 free(xstats_names_copy);
2108 xstats_names[i] = xstats_names_copy[ids[i]];
2111 free(xstats_names_copy);
2116 rte_eth_xstats_get_names(uint16_t port_id,
2117 struct rte_eth_xstat_name *xstats_names,
2120 struct rte_eth_dev *dev;
2121 int cnt_used_entries;
2122 int cnt_expected_entries;
2123 int cnt_driver_entries;
2125 cnt_expected_entries = get_xstats_count(port_id);
2126 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2127 (int)size < cnt_expected_entries)
2128 return cnt_expected_entries;
2130 /* port_id checked in get_xstats_count() */
2131 dev = &rte_eth_devices[port_id];
2133 cnt_used_entries = rte_eth_basic_stats_get_names(
2136 if (dev->dev_ops->xstats_get_names != NULL) {
2137 /* If there are any driver-specific xstats, append them
2140 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2142 xstats_names + cnt_used_entries,
2143 size - cnt_used_entries);
2144 if (cnt_driver_entries < 0)
2145 return eth_err(port_id, cnt_driver_entries);
2146 cnt_used_entries += cnt_driver_entries;
2149 return cnt_used_entries;
2154 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2156 struct rte_eth_dev *dev;
2157 struct rte_eth_stats eth_stats;
2158 unsigned int count = 0, i, q;
2159 uint64_t val, *stats_ptr;
2160 uint16_t nb_rxqs, nb_txqs;
2163 ret = rte_eth_stats_get(port_id, ð_stats);
2167 dev = &rte_eth_devices[port_id];
2169 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2170 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2173 for (i = 0; i < RTE_NB_STATS; i++) {
2174 stats_ptr = RTE_PTR_ADD(ð_stats,
2175 rte_stats_strings[i].offset);
2177 xstats[count++].value = val;
2181 for (q = 0; q < nb_rxqs; q++) {
2182 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2183 stats_ptr = RTE_PTR_ADD(ð_stats,
2184 rte_rxq_stats_strings[i].offset +
2185 q * sizeof(uint64_t));
2187 xstats[count++].value = val;
2192 for (q = 0; q < nb_txqs; q++) {
2193 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2194 stats_ptr = RTE_PTR_ADD(ð_stats,
2195 rte_txq_stats_strings[i].offset +
2196 q * sizeof(uint64_t));
2198 xstats[count++].value = val;
2204 /* retrieve ethdev extended statistics */
2206 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2207 uint64_t *values, unsigned int size)
2209 unsigned int no_basic_stat_requested = 1;
2210 unsigned int no_ext_stat_requested = 1;
2211 unsigned int num_xstats_filled;
2212 unsigned int basic_count;
2213 uint16_t expected_entries;
2214 struct rte_eth_dev *dev;
2218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2219 ret = get_xstats_count(port_id);
2222 expected_entries = (uint16_t)ret;
2223 struct rte_eth_xstat xstats[expected_entries];
2224 dev = &rte_eth_devices[port_id];
2225 basic_count = get_xstats_basic_count(dev);
2227 /* Return max number of stats if no ids given */
2230 return expected_entries;
2231 else if (values && size < expected_entries)
2232 return expected_entries;
2238 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2239 unsigned int basic_count = get_xstats_basic_count(dev);
2240 uint64_t ids_copy[size];
2242 for (i = 0; i < size; i++) {
2243 if (ids[i] < basic_count) {
2244 no_basic_stat_requested = 0;
2249 * Convert ids to xstats ids that PMD knows.
2250 * ids known by user are basic + extended stats.
2252 ids_copy[i] = ids[i] - basic_count;
2255 if (no_basic_stat_requested)
2256 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2261 for (i = 0; i < size; i++) {
2262 if (ids[i] >= basic_count) {
2263 no_ext_stat_requested = 0;
2269 /* Fill the xstats structure */
2270 if (ids && no_ext_stat_requested)
2271 ret = rte_eth_basic_stats_get(port_id, xstats);
2273 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2277 num_xstats_filled = (unsigned int)ret;
2279 /* Return all stats */
2281 for (i = 0; i < num_xstats_filled; i++)
2282 values[i] = xstats[i].value;
2283 return expected_entries;
2287 for (i = 0; i < size; i++) {
2288 if (ids[i] >= expected_entries) {
2289 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2292 values[i] = xstats[ids[i]].value;
2298 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2301 struct rte_eth_dev *dev;
2302 unsigned int count = 0, i;
2303 signed int xcount = 0;
2304 uint16_t nb_rxqs, nb_txqs;
2307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2309 dev = &rte_eth_devices[port_id];
2311 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2312 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2314 /* Return generic statistics */
2315 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2316 (nb_txqs * RTE_NB_TXQ_STATS);
2318 /* implemented by the driver */
2319 if (dev->dev_ops->xstats_get != NULL) {
2320 /* Retrieve the xstats from the driver at the end of the
2323 xcount = (*dev->dev_ops->xstats_get)(dev,
2324 xstats ? xstats + count : NULL,
2325 (n > count) ? n - count : 0);
2328 return eth_err(port_id, xcount);
2331 if (n < count + xcount || xstats == NULL)
2332 return count + xcount;
2334 /* now fill the xstats structure */
2335 ret = rte_eth_basic_stats_get(port_id, xstats);
2340 for (i = 0; i < count; i++)
2342 /* add an offset to driver-specific stats */
2343 for ( ; i < count + xcount; i++)
2344 xstats[i].id += count;
2346 return count + xcount;
2349 /* reset ethdev extended statistics */
2351 rte_eth_xstats_reset(uint16_t port_id)
2353 struct rte_eth_dev *dev;
2355 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2356 dev = &rte_eth_devices[port_id];
2358 /* implemented by the driver */
2359 if (dev->dev_ops->xstats_reset != NULL) {
2360 (*dev->dev_ops->xstats_reset)(dev);
2364 /* fallback to default */
2365 rte_eth_stats_reset(port_id);
2369 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2372 struct rte_eth_dev *dev;
2374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2376 dev = &rte_eth_devices[port_id];
2378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2380 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2383 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2386 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2389 return (*dev->dev_ops->queue_stats_mapping_set)
2390 (dev, queue_id, stat_idx, is_rx);
2395 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2398 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2399 stat_idx, STAT_QMAP_TX));
2404 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2407 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2408 stat_idx, STAT_QMAP_RX));
2412 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2414 struct rte_eth_dev *dev;
2416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2417 dev = &rte_eth_devices[port_id];
2419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2420 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2421 fw_version, fw_size));
2425 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2427 struct rte_eth_dev *dev;
2428 const struct rte_eth_desc_lim lim = {
2429 .nb_max = UINT16_MAX,
2434 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2435 dev = &rte_eth_devices[port_id];
2437 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2438 dev_info->rx_desc_lim = lim;
2439 dev_info->tx_desc_lim = lim;
2440 dev_info->device = dev->device;
2442 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2443 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2444 dev_info->driver_name = dev->device->driver->name;
2445 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2446 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2448 dev_info->dev_flags = &dev->data->dev_flags;
2452 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2453 uint32_t *ptypes, int num)
2456 struct rte_eth_dev *dev;
2457 const uint32_t *all_ptypes;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2462 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2467 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2468 if (all_ptypes[i] & ptype_mask) {
2470 ptypes[j] = all_ptypes[i];
2478 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2480 struct rte_eth_dev *dev;
2482 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2483 dev = &rte_eth_devices[port_id];
2484 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2489 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2491 struct rte_eth_dev *dev;
2493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2495 dev = &rte_eth_devices[port_id];
2496 *mtu = dev->data->mtu;
2501 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2504 struct rte_eth_dev *dev;
2506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2507 dev = &rte_eth_devices[port_id];
2508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2510 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2512 dev->data->mtu = mtu;
2514 return eth_err(port_id, ret);
2518 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2520 struct rte_eth_dev *dev;
2523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2524 dev = &rte_eth_devices[port_id];
2525 if (!(dev->data->dev_conf.rxmode.offloads &
2526 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2527 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2532 if (vlan_id > 4095) {
2533 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2539 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2541 struct rte_vlan_filter_conf *vfc;
2545 vfc = &dev->data->vlan_filter_conf;
2546 vidx = vlan_id / 64;
2547 vbit = vlan_id % 64;
2550 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2552 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2555 return eth_err(port_id, ret);
2559 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2562 struct rte_eth_dev *dev;
2564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2565 dev = &rte_eth_devices[port_id];
2566 if (rx_queue_id >= dev->data->nb_rx_queues) {
2567 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2572 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2578 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2579 enum rte_vlan_type vlan_type,
2582 struct rte_eth_dev *dev;
2584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2588 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2593 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2595 struct rte_eth_dev *dev;
2599 uint64_t orig_offloads;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2604 /* save original values in case of failure */
2605 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2607 /*check which option changed by application*/
2608 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2609 org = !!(dev->data->dev_conf.rxmode.offloads &
2610 DEV_RX_OFFLOAD_VLAN_STRIP);
2613 dev->data->dev_conf.rxmode.offloads |=
2614 DEV_RX_OFFLOAD_VLAN_STRIP;
2616 dev->data->dev_conf.rxmode.offloads &=
2617 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2618 mask |= ETH_VLAN_STRIP_MASK;
2621 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2622 org = !!(dev->data->dev_conf.rxmode.offloads &
2623 DEV_RX_OFFLOAD_VLAN_FILTER);
2626 dev->data->dev_conf.rxmode.offloads |=
2627 DEV_RX_OFFLOAD_VLAN_FILTER;
2629 dev->data->dev_conf.rxmode.offloads &=
2630 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2631 mask |= ETH_VLAN_FILTER_MASK;
2634 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2635 org = !!(dev->data->dev_conf.rxmode.offloads &
2636 DEV_RX_OFFLOAD_VLAN_EXTEND);
2639 dev->data->dev_conf.rxmode.offloads |=
2640 DEV_RX_OFFLOAD_VLAN_EXTEND;
2642 dev->data->dev_conf.rxmode.offloads &=
2643 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2644 mask |= ETH_VLAN_EXTEND_MASK;
2651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2652 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2654 /* hit an error restore original values */
2655 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2658 return eth_err(port_id, ret);
2662 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2664 struct rte_eth_dev *dev;
2667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2668 dev = &rte_eth_devices[port_id];
2670 if (dev->data->dev_conf.rxmode.offloads &
2671 DEV_RX_OFFLOAD_VLAN_STRIP)
2672 ret |= ETH_VLAN_STRIP_OFFLOAD;
2674 if (dev->data->dev_conf.rxmode.offloads &
2675 DEV_RX_OFFLOAD_VLAN_FILTER)
2676 ret |= ETH_VLAN_FILTER_OFFLOAD;
2678 if (dev->data->dev_conf.rxmode.offloads &
2679 DEV_RX_OFFLOAD_VLAN_EXTEND)
2680 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2686 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2688 struct rte_eth_dev *dev;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2691 dev = &rte_eth_devices[port_id];
2692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2694 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2698 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2700 struct rte_eth_dev *dev;
2702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2703 dev = &rte_eth_devices[port_id];
2704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2705 memset(fc_conf, 0, sizeof(*fc_conf));
2706 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2710 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2712 struct rte_eth_dev *dev;
2714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2715 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2716 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2720 dev = &rte_eth_devices[port_id];
2721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2722 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2726 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2727 struct rte_eth_pfc_conf *pfc_conf)
2729 struct rte_eth_dev *dev;
2731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2732 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2733 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2737 dev = &rte_eth_devices[port_id];
2738 /* High water, low water validation are device specific */
2739 if (*dev->dev_ops->priority_flow_ctrl_set)
2740 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2746 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2754 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2755 for (i = 0; i < num; i++) {
2756 if (reta_conf[i].mask)
2764 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2768 uint16_t i, idx, shift;
2774 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2778 for (i = 0; i < reta_size; i++) {
2779 idx = i / RTE_RETA_GROUP_SIZE;
2780 shift = i % RTE_RETA_GROUP_SIZE;
2781 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2782 (reta_conf[idx].reta[shift] >= max_rxq)) {
2784 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2786 reta_conf[idx].reta[shift], max_rxq);
2795 rte_eth_dev_rss_reta_update(uint16_t port_id,
2796 struct rte_eth_rss_reta_entry64 *reta_conf,
2799 struct rte_eth_dev *dev;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2803 /* Check mask bits */
2804 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2808 dev = &rte_eth_devices[port_id];
2810 /* Check entry value */
2811 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2812 dev->data->nb_rx_queues);
2816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2817 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2822 rte_eth_dev_rss_reta_query(uint16_t port_id,
2823 struct rte_eth_rss_reta_entry64 *reta_conf,
2826 struct rte_eth_dev *dev;
2829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 /* Check mask bits */
2832 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2836 dev = &rte_eth_devices[port_id];
2837 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2838 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2843 rte_eth_dev_rss_hash_update(uint16_t port_id,
2844 struct rte_eth_rss_conf *rss_conf)
2846 struct rte_eth_dev *dev;
2847 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2850 dev = &rte_eth_devices[port_id];
2851 rte_eth_dev_info_get(port_id, &dev_info);
2852 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2853 dev_info.flow_type_rss_offloads) {
2855 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2856 port_id, rss_conf->rss_hf,
2857 dev_info.flow_type_rss_offloads);
2860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2861 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2866 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2867 struct rte_eth_rss_conf *rss_conf)
2869 struct rte_eth_dev *dev;
2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2872 dev = &rte_eth_devices[port_id];
2873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2874 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2879 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2880 struct rte_eth_udp_tunnel *udp_tunnel)
2882 struct rte_eth_dev *dev;
2884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2885 if (udp_tunnel == NULL) {
2886 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2890 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2891 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2895 dev = &rte_eth_devices[port_id];
2896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2897 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2902 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2903 struct rte_eth_udp_tunnel *udp_tunnel)
2905 struct rte_eth_dev *dev;
2907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2908 dev = &rte_eth_devices[port_id];
2910 if (udp_tunnel == NULL) {
2911 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2915 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2916 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2921 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2926 rte_eth_led_on(uint16_t port_id)
2928 struct rte_eth_dev *dev;
2930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2931 dev = &rte_eth_devices[port_id];
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2933 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2937 rte_eth_led_off(uint16_t port_id)
2939 struct rte_eth_dev *dev;
2941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2942 dev = &rte_eth_devices[port_id];
2943 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2944 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2948 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2952 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2954 struct rte_eth_dev_info dev_info;
2955 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2959 rte_eth_dev_info_get(port_id, &dev_info);
2961 for (i = 0; i < dev_info.max_mac_addrs; i++)
2962 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2968 static const struct ether_addr null_mac_addr;
2971 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2974 struct rte_eth_dev *dev;
2979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2980 dev = &rte_eth_devices[port_id];
2981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2983 if (is_zero_ether_addr(addr)) {
2984 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2988 if (pool >= ETH_64_POOLS) {
2989 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2993 index = get_mac_addr_index(port_id, addr);
2995 index = get_mac_addr_index(port_id, &null_mac_addr);
2997 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3002 pool_mask = dev->data->mac_pool_sel[index];
3004 /* Check if both MAC address and pool is already there, and do nothing */
3005 if (pool_mask & (1ULL << pool))
3010 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3013 /* Update address in NIC data structure */
3014 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3016 /* Update pool bitmap in NIC data structure */
3017 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3020 return eth_err(port_id, ret);
3024 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3026 struct rte_eth_dev *dev;
3029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3030 dev = &rte_eth_devices[port_id];
3031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3033 index = get_mac_addr_index(port_id, addr);
3036 "Port %u: Cannot remove default MAC address\n",
3039 } else if (index < 0)
3040 return 0; /* Do nothing if address wasn't found */
3043 (*dev->dev_ops->mac_addr_remove)(dev, index);
3045 /* Update address in NIC data structure */
3046 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3048 /* reset pool bitmap */
3049 dev->data->mac_pool_sel[index] = 0;
3055 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3057 struct rte_eth_dev *dev;
3060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 if (!is_valid_assigned_ether_addr(addr))
3065 dev = &rte_eth_devices[port_id];
3066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3068 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3072 /* Update default address in NIC data structure */
3073 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3080 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3084 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3086 struct rte_eth_dev_info dev_info;
3087 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3090 rte_eth_dev_info_get(port_id, &dev_info);
3091 if (!dev->data->hash_mac_addrs)
3094 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3095 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3096 ETHER_ADDR_LEN) == 0)
3103 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3108 struct rte_eth_dev *dev;
3110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3112 dev = &rte_eth_devices[port_id];
3113 if (is_zero_ether_addr(addr)) {
3114 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3119 index = get_hash_mac_addr_index(port_id, addr);
3120 /* Check if it's already there, and do nothing */
3121 if ((index >= 0) && on)
3127 "Port %u: the MAC address was not set in UTA\n",
3132 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3134 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3141 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3143 /* Update address in NIC data structure */
3145 ether_addr_copy(addr,
3146 &dev->data->hash_mac_addrs[index]);
3148 ether_addr_copy(&null_mac_addr,
3149 &dev->data->hash_mac_addrs[index]);
3152 return eth_err(port_id, ret);
3156 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3158 struct rte_eth_dev *dev;
3160 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3162 dev = &rte_eth_devices[port_id];
3164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3165 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3169 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3172 struct rte_eth_dev *dev;
3173 struct rte_eth_dev_info dev_info;
3174 struct rte_eth_link link;
3176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3178 dev = &rte_eth_devices[port_id];
3179 rte_eth_dev_info_get(port_id, &dev_info);
3180 link = dev->data->dev_link;
3182 if (queue_idx > dev_info.max_tx_queues) {
3184 "Set queue rate limit:port %u: invalid queue id=%u\n",
3185 port_id, queue_idx);
3189 if (tx_rate > link.link_speed) {
3191 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3192 tx_rate, link.link_speed);
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3197 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3198 queue_idx, tx_rate));
3202 rte_eth_mirror_rule_set(uint16_t port_id,
3203 struct rte_eth_mirror_conf *mirror_conf,
3204 uint8_t rule_id, uint8_t on)
3206 struct rte_eth_dev *dev;
3208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3209 if (mirror_conf->rule_type == 0) {
3210 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3214 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3215 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3220 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3221 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3222 (mirror_conf->pool_mask == 0)) {
3224 "Invalid mirror pool, pool mask can not be 0\n");
3228 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3229 mirror_conf->vlan.vlan_mask == 0) {
3231 "Invalid vlan mask, vlan mask can not be 0\n");
3235 dev = &rte_eth_devices[port_id];
3236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3238 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3239 mirror_conf, rule_id, on));
3243 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3245 struct rte_eth_dev *dev;
3247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3249 dev = &rte_eth_devices[port_id];
3250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3252 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3256 RTE_INIT(eth_dev_init_cb_lists)
3260 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3261 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3265 rte_eth_dev_callback_register(uint16_t port_id,
3266 enum rte_eth_event_type event,
3267 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3269 struct rte_eth_dev *dev;
3270 struct rte_eth_dev_callback *user_cb;
3271 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3277 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3278 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3282 if (port_id == RTE_ETH_ALL) {
3284 last_port = RTE_MAX_ETHPORTS - 1;
3286 next_port = last_port = port_id;
3289 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3292 dev = &rte_eth_devices[next_port];
3294 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3295 if (user_cb->cb_fn == cb_fn &&
3296 user_cb->cb_arg == cb_arg &&
3297 user_cb->event == event) {
3302 /* create a new callback. */
3303 if (user_cb == NULL) {
3304 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3305 sizeof(struct rte_eth_dev_callback), 0);
3306 if (user_cb != NULL) {
3307 user_cb->cb_fn = cb_fn;
3308 user_cb->cb_arg = cb_arg;
3309 user_cb->event = event;
3310 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3313 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3314 rte_eth_dev_callback_unregister(port_id, event,
3320 } while (++next_port <= last_port);
3322 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3327 rte_eth_dev_callback_unregister(uint16_t port_id,
3328 enum rte_eth_event_type event,
3329 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3332 struct rte_eth_dev *dev;
3333 struct rte_eth_dev_callback *cb, *next;
3334 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3340 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3341 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3345 if (port_id == RTE_ETH_ALL) {
3347 last_port = RTE_MAX_ETHPORTS - 1;
3349 next_port = last_port = port_id;
3352 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3355 dev = &rte_eth_devices[next_port];
3357 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3360 next = TAILQ_NEXT(cb, next);
3362 if (cb->cb_fn != cb_fn || cb->event != event ||
3363 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3367 * if this callback is not executing right now,
3370 if (cb->active == 0) {
3371 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3377 } while (++next_port <= last_port);
3379 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3384 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3385 enum rte_eth_event_type event, void *ret_param)
3387 struct rte_eth_dev_callback *cb_lst;
3388 struct rte_eth_dev_callback dev_cb;
3391 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3392 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3393 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3397 if (ret_param != NULL)
3398 dev_cb.ret_param = ret_param;
3400 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3401 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3402 dev_cb.cb_arg, dev_cb.ret_param);
3403 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3406 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3411 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3416 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3418 dev->state = RTE_ETH_DEV_ATTACHED;
3422 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3425 struct rte_eth_dev *dev;
3426 struct rte_intr_handle *intr_handle;
3430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3432 dev = &rte_eth_devices[port_id];
3434 if (!dev->intr_handle) {
3435 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3439 intr_handle = dev->intr_handle;
3440 if (!intr_handle->intr_vec) {
3441 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3445 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3446 vec = intr_handle->intr_vec[qid];
3447 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3448 if (rc && rc != -EEXIST) {
3450 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3451 port_id, qid, op, epfd, vec);
3458 int __rte_experimental
3459 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3461 struct rte_intr_handle *intr_handle;
3462 struct rte_eth_dev *dev;
3463 unsigned int efd_idx;
3467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3469 dev = &rte_eth_devices[port_id];
3471 if (queue_id >= dev->data->nb_rx_queues) {
3472 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3476 if (!dev->intr_handle) {
3477 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3481 intr_handle = dev->intr_handle;
3482 if (!intr_handle->intr_vec) {
3483 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3487 vec = intr_handle->intr_vec[queue_id];
3488 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3489 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3490 fd = intr_handle->efds[efd_idx];
3495 const struct rte_memzone *
3496 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3497 uint16_t queue_id, size_t size, unsigned align,
3500 char z_name[RTE_MEMZONE_NAMESIZE];
3501 const struct rte_memzone *mz;
3503 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3504 dev->data->port_id, queue_id, ring_name);
3506 mz = rte_memzone_lookup(z_name);
3510 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3511 RTE_MEMZONE_IOVA_CONTIG, align);
3514 int __rte_experimental
3515 rte_eth_dev_create(struct rte_device *device, const char *name,
3516 size_t priv_data_size,
3517 ethdev_bus_specific_init ethdev_bus_specific_init,
3518 void *bus_init_params,
3519 ethdev_init_t ethdev_init, void *init_params)
3521 struct rte_eth_dev *ethdev;
3524 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3526 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3527 ethdev = rte_eth_dev_allocate(name);
3531 if (priv_data_size) {
3532 ethdev->data->dev_private = rte_zmalloc_socket(
3533 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3536 if (!ethdev->data->dev_private) {
3537 RTE_LOG(ERR, EAL, "failed to allocate private data");
3543 ethdev = rte_eth_dev_attach_secondary(name);
3545 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3546 "ethdev doesn't exist");
3551 ethdev->device = device;
3553 if (ethdev_bus_specific_init) {
3554 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3557 "ethdev bus specific initialisation failed");
3562 retval = ethdev_init(ethdev, init_params);
3564 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3568 rte_eth_dev_probing_finish(ethdev);
3573 rte_eth_dev_release_port(ethdev);
3577 int __rte_experimental
3578 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3579 ethdev_uninit_t ethdev_uninit)
3583 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3587 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3588 if (ethdev_uninit) {
3589 ret = ethdev_uninit(ethdev);
3594 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3595 return rte_eth_dev_release_port_secondary(ethdev);
3597 return rte_eth_dev_release_port(ethdev);
3601 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3602 int epfd, int op, void *data)
3605 struct rte_eth_dev *dev;
3606 struct rte_intr_handle *intr_handle;
3609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3611 dev = &rte_eth_devices[port_id];
3612 if (queue_id >= dev->data->nb_rx_queues) {
3613 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3617 if (!dev->intr_handle) {
3618 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3622 intr_handle = dev->intr_handle;
3623 if (!intr_handle->intr_vec) {
3624 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3628 vec = intr_handle->intr_vec[queue_id];
3629 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3630 if (rc && rc != -EEXIST) {
3632 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3633 port_id, queue_id, op, epfd, vec);
3641 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3644 struct rte_eth_dev *dev;
3646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3648 dev = &rte_eth_devices[port_id];
3650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3651 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3656 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3659 struct rte_eth_dev *dev;
3661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3663 dev = &rte_eth_devices[port_id];
3665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3666 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3672 rte_eth_dev_filter_supported(uint16_t port_id,
3673 enum rte_filter_type filter_type)
3675 struct rte_eth_dev *dev;
3677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3679 dev = &rte_eth_devices[port_id];
3680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3681 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3682 RTE_ETH_FILTER_NOP, NULL);
3686 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3687 enum rte_filter_op filter_op, void *arg)
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3693 dev = &rte_eth_devices[port_id];
3694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3695 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3699 const struct rte_eth_rxtx_callback *
3700 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3701 rte_rx_callback_fn fn, void *user_param)
3703 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3704 rte_errno = ENOTSUP;
3707 /* check input parameters */
3708 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3709 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3713 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3721 cb->param = user_param;
3723 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3724 /* Add the callbacks in fifo order. */
3725 struct rte_eth_rxtx_callback *tail =
3726 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3729 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3736 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3741 const struct rte_eth_rxtx_callback *
3742 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3743 rte_rx_callback_fn fn, void *user_param)
3745 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3746 rte_errno = ENOTSUP;
3749 /* check input parameters */
3750 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3751 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3756 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3764 cb->param = user_param;
3766 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3767 /* Add the callbacks at fisrt position*/
3768 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3770 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3771 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3776 const struct rte_eth_rxtx_callback *
3777 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3778 rte_tx_callback_fn fn, void *user_param)
3780 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3781 rte_errno = ENOTSUP;
3784 /* check input parameters */
3785 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3786 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3791 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3799 cb->param = user_param;
3801 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3802 /* Add the callbacks in fifo order. */
3803 struct rte_eth_rxtx_callback *tail =
3804 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3807 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3814 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3820 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3821 const struct rte_eth_rxtx_callback *user_cb)
3823 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3826 /* Check input parameters. */
3827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3828 if (user_cb == NULL ||
3829 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3832 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3833 struct rte_eth_rxtx_callback *cb;
3834 struct rte_eth_rxtx_callback **prev_cb;
3837 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3838 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3839 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3841 if (cb == user_cb) {
3842 /* Remove the user cb from the callback list. */
3843 *prev_cb = cb->next;
3848 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3854 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3855 const struct rte_eth_rxtx_callback *user_cb)
3857 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3860 /* Check input parameters. */
3861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3862 if (user_cb == NULL ||
3863 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3866 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3868 struct rte_eth_rxtx_callback *cb;
3869 struct rte_eth_rxtx_callback **prev_cb;
3871 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3872 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3873 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3875 if (cb == user_cb) {
3876 /* Remove the user cb from the callback list. */
3877 *prev_cb = cb->next;
3882 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3888 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3889 struct rte_eth_rxq_info *qinfo)
3891 struct rte_eth_dev *dev;
3893 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898 dev = &rte_eth_devices[port_id];
3899 if (queue_id >= dev->data->nb_rx_queues) {
3900 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3906 memset(qinfo, 0, sizeof(*qinfo));
3907 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3912 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3913 struct rte_eth_txq_info *qinfo)
3915 struct rte_eth_dev *dev;
3917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3922 dev = &rte_eth_devices[port_id];
3923 if (queue_id >= dev->data->nb_tx_queues) {
3924 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3930 memset(qinfo, 0, sizeof(*qinfo));
3931 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3937 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3938 struct ether_addr *mc_addr_set,
3939 uint32_t nb_mc_addr)
3941 struct rte_eth_dev *dev;
3943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3947 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3948 mc_addr_set, nb_mc_addr));
3952 rte_eth_timesync_enable(uint16_t port_id)
3954 struct rte_eth_dev *dev;
3956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3957 dev = &rte_eth_devices[port_id];
3959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3960 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3964 rte_eth_timesync_disable(uint16_t port_id)
3966 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3969 dev = &rte_eth_devices[port_id];
3971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3972 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3976 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3985 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3986 (dev, timestamp, flags));
3990 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3991 struct timespec *timestamp)
3993 struct rte_eth_dev *dev;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3996 dev = &rte_eth_devices[port_id];
3998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3999 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4004 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4006 struct rte_eth_dev *dev;
4008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4009 dev = &rte_eth_devices[port_id];
4011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4012 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4017 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4019 struct rte_eth_dev *dev;
4021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4030 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4032 struct rte_eth_dev *dev;
4034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4035 dev = &rte_eth_devices[port_id];
4037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4038 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4043 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4045 struct rte_eth_dev *dev;
4047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4049 dev = &rte_eth_devices[port_id];
4050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4051 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4055 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4057 struct rte_eth_dev *dev;
4059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4061 dev = &rte_eth_devices[port_id];
4062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4063 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4067 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4069 struct rte_eth_dev *dev;
4071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4073 dev = &rte_eth_devices[port_id];
4074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4075 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4079 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4081 struct rte_eth_dev *dev;
4083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4085 dev = &rte_eth_devices[port_id];
4086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4087 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4090 int __rte_experimental
4091 rte_eth_dev_get_module_info(uint16_t port_id,
4092 struct rte_eth_dev_module_info *modinfo)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4100 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4103 int __rte_experimental
4104 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4105 struct rte_dev_eeprom_info *info)
4107 struct rte_eth_dev *dev;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4111 dev = &rte_eth_devices[port_id];
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4113 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4117 rte_eth_dev_get_dcb_info(uint16_t port_id,
4118 struct rte_eth_dcb_info *dcb_info)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4124 dev = &rte_eth_devices[port_id];
4125 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4128 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4132 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4133 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4135 struct rte_eth_dev *dev;
4137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4138 if (l2_tunnel == NULL) {
4139 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4143 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4144 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4148 dev = &rte_eth_devices[port_id];
4149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4151 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4156 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4157 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4161 struct rte_eth_dev *dev;
4163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4165 if (l2_tunnel == NULL) {
4166 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4170 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4171 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4176 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4180 dev = &rte_eth_devices[port_id];
4181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4183 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4184 l2_tunnel, mask, en));
4188 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4189 const struct rte_eth_desc_lim *desc_lim)
4191 if (desc_lim->nb_align != 0)
4192 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4194 if (desc_lim->nb_max != 0)
4195 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4197 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4201 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4202 uint16_t *nb_rx_desc,
4203 uint16_t *nb_tx_desc)
4205 struct rte_eth_dev *dev;
4206 struct rte_eth_dev_info dev_info;
4208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4210 dev = &rte_eth_devices[port_id];
4211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4213 rte_eth_dev_info_get(port_id, &dev_info);
4215 if (nb_rx_desc != NULL)
4216 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4218 if (nb_tx_desc != NULL)
4219 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4225 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4227 struct rte_eth_dev *dev;
4229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4234 dev = &rte_eth_devices[port_id];
4236 if (*dev->dev_ops->pool_ops_supported == NULL)
4237 return 1; /* all pools are supported */
4239 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4243 * A set of values to describe the possible states of a switch domain.
4245 enum rte_eth_switch_domain_state {
4246 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4247 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4251 * Array of switch domains available for allocation. Array is sized to
4252 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4253 * ethdev ports in a single process.
4255 struct rte_eth_dev_switch {
4256 enum rte_eth_switch_domain_state state;
4257 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4259 int __rte_experimental
4260 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4264 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4266 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4267 i < RTE_MAX_ETHPORTS; i++) {
4268 if (rte_eth_switch_domains[i].state ==
4269 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4270 rte_eth_switch_domains[i].state =
4271 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4280 int __rte_experimental
4281 rte_eth_switch_domain_free(uint16_t domain_id)
4283 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4284 domain_id >= RTE_MAX_ETHPORTS)
4287 if (rte_eth_switch_domains[domain_id].state !=
4288 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4291 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4296 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4299 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4302 struct rte_kvargs_pair *pair;
4305 arglist->str = strdup(str_in);
4306 if (arglist->str == NULL)
4309 letter = arglist->str;
4312 pair = &arglist->pairs[0];
4315 case 0: /* Initial */
4318 else if (*letter == '\0')
4325 case 1: /* Parsing key */
4326 if (*letter == '=') {
4328 pair->value = letter + 1;
4330 } else if (*letter == ',' || *letter == '\0')
4335 case 2: /* Parsing value */
4338 else if (*letter == ',') {
4341 pair = &arglist->pairs[arglist->count];
4343 } else if (*letter == '\0') {
4346 pair = &arglist->pairs[arglist->count];
4351 case 3: /* Parsing list */
4354 else if (*letter == '\0')
4363 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4371 /* Single element, not a list */
4372 return callback(str, data);
4374 /* Sanity check, then strip the brackets */
4375 str_start = &str[strlen(str) - 1];
4376 if (*str_start != ']') {
4377 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4383 /* Process list elements */
4393 } else if (state == 1) {
4394 if (*str == ',' || *str == '\0') {
4395 if (str > str_start) {
4396 /* Non-empty string fragment */
4398 result = callback(str_start, data);
4411 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4412 const uint16_t max_list)
4414 uint16_t lo, hi, val;
4417 result = sscanf(str, "%hu-%hu", &lo, &hi);
4419 if (*len_list >= max_list)
4421 list[(*len_list)++] = lo;
4422 } else if (result == 2) {
4423 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4425 for (val = lo; val <= hi; val++) {
4426 if (*len_list >= max_list)
4428 list[(*len_list)++] = val;
4437 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4439 struct rte_eth_devargs *eth_da = data;
4441 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4442 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4445 int __rte_experimental
4446 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4448 struct rte_kvargs args;
4449 struct rte_kvargs_pair *pair;
4453 memset(eth_da, 0, sizeof(*eth_da));
4455 result = rte_eth_devargs_tokenise(&args, dargs);
4459 for (i = 0; i < args.count; i++) {
4460 pair = &args.pairs[i];
4461 if (strcmp("representor", pair->key) == 0) {
4462 result = rte_eth_devargs_parse_list(pair->value,
4463 rte_eth_devargs_parse_representor_ports,
4477 RTE_INIT(ethdev_init_log)
4479 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4480 if (rte_eth_dev_logtype >= 0)
4481 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);