1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
503 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
559 eth_dev->device = NULL;
560 eth_dev->intr_handle = NULL;
562 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
563 rte_free(eth_dev->data->rx_queues);
564 rte_free(eth_dev->data->tx_queues);
565 rte_free(eth_dev->data->mac_addrs);
566 rte_free(eth_dev->data->hash_mac_addrs);
567 rte_free(eth_dev->data->dev_private);
568 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
569 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
572 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
578 rte_eth_dev_is_valid_port(uint16_t port_id)
580 if (port_id >= RTE_MAX_ETHPORTS ||
581 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
588 rte_eth_is_valid_owner_id(uint64_t owner_id)
590 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
591 rte_eth_dev_shared_data->next_owner_id <= owner_id)
597 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
599 port_id = rte_eth_find_next(port_id);
600 while (port_id < RTE_MAX_ETHPORTS &&
601 rte_eth_devices[port_id].data->owner.id != owner_id)
602 port_id = rte_eth_find_next(port_id + 1);
608 rte_eth_dev_owner_new(uint64_t *owner_id)
610 rte_eth_dev_shared_data_prepare();
612 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
614 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
616 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
621 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
622 const struct rte_eth_dev_owner *new_owner)
624 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
625 struct rte_eth_dev_owner *port_owner;
627 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
628 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
633 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
634 !rte_eth_is_valid_owner_id(old_owner_id)) {
636 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
637 old_owner_id, new_owner->id);
641 port_owner = &rte_eth_devices[port_id].data->owner;
642 if (port_owner->id != old_owner_id) {
644 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
645 port_id, port_owner->name, port_owner->id);
649 /* can not truncate (same structure) */
650 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
652 port_owner->id = new_owner->id;
654 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
655 port_id, new_owner->name, new_owner->id);
661 rte_eth_dev_owner_set(const uint16_t port_id,
662 const struct rte_eth_dev_owner *owner)
666 rte_eth_dev_shared_data_prepare();
668 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
670 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
672 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
677 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
679 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
680 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
683 rte_eth_dev_shared_data_prepare();
685 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
687 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
689 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
694 rte_eth_dev_owner_delete(const uint64_t owner_id)
699 rte_eth_dev_shared_data_prepare();
701 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
703 if (rte_eth_is_valid_owner_id(owner_id)) {
704 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
705 if (rte_eth_devices[port_id].data->owner.id == owner_id)
706 memset(&rte_eth_devices[port_id].data->owner, 0,
707 sizeof(struct rte_eth_dev_owner));
708 RTE_ETHDEV_LOG(NOTICE,
709 "All port owners owned by %016"PRIx64" identifier have removed\n",
713 "Invalid owner id=%016"PRIx64"\n",
718 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
724 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
727 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
729 rte_eth_dev_shared_data_prepare();
731 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
733 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
734 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
738 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
741 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
746 rte_eth_dev_socket_id(uint16_t port_id)
748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
749 return rte_eth_devices[port_id].data->numa_node;
753 rte_eth_dev_get_sec_ctx(uint16_t port_id)
755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
756 return rte_eth_devices[port_id].security_ctx;
760 rte_eth_dev_count_avail(void)
767 RTE_ETH_FOREACH_DEV(p)
774 rte_eth_dev_count_total(void)
776 uint16_t port, count = 0;
778 RTE_ETH_FOREACH_VALID_DEV(port)
785 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
792 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
796 /* shouldn't check 'rte_eth_devices[i].data',
797 * because it might be overwritten by VDEV PMD */
798 tmp = rte_eth_dev_shared_data->data[port_id].name;
804 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
809 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
813 RTE_ETH_FOREACH_VALID_DEV(pid)
814 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
823 eth_err(uint16_t port_id, int ret)
827 if (rte_eth_dev_is_removed(port_id))
833 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
835 uint16_t old_nb_queues = dev->data->nb_rx_queues;
839 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
840 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
841 sizeof(dev->data->rx_queues[0]) * nb_queues,
842 RTE_CACHE_LINE_SIZE);
843 if (dev->data->rx_queues == NULL) {
844 dev->data->nb_rx_queues = 0;
847 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
850 rxq = dev->data->rx_queues;
852 for (i = nb_queues; i < old_nb_queues; i++)
853 (*dev->dev_ops->rx_queue_release)(rxq[i]);
854 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
855 RTE_CACHE_LINE_SIZE);
858 if (nb_queues > old_nb_queues) {
859 uint16_t new_qs = nb_queues - old_nb_queues;
861 memset(rxq + old_nb_queues, 0,
862 sizeof(rxq[0]) * new_qs);
865 dev->data->rx_queues = rxq;
867 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
870 rxq = dev->data->rx_queues;
872 for (i = nb_queues; i < old_nb_queues; i++)
873 (*dev->dev_ops->rx_queue_release)(rxq[i]);
875 rte_free(dev->data->rx_queues);
876 dev->data->rx_queues = NULL;
878 dev->data->nb_rx_queues = nb_queues;
883 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
887 if (rx_queue_id >= dev->data->nb_rx_queues) {
888 port_id = dev->data->port_id;
890 "Invalid Rx queue_id=%u of device with port_id=%u\n",
891 rx_queue_id, port_id);
895 if (dev->data->rx_queues[rx_queue_id] == NULL) {
896 port_id = dev->data->port_id;
898 "Queue %u of device with port_id=%u has not been setup\n",
899 rx_queue_id, port_id);
907 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
911 if (tx_queue_id >= dev->data->nb_tx_queues) {
912 port_id = dev->data->port_id;
914 "Invalid Tx queue_id=%u of device with port_id=%u\n",
915 tx_queue_id, port_id);
919 if (dev->data->tx_queues[tx_queue_id] == NULL) {
920 port_id = dev->data->port_id;
922 "Queue %u of device with port_id=%u has not been setup\n",
923 tx_queue_id, port_id);
931 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
933 struct rte_eth_dev *dev;
936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
938 dev = &rte_eth_devices[port_id];
939 if (!dev->data->dev_started) {
941 "Port %u must be started before start any queue\n",
946 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
952 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
954 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
955 rx_queue_id, port_id);
959 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
961 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
962 rx_queue_id, port_id);
966 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
972 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
974 struct rte_eth_dev *dev;
977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
979 dev = &rte_eth_devices[port_id];
981 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
987 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
989 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
990 rx_queue_id, port_id);
994 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
996 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
997 rx_queue_id, port_id);
1001 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1006 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1008 struct rte_eth_dev *dev;
1011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1013 dev = &rte_eth_devices[port_id];
1014 if (!dev->data->dev_started) {
1016 "Port %u must be started before start any queue\n",
1021 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1027 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1028 RTE_ETHDEV_LOG(INFO,
1029 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1030 tx_queue_id, port_id);
1034 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1035 RTE_ETHDEV_LOG(INFO,
1036 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1037 tx_queue_id, port_id);
1041 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1045 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1047 struct rte_eth_dev *dev;
1050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1052 dev = &rte_eth_devices[port_id];
1054 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1060 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1061 RTE_ETHDEV_LOG(INFO,
1062 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1063 tx_queue_id, port_id);
1067 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1068 RTE_ETHDEV_LOG(INFO,
1069 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1070 tx_queue_id, port_id);
1074 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1079 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1081 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1085 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1086 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1087 sizeof(dev->data->tx_queues[0]) * nb_queues,
1088 RTE_CACHE_LINE_SIZE);
1089 if (dev->data->tx_queues == NULL) {
1090 dev->data->nb_tx_queues = 0;
1093 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1096 txq = dev->data->tx_queues;
1098 for (i = nb_queues; i < old_nb_queues; i++)
1099 (*dev->dev_ops->tx_queue_release)(txq[i]);
1100 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1101 RTE_CACHE_LINE_SIZE);
1104 if (nb_queues > old_nb_queues) {
1105 uint16_t new_qs = nb_queues - old_nb_queues;
1107 memset(txq + old_nb_queues, 0,
1108 sizeof(txq[0]) * new_qs);
1111 dev->data->tx_queues = txq;
1113 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1116 txq = dev->data->tx_queues;
1118 for (i = nb_queues; i < old_nb_queues; i++)
1119 (*dev->dev_ops->tx_queue_release)(txq[i]);
1121 rte_free(dev->data->tx_queues);
1122 dev->data->tx_queues = NULL;
1124 dev->data->nb_tx_queues = nb_queues;
1129 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1132 case ETH_SPEED_NUM_10M:
1133 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1134 case ETH_SPEED_NUM_100M:
1135 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1136 case ETH_SPEED_NUM_1G:
1137 return ETH_LINK_SPEED_1G;
1138 case ETH_SPEED_NUM_2_5G:
1139 return ETH_LINK_SPEED_2_5G;
1140 case ETH_SPEED_NUM_5G:
1141 return ETH_LINK_SPEED_5G;
1142 case ETH_SPEED_NUM_10G:
1143 return ETH_LINK_SPEED_10G;
1144 case ETH_SPEED_NUM_20G:
1145 return ETH_LINK_SPEED_20G;
1146 case ETH_SPEED_NUM_25G:
1147 return ETH_LINK_SPEED_25G;
1148 case ETH_SPEED_NUM_40G:
1149 return ETH_LINK_SPEED_40G;
1150 case ETH_SPEED_NUM_50G:
1151 return ETH_LINK_SPEED_50G;
1152 case ETH_SPEED_NUM_56G:
1153 return ETH_LINK_SPEED_56G;
1154 case ETH_SPEED_NUM_100G:
1155 return ETH_LINK_SPEED_100G;
1156 case ETH_SPEED_NUM_200G:
1157 return ETH_LINK_SPEED_200G;
1164 rte_eth_dev_rx_offload_name(uint64_t offload)
1166 const char *name = "UNKNOWN";
1169 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1170 if (offload == rte_rx_offload_names[i].offload) {
1171 name = rte_rx_offload_names[i].name;
1180 rte_eth_dev_tx_offload_name(uint64_t offload)
1182 const char *name = "UNKNOWN";
1185 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1186 if (offload == rte_tx_offload_names[i].offload) {
1187 name = rte_tx_offload_names[i].name;
1196 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1197 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1201 if (dev_info_size == 0) {
1202 if (config_size != max_rx_pkt_len) {
1203 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1204 " %u != %u is not allowed\n",
1205 port_id, config_size, max_rx_pkt_len);
1208 } else if (config_size > dev_info_size) {
1209 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1210 "> max allowed value %u\n", port_id, config_size,
1213 } else if (config_size < RTE_ETHER_MIN_LEN) {
1214 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1215 "< min allowed value %u\n", port_id, config_size,
1216 (unsigned int)RTE_ETHER_MIN_LEN);
1223 * Validate offloads that are requested through rte_eth_dev_configure against
1224 * the offloads successfully set by the ethernet device.
1227 * The port identifier of the Ethernet device.
1228 * @param req_offloads
1229 * The offloads that have been requested through `rte_eth_dev_configure`.
1230 * @param set_offloads
1231 * The offloads successfully set by the ethernet device.
1232 * @param offload_type
1233 * The offload type i.e. Rx/Tx string.
1234 * @param offload_name
1235 * The function that prints the offload name.
1237 * - (0) if validation successful.
1238 * - (-EINVAL) if requested offload has been silently disabled.
1242 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1243 uint64_t set_offloads, const char *offload_type,
1244 const char *(*offload_name)(uint64_t))
1246 uint64_t offloads_diff = req_offloads ^ set_offloads;
1250 while (offloads_diff != 0) {
1251 /* Check if any offload is requested but not enabled. */
1252 offload = 1ULL << __builtin_ctzll(offloads_diff);
1253 if (offload & req_offloads) {
1255 "Port %u failed to enable %s offload %s\n",
1256 port_id, offload_type, offload_name(offload));
1260 /* Check if offload couldn't be disabled. */
1261 if (offload & set_offloads) {
1262 RTE_ETHDEV_LOG(DEBUG,
1263 "Port %u %s offload %s is not requested but enabled\n",
1264 port_id, offload_type, offload_name(offload));
1267 offloads_diff &= ~offload;
1274 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1275 const struct rte_eth_conf *dev_conf)
1277 struct rte_eth_dev *dev;
1278 struct rte_eth_dev_info dev_info;
1279 struct rte_eth_conf orig_conf;
1283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1285 dev = &rte_eth_devices[port_id];
1287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1289 if (dev->data->dev_started) {
1291 "Port %u must be stopped to allow configuration\n",
1296 /* Store original config, as rollback required on failure */
1297 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1300 * Copy the dev_conf parameter into the dev structure.
1301 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1303 if (dev_conf != &dev->data->dev_conf)
1304 memcpy(&dev->data->dev_conf, dev_conf,
1305 sizeof(dev->data->dev_conf));
1307 ret = rte_eth_dev_info_get(port_id, &dev_info);
1311 /* If number of queues specified by application for both Rx and Tx is
1312 * zero, use driver preferred values. This cannot be done individually
1313 * as it is valid for either Tx or Rx (but not both) to be zero.
1314 * If driver does not provide any preferred valued, fall back on
1317 if (nb_rx_q == 0 && nb_tx_q == 0) {
1318 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1320 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1321 nb_tx_q = dev_info.default_txportconf.nb_queues;
1323 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1326 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1328 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1329 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1334 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1336 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1337 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1343 * Check that the numbers of RX and TX queues are not greater
1344 * than the maximum number of RX and TX queues supported by the
1345 * configured device.
1347 if (nb_rx_q > dev_info.max_rx_queues) {
1348 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1349 port_id, nb_rx_q, dev_info.max_rx_queues);
1354 if (nb_tx_q > dev_info.max_tx_queues) {
1355 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1356 port_id, nb_tx_q, dev_info.max_tx_queues);
1361 /* Check that the device supports requested interrupts */
1362 if ((dev_conf->intr_conf.lsc == 1) &&
1363 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1364 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1365 dev->device->driver->name);
1369 if ((dev_conf->intr_conf.rmv == 1) &&
1370 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1371 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1372 dev->device->driver->name);
1378 * If jumbo frames are enabled, check that the maximum RX packet
1379 * length is supported by the configured device.
1381 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1382 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1384 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1385 port_id, dev_conf->rxmode.max_rx_pkt_len,
1386 dev_info.max_rx_pktlen);
1389 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1391 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1392 port_id, dev_conf->rxmode.max_rx_pkt_len,
1393 (unsigned int)RTE_ETHER_MIN_LEN);
1398 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1399 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1400 /* Use default value */
1401 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1406 * If LRO is enabled, check that the maximum aggregated packet
1407 * size is supported by the configured device.
1409 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1410 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1411 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1412 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1413 ret = check_lro_pkt_size(port_id,
1414 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1415 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1416 dev_info.max_lro_pkt_size);
1421 /* Any requested offloading must be within its device capabilities */
1422 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1423 dev_conf->rxmode.offloads) {
1425 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1426 "capabilities 0x%"PRIx64" in %s()\n",
1427 port_id, dev_conf->rxmode.offloads,
1428 dev_info.rx_offload_capa,
1433 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1434 dev_conf->txmode.offloads) {
1436 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1437 "capabilities 0x%"PRIx64" in %s()\n",
1438 port_id, dev_conf->txmode.offloads,
1439 dev_info.tx_offload_capa,
1445 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1446 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1448 /* Check that device supports requested rss hash functions. */
1449 if ((dev_info.flow_type_rss_offloads |
1450 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1451 dev_info.flow_type_rss_offloads) {
1453 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1454 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1455 dev_info.flow_type_rss_offloads);
1460 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1461 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1462 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1464 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1466 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1472 * Setup new number of RX/TX queues and reconfigure device.
1474 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1477 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1483 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1486 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1488 rte_eth_dev_rx_queue_config(dev, 0);
1493 diag = (*dev->dev_ops->dev_configure)(dev);
1495 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1497 ret = eth_err(port_id, diag);
1501 /* Initialize Rx profiling if enabled at compilation time. */
1502 diag = __rte_eth_dev_profile_init(port_id, dev);
1504 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1506 ret = eth_err(port_id, diag);
1510 /* Validate Rx offloads. */
1511 diag = validate_offloads(port_id,
1512 dev_conf->rxmode.offloads,
1513 dev->data->dev_conf.rxmode.offloads, "Rx",
1514 rte_eth_dev_rx_offload_name);
1520 /* Validate Tx offloads. */
1521 diag = validate_offloads(port_id,
1522 dev_conf->txmode.offloads,
1523 dev->data->dev_conf.txmode.offloads, "Tx",
1524 rte_eth_dev_tx_offload_name);
1530 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1533 rte_eth_dev_rx_queue_config(dev, 0);
1534 rte_eth_dev_tx_queue_config(dev, 0);
1536 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1538 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1543 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1545 if (dev->data->dev_started) {
1546 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1547 dev->data->port_id);
1551 rte_eth_dev_rx_queue_config(dev, 0);
1552 rte_eth_dev_tx_queue_config(dev, 0);
1554 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1558 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1559 struct rte_eth_dev_info *dev_info)
1561 struct rte_ether_addr *addr;
1566 /* replay MAC address configuration including default MAC */
1567 addr = &dev->data->mac_addrs[0];
1568 if (*dev->dev_ops->mac_addr_set != NULL)
1569 (*dev->dev_ops->mac_addr_set)(dev, addr);
1570 else if (*dev->dev_ops->mac_addr_add != NULL)
1571 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1573 if (*dev->dev_ops->mac_addr_add != NULL) {
1574 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1575 addr = &dev->data->mac_addrs[i];
1577 /* skip zero address */
1578 if (rte_is_zero_ether_addr(addr))
1582 pool_mask = dev->data->mac_pool_sel[i];
1585 if (pool_mask & 1ULL)
1586 (*dev->dev_ops->mac_addr_add)(dev,
1590 } while (pool_mask);
1596 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1597 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1601 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1602 rte_eth_dev_mac_restore(dev, dev_info);
1604 /* replay promiscuous configuration */
1606 * use callbacks directly since we don't need port_id check and
1607 * would like to bypass the same value set
1609 if (rte_eth_promiscuous_get(port_id) == 1 &&
1610 *dev->dev_ops->promiscuous_enable != NULL) {
1611 ret = eth_err(port_id,
1612 (*dev->dev_ops->promiscuous_enable)(dev));
1613 if (ret != 0 && ret != -ENOTSUP) {
1615 "Failed to enable promiscuous mode for device (port %u): %s\n",
1616 port_id, rte_strerror(-ret));
1619 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1620 *dev->dev_ops->promiscuous_disable != NULL) {
1621 ret = eth_err(port_id,
1622 (*dev->dev_ops->promiscuous_disable)(dev));
1623 if (ret != 0 && ret != -ENOTSUP) {
1625 "Failed to disable promiscuous mode for device (port %u): %s\n",
1626 port_id, rte_strerror(-ret));
1631 /* replay all multicast configuration */
1633 * use callbacks directly since we don't need port_id check and
1634 * would like to bypass the same value set
1636 if (rte_eth_allmulticast_get(port_id) == 1 &&
1637 *dev->dev_ops->allmulticast_enable != NULL) {
1638 ret = eth_err(port_id,
1639 (*dev->dev_ops->allmulticast_enable)(dev));
1640 if (ret != 0 && ret != -ENOTSUP) {
1642 "Failed to enable allmulticast mode for device (port %u): %s\n",
1643 port_id, rte_strerror(-ret));
1646 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1647 *dev->dev_ops->allmulticast_disable != NULL) {
1648 ret = eth_err(port_id,
1649 (*dev->dev_ops->allmulticast_disable)(dev));
1650 if (ret != 0 && ret != -ENOTSUP) {
1652 "Failed to disable allmulticast mode for device (port %u): %s\n",
1653 port_id, rte_strerror(-ret));
1662 rte_eth_dev_start(uint16_t port_id)
1664 struct rte_eth_dev *dev;
1665 struct rte_eth_dev_info dev_info;
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1671 dev = &rte_eth_devices[port_id];
1673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1675 if (dev->data->dev_started != 0) {
1676 RTE_ETHDEV_LOG(INFO,
1677 "Device with port_id=%"PRIu16" already started\n",
1682 ret = rte_eth_dev_info_get(port_id, &dev_info);
1686 /* Lets restore MAC now if device does not support live change */
1687 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1688 rte_eth_dev_mac_restore(dev, &dev_info);
1690 diag = (*dev->dev_ops->dev_start)(dev);
1692 dev->data->dev_started = 1;
1694 return eth_err(port_id, diag);
1696 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1699 "Error during restoring configuration for device (port %u): %s\n",
1700 port_id, rte_strerror(-ret));
1701 rte_eth_dev_stop(port_id);
1705 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1707 (*dev->dev_ops->link_update)(dev, 0);
1710 rte_ethdev_trace_start(port_id);
1715 rte_eth_dev_stop(uint16_t port_id)
1717 struct rte_eth_dev *dev;
1719 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1720 dev = &rte_eth_devices[port_id];
1722 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1724 if (dev->data->dev_started == 0) {
1725 RTE_ETHDEV_LOG(INFO,
1726 "Device with port_id=%"PRIu16" already stopped\n",
1731 dev->data->dev_started = 0;
1732 (*dev->dev_ops->dev_stop)(dev);
1733 rte_ethdev_trace_stop(port_id);
1737 rte_eth_dev_set_link_up(uint16_t port_id)
1739 struct rte_eth_dev *dev;
1741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1743 dev = &rte_eth_devices[port_id];
1745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1746 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1750 rte_eth_dev_set_link_down(uint16_t port_id)
1752 struct rte_eth_dev *dev;
1754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1756 dev = &rte_eth_devices[port_id];
1758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1759 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1763 rte_eth_dev_close(uint16_t port_id)
1765 struct rte_eth_dev *dev;
1767 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1768 dev = &rte_eth_devices[port_id];
1770 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1771 dev->data->dev_started = 0;
1772 (*dev->dev_ops->dev_close)(dev);
1774 rte_ethdev_trace_close(port_id);
1775 rte_eth_dev_release_port(dev);
1779 rte_eth_dev_reset(uint16_t port_id)
1781 struct rte_eth_dev *dev;
1784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1785 dev = &rte_eth_devices[port_id];
1787 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1789 rte_eth_dev_stop(port_id);
1790 ret = dev->dev_ops->dev_reset(dev);
1792 return eth_err(port_id, ret);
1796 rte_eth_dev_is_removed(uint16_t port_id)
1798 struct rte_eth_dev *dev;
1801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1803 dev = &rte_eth_devices[port_id];
1805 if (dev->state == RTE_ETH_DEV_REMOVED)
1808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1810 ret = dev->dev_ops->is_removed(dev);
1812 /* Device is physically removed. */
1813 dev->state = RTE_ETH_DEV_REMOVED;
1819 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1820 uint16_t nb_rx_desc, unsigned int socket_id,
1821 const struct rte_eth_rxconf *rx_conf,
1822 struct rte_mempool *mp)
1825 uint32_t mbp_buf_size;
1826 struct rte_eth_dev *dev;
1827 struct rte_eth_dev_info dev_info;
1828 struct rte_eth_rxconf local_conf;
1831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1833 dev = &rte_eth_devices[port_id];
1834 if (rx_queue_id >= dev->data->nb_rx_queues) {
1835 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1840 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1847 * Check the size of the mbuf data buffer.
1848 * This value must be provided in the private data of the memory pool.
1849 * First check that the memory pool has a valid private data.
1851 ret = rte_eth_dev_info_get(port_id, &dev_info);
1855 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1856 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1857 mp->name, (int)mp->private_data_size,
1858 (int)sizeof(struct rte_pktmbuf_pool_private));
1861 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1863 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1865 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1866 mp->name, (int)mbp_buf_size,
1867 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1868 (int)RTE_PKTMBUF_HEADROOM,
1869 (int)dev_info.min_rx_bufsize);
1873 /* Use default specified by driver, if nb_rx_desc is zero */
1874 if (nb_rx_desc == 0) {
1875 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1876 /* If driver default is also zero, fall back on EAL default */
1877 if (nb_rx_desc == 0)
1878 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1881 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1882 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1883 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1886 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1887 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1888 dev_info.rx_desc_lim.nb_min,
1889 dev_info.rx_desc_lim.nb_align);
1893 if (dev->data->dev_started &&
1894 !(dev_info.dev_capa &
1895 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1898 if (dev->data->dev_started &&
1899 (dev->data->rx_queue_state[rx_queue_id] !=
1900 RTE_ETH_QUEUE_STATE_STOPPED))
1903 rxq = dev->data->rx_queues;
1904 if (rxq[rx_queue_id]) {
1905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1907 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1908 rxq[rx_queue_id] = NULL;
1911 if (rx_conf == NULL)
1912 rx_conf = &dev_info.default_rxconf;
1914 local_conf = *rx_conf;
1917 * If an offloading has already been enabled in
1918 * rte_eth_dev_configure(), it has been enabled on all queues,
1919 * so there is no need to enable it in this queue again.
1920 * The local_conf.offloads input to underlying PMD only carries
1921 * those offloadings which are only enabled on this queue and
1922 * not enabled on all queues.
1924 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1927 * New added offloadings for this queue are those not enabled in
1928 * rte_eth_dev_configure() and they must be per-queue type.
1929 * A pure per-port offloading can't be enabled on a queue while
1930 * disabled on another queue. A pure per-port offloading can't
1931 * be enabled for any queue as new added one if it hasn't been
1932 * enabled in rte_eth_dev_configure().
1934 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1935 local_conf.offloads) {
1937 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1938 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1939 port_id, rx_queue_id, local_conf.offloads,
1940 dev_info.rx_queue_offload_capa,
1946 * If LRO is enabled, check that the maximum aggregated packet
1947 * size is supported by the configured device.
1949 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1950 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1951 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1952 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1953 int ret = check_lro_pkt_size(port_id,
1954 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1955 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1956 dev_info.max_lro_pkt_size);
1961 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1962 socket_id, &local_conf, mp);
1964 if (!dev->data->min_rx_buf_size ||
1965 dev->data->min_rx_buf_size > mbp_buf_size)
1966 dev->data->min_rx_buf_size = mbp_buf_size;
1969 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1971 return eth_err(port_id, ret);
1975 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1976 uint16_t nb_rx_desc,
1977 const struct rte_eth_hairpin_conf *conf)
1980 struct rte_eth_dev *dev;
1981 struct rte_eth_hairpin_cap cap;
1986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1988 dev = &rte_eth_devices[port_id];
1989 if (rx_queue_id >= dev->data->nb_rx_queues) {
1990 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1993 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1998 /* if nb_rx_desc is zero use max number of desc from the driver. */
1999 if (nb_rx_desc == 0)
2000 nb_rx_desc = cap.max_nb_desc;
2001 if (nb_rx_desc > cap.max_nb_desc) {
2003 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2004 nb_rx_desc, cap.max_nb_desc);
2007 if (conf->peer_count > cap.max_rx_2_tx) {
2009 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
2010 conf->peer_count, cap.max_rx_2_tx);
2013 if (conf->peer_count == 0) {
2015 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
2019 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2020 cap.max_nb_queues != UINT16_MAX; i++) {
2021 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2024 if (count > cap.max_nb_queues) {
2025 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2029 if (dev->data->dev_started)
2031 rxq = dev->data->rx_queues;
2032 if (rxq[rx_queue_id] != NULL) {
2033 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2035 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2036 rxq[rx_queue_id] = NULL;
2038 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2041 dev->data->rx_queue_state[rx_queue_id] =
2042 RTE_ETH_QUEUE_STATE_HAIRPIN;
2043 return eth_err(port_id, ret);
2047 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2048 uint16_t nb_tx_desc, unsigned int socket_id,
2049 const struct rte_eth_txconf *tx_conf)
2051 struct rte_eth_dev *dev;
2052 struct rte_eth_dev_info dev_info;
2053 struct rte_eth_txconf local_conf;
2057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2059 dev = &rte_eth_devices[port_id];
2060 if (tx_queue_id >= dev->data->nb_tx_queues) {
2061 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2067 ret = rte_eth_dev_info_get(port_id, &dev_info);
2071 /* Use default specified by driver, if nb_tx_desc is zero */
2072 if (nb_tx_desc == 0) {
2073 nb_tx_desc = dev_info.default_txportconf.ring_size;
2074 /* If driver default is zero, fall back on EAL default */
2075 if (nb_tx_desc == 0)
2076 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2078 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2079 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2080 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2082 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2083 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2084 dev_info.tx_desc_lim.nb_min,
2085 dev_info.tx_desc_lim.nb_align);
2089 if (dev->data->dev_started &&
2090 !(dev_info.dev_capa &
2091 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2094 if (dev->data->dev_started &&
2095 (dev->data->tx_queue_state[tx_queue_id] !=
2096 RTE_ETH_QUEUE_STATE_STOPPED))
2099 txq = dev->data->tx_queues;
2100 if (txq[tx_queue_id]) {
2101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2103 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2104 txq[tx_queue_id] = NULL;
2107 if (tx_conf == NULL)
2108 tx_conf = &dev_info.default_txconf;
2110 local_conf = *tx_conf;
2113 * If an offloading has already been enabled in
2114 * rte_eth_dev_configure(), it has been enabled on all queues,
2115 * so there is no need to enable it in this queue again.
2116 * The local_conf.offloads input to underlying PMD only carries
2117 * those offloadings which are only enabled on this queue and
2118 * not enabled on all queues.
2120 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2123 * New added offloadings for this queue are those not enabled in
2124 * rte_eth_dev_configure() and they must be per-queue type.
2125 * A pure per-port offloading can't be enabled on a queue while
2126 * disabled on another queue. A pure per-port offloading can't
2127 * be enabled for any queue as new added one if it hasn't been
2128 * enabled in rte_eth_dev_configure().
2130 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2131 local_conf.offloads) {
2133 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2134 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2135 port_id, tx_queue_id, local_conf.offloads,
2136 dev_info.tx_queue_offload_capa,
2141 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2142 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2143 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2147 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2148 uint16_t nb_tx_desc,
2149 const struct rte_eth_hairpin_conf *conf)
2151 struct rte_eth_dev *dev;
2152 struct rte_eth_hairpin_cap cap;
2158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2159 dev = &rte_eth_devices[port_id];
2160 if (tx_queue_id >= dev->data->nb_tx_queues) {
2161 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2164 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2169 /* if nb_rx_desc is zero use max number of desc from the driver. */
2170 if (nb_tx_desc == 0)
2171 nb_tx_desc = cap.max_nb_desc;
2172 if (nb_tx_desc > cap.max_nb_desc) {
2174 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2175 nb_tx_desc, cap.max_nb_desc);
2178 if (conf->peer_count > cap.max_tx_2_rx) {
2180 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2181 conf->peer_count, cap.max_tx_2_rx);
2184 if (conf->peer_count == 0) {
2186 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2190 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2191 cap.max_nb_queues != UINT16_MAX; i++) {
2192 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2195 if (count > cap.max_nb_queues) {
2196 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2200 if (dev->data->dev_started)
2202 txq = dev->data->tx_queues;
2203 if (txq[tx_queue_id] != NULL) {
2204 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2206 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2207 txq[tx_queue_id] = NULL;
2209 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2210 (dev, tx_queue_id, nb_tx_desc, conf);
2212 dev->data->tx_queue_state[tx_queue_id] =
2213 RTE_ETH_QUEUE_STATE_HAIRPIN;
2214 return eth_err(port_id, ret);
2218 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2219 void *userdata __rte_unused)
2221 rte_pktmbuf_free_bulk(pkts, unsent);
2225 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2228 uint64_t *count = userdata;
2230 rte_pktmbuf_free_bulk(pkts, unsent);
2235 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2236 buffer_tx_error_fn cbfn, void *userdata)
2238 buffer->error_callback = cbfn;
2239 buffer->error_userdata = userdata;
2244 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2251 buffer->size = size;
2252 if (buffer->error_callback == NULL) {
2253 ret = rte_eth_tx_buffer_set_err_callback(
2254 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2261 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2263 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2266 /* Validate Input Data. Bail if not valid or not supported. */
2267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2270 /* Call driver to free pending mbufs. */
2271 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2273 return eth_err(port_id, ret);
2277 rte_eth_promiscuous_enable(uint16_t port_id)
2279 struct rte_eth_dev *dev;
2282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2283 dev = &rte_eth_devices[port_id];
2285 if (dev->data->promiscuous == 1)
2288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2290 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2291 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2293 return eth_err(port_id, diag);
2297 rte_eth_promiscuous_disable(uint16_t port_id)
2299 struct rte_eth_dev *dev;
2302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2303 dev = &rte_eth_devices[port_id];
2305 if (dev->data->promiscuous == 0)
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2310 dev->data->promiscuous = 0;
2311 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2313 dev->data->promiscuous = 1;
2315 return eth_err(port_id, diag);
2319 rte_eth_promiscuous_get(uint16_t port_id)
2321 struct rte_eth_dev *dev;
2323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2325 dev = &rte_eth_devices[port_id];
2326 return dev->data->promiscuous;
2330 rte_eth_allmulticast_enable(uint16_t port_id)
2332 struct rte_eth_dev *dev;
2335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2336 dev = &rte_eth_devices[port_id];
2338 if (dev->data->all_multicast == 1)
2341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2342 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2343 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2345 return eth_err(port_id, diag);
2349 rte_eth_allmulticast_disable(uint16_t port_id)
2351 struct rte_eth_dev *dev;
2354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2355 dev = &rte_eth_devices[port_id];
2357 if (dev->data->all_multicast == 0)
2360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2361 dev->data->all_multicast = 0;
2362 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2364 dev->data->all_multicast = 1;
2366 return eth_err(port_id, diag);
2370 rte_eth_allmulticast_get(uint16_t port_id)
2372 struct rte_eth_dev *dev;
2374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2376 dev = &rte_eth_devices[port_id];
2377 return dev->data->all_multicast;
2381 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2383 struct rte_eth_dev *dev;
2385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2386 dev = &rte_eth_devices[port_id];
2388 if (dev->data->dev_conf.intr_conf.lsc &&
2389 dev->data->dev_started)
2390 rte_eth_linkstatus_get(dev, eth_link);
2392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2393 (*dev->dev_ops->link_update)(dev, 1);
2394 *eth_link = dev->data->dev_link;
2401 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2403 struct rte_eth_dev *dev;
2405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2406 dev = &rte_eth_devices[port_id];
2408 if (dev->data->dev_conf.intr_conf.lsc &&
2409 dev->data->dev_started)
2410 rte_eth_linkstatus_get(dev, eth_link);
2412 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2413 (*dev->dev_ops->link_update)(dev, 0);
2414 *eth_link = dev->data->dev_link;
2421 rte_eth_link_speed_to_str(uint32_t link_speed)
2423 switch (link_speed) {
2424 case ETH_SPEED_NUM_NONE: return "None";
2425 case ETH_SPEED_NUM_10M: return "10 Mbps";
2426 case ETH_SPEED_NUM_100M: return "100 Mbps";
2427 case ETH_SPEED_NUM_1G: return "1 Gbps";
2428 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2429 case ETH_SPEED_NUM_5G: return "5 Gbps";
2430 case ETH_SPEED_NUM_10G: return "10 Gbps";
2431 case ETH_SPEED_NUM_20G: return "20 Gbps";
2432 case ETH_SPEED_NUM_25G: return "25 Gbps";
2433 case ETH_SPEED_NUM_40G: return "40 Gbps";
2434 case ETH_SPEED_NUM_50G: return "50 Gbps";
2435 case ETH_SPEED_NUM_56G: return "56 Gbps";
2436 case ETH_SPEED_NUM_100G: return "100 Gbps";
2437 case ETH_SPEED_NUM_200G: return "200 Gbps";
2438 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2439 default: return "Invalid";
2444 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2446 if (eth_link->link_status == ETH_LINK_DOWN)
2447 return snprintf(str, len, "Link down");
2449 return snprintf(str, len, "Link up at %s %s %s",
2450 rte_eth_link_speed_to_str(eth_link->link_speed),
2451 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2453 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2454 "Autoneg" : "Fixed");
2458 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2460 struct rte_eth_dev *dev;
2462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2464 dev = &rte_eth_devices[port_id];
2465 memset(stats, 0, sizeof(*stats));
2467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2468 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2469 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2473 rte_eth_stats_reset(uint16_t port_id)
2475 struct rte_eth_dev *dev;
2478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2479 dev = &rte_eth_devices[port_id];
2481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2482 ret = (*dev->dev_ops->stats_reset)(dev);
2484 return eth_err(port_id, ret);
2486 dev->data->rx_mbuf_alloc_failed = 0;
2492 get_xstats_basic_count(struct rte_eth_dev *dev)
2494 uint16_t nb_rxqs, nb_txqs;
2497 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2498 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2500 count = RTE_NB_STATS;
2501 count += nb_rxqs * RTE_NB_RXQ_STATS;
2502 count += nb_txqs * RTE_NB_TXQ_STATS;
2508 get_xstats_count(uint16_t port_id)
2510 struct rte_eth_dev *dev;
2513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2514 dev = &rte_eth_devices[port_id];
2515 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2516 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2519 return eth_err(port_id, count);
2521 if (dev->dev_ops->xstats_get_names != NULL) {
2522 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2524 return eth_err(port_id, count);
2529 count += get_xstats_basic_count(dev);
2535 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2538 int cnt_xstats, idx_xstat;
2540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2543 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2548 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2553 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2554 if (cnt_xstats < 0) {
2555 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2559 /* Get id-name lookup table */
2560 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2562 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2563 port_id, xstats_names, cnt_xstats, NULL)) {
2564 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2568 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2569 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2578 /* retrieve basic stats names */
2580 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2581 struct rte_eth_xstat_name *xstats_names)
2583 int cnt_used_entries = 0;
2584 uint32_t idx, id_queue;
2587 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2588 strlcpy(xstats_names[cnt_used_entries].name,
2589 rte_stats_strings[idx].name,
2590 sizeof(xstats_names[0].name));
2593 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2594 for (id_queue = 0; id_queue < num_q; id_queue++) {
2595 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2596 snprintf(xstats_names[cnt_used_entries].name,
2597 sizeof(xstats_names[0].name),
2599 id_queue, rte_rxq_stats_strings[idx].name);
2604 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2605 for (id_queue = 0; id_queue < num_q; id_queue++) {
2606 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2607 snprintf(xstats_names[cnt_used_entries].name,
2608 sizeof(xstats_names[0].name),
2610 id_queue, rte_txq_stats_strings[idx].name);
2614 return cnt_used_entries;
2617 /* retrieve ethdev extended statistics names */
2619 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2620 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2623 struct rte_eth_xstat_name *xstats_names_copy;
2624 unsigned int no_basic_stat_requested = 1;
2625 unsigned int no_ext_stat_requested = 1;
2626 unsigned int expected_entries;
2627 unsigned int basic_count;
2628 struct rte_eth_dev *dev;
2632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2633 dev = &rte_eth_devices[port_id];
2635 basic_count = get_xstats_basic_count(dev);
2636 ret = get_xstats_count(port_id);
2639 expected_entries = (unsigned int)ret;
2641 /* Return max number of stats if no ids given */
2644 return expected_entries;
2645 else if (xstats_names && size < expected_entries)
2646 return expected_entries;
2649 if (ids && !xstats_names)
2652 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2653 uint64_t ids_copy[size];
2655 for (i = 0; i < size; i++) {
2656 if (ids[i] < basic_count) {
2657 no_basic_stat_requested = 0;
2662 * Convert ids to xstats ids that PMD knows.
2663 * ids known by user are basic + extended stats.
2665 ids_copy[i] = ids[i] - basic_count;
2668 if (no_basic_stat_requested)
2669 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2670 xstats_names, ids_copy, size);
2673 /* Retrieve all stats */
2675 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2677 if (num_stats < 0 || num_stats > (int)expected_entries)
2680 return expected_entries;
2683 xstats_names_copy = calloc(expected_entries,
2684 sizeof(struct rte_eth_xstat_name));
2686 if (!xstats_names_copy) {
2687 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2692 for (i = 0; i < size; i++) {
2693 if (ids[i] >= basic_count) {
2694 no_ext_stat_requested = 0;
2700 /* Fill xstats_names_copy structure */
2701 if (ids && no_ext_stat_requested) {
2702 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2704 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2707 free(xstats_names_copy);
2713 for (i = 0; i < size; i++) {
2714 if (ids[i] >= expected_entries) {
2715 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2716 free(xstats_names_copy);
2719 xstats_names[i] = xstats_names_copy[ids[i]];
2722 free(xstats_names_copy);
2727 rte_eth_xstats_get_names(uint16_t port_id,
2728 struct rte_eth_xstat_name *xstats_names,
2731 struct rte_eth_dev *dev;
2732 int cnt_used_entries;
2733 int cnt_expected_entries;
2734 int cnt_driver_entries;
2736 cnt_expected_entries = get_xstats_count(port_id);
2737 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2738 (int)size < cnt_expected_entries)
2739 return cnt_expected_entries;
2741 /* port_id checked in get_xstats_count() */
2742 dev = &rte_eth_devices[port_id];
2744 cnt_used_entries = rte_eth_basic_stats_get_names(
2747 if (dev->dev_ops->xstats_get_names != NULL) {
2748 /* If there are any driver-specific xstats, append them
2751 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2753 xstats_names + cnt_used_entries,
2754 size - cnt_used_entries);
2755 if (cnt_driver_entries < 0)
2756 return eth_err(port_id, cnt_driver_entries);
2757 cnt_used_entries += cnt_driver_entries;
2760 return cnt_used_entries;
2765 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2767 struct rte_eth_dev *dev;
2768 struct rte_eth_stats eth_stats;
2769 unsigned int count = 0, i, q;
2770 uint64_t val, *stats_ptr;
2771 uint16_t nb_rxqs, nb_txqs;
2774 ret = rte_eth_stats_get(port_id, ð_stats);
2778 dev = &rte_eth_devices[port_id];
2780 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2781 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2784 for (i = 0; i < RTE_NB_STATS; i++) {
2785 stats_ptr = RTE_PTR_ADD(ð_stats,
2786 rte_stats_strings[i].offset);
2788 xstats[count++].value = val;
2792 for (q = 0; q < nb_rxqs; q++) {
2793 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2794 stats_ptr = RTE_PTR_ADD(ð_stats,
2795 rte_rxq_stats_strings[i].offset +
2796 q * sizeof(uint64_t));
2798 xstats[count++].value = val;
2803 for (q = 0; q < nb_txqs; q++) {
2804 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2805 stats_ptr = RTE_PTR_ADD(ð_stats,
2806 rte_txq_stats_strings[i].offset +
2807 q * sizeof(uint64_t));
2809 xstats[count++].value = val;
2815 /* retrieve ethdev extended statistics */
2817 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2818 uint64_t *values, unsigned int size)
2820 unsigned int no_basic_stat_requested = 1;
2821 unsigned int no_ext_stat_requested = 1;
2822 unsigned int num_xstats_filled;
2823 unsigned int basic_count;
2824 uint16_t expected_entries;
2825 struct rte_eth_dev *dev;
2829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2830 ret = get_xstats_count(port_id);
2833 expected_entries = (uint16_t)ret;
2834 struct rte_eth_xstat xstats[expected_entries];
2835 dev = &rte_eth_devices[port_id];
2836 basic_count = get_xstats_basic_count(dev);
2838 /* Return max number of stats if no ids given */
2841 return expected_entries;
2842 else if (values && size < expected_entries)
2843 return expected_entries;
2849 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2850 unsigned int basic_count = get_xstats_basic_count(dev);
2851 uint64_t ids_copy[size];
2853 for (i = 0; i < size; i++) {
2854 if (ids[i] < basic_count) {
2855 no_basic_stat_requested = 0;
2860 * Convert ids to xstats ids that PMD knows.
2861 * ids known by user are basic + extended stats.
2863 ids_copy[i] = ids[i] - basic_count;
2866 if (no_basic_stat_requested)
2867 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2872 for (i = 0; i < size; i++) {
2873 if (ids[i] >= basic_count) {
2874 no_ext_stat_requested = 0;
2880 /* Fill the xstats structure */
2881 if (ids && no_ext_stat_requested)
2882 ret = rte_eth_basic_stats_get(port_id, xstats);
2884 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2888 num_xstats_filled = (unsigned int)ret;
2890 /* Return all stats */
2892 for (i = 0; i < num_xstats_filled; i++)
2893 values[i] = xstats[i].value;
2894 return expected_entries;
2898 for (i = 0; i < size; i++) {
2899 if (ids[i] >= expected_entries) {
2900 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2903 values[i] = xstats[ids[i]].value;
2909 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2912 struct rte_eth_dev *dev;
2913 unsigned int count = 0, i;
2914 signed int xcount = 0;
2915 uint16_t nb_rxqs, nb_txqs;
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2920 dev = &rte_eth_devices[port_id];
2922 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2923 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2925 /* Return generic statistics */
2926 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2927 (nb_txqs * RTE_NB_TXQ_STATS);
2929 /* implemented by the driver */
2930 if (dev->dev_ops->xstats_get != NULL) {
2931 /* Retrieve the xstats from the driver at the end of the
2934 xcount = (*dev->dev_ops->xstats_get)(dev,
2935 xstats ? xstats + count : NULL,
2936 (n > count) ? n - count : 0);
2939 return eth_err(port_id, xcount);
2942 if (n < count + xcount || xstats == NULL)
2943 return count + xcount;
2945 /* now fill the xstats structure */
2946 ret = rte_eth_basic_stats_get(port_id, xstats);
2951 for (i = 0; i < count; i++)
2953 /* add an offset to driver-specific stats */
2954 for ( ; i < count + xcount; i++)
2955 xstats[i].id += count;
2957 return count + xcount;
2960 /* reset ethdev extended statistics */
2962 rte_eth_xstats_reset(uint16_t port_id)
2964 struct rte_eth_dev *dev;
2966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2967 dev = &rte_eth_devices[port_id];
2969 /* implemented by the driver */
2970 if (dev->dev_ops->xstats_reset != NULL)
2971 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2973 /* fallback to default */
2974 return rte_eth_stats_reset(port_id);
2978 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2981 struct rte_eth_dev *dev;
2983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2985 dev = &rte_eth_devices[port_id];
2987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2989 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2992 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2995 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2998 return (*dev->dev_ops->queue_stats_mapping_set)
2999 (dev, queue_id, stat_idx, is_rx);
3004 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3007 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
3008 stat_idx, STAT_QMAP_TX));
3013 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3016 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
3017 stat_idx, STAT_QMAP_RX));
3021 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3023 struct rte_eth_dev *dev;
3025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3026 dev = &rte_eth_devices[port_id];
3028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3029 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3030 fw_version, fw_size));
3034 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3036 struct rte_eth_dev *dev;
3037 const struct rte_eth_desc_lim lim = {
3038 .nb_max = UINT16_MAX,
3041 .nb_seg_max = UINT16_MAX,
3042 .nb_mtu_seg_max = UINT16_MAX,
3047 * Init dev_info before port_id check since caller does not have
3048 * return status and does not know if get is successful or not.
3050 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3051 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3054 dev = &rte_eth_devices[port_id];
3056 dev_info->rx_desc_lim = lim;
3057 dev_info->tx_desc_lim = lim;
3058 dev_info->device = dev->device;
3059 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3060 dev_info->max_mtu = UINT16_MAX;
3062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3063 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3065 /* Cleanup already filled in device information */
3066 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3067 return eth_err(port_id, diag);
3070 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3071 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3072 RTE_MAX_QUEUES_PER_PORT);
3073 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3074 RTE_MAX_QUEUES_PER_PORT);
3076 dev_info->driver_name = dev->device->driver->name;
3077 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3078 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3080 dev_info->dev_flags = &dev->data->dev_flags;
3086 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3087 uint32_t *ptypes, int num)
3090 struct rte_eth_dev *dev;
3091 const uint32_t *all_ptypes;
3093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3094 dev = &rte_eth_devices[port_id];
3095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3096 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3101 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3102 if (all_ptypes[i] & ptype_mask) {
3104 ptypes[j] = all_ptypes[i];
3112 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3113 uint32_t *set_ptypes, unsigned int num)
3115 const uint32_t valid_ptype_masks[] = {
3119 RTE_PTYPE_TUNNEL_MASK,
3120 RTE_PTYPE_INNER_L2_MASK,
3121 RTE_PTYPE_INNER_L3_MASK,
3122 RTE_PTYPE_INNER_L4_MASK,
3124 const uint32_t *all_ptypes;
3125 struct rte_eth_dev *dev;
3126 uint32_t unused_mask;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3131 dev = &rte_eth_devices[port_id];
3133 if (num > 0 && set_ptypes == NULL)
3136 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3137 *dev->dev_ops->dev_ptypes_set == NULL) {
3142 if (ptype_mask == 0) {
3143 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3148 unused_mask = ptype_mask;
3149 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3150 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3151 if (mask && mask != valid_ptype_masks[i]) {
3155 unused_mask &= ~valid_ptype_masks[i];
3163 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3164 if (all_ptypes == NULL) {
3170 * Accommodate as many set_ptypes as possible. If the supplied
3171 * set_ptypes array is insufficient fill it partially.
3173 for (i = 0, j = 0; set_ptypes != NULL &&
3174 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3175 if (ptype_mask & all_ptypes[i]) {
3177 set_ptypes[j] = all_ptypes[i];
3185 if (set_ptypes != NULL && j < num)
3186 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3188 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3192 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3198 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3200 struct rte_eth_dev *dev;
3202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 dev = &rte_eth_devices[port_id];
3204 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3210 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3212 struct rte_eth_dev *dev;
3214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3216 dev = &rte_eth_devices[port_id];
3217 *mtu = dev->data->mtu;
3222 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3225 struct rte_eth_dev_info dev_info;
3226 struct rte_eth_dev *dev;
3228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3233 * Check if the device supports dev_infos_get, if it does not
3234 * skip min_mtu/max_mtu validation here as this requires values
3235 * that are populated within the call to rte_eth_dev_info_get()
3236 * which relies on dev->dev_ops->dev_infos_get.
3238 if (*dev->dev_ops->dev_infos_get != NULL) {
3239 ret = rte_eth_dev_info_get(port_id, &dev_info);
3243 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3247 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3249 dev->data->mtu = mtu;
3251 return eth_err(port_id, ret);
3255 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3257 struct rte_eth_dev *dev;
3260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3261 dev = &rte_eth_devices[port_id];
3262 if (!(dev->data->dev_conf.rxmode.offloads &
3263 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3264 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3269 if (vlan_id > 4095) {
3270 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3276 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3278 struct rte_vlan_filter_conf *vfc;
3282 vfc = &dev->data->vlan_filter_conf;
3283 vidx = vlan_id / 64;
3284 vbit = vlan_id % 64;
3287 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3289 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3292 return eth_err(port_id, ret);
3296 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3299 struct rte_eth_dev *dev;
3301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3302 dev = &rte_eth_devices[port_id];
3303 if (rx_queue_id >= dev->data->nb_rx_queues) {
3304 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3309 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3315 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3316 enum rte_vlan_type vlan_type,
3319 struct rte_eth_dev *dev;
3321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3322 dev = &rte_eth_devices[port_id];
3323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3325 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3330 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3332 struct rte_eth_dev_info dev_info;
3333 struct rte_eth_dev *dev;
3337 uint64_t orig_offloads;
3338 uint64_t dev_offloads;
3339 uint64_t new_offloads;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3342 dev = &rte_eth_devices[port_id];
3344 /* save original values in case of failure */
3345 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3346 dev_offloads = orig_offloads;
3348 /* check which option changed by application */
3349 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3350 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3353 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3355 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3356 mask |= ETH_VLAN_STRIP_MASK;
3359 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3360 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3363 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3365 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3366 mask |= ETH_VLAN_FILTER_MASK;
3369 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3370 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3373 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3375 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3376 mask |= ETH_VLAN_EXTEND_MASK;
3379 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3380 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3383 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3385 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3386 mask |= ETH_QINQ_STRIP_MASK;
3393 ret = rte_eth_dev_info_get(port_id, &dev_info);
3397 /* Rx VLAN offloading must be within its device capabilities */
3398 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3399 new_offloads = dev_offloads & ~orig_offloads;
3401 "Ethdev port_id=%u requested new added VLAN offloads "
3402 "0x%" PRIx64 " must be within Rx offloads capabilities "
3403 "0x%" PRIx64 " in %s()\n",
3404 port_id, new_offloads, dev_info.rx_offload_capa,
3409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3410 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3411 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3413 /* hit an error restore original values */
3414 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3417 return eth_err(port_id, ret);
3421 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3423 struct rte_eth_dev *dev;
3424 uint64_t *dev_offloads;
3427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3428 dev = &rte_eth_devices[port_id];
3429 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3431 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3432 ret |= ETH_VLAN_STRIP_OFFLOAD;
3434 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3435 ret |= ETH_VLAN_FILTER_OFFLOAD;
3437 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3438 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3440 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3441 ret |= ETH_QINQ_STRIP_OFFLOAD;
3447 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3449 struct rte_eth_dev *dev;
3451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3452 dev = &rte_eth_devices[port_id];
3453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3455 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3459 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3461 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 dev = &rte_eth_devices[port_id];
3465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3466 memset(fc_conf, 0, sizeof(*fc_conf));
3467 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3471 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3473 struct rte_eth_dev *dev;
3475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3476 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3477 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3481 dev = &rte_eth_devices[port_id];
3482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3483 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3487 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3488 struct rte_eth_pfc_conf *pfc_conf)
3490 struct rte_eth_dev *dev;
3492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3493 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3494 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3498 dev = &rte_eth_devices[port_id];
3499 /* High water, low water validation are device specific */
3500 if (*dev->dev_ops->priority_flow_ctrl_set)
3501 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3507 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3515 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3516 for (i = 0; i < num; i++) {
3517 if (reta_conf[i].mask)
3525 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3529 uint16_t i, idx, shift;
3535 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3539 for (i = 0; i < reta_size; i++) {
3540 idx = i / RTE_RETA_GROUP_SIZE;
3541 shift = i % RTE_RETA_GROUP_SIZE;
3542 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3543 (reta_conf[idx].reta[shift] >= max_rxq)) {
3545 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3547 reta_conf[idx].reta[shift], max_rxq);
3556 rte_eth_dev_rss_reta_update(uint16_t port_id,
3557 struct rte_eth_rss_reta_entry64 *reta_conf,
3560 struct rte_eth_dev *dev;
3563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564 /* Check mask bits */
3565 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3569 dev = &rte_eth_devices[port_id];
3571 /* Check entry value */
3572 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3573 dev->data->nb_rx_queues);
3577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3578 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3583 rte_eth_dev_rss_reta_query(uint16_t port_id,
3584 struct rte_eth_rss_reta_entry64 *reta_conf,
3587 struct rte_eth_dev *dev;
3590 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3592 /* Check mask bits */
3593 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3597 dev = &rte_eth_devices[port_id];
3598 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3599 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3604 rte_eth_dev_rss_hash_update(uint16_t port_id,
3605 struct rte_eth_rss_conf *rss_conf)
3607 struct rte_eth_dev *dev;
3608 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3613 ret = rte_eth_dev_info_get(port_id, &dev_info);
3617 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3619 dev = &rte_eth_devices[port_id];
3620 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3621 dev_info.flow_type_rss_offloads) {
3623 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3624 port_id, rss_conf->rss_hf,
3625 dev_info.flow_type_rss_offloads);
3628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3629 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3634 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3635 struct rte_eth_rss_conf *rss_conf)
3637 struct rte_eth_dev *dev;
3639 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3640 dev = &rte_eth_devices[port_id];
3641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3642 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3647 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3648 struct rte_eth_udp_tunnel *udp_tunnel)
3650 struct rte_eth_dev *dev;
3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3653 if (udp_tunnel == NULL) {
3654 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3658 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3659 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3663 dev = &rte_eth_devices[port_id];
3664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3665 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3670 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3671 struct rte_eth_udp_tunnel *udp_tunnel)
3673 struct rte_eth_dev *dev;
3675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3676 dev = &rte_eth_devices[port_id];
3678 if (udp_tunnel == NULL) {
3679 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3683 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3684 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3689 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3694 rte_eth_led_on(uint16_t port_id)
3696 struct rte_eth_dev *dev;
3698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3699 dev = &rte_eth_devices[port_id];
3700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3701 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3705 rte_eth_led_off(uint16_t port_id)
3707 struct rte_eth_dev *dev;
3709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3710 dev = &rte_eth_devices[port_id];
3711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3712 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3716 rte_eth_fec_get_capability(uint16_t port_id,
3717 struct rte_eth_fec_capa *speed_fec_capa,
3720 struct rte_eth_dev *dev;
3723 if (speed_fec_capa == NULL && num > 0)
3726 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3727 dev = &rte_eth_devices[port_id];
3728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
3729 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
3735 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
3737 struct rte_eth_dev *dev;
3739 if (fec_capa == NULL)
3742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3743 dev = &rte_eth_devices[port_id];
3744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
3745 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
3749 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
3751 struct rte_eth_dev *dev;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3754 dev = &rte_eth_devices[port_id];
3755 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
3756 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
3760 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3764 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3766 struct rte_eth_dev_info dev_info;
3767 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3771 ret = rte_eth_dev_info_get(port_id, &dev_info);
3775 for (i = 0; i < dev_info.max_mac_addrs; i++)
3776 if (memcmp(addr, &dev->data->mac_addrs[i],
3777 RTE_ETHER_ADDR_LEN) == 0)
3783 static const struct rte_ether_addr null_mac_addr;
3786 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3789 struct rte_eth_dev *dev;
3794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3795 dev = &rte_eth_devices[port_id];
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3798 if (rte_is_zero_ether_addr(addr)) {
3799 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3803 if (pool >= ETH_64_POOLS) {
3804 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3808 index = get_mac_addr_index(port_id, addr);
3810 index = get_mac_addr_index(port_id, &null_mac_addr);
3812 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3817 pool_mask = dev->data->mac_pool_sel[index];
3819 /* Check if both MAC address and pool is already there, and do nothing */
3820 if (pool_mask & (1ULL << pool))
3825 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3828 /* Update address in NIC data structure */
3829 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3831 /* Update pool bitmap in NIC data structure */
3832 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3835 return eth_err(port_id, ret);
3839 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3841 struct rte_eth_dev *dev;
3844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3845 dev = &rte_eth_devices[port_id];
3846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3848 index = get_mac_addr_index(port_id, addr);
3851 "Port %u: Cannot remove default MAC address\n",
3854 } else if (index < 0)
3855 return 0; /* Do nothing if address wasn't found */
3858 (*dev->dev_ops->mac_addr_remove)(dev, index);
3860 /* Update address in NIC data structure */
3861 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3863 /* reset pool bitmap */
3864 dev->data->mac_pool_sel[index] = 0;
3870 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3872 struct rte_eth_dev *dev;
3875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3877 if (!rte_is_valid_assigned_ether_addr(addr))
3880 dev = &rte_eth_devices[port_id];
3881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3883 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3887 /* Update default address in NIC data structure */
3888 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3895 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3899 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3901 struct rte_eth_dev_info dev_info;
3902 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3906 ret = rte_eth_dev_info_get(port_id, &dev_info);
3910 if (!dev->data->hash_mac_addrs)
3913 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3914 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3915 RTE_ETHER_ADDR_LEN) == 0)
3922 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3927 struct rte_eth_dev *dev;
3929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3931 dev = &rte_eth_devices[port_id];
3932 if (rte_is_zero_ether_addr(addr)) {
3933 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3938 index = get_hash_mac_addr_index(port_id, addr);
3939 /* Check if it's already there, and do nothing */
3940 if ((index >= 0) && on)
3946 "Port %u: the MAC address was not set in UTA\n",
3951 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3953 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3960 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3962 /* Update address in NIC data structure */
3964 rte_ether_addr_copy(addr,
3965 &dev->data->hash_mac_addrs[index]);
3967 rte_ether_addr_copy(&null_mac_addr,
3968 &dev->data->hash_mac_addrs[index]);
3971 return eth_err(port_id, ret);
3975 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3977 struct rte_eth_dev *dev;
3979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3981 dev = &rte_eth_devices[port_id];
3983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3984 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3988 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3991 struct rte_eth_dev *dev;
3992 struct rte_eth_dev_info dev_info;
3993 struct rte_eth_link link;
3996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 ret = rte_eth_dev_info_get(port_id, &dev_info);
4002 dev = &rte_eth_devices[port_id];
4003 link = dev->data->dev_link;
4005 if (queue_idx > dev_info.max_tx_queues) {
4007 "Set queue rate limit:port %u: invalid queue id=%u\n",
4008 port_id, queue_idx);
4012 if (tx_rate > link.link_speed) {
4014 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4015 tx_rate, link.link_speed);
4019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4020 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4021 queue_idx, tx_rate));
4025 rte_eth_mirror_rule_set(uint16_t port_id,
4026 struct rte_eth_mirror_conf *mirror_conf,
4027 uint8_t rule_id, uint8_t on)
4029 struct rte_eth_dev *dev;
4031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4032 if (mirror_conf->rule_type == 0) {
4033 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4037 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4038 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4043 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4044 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4045 (mirror_conf->pool_mask == 0)) {
4047 "Invalid mirror pool, pool mask can not be 0\n");
4051 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4052 mirror_conf->vlan.vlan_mask == 0) {
4054 "Invalid vlan mask, vlan mask can not be 0\n");
4058 dev = &rte_eth_devices[port_id];
4059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4061 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4062 mirror_conf, rule_id, on));
4066 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4068 struct rte_eth_dev *dev;
4070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4072 dev = &rte_eth_devices[port_id];
4073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4075 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4079 RTE_INIT(eth_dev_init_cb_lists)
4083 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4084 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4088 rte_eth_dev_callback_register(uint16_t port_id,
4089 enum rte_eth_event_type event,
4090 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4092 struct rte_eth_dev *dev;
4093 struct rte_eth_dev_callback *user_cb;
4094 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4100 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4101 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4105 if (port_id == RTE_ETH_ALL) {
4107 last_port = RTE_MAX_ETHPORTS - 1;
4109 next_port = last_port = port_id;
4112 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4115 dev = &rte_eth_devices[next_port];
4117 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4118 if (user_cb->cb_fn == cb_fn &&
4119 user_cb->cb_arg == cb_arg &&
4120 user_cb->event == event) {
4125 /* create a new callback. */
4126 if (user_cb == NULL) {
4127 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4128 sizeof(struct rte_eth_dev_callback), 0);
4129 if (user_cb != NULL) {
4130 user_cb->cb_fn = cb_fn;
4131 user_cb->cb_arg = cb_arg;
4132 user_cb->event = event;
4133 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4136 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4137 rte_eth_dev_callback_unregister(port_id, event,
4143 } while (++next_port <= last_port);
4145 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4150 rte_eth_dev_callback_unregister(uint16_t port_id,
4151 enum rte_eth_event_type event,
4152 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4155 struct rte_eth_dev *dev;
4156 struct rte_eth_dev_callback *cb, *next;
4157 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4163 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4164 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4168 if (port_id == RTE_ETH_ALL) {
4170 last_port = RTE_MAX_ETHPORTS - 1;
4172 next_port = last_port = port_id;
4175 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4178 dev = &rte_eth_devices[next_port];
4180 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4183 next = TAILQ_NEXT(cb, next);
4185 if (cb->cb_fn != cb_fn || cb->event != event ||
4186 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4190 * if this callback is not executing right now,
4193 if (cb->active == 0) {
4194 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4200 } while (++next_port <= last_port);
4202 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4207 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4208 enum rte_eth_event_type event, void *ret_param)
4210 struct rte_eth_dev_callback *cb_lst;
4211 struct rte_eth_dev_callback dev_cb;
4214 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4215 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4216 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4220 if (ret_param != NULL)
4221 dev_cb.ret_param = ret_param;
4223 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4224 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4225 dev_cb.cb_arg, dev_cb.ret_param);
4226 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4229 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4234 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4239 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4241 dev->state = RTE_ETH_DEV_ATTACHED;
4245 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4248 struct rte_eth_dev *dev;
4249 struct rte_intr_handle *intr_handle;
4253 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4255 dev = &rte_eth_devices[port_id];
4257 if (!dev->intr_handle) {
4258 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4262 intr_handle = dev->intr_handle;
4263 if (!intr_handle->intr_vec) {
4264 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4268 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4269 vec = intr_handle->intr_vec[qid];
4270 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4271 if (rc && rc != -EEXIST) {
4273 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4274 port_id, qid, op, epfd, vec);
4282 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4284 struct rte_intr_handle *intr_handle;
4285 struct rte_eth_dev *dev;
4286 unsigned int efd_idx;
4290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4292 dev = &rte_eth_devices[port_id];
4294 if (queue_id >= dev->data->nb_rx_queues) {
4295 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4299 if (!dev->intr_handle) {
4300 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4304 intr_handle = dev->intr_handle;
4305 if (!intr_handle->intr_vec) {
4306 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4310 vec = intr_handle->intr_vec[queue_id];
4311 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4312 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4313 fd = intr_handle->efds[efd_idx];
4319 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4320 const char *ring_name)
4322 return snprintf(name, len, "eth_p%d_q%d_%s",
4323 port_id, queue_id, ring_name);
4326 const struct rte_memzone *
4327 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4328 uint16_t queue_id, size_t size, unsigned align,
4331 char z_name[RTE_MEMZONE_NAMESIZE];
4332 const struct rte_memzone *mz;
4335 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4336 queue_id, ring_name);
4337 if (rc >= RTE_MEMZONE_NAMESIZE) {
4338 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4339 rte_errno = ENAMETOOLONG;
4343 mz = rte_memzone_lookup(z_name);
4345 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4347 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4349 "memzone %s does not justify the requested attributes\n",
4357 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4358 RTE_MEMZONE_IOVA_CONTIG, align);
4362 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4365 char z_name[RTE_MEMZONE_NAMESIZE];
4366 const struct rte_memzone *mz;
4369 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4370 queue_id, ring_name);
4371 if (rc >= RTE_MEMZONE_NAMESIZE) {
4372 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4373 return -ENAMETOOLONG;
4376 mz = rte_memzone_lookup(z_name);
4378 rc = rte_memzone_free(mz);
4386 rte_eth_dev_create(struct rte_device *device, const char *name,
4387 size_t priv_data_size,
4388 ethdev_bus_specific_init ethdev_bus_specific_init,
4389 void *bus_init_params,
4390 ethdev_init_t ethdev_init, void *init_params)
4392 struct rte_eth_dev *ethdev;
4395 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4397 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4398 ethdev = rte_eth_dev_allocate(name);
4402 if (priv_data_size) {
4403 ethdev->data->dev_private = rte_zmalloc_socket(
4404 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4407 if (!ethdev->data->dev_private) {
4409 "failed to allocate private data\n");
4415 ethdev = rte_eth_dev_attach_secondary(name);
4418 "secondary process attach failed, ethdev doesn't exist\n");
4423 ethdev->device = device;
4425 if (ethdev_bus_specific_init) {
4426 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4429 "ethdev bus specific initialisation failed\n");
4434 retval = ethdev_init(ethdev, init_params);
4436 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4440 rte_eth_dev_probing_finish(ethdev);
4445 rte_eth_dev_release_port(ethdev);
4450 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4451 ethdev_uninit_t ethdev_uninit)
4455 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4459 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4461 ret = ethdev_uninit(ethdev);
4465 return rte_eth_dev_release_port(ethdev);
4469 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4470 int epfd, int op, void *data)
4473 struct rte_eth_dev *dev;
4474 struct rte_intr_handle *intr_handle;
4477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4479 dev = &rte_eth_devices[port_id];
4480 if (queue_id >= dev->data->nb_rx_queues) {
4481 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4485 if (!dev->intr_handle) {
4486 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4490 intr_handle = dev->intr_handle;
4491 if (!intr_handle->intr_vec) {
4492 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4496 vec = intr_handle->intr_vec[queue_id];
4497 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4498 if (rc && rc != -EEXIST) {
4500 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4501 port_id, queue_id, op, epfd, vec);
4509 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4512 struct rte_eth_dev *dev;
4515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4517 dev = &rte_eth_devices[port_id];
4519 ret = eth_dev_validate_rx_queue(dev, queue_id);
4523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4524 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4529 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4532 struct rte_eth_dev *dev;
4535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4537 dev = &rte_eth_devices[port_id];
4539 ret = eth_dev_validate_rx_queue(dev, queue_id);
4543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4544 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4550 rte_eth_dev_filter_supported(uint16_t port_id,
4551 enum rte_filter_type filter_type)
4553 struct rte_eth_dev *dev;
4555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4557 dev = &rte_eth_devices[port_id];
4558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4559 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4560 RTE_ETH_FILTER_NOP, NULL);
4564 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4565 enum rte_filter_op filter_op, void *arg)
4567 struct rte_eth_dev *dev;
4569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4571 dev = &rte_eth_devices[port_id];
4572 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4573 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4577 const struct rte_eth_rxtx_callback *
4578 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4579 rte_rx_callback_fn fn, void *user_param)
4581 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4582 rte_errno = ENOTSUP;
4585 struct rte_eth_dev *dev;
4587 /* check input parameters */
4588 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4589 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4593 dev = &rte_eth_devices[port_id];
4594 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4598 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4606 cb->param = user_param;
4608 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4609 /* Add the callbacks in fifo order. */
4610 struct rte_eth_rxtx_callback *tail =
4611 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4614 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4621 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4626 const struct rte_eth_rxtx_callback *
4627 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4628 rte_rx_callback_fn fn, void *user_param)
4630 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4631 rte_errno = ENOTSUP;
4634 /* check input parameters */
4635 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4636 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4641 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4649 cb->param = user_param;
4651 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4652 /* Add the callbacks at first position */
4653 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4655 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4656 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4661 const struct rte_eth_rxtx_callback *
4662 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4663 rte_tx_callback_fn fn, void *user_param)
4665 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4666 rte_errno = ENOTSUP;
4669 struct rte_eth_dev *dev;
4671 /* check input parameters */
4672 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4673 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4678 dev = &rte_eth_devices[port_id];
4679 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4684 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4692 cb->param = user_param;
4694 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4695 /* Add the callbacks in fifo order. */
4696 struct rte_eth_rxtx_callback *tail =
4697 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4700 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4707 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4713 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4714 const struct rte_eth_rxtx_callback *user_cb)
4716 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4719 /* Check input parameters. */
4720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4721 if (user_cb == NULL ||
4722 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4725 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4726 struct rte_eth_rxtx_callback *cb;
4727 struct rte_eth_rxtx_callback **prev_cb;
4730 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4731 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4732 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4734 if (cb == user_cb) {
4735 /* Remove the user cb from the callback list. */
4736 *prev_cb = cb->next;
4741 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4747 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4748 const struct rte_eth_rxtx_callback *user_cb)
4750 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4753 /* Check input parameters. */
4754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4755 if (user_cb == NULL ||
4756 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4759 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4761 struct rte_eth_rxtx_callback *cb;
4762 struct rte_eth_rxtx_callback **prev_cb;
4764 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4765 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4766 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4768 if (cb == user_cb) {
4769 /* Remove the user cb from the callback list. */
4770 *prev_cb = cb->next;
4775 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4781 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4782 struct rte_eth_rxq_info *qinfo)
4784 struct rte_eth_dev *dev;
4786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4791 dev = &rte_eth_devices[port_id];
4792 if (queue_id >= dev->data->nb_rx_queues) {
4793 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4797 if (dev->data->rx_queues == NULL ||
4798 dev->data->rx_queues[queue_id] == NULL) {
4800 "Rx queue %"PRIu16" of device with port_id=%"
4801 PRIu16" has not been setup\n",
4806 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4807 RTE_ETHDEV_LOG(INFO,
4808 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4813 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4815 memset(qinfo, 0, sizeof(*qinfo));
4816 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4821 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4822 struct rte_eth_txq_info *qinfo)
4824 struct rte_eth_dev *dev;
4826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4831 dev = &rte_eth_devices[port_id];
4832 if (queue_id >= dev->data->nb_tx_queues) {
4833 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4837 if (dev->data->tx_queues == NULL ||
4838 dev->data->tx_queues[queue_id] == NULL) {
4840 "Tx queue %"PRIu16" of device with port_id=%"
4841 PRIu16" has not been setup\n",
4846 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4847 RTE_ETHDEV_LOG(INFO,
4848 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4855 memset(qinfo, 0, sizeof(*qinfo));
4856 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4862 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4863 struct rte_eth_burst_mode *mode)
4865 struct rte_eth_dev *dev;
4867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4872 dev = &rte_eth_devices[port_id];
4874 if (queue_id >= dev->data->nb_rx_queues) {
4875 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4880 memset(mode, 0, sizeof(*mode));
4881 return eth_err(port_id,
4882 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4886 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4887 struct rte_eth_burst_mode *mode)
4889 struct rte_eth_dev *dev;
4891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4896 dev = &rte_eth_devices[port_id];
4898 if (queue_id >= dev->data->nb_tx_queues) {
4899 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4904 memset(mode, 0, sizeof(*mode));
4905 return eth_err(port_id,
4906 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4910 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4911 struct rte_ether_addr *mc_addr_set,
4912 uint32_t nb_mc_addr)
4914 struct rte_eth_dev *dev;
4916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4918 dev = &rte_eth_devices[port_id];
4919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4920 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4921 mc_addr_set, nb_mc_addr));
4925 rte_eth_timesync_enable(uint16_t port_id)
4927 struct rte_eth_dev *dev;
4929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4930 dev = &rte_eth_devices[port_id];
4932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4933 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4937 rte_eth_timesync_disable(uint16_t port_id)
4939 struct rte_eth_dev *dev;
4941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4942 dev = &rte_eth_devices[port_id];
4944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4945 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4949 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4952 struct rte_eth_dev *dev;
4954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4955 dev = &rte_eth_devices[port_id];
4957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4958 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4959 (dev, timestamp, flags));
4963 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4964 struct timespec *timestamp)
4966 struct rte_eth_dev *dev;
4968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4969 dev = &rte_eth_devices[port_id];
4971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4972 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4977 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4979 struct rte_eth_dev *dev;
4981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4982 dev = &rte_eth_devices[port_id];
4984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4985 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4990 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4992 struct rte_eth_dev *dev;
4994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4995 dev = &rte_eth_devices[port_id];
4997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4998 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5003 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5005 struct rte_eth_dev *dev;
5007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5008 dev = &rte_eth_devices[port_id];
5010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5011 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5016 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5018 struct rte_eth_dev *dev;
5020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5021 dev = &rte_eth_devices[port_id];
5023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5024 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5028 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5030 struct rte_eth_dev *dev;
5032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5034 dev = &rte_eth_devices[port_id];
5035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5036 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5040 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5042 struct rte_eth_dev *dev;
5044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5046 dev = &rte_eth_devices[port_id];
5047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5048 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5052 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5054 struct rte_eth_dev *dev;
5056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5058 dev = &rte_eth_devices[port_id];
5059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5060 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5064 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5066 struct rte_eth_dev *dev;
5068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5070 dev = &rte_eth_devices[port_id];
5071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5072 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5076 rte_eth_dev_get_module_info(uint16_t port_id,
5077 struct rte_eth_dev_module_info *modinfo)
5079 struct rte_eth_dev *dev;
5081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5083 dev = &rte_eth_devices[port_id];
5084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5085 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5089 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5090 struct rte_dev_eeprom_info *info)
5092 struct rte_eth_dev *dev;
5094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5096 dev = &rte_eth_devices[port_id];
5097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5098 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5102 rte_eth_dev_get_dcb_info(uint16_t port_id,
5103 struct rte_eth_dcb_info *dcb_info)
5105 struct rte_eth_dev *dev;
5107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5109 dev = &rte_eth_devices[port_id];
5110 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5113 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5117 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5118 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5120 struct rte_eth_dev *dev;
5122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5123 if (l2_tunnel == NULL) {
5124 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5128 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5129 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5133 dev = &rte_eth_devices[port_id];
5134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5136 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5141 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5142 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5146 struct rte_eth_dev *dev;
5148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5150 if (l2_tunnel == NULL) {
5151 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5155 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5156 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5161 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5165 dev = &rte_eth_devices[port_id];
5166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5168 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5169 l2_tunnel, mask, en));
5173 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5174 const struct rte_eth_desc_lim *desc_lim)
5176 if (desc_lim->nb_align != 0)
5177 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5179 if (desc_lim->nb_max != 0)
5180 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5182 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5186 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5187 uint16_t *nb_rx_desc,
5188 uint16_t *nb_tx_desc)
5190 struct rte_eth_dev_info dev_info;
5193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5195 ret = rte_eth_dev_info_get(port_id, &dev_info);
5199 if (nb_rx_desc != NULL)
5200 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5202 if (nb_tx_desc != NULL)
5203 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5209 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5210 struct rte_eth_hairpin_cap *cap)
5212 struct rte_eth_dev *dev;
5214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5216 dev = &rte_eth_devices[port_id];
5217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5218 memset(cap, 0, sizeof(*cap));
5219 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5223 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5225 if (dev->data->rx_queue_state[queue_id] ==
5226 RTE_ETH_QUEUE_STATE_HAIRPIN)
5232 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5234 if (dev->data->tx_queue_state[queue_id] ==
5235 RTE_ETH_QUEUE_STATE_HAIRPIN)
5241 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5243 struct rte_eth_dev *dev;
5245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5250 dev = &rte_eth_devices[port_id];
5252 if (*dev->dev_ops->pool_ops_supported == NULL)
5253 return 1; /* all pools are supported */
5255 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5259 * A set of values to describe the possible states of a switch domain.
5261 enum rte_eth_switch_domain_state {
5262 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5263 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5267 * Array of switch domains available for allocation. Array is sized to
5268 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5269 * ethdev ports in a single process.
5271 static struct rte_eth_dev_switch {
5272 enum rte_eth_switch_domain_state state;
5273 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5276 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5280 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5282 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5283 if (rte_eth_switch_domains[i].state ==
5284 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5285 rte_eth_switch_domains[i].state =
5286 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5296 rte_eth_switch_domain_free(uint16_t domain_id)
5298 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5299 domain_id >= RTE_MAX_ETHPORTS)
5302 if (rte_eth_switch_domains[domain_id].state !=
5303 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5306 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5312 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5315 struct rte_kvargs_pair *pair;
5318 arglist->str = strdup(str_in);
5319 if (arglist->str == NULL)
5322 letter = arglist->str;
5325 pair = &arglist->pairs[0];
5328 case 0: /* Initial */
5331 else if (*letter == '\0')
5338 case 1: /* Parsing key */
5339 if (*letter == '=') {
5341 pair->value = letter + 1;
5343 } else if (*letter == ',' || *letter == '\0')
5348 case 2: /* Parsing value */
5351 else if (*letter == ',') {
5354 pair = &arglist->pairs[arglist->count];
5356 } else if (*letter == '\0') {
5359 pair = &arglist->pairs[arglist->count];
5364 case 3: /* Parsing list */
5367 else if (*letter == '\0')
5376 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5378 struct rte_kvargs args;
5379 struct rte_kvargs_pair *pair;
5383 memset(eth_da, 0, sizeof(*eth_da));
5385 result = rte_eth_devargs_tokenise(&args, dargs);
5389 for (i = 0; i < args.count; i++) {
5390 pair = &args.pairs[i];
5391 if (strcmp("representor", pair->key) == 0) {
5392 result = rte_eth_devargs_parse_list(pair->value,
5393 rte_eth_devargs_parse_representor_ports,
5408 handle_port_list(const char *cmd __rte_unused,
5409 const char *params __rte_unused,
5410 struct rte_tel_data *d)
5414 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5415 RTE_ETH_FOREACH_DEV(port_id)
5416 rte_tel_data_add_array_int(d, port_id);
5421 add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5422 const char *stat_name)
5425 struct rte_tel_data *q_data = rte_tel_data_alloc();
5426 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5427 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5428 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5429 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5432 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5435 handle_port_stats(const char *cmd __rte_unused,
5437 struct rte_tel_data *d)
5439 struct rte_eth_stats stats;
5442 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5445 port_id = atoi(params);
5446 if (!rte_eth_dev_is_valid_port(port_id))
5449 ret = rte_eth_stats_get(port_id, &stats);
5453 rte_tel_data_start_dict(d);
5454 ADD_DICT_STAT(stats, ipackets);
5455 ADD_DICT_STAT(stats, opackets);
5456 ADD_DICT_STAT(stats, ibytes);
5457 ADD_DICT_STAT(stats, obytes);
5458 ADD_DICT_STAT(stats, imissed);
5459 ADD_DICT_STAT(stats, ierrors);
5460 ADD_DICT_STAT(stats, oerrors);
5461 ADD_DICT_STAT(stats, rx_nombuf);
5462 add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5463 add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5464 add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5465 add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5466 add_port_queue_stats(d, stats.q_errors, "q_errors");
5472 handle_port_xstats(const char *cmd __rte_unused,
5474 struct rte_tel_data *d)
5476 struct rte_eth_xstat *eth_xstats;
5477 struct rte_eth_xstat_name *xstat_names;
5478 int port_id, num_xstats;
5482 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5485 port_id = strtoul(params, &end_param, 0);
5486 if (*end_param != '\0')
5487 RTE_ETHDEV_LOG(NOTICE,
5488 "Extra parameters passed to ethdev telemetry command, ignoring");
5489 if (!rte_eth_dev_is_valid_port(port_id))
5492 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5496 /* use one malloc for both names and stats */
5497 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5498 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5499 if (eth_xstats == NULL)
5501 xstat_names = (void *)ð_xstats[num_xstats];
5503 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5504 if (ret < 0 || ret > num_xstats) {
5509 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5510 if (ret < 0 || ret > num_xstats) {
5515 rte_tel_data_start_dict(d);
5516 for (i = 0; i < num_xstats; i++)
5517 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5518 eth_xstats[i].value);
5523 handle_port_link_status(const char *cmd __rte_unused,
5525 struct rte_tel_data *d)
5527 static const char *status_str = "status";
5529 struct rte_eth_link link;
5532 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5535 port_id = strtoul(params, &end_param, 0);
5536 if (*end_param != '\0')
5537 RTE_ETHDEV_LOG(NOTICE,
5538 "Extra parameters passed to ethdev telemetry command, ignoring");
5539 if (!rte_eth_dev_is_valid_port(port_id))
5542 ret = rte_eth_link_get(port_id, &link);
5546 rte_tel_data_start_dict(d);
5547 if (!link.link_status) {
5548 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5551 rte_tel_data_add_dict_string(d, status_str, "UP");
5552 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5553 rte_tel_data_add_dict_string(d, "duplex",
5554 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5555 "full-duplex" : "half-duplex");
5559 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5561 RTE_INIT(ethdev_init_telemetry)
5563 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5564 "Returns list of available ethdev ports. Takes no parameters");
5565 rte_telemetry_register_cmd("/ethdev/stats", handle_port_stats,
5566 "Returns the common stats for a port. Parameters: int port_id");
5567 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5568 "Returns the extended stats for a port. Parameters: int port_id");
5569 rte_telemetry_register_cmd("/ethdev/link_status",
5570 handle_port_link_status,
5571 "Returns the link status for a port. Parameters: int port_id");