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34 #ifndef _RTE_ETH_CTRL_H_
35 #define _RTE_ETH_CTRL_H_
40 * Ethernet device features and related data structures used
41 * by control APIs should be defined in this file.
50 * A packet can be identified by hardware as different flow types. Different
51 * NIC hardwares may support different flow types.
52 * Basically, the NIC hardware identifies the flow type as deep protocol as
53 * possible, and exclusively. For example, if a packet is identified as
54 * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
55 * though it is an actual IPV4 packet.
56 * Note that the flow types are used to define RSS offload types in
59 #define RTE_ETH_FLOW_UNKNOWN 0
60 #define RTE_ETH_FLOW_RAW 1
61 #define RTE_ETH_FLOW_IPV4 2
62 #define RTE_ETH_FLOW_FRAG_IPV4 3
63 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
64 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
65 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
66 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
67 #define RTE_ETH_FLOW_IPV6 8
68 #define RTE_ETH_FLOW_FRAG_IPV6 9
69 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
70 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
71 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
72 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
73 #define RTE_ETH_FLOW_L2_PAYLOAD 14
74 #define RTE_ETH_FLOW_IPV6_EX 15
75 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
76 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
77 #define RTE_ETH_FLOW_MAX 18
80 * Feature filter types
82 enum rte_filter_type {
83 RTE_ETH_FILTER_NONE = 0,
84 RTE_ETH_FILTER_MACVLAN,
85 RTE_ETH_FILTER_ETHERTYPE,
86 RTE_ETH_FILTER_FLEXIBLE,
88 RTE_ETH_FILTER_NTUPLE,
89 RTE_ETH_FILTER_TUNNEL,
96 * Generic operations on filters
99 /** used to check whether the type filter is supported */
100 RTE_ETH_FILTER_NOP = 0,
101 RTE_ETH_FILTER_ADD, /**< add filter entry */
102 RTE_ETH_FILTER_UPDATE, /**< update filter entry */
103 RTE_ETH_FILTER_DELETE, /**< delete filter entry */
104 RTE_ETH_FILTER_FLUSH, /**< flush all entries */
105 RTE_ETH_FILTER_GET, /**< get filter entry */
106 RTE_ETH_FILTER_SET, /**< configurations */
107 RTE_ETH_FILTER_INFO, /**< retrieve information */
108 RTE_ETH_FILTER_STATS, /**< retrieve statistics */
109 RTE_ETH_FILTER_OP_MAX
115 enum rte_mac_filter_type {
116 RTE_MAC_PERFECT_MATCH = 1, /**< exact match of MAC addr. */
117 RTE_MACVLAN_PERFECT_MATCH, /**< exact match of MAC addr and VLAN ID. */
118 RTE_MAC_HASH_MATCH, /**< hash match of MAC addr. */
119 /** hash match of MAC addr and exact match of VLAN ID. */
120 RTE_MACVLAN_HASH_MATCH,
126 struct rte_eth_mac_filter {
127 uint8_t is_vf; /**< 1 for VF, 0 for port dev */
128 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
129 enum rte_mac_filter_type filter_type; /**< MAC filter type */
130 struct ether_addr mac_addr;
134 * Define all structures for Ethertype Filter type.
137 #define RTE_ETHTYPE_FLAGS_MAC 0x0001 /**< If set, compare mac */
138 #define RTE_ETHTYPE_FLAGS_DROP 0x0002 /**< If set, drop packet when match */
141 * A structure used to define the ethertype filter entry
142 * to support RTE_ETH_FILTER_ETHERTYPE with RTE_ETH_FILTER_ADD,
143 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
145 struct rte_eth_ethertype_filter {
146 struct ether_addr mac_addr; /**< Mac address to match. */
147 uint16_t ether_type; /**< Ether type to match */
148 uint16_t flags; /**< Flags from RTE_ETHTYPE_FLAGS_* */
149 uint16_t queue; /**< Queue assigned to when match*/
152 #define RTE_FLEX_FILTER_MAXLEN 128 /**< bytes to use in flex filter. */
153 #define RTE_FLEX_FILTER_MASK_SIZE \
154 (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
155 /**< mask bytes in flex filter. */
158 * A structure used to define the flex filter entry
159 * to support RTE_ETH_FILTER_FLEXIBLE with RTE_ETH_FILTER_ADD,
160 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
162 struct rte_eth_flex_filter {
164 uint8_t bytes[RTE_FLEX_FILTER_MAXLEN]; /**< flex bytes in big endian.*/
165 uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE]; /**< if mask bit is 1b, do
166 not compare corresponding byte. */
168 uint16_t queue; /**< Queue assigned to when match. */
172 * A structure used to define the TCP syn filter entry
173 * to support RTE_ETH_FILTER_SYN with RTE_ETH_FILTER_ADD,
174 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
176 struct rte_eth_syn_filter {
177 uint8_t hig_pri; /**< 1 - higher priority than other filters,
178 0 - lower priority. */
179 uint16_t queue; /**< Queue assigned to when match */
183 * Define all structures for ntuple Filter type.
186 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 /**< If set, dst_ip is part of ntuple */
187 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 /**< If set, src_ip is part of ntuple */
188 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 /**< If set, dst_port is part of ntuple */
189 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 /**< If set, src_port is part of ntuple */
190 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 /**< If set, protocol is part of ntuple */
191 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 /**< If set, tcp flag is involved */
193 #define RTE_5TUPLE_FLAGS ( \
194 RTE_NTUPLE_FLAGS_DST_IP | \
195 RTE_NTUPLE_FLAGS_SRC_IP | \
196 RTE_NTUPLE_FLAGS_DST_PORT | \
197 RTE_NTUPLE_FLAGS_SRC_PORT | \
198 RTE_NTUPLE_FLAGS_PROTO)
200 #define RTE_2TUPLE_FLAGS ( \
201 RTE_NTUPLE_FLAGS_DST_PORT | \
202 RTE_NTUPLE_FLAGS_PROTO)
204 #define TCP_URG_FLAG 0x20
205 #define TCP_ACK_FLAG 0x10
206 #define TCP_PSH_FLAG 0x08
207 #define TCP_RST_FLAG 0x04
208 #define TCP_SYN_FLAG 0x02
209 #define TCP_FIN_FLAG 0x01
210 #define TCP_FLAG_ALL 0x3F
213 * A structure used to define the ntuple filter entry
214 * to support RTE_ETH_FILTER_NTUPLE with RTE_ETH_FILTER_ADD,
215 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
217 struct rte_eth_ntuple_filter {
218 uint16_t flags; /**< Flags from RTE_NTUPLE_FLAGS_* */
219 uint32_t dst_ip; /**< Destination IP address in big endian. */
220 uint32_t dst_ip_mask; /**< Mask of destination IP address. */
221 uint32_t src_ip; /**< Source IP address in big endian. */
222 uint32_t src_ip_mask; /**< Mask of destination IP address. */
223 uint16_t dst_port; /**< Destination port in big endian. */
224 uint16_t dst_port_mask; /**< Mask of destination port. */
225 uint16_t src_port; /**< Source Port in big endian. */
226 uint16_t src_port_mask; /**< Mask of source port. */
227 uint8_t proto; /**< L4 protocol. */
228 uint8_t proto_mask; /**< Mask of L4 protocol. */
229 /** tcp_flags only meaningful when the proto is TCP.
230 The packet matched above ntuple fields and contain
231 any set bit in tcp_flags will hit this filter. */
233 uint16_t priority; /**< seven levels (001b-111b), 111b is highest,
234 used when more than one filter matches. */
235 uint16_t queue; /**< Queue assigned to when match*/
241 enum rte_eth_tunnel_type {
242 RTE_TUNNEL_TYPE_NONE = 0,
243 RTE_TUNNEL_TYPE_VXLAN,
244 RTE_TUNNEL_TYPE_GENEVE,
245 RTE_TUNNEL_TYPE_TEREDO,
246 RTE_TUNNEL_TYPE_NVGRE,
251 * filter type of tunneling packet
253 #define ETH_TUNNEL_FILTER_OMAC 0x01 /**< filter by outer MAC addr */
254 #define ETH_TUNNEL_FILTER_OIP 0x02 /**< filter by outer IP Addr */
255 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */
256 #define ETH_TUNNEL_FILTER_IMAC 0x08 /**< filter by inner MAC addr */
257 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */
258 #define ETH_TUNNEL_FILTER_IIP 0x20 /**< filter by inner IP addr */
260 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
261 ETH_TUNNEL_FILTER_IVLAN)
262 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
263 ETH_TUNNEL_FILTER_IVLAN | \
264 ETH_TUNNEL_FILTER_TENID)
265 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
266 ETH_TUNNEL_FILTER_TENID)
267 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
268 ETH_TUNNEL_FILTER_TENID | \
269 ETH_TUNNEL_FILTER_IMAC)
272 * Select IPv4 or IPv6 for tunnel filters.
274 enum rte_tunnel_iptype {
275 RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */
276 RTE_TUNNEL_IPTYPE_IPV6, /**< IPv6. */
280 * Tunneling Packet filter configuration.
282 struct rte_eth_tunnel_filter_conf {
283 struct ether_addr *outer_mac; /**< Outer MAC address filter. */
284 struct ether_addr *inner_mac; /**< Inner MAC address filter. */
285 uint16_t inner_vlan; /**< Inner VLAN filter. */
286 enum rte_tunnel_iptype ip_type; /**< IP address type. */
288 uint32_t ipv4_addr; /**< IPv4 source address to match. */
289 uint32_t ipv6_addr[4]; /**< IPv6 source address to match. */
290 } ip_addr; /**< IPv4/IPv6 source address to match (union of above). */
292 uint16_t filter_type; /**< Filter type. */
293 enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */
294 uint32_t tenant_id; /**< Tenant number. */
295 uint16_t queue_id; /**< Queue number. */
299 * Global eth device configuration type.
301 enum rte_eth_global_cfg_type {
302 RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
303 RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
304 RTE_ETH_GLOBAL_CFG_TYPE_MAX,
308 * Global eth device configuration.
310 struct rte_eth_global_cfg {
311 enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */
313 uint8_t gre_key_len; /**< Valid GRE key length in byte. */
314 uint64_t reserved; /**< Reserve space for future use. */
318 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 /**< Max length of flexbytes. */
319 #define RTE_ETH_INSET_SIZE_MAX 128 /**< Max length of input set. */
322 * Input set fields for Flow Director and Hash filters
324 enum rte_eth_input_set_field {
325 RTE_ETH_INPUT_SET_UNKNOWN = 0,
328 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
329 RTE_ETH_INPUT_SET_L2_DST_MAC,
330 RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
331 RTE_ETH_INPUT_SET_L2_INNER_VLAN,
332 RTE_ETH_INPUT_SET_L2_ETHERTYPE,
335 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
336 RTE_ETH_INPUT_SET_L3_DST_IP4,
337 RTE_ETH_INPUT_SET_L3_SRC_IP6,
338 RTE_ETH_INPUT_SET_L3_DST_IP6,
339 RTE_ETH_INPUT_SET_L3_IP4_TOS,
340 RTE_ETH_INPUT_SET_L3_IP4_PROTO,
341 RTE_ETH_INPUT_SET_L3_IP6_TC,
342 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
345 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
346 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
347 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
348 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
349 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
350 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
351 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
354 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
355 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
356 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
357 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
358 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
360 /* Flexible Payload */
361 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
362 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
363 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
364 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
365 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
366 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
367 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
368 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
370 RTE_ETH_INPUT_SET_DEFAULT = 65533,
371 RTE_ETH_INPUT_SET_NONE = 65534,
372 RTE_ETH_INPUT_SET_MAX = 65535,
376 * Filters input set operations
378 enum rte_filter_input_set_op {
379 RTE_ETH_INPUT_SET_OP_UNKNOWN,
380 RTE_ETH_INPUT_SET_SELECT, /**< select input set */
381 RTE_ETH_INPUT_SET_ADD, /**< add input set entry */
382 RTE_ETH_INPUT_SET_OP_MAX
387 * A structure used to define the input set configuration for
388 * flow director and hash filters
390 struct rte_eth_input_set_conf {
393 enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
394 enum rte_filter_input_set_op op;
398 * A structure used to define the input for L2 flow
400 struct rte_eth_l2_flow {
401 uint16_t ether_type; /**< Ether type to match */
405 * A structure used to define the input for IPV4 flow
407 struct rte_eth_ipv4_flow {
408 uint32_t src_ip; /**< IPv4 source address to match. */
409 uint32_t dst_ip; /**< IPv4 destination address to match. */
413 * A structure used to define the input for IPV4 UDP flow
415 struct rte_eth_udpv4_flow {
416 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
417 uint16_t src_port; /**< UDP source port to match. */
418 uint16_t dst_port; /**< UDP destination port to match. */
422 * A structure used to define the input for IPV4 TCP flow
424 struct rte_eth_tcpv4_flow {
425 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
426 uint16_t src_port; /**< TCP source port to match. */
427 uint16_t dst_port; /**< TCP destination port to match. */
431 * A structure used to define the input for IPV4 SCTP flow
433 struct rte_eth_sctpv4_flow {
434 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
435 uint16_t src_port; /**< SCTP source port to match. */
436 uint16_t dst_port; /**< SCTP destination port to match. */
437 uint32_t verify_tag; /**< Verify tag to match */
441 * A structure used to define the input for IPV6 flow
443 struct rte_eth_ipv6_flow {
444 uint32_t src_ip[4]; /**< IPv6 source address to match. */
445 uint32_t dst_ip[4]; /**< IPv6 destination address to match. */
449 * A structure used to define the input for IPV6 UDP flow
451 struct rte_eth_udpv6_flow {
452 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
453 uint16_t src_port; /**< UDP source port to match. */
454 uint16_t dst_port; /**< UDP destination port to match. */
458 * A structure used to define the input for IPV6 TCP flow
460 struct rte_eth_tcpv6_flow {
461 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
462 uint16_t src_port; /**< TCP source port to match. */
463 uint16_t dst_port; /**< TCP destination port to match. */
467 * A structure used to define the input for IPV6 SCTP flow
469 struct rte_eth_sctpv6_flow {
470 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
471 uint16_t src_port; /**< SCTP source port to match. */
472 uint16_t dst_port; /**< SCTP destination port to match. */
473 uint32_t verify_tag; /**< Verify tag to match */
477 * A structure used to define the input for MAC VLAN flow
479 struct rte_eth_mac_vlan_flow {
480 struct ether_addr mac_addr; /**< Mac address to match. */
484 * Tunnel type for flow director.
486 enum rte_eth_fdir_tunnel_type {
487 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
488 RTE_FDIR_TUNNEL_TYPE_NVGRE,
489 RTE_FDIR_TUNNEL_TYPE_VXLAN,
493 * A structure used to define the input for tunnel flow, now it's VxLAN or
496 struct rte_eth_tunnel_flow {
497 enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
498 uint32_t tunnel_id; /**< Tunnel ID to match. TNI, VNI... */
499 struct ether_addr mac_addr; /**< Mac address to match. */
503 * An union contains the inputs for all types of flow
504 * Items in flows need to be in big endian
506 union rte_eth_fdir_flow {
507 struct rte_eth_l2_flow l2_flow;
508 struct rte_eth_udpv4_flow udp4_flow;
509 struct rte_eth_tcpv4_flow tcp4_flow;
510 struct rte_eth_sctpv4_flow sctp4_flow;
511 struct rte_eth_ipv4_flow ip4_flow;
512 struct rte_eth_udpv6_flow udp6_flow;
513 struct rte_eth_tcpv6_flow tcp6_flow;
514 struct rte_eth_sctpv6_flow sctp6_flow;
515 struct rte_eth_ipv6_flow ipv6_flow;
516 struct rte_eth_mac_vlan_flow mac_vlan_flow;
517 struct rte_eth_tunnel_flow tunnel_flow;
521 * A structure used to contain extend input of flow
523 struct rte_eth_fdir_flow_ext {
525 uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
526 /**< It is filled by the flexible payload to match. */
527 uint8_t is_vf; /**< 1 for VF, 0 for port dev */
528 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
532 * A structure used to define the input for a flow director filter entry
534 struct rte_eth_fdir_input {
536 union rte_eth_fdir_flow flow;
537 /**< Flow fields to match, dependent on flow_type */
538 struct rte_eth_fdir_flow_ext flow_ext;
539 /**< Additional fields to match */
543 * Behavior will be taken if FDIR match
545 enum rte_eth_fdir_behavior {
546 RTE_ETH_FDIR_ACCEPT = 0,
548 RTE_ETH_FDIR_PASSTHRU,
552 * Flow director report status
553 * It defines what will be reported if FDIR entry is matched.
555 enum rte_eth_fdir_status {
556 RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
557 RTE_ETH_FDIR_REPORT_ID, /**< Only report FD ID. */
558 RTE_ETH_FDIR_REPORT_ID_FLEX_4, /**< Report FD ID and 4 flex bytes. */
559 RTE_ETH_FDIR_REPORT_FLEX_8, /**< Report 8 flex bytes. */
563 * A structure used to define an action when match FDIR packet filter.
565 struct rte_eth_fdir_action {
566 uint16_t rx_queue; /**< Queue assigned to if FDIR match. */
567 enum rte_eth_fdir_behavior behavior; /**< Behavior will be taken */
568 enum rte_eth_fdir_status report_status; /**< Status report option */
570 /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
571 RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
572 flex bytes start from in flexible payload. */
576 * A structure used to define the flow director filter entry by filter_ctrl API
577 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and
578 * RTE_ETH_FILTER_DELETE operations.
580 struct rte_eth_fdir_filter {
582 /**< ID, an unique value is required when deal with FDIR entry */
583 struct rte_eth_fdir_input input; /**< Input set */
584 struct rte_eth_fdir_action action; /**< Action taken when match */
588 * A structure used to configure FDIR masks that are used by the device
589 * to match the various fields of RX packet headers.
591 struct rte_eth_fdir_masks {
592 uint16_t vlan_tci_mask; /**< Bit mask for vlan_tci in big endian */
593 /** Bit mask for ipv4 flow in big endian. */
594 struct rte_eth_ipv4_flow ipv4_mask;
595 /** Bit maks for ipv6 flow in big endian. */
596 struct rte_eth_ipv6_flow ipv6_mask;
597 /** Bit mask for L4 source port in big endian. */
598 uint16_t src_port_mask;
599 /** Bit mask for L4 destination port in big endian. */
600 uint16_t dst_port_mask;
601 /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
602 first byte on the wire */
603 uint8_t mac_addr_byte_mask;
604 /** Bit mask for tunnel ID in big endian. */
605 uint32_t tunnel_id_mask;
606 uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
607 0 - Ignore tunnel type. */
613 enum rte_eth_payload_type {
614 RTE_ETH_PAYLOAD_UNKNOWN = 0,
619 RTE_ETH_PAYLOAD_MAX = 8,
623 * A structure used to select bytes extracted from the protocol layers to
624 * flexible payload for filter
626 struct rte_eth_flex_payload_cfg {
627 enum rte_eth_payload_type type; /**< Payload type */
628 uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
629 /**< Offset in bytes from the beginning of packet's payload
630 src_offset[i] indicates the flexbyte i's offset in original
631 packet payload. This value should be less than
632 flex_payload_limit in struct rte_eth_fdir_info.*/
636 * A structure used to define FDIR masks for flexible payload
639 struct rte_eth_fdir_flex_mask {
641 uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
642 /**< Mask for the whole flexible payload */
646 * A structure used to define all flexible payload related setting
647 * include flex payload and flex mask
649 struct rte_eth_fdir_flex_conf {
650 uint16_t nb_payloads; /**< The number of following payload cfg */
651 uint16_t nb_flexmasks; /**< The number of following mask */
652 struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
653 /**< Flex payload configuration for each payload type */
654 struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
655 /**< Flex mask configuration for each flow type */
659 * Flow Director setting modes: none, signature or perfect.
662 RTE_FDIR_MODE_NONE = 0, /**< Disable FDIR support. */
663 RTE_FDIR_MODE_SIGNATURE, /**< Enable FDIR signature filter mode. */
664 RTE_FDIR_MODE_PERFECT, /**< Enable FDIR perfect filter mode. */
665 RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
666 RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - tunnel. */
669 #define UINT32_BIT (CHAR_BIT * sizeof(uint32_t))
670 #define RTE_FLOW_MASK_ARRAY_SIZE \
671 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
674 * A structure used to get the information of flow director filter.
675 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
676 * It includes the mode, flexible payload configuration information,
677 * capabilities and supported flow types, flexible payload characters.
678 * It can be gotten to help taking specific configurations per device.
680 struct rte_eth_fdir_info {
681 enum rte_fdir_mode mode; /**< Flow director mode */
682 struct rte_eth_fdir_masks mask;
683 /** Flex payload configuration information */
684 struct rte_eth_fdir_flex_conf flex_conf;
685 uint32_t guarant_spc; /**< Guaranteed spaces.*/
686 uint32_t best_spc; /**< Best effort spaces.*/
687 /** Bit mask for every supported flow type. */
688 uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
689 uint32_t max_flexpayload; /**< Total flex payload in bytes. */
690 /** Flexible payload unit in bytes. Size and alignments of all flex
691 payload segments should be multiplies of this value. */
692 uint32_t flex_payload_unit;
693 /** Max number of flexible payload continuous segments.
694 Each segment should be a multiple of flex_payload_unit.*/
695 uint32_t max_flex_payload_segment_num;
696 /** Maximum src_offset in bytes allowed. It indicates that
697 src_offset[i] in struct rte_eth_flex_payload_cfg should be less
699 uint16_t flex_payload_limit;
700 /** Flex bitmask unit in bytes. Size of flex bitmasks should be a
701 multiply of this value. */
702 uint32_t flex_bitmask_unit;
703 /** Max supported size of flex bitmasks in flex_bitmask_unit */
704 uint32_t max_flex_bitmask_num;
708 * A structure used to define the statistics of flow director.
709 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
711 struct rte_eth_fdir_stats {
712 uint32_t collision; /**< Number of filters with collision. */
713 uint32_t free; /**< Number of free filters. */
715 /**< The lookup hash value of the added filter that updated the value
716 of the MAXLEN field */
717 uint32_t maxlen; /**< Longest linked list of filters. */
718 uint64_t add; /**< Number of added filters. */
719 uint64_t remove; /**< Number of removed filters. */
720 uint64_t f_add; /**< Number of failed added filters. */
721 uint64_t f_remove; /**< Number of failed removed filters. */
722 uint32_t guarant_cnt; /**< Number of filters in guaranteed spaces. */
723 uint32_t best_cnt; /**< Number of filters in best effort spaces. */
727 * Flow Director filter information types.
729 enum rte_eth_fdir_filter_info_type {
730 RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
731 /** Flow Director filter input set configuration */
732 RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
733 RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
737 * A structure used to set FDIR filter information, to support filter type
738 * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation.
740 struct rte_eth_fdir_filter_info {
741 enum rte_eth_fdir_filter_info_type info_type; /**< Information type */
742 /** Details of fdir filter information */
744 /** Flow Director input set configuration per port */
745 struct rte_eth_input_set_conf input_set_conf;
750 * Hash filter information types.
751 * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the
752 * information/configuration of 'symmetric hash enable' per port.
753 * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global
754 * configurations of hash filters. Those global configurations are valid
755 * for all ports of the same NIC.
756 * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global
757 * hash input set fields
759 enum rte_eth_hash_filter_info_type {
760 RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
761 /** Symmetric hash enable per port */
762 RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
763 /** Configure globally for hash filter */
764 RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
765 /** Global Hash filter input set configuration */
766 RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
767 RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
771 * Hash function types.
773 enum rte_eth_hash_function {
774 RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
775 RTE_ETH_HASH_FUNCTION_TOEPLITZ, /**< Toeplitz */
776 RTE_ETH_HASH_FUNCTION_SIMPLE_XOR, /**< Simple XOR */
777 RTE_ETH_HASH_FUNCTION_MAX,
780 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
781 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
783 * A structure used to set or get global hash function configurations which
784 * include symmetric hash enable per flow type and hash function type.
785 * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the
786 * corresponding flow type is enabled or not.
787 * Each bit in valid_bit_mask[] indicates if the corresponding bit in
788 * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it
789 * also means if the flow type is supported by hardware or not.
791 struct rte_eth_hash_global_conf {
792 enum rte_eth_hash_function hash_func; /**< Hash function type */
793 /** Bit mask for symmetric hash enable per flow type */
794 uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
795 /** Bit mask indicates if the corresponding bit is valid */
796 uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
800 * A structure used to set or get hash filter information, to support filter
801 * type of 'RTE_ETH_FILTER_HASH' and its operations.
803 struct rte_eth_hash_filter_info {
804 enum rte_eth_hash_filter_info_type info_type; /**< Information type */
805 /** Details of hash filter information */
807 /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */
809 /** Global configurations of hash filter */
810 struct rte_eth_hash_global_conf global_conf;
811 /** Global configurations of hash filter input set */
812 struct rte_eth_input_set_conf input_set_conf;
820 #endif /* _RTE_ETH_CTRL_H_ */