1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for shared data allocation */
58 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
60 /* store statistics names and its offset in stats structure */
61 struct rte_eth_xstats_name_off {
62 char name[RTE_ETH_XSTATS_NAME_SIZE];
66 /* Shared memory between primary and secondary processes. */
68 uint64_t next_owner_id;
69 rte_spinlock_t ownership_lock;
70 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
71 } *rte_eth_dev_shared_data;
73 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
74 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
75 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
76 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
77 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
78 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
79 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
80 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
81 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
85 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
87 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
88 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
89 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
90 {"errors", offsetof(struct rte_eth_stats, q_errors)},
93 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
94 sizeof(rte_rxq_stats_strings[0]))
96 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
97 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
98 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
100 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
101 sizeof(rte_txq_stats_strings[0]))
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { DEV_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } rte_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
122 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
124 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
125 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 #undef RTE_RX_OFFLOAD_BIT2STR
130 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
131 { DEV_TX_OFFLOAD_##_name, #_name }
133 static const struct {
136 } rte_tx_offload_names[] = {
137 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
138 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
139 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
140 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
141 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
142 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
144 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
146 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
152 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
153 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
154 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
157 #undef RTE_TX_OFFLOAD_BIT2STR
160 * The user application callback description.
162 * It contains callback address to be registered by user application,
163 * the pointer to the parameters for callback, and the event type.
165 struct rte_eth_dev_callback {
166 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
167 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
168 void *cb_arg; /**< Parameter for callback */
169 void *ret_param; /**< Return parameter */
170 enum rte_eth_event_type event; /**< Interrupt event type */
171 uint32_t active; /**< Callback is executing */
180 rte_eth_find_next(uint16_t port_id)
182 while (port_id < RTE_MAX_ETHPORTS &&
183 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
184 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
187 if (port_id >= RTE_MAX_ETHPORTS)
188 return RTE_MAX_ETHPORTS;
194 rte_eth_dev_shared_data_prepare(void)
196 const unsigned flags = 0;
197 const struct rte_memzone *mz;
199 rte_spinlock_lock(&rte_eth_shared_data_lock);
201 if (rte_eth_dev_shared_data == NULL) {
202 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
203 /* Allocate port data and ownership shared memory. */
204 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
205 sizeof(*rte_eth_dev_shared_data),
206 rte_socket_id(), flags);
208 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
210 rte_panic("Cannot allocate ethdev shared data\n");
212 rte_eth_dev_shared_data = mz->addr;
213 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
214 rte_eth_dev_shared_data->next_owner_id =
215 RTE_ETH_DEV_NO_OWNER + 1;
216 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
217 memset(rte_eth_dev_shared_data->data, 0,
218 sizeof(rte_eth_dev_shared_data->data));
222 rte_spinlock_unlock(&rte_eth_shared_data_lock);
226 rte_eth_dev_allocated(const char *name)
230 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
231 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
232 strcmp(rte_eth_devices[i].data->name, name) == 0)
233 return &rte_eth_devices[i];
239 rte_eth_dev_find_free_port(void)
243 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
244 /* Using shared name field to find a free port. */
245 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
246 RTE_ASSERT(rte_eth_devices[i].state ==
251 return RTE_MAX_ETHPORTS;
254 static struct rte_eth_dev *
255 eth_dev_get(uint16_t port_id)
257 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
259 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
260 eth_dev->state = RTE_ETH_DEV_ATTACHED;
262 eth_dev_last_created_port = port_id;
268 rte_eth_dev_allocate(const char *name)
271 struct rte_eth_dev *eth_dev = NULL;
273 rte_eth_dev_shared_data_prepare();
275 /* Synchronize port creation between primary and secondary threads. */
276 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
278 port_id = rte_eth_dev_find_free_port();
279 if (port_id == RTE_MAX_ETHPORTS) {
280 RTE_LOG(ERR, EAL, "Reached maximum number of Ethernet ports\n");
284 if (rte_eth_dev_allocated(name) != NULL) {
285 RTE_LOG(ERR, EAL, "Ethernet Device with name %s already allocated!\n",
290 eth_dev = eth_dev_get(port_id);
291 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
292 eth_dev->data->port_id = port_id;
293 eth_dev->data->mtu = ETHER_MTU;
296 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
299 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
305 * Attach to a port already registered by the primary process, which
306 * makes sure that the same device would have the same port id both
307 * in the primary and secondary process.
310 rte_eth_dev_attach_secondary(const char *name)
313 struct rte_eth_dev *eth_dev = NULL;
315 rte_eth_dev_shared_data_prepare();
317 /* Synchronize port attachment to primary port creation and release. */
318 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
320 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
321 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
324 if (i == RTE_MAX_ETHPORTS) {
326 "device %s is not driven by the primary process\n",
329 eth_dev = eth_dev_get(i);
330 RTE_ASSERT(eth_dev->data->port_id == i);
333 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
338 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
343 rte_eth_dev_shared_data_prepare();
345 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
347 eth_dev->state = RTE_ETH_DEV_UNUSED;
349 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
351 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
353 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
359 rte_eth_dev_is_valid_port(uint16_t port_id)
361 if (port_id >= RTE_MAX_ETHPORTS ||
362 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
369 rte_eth_is_valid_owner_id(uint64_t owner_id)
371 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
372 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
373 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
379 uint64_t __rte_experimental
380 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
382 while (port_id < RTE_MAX_ETHPORTS &&
383 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
384 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
385 rte_eth_devices[port_id].data->owner.id != owner_id))
388 if (port_id >= RTE_MAX_ETHPORTS)
389 return RTE_MAX_ETHPORTS;
394 int __rte_experimental
395 rte_eth_dev_owner_new(uint64_t *owner_id)
397 rte_eth_dev_shared_data_prepare();
399 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
401 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
403 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
408 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
409 const struct rte_eth_dev_owner *new_owner)
411 struct rte_eth_dev_owner *port_owner;
414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
416 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
417 !rte_eth_is_valid_owner_id(old_owner_id))
420 port_owner = &rte_eth_devices[port_id].data->owner;
421 if (port_owner->id != old_owner_id) {
422 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
423 " by %s_%016lX.\n", port_id,
424 port_owner->name, port_owner->id);
428 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
430 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
431 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
434 port_owner->id = new_owner->id;
436 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
437 new_owner->name, new_owner->id);
442 int __rte_experimental
443 rte_eth_dev_owner_set(const uint16_t port_id,
444 const struct rte_eth_dev_owner *owner)
448 rte_eth_dev_shared_data_prepare();
450 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
452 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
454 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
458 int __rte_experimental
459 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
461 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
462 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
465 rte_eth_dev_shared_data_prepare();
467 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
469 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
471 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
475 void __rte_experimental
476 rte_eth_dev_owner_delete(const uint64_t owner_id)
480 rte_eth_dev_shared_data_prepare();
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 if (rte_eth_is_valid_owner_id(owner_id)) {
485 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
486 memset(&rte_eth_devices[port_id].data->owner, 0,
487 sizeof(struct rte_eth_dev_owner));
488 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
489 " have removed.\n", owner_id);
492 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
495 int __rte_experimental
496 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
500 rte_eth_dev_shared_data_prepare();
502 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
504 if (!rte_eth_dev_is_valid_port(port_id)) {
505 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
508 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
512 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
517 rte_eth_dev_socket_id(uint16_t port_id)
519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
520 return rte_eth_devices[port_id].data->numa_node;
524 rte_eth_dev_get_sec_ctx(uint8_t port_id)
526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
527 return rte_eth_devices[port_id].security_ctx;
531 rte_eth_dev_count(void)
538 RTE_ETH_FOREACH_DEV(p)
545 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
552 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
556 /* shouldn't check 'rte_eth_devices[i].data',
557 * because it might be overwritten by VDEV PMD */
558 tmp = rte_eth_dev_shared_data->data[port_id].name;
564 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
569 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
573 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
574 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
575 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
585 eth_err(uint16_t port_id, int ret)
589 if (rte_eth_dev_is_removed(port_id))
594 /* attach the new device, then store port_id of the device */
596 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
599 int current = rte_eth_dev_count();
603 if ((devargs == NULL) || (port_id == NULL)) {
608 /* parse devargs, then retrieve device name and args */
609 if (rte_eal_parse_devargs_str(devargs, &name, &args))
612 ret = rte_eal_dev_attach(name, args);
616 /* no point looking at the port count if no port exists */
617 if (!rte_eth_dev_count()) {
618 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
623 /* if nothing happened, there is a bug here, since some driver told us
624 * it did attach a device, but did not create a port.
626 if (current == rte_eth_dev_count()) {
631 *port_id = eth_dev_last_created_port;
640 /* detach the device, then store the name of the device */
642 rte_eth_dev_detach(uint16_t port_id, char *name)
647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
654 dev_flags = rte_eth_devices[port_id].data->dev_flags;
655 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
656 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
662 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
663 "%s", rte_eth_devices[port_id].data->name);
665 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
669 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
677 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
679 uint16_t old_nb_queues = dev->data->nb_rx_queues;
683 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
684 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
685 sizeof(dev->data->rx_queues[0]) * nb_queues,
686 RTE_CACHE_LINE_SIZE);
687 if (dev->data->rx_queues == NULL) {
688 dev->data->nb_rx_queues = 0;
691 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
694 rxq = dev->data->rx_queues;
696 for (i = nb_queues; i < old_nb_queues; i++)
697 (*dev->dev_ops->rx_queue_release)(rxq[i]);
698 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
699 RTE_CACHE_LINE_SIZE);
702 if (nb_queues > old_nb_queues) {
703 uint16_t new_qs = nb_queues - old_nb_queues;
705 memset(rxq + old_nb_queues, 0,
706 sizeof(rxq[0]) * new_qs);
709 dev->data->rx_queues = rxq;
711 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
714 rxq = dev->data->rx_queues;
716 for (i = nb_queues; i < old_nb_queues; i++)
717 (*dev->dev_ops->rx_queue_release)(rxq[i]);
719 rte_free(dev->data->rx_queues);
720 dev->data->rx_queues = NULL;
722 dev->data->nb_rx_queues = nb_queues;
727 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
729 struct rte_eth_dev *dev;
731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
733 dev = &rte_eth_devices[port_id];
734 if (rx_queue_id >= dev->data->nb_rx_queues) {
735 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
741 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
742 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
743 " already started\n",
744 rx_queue_id, port_id);
748 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
754 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
756 struct rte_eth_dev *dev;
758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
760 dev = &rte_eth_devices[port_id];
761 if (rx_queue_id >= dev->data->nb_rx_queues) {
762 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
768 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
769 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
770 " already stopped\n",
771 rx_queue_id, port_id);
775 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
780 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
782 struct rte_eth_dev *dev;
784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
786 dev = &rte_eth_devices[port_id];
787 if (tx_queue_id >= dev->data->nb_tx_queues) {
788 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
794 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
795 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
796 " already started\n",
797 tx_queue_id, port_id);
801 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
807 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
809 struct rte_eth_dev *dev;
811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
813 dev = &rte_eth_devices[port_id];
814 if (tx_queue_id >= dev->data->nb_tx_queues) {
815 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
821 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
822 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
823 " already stopped\n",
824 tx_queue_id, port_id);
828 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
833 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
835 uint16_t old_nb_queues = dev->data->nb_tx_queues;
839 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
840 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
841 sizeof(dev->data->tx_queues[0]) * nb_queues,
842 RTE_CACHE_LINE_SIZE);
843 if (dev->data->tx_queues == NULL) {
844 dev->data->nb_tx_queues = 0;
847 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
850 txq = dev->data->tx_queues;
852 for (i = nb_queues; i < old_nb_queues; i++)
853 (*dev->dev_ops->tx_queue_release)(txq[i]);
854 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
855 RTE_CACHE_LINE_SIZE);
858 if (nb_queues > old_nb_queues) {
859 uint16_t new_qs = nb_queues - old_nb_queues;
861 memset(txq + old_nb_queues, 0,
862 sizeof(txq[0]) * new_qs);
865 dev->data->tx_queues = txq;
867 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
870 txq = dev->data->tx_queues;
872 for (i = nb_queues; i < old_nb_queues; i++)
873 (*dev->dev_ops->tx_queue_release)(txq[i]);
875 rte_free(dev->data->tx_queues);
876 dev->data->tx_queues = NULL;
878 dev->data->nb_tx_queues = nb_queues;
883 rte_eth_speed_bitflag(uint32_t speed, int duplex)
886 case ETH_SPEED_NUM_10M:
887 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
888 case ETH_SPEED_NUM_100M:
889 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
890 case ETH_SPEED_NUM_1G:
891 return ETH_LINK_SPEED_1G;
892 case ETH_SPEED_NUM_2_5G:
893 return ETH_LINK_SPEED_2_5G;
894 case ETH_SPEED_NUM_5G:
895 return ETH_LINK_SPEED_5G;
896 case ETH_SPEED_NUM_10G:
897 return ETH_LINK_SPEED_10G;
898 case ETH_SPEED_NUM_20G:
899 return ETH_LINK_SPEED_20G;
900 case ETH_SPEED_NUM_25G:
901 return ETH_LINK_SPEED_25G;
902 case ETH_SPEED_NUM_40G:
903 return ETH_LINK_SPEED_40G;
904 case ETH_SPEED_NUM_50G:
905 return ETH_LINK_SPEED_50G;
906 case ETH_SPEED_NUM_56G:
907 return ETH_LINK_SPEED_56G;
908 case ETH_SPEED_NUM_100G:
909 return ETH_LINK_SPEED_100G;
916 * A conversion function from rxmode bitfield API.
919 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
920 uint64_t *rx_offloads)
922 uint64_t offloads = 0;
924 if (rxmode->header_split == 1)
925 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
926 if (rxmode->hw_ip_checksum == 1)
927 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
928 if (rxmode->hw_vlan_filter == 1)
929 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
930 if (rxmode->hw_vlan_strip == 1)
931 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
932 if (rxmode->hw_vlan_extend == 1)
933 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
934 if (rxmode->jumbo_frame == 1)
935 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
936 if (rxmode->hw_strip_crc == 1)
937 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
938 if (rxmode->enable_scatter == 1)
939 offloads |= DEV_RX_OFFLOAD_SCATTER;
940 if (rxmode->enable_lro == 1)
941 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
942 if (rxmode->hw_timestamp == 1)
943 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
944 if (rxmode->security == 1)
945 offloads |= DEV_RX_OFFLOAD_SECURITY;
947 *rx_offloads = offloads;
951 * A conversion function from rxmode offloads API.
954 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
955 struct rte_eth_rxmode *rxmode)
958 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
959 rxmode->header_split = 1;
961 rxmode->header_split = 0;
962 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
963 rxmode->hw_ip_checksum = 1;
965 rxmode->hw_ip_checksum = 0;
966 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
967 rxmode->hw_vlan_filter = 1;
969 rxmode->hw_vlan_filter = 0;
970 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
971 rxmode->hw_vlan_strip = 1;
973 rxmode->hw_vlan_strip = 0;
974 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
975 rxmode->hw_vlan_extend = 1;
977 rxmode->hw_vlan_extend = 0;
978 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
979 rxmode->jumbo_frame = 1;
981 rxmode->jumbo_frame = 0;
982 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
983 rxmode->hw_strip_crc = 1;
985 rxmode->hw_strip_crc = 0;
986 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
987 rxmode->enable_scatter = 1;
989 rxmode->enable_scatter = 0;
990 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
991 rxmode->enable_lro = 1;
993 rxmode->enable_lro = 0;
994 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
995 rxmode->hw_timestamp = 1;
997 rxmode->hw_timestamp = 0;
998 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
999 rxmode->security = 1;
1001 rxmode->security = 0;
1004 const char * __rte_experimental
1005 rte_eth_dev_rx_offload_name(uint64_t offload)
1007 const char *name = "UNKNOWN";
1010 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1011 if (offload == rte_rx_offload_names[i].offload) {
1012 name = rte_rx_offload_names[i].name;
1020 const char * __rte_experimental
1021 rte_eth_dev_tx_offload_name(uint64_t offload)
1023 const char *name = "UNKNOWN";
1026 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1027 if (offload == rte_tx_offload_names[i].offload) {
1028 name = rte_tx_offload_names[i].name;
1037 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1038 const struct rte_eth_conf *dev_conf)
1040 struct rte_eth_dev *dev;
1041 struct rte_eth_dev_info dev_info;
1042 struct rte_eth_conf local_conf = *dev_conf;
1045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1047 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1048 RTE_PMD_DEBUG_TRACE(
1049 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1050 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1054 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1055 RTE_PMD_DEBUG_TRACE(
1056 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1057 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1061 dev = &rte_eth_devices[port_id];
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1066 if (dev->data->dev_started) {
1067 RTE_PMD_DEBUG_TRACE(
1068 "port %d must be stopped to allow configuration\n", port_id);
1073 * Convert between the offloads API to enable PMDs to support
1076 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1077 rte_eth_convert_rx_offload_bitfield(
1078 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1080 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1081 &local_conf.rxmode);
1084 /* Copy the dev_conf parameter into the dev structure */
1085 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1088 * Check that the numbers of RX and TX queues are not greater
1089 * than the maximum number of RX and TX queues supported by the
1090 * configured device.
1092 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1094 if (nb_rx_q == 0 && nb_tx_q == 0) {
1095 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
1099 if (nb_rx_q > dev_info.max_rx_queues) {
1100 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1101 port_id, nb_rx_q, dev_info.max_rx_queues);
1105 if (nb_tx_q > dev_info.max_tx_queues) {
1106 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1107 port_id, nb_tx_q, dev_info.max_tx_queues);
1111 /* Check that the device supports requested interrupts */
1112 if ((dev_conf->intr_conf.lsc == 1) &&
1113 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1114 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1115 dev->device->driver->name);
1118 if ((dev_conf->intr_conf.rmv == 1) &&
1119 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1120 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1121 dev->device->driver->name);
1126 * If jumbo frames are enabled, check that the maximum RX packet
1127 * length is supported by the configured device.
1129 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1130 if (dev_conf->rxmode.max_rx_pkt_len >
1131 dev_info.max_rx_pktlen) {
1132 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1133 " > max valid value %u\n",
1135 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1136 (unsigned)dev_info.max_rx_pktlen);
1138 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1139 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1140 " < min valid value %u\n",
1142 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1143 (unsigned)ETHER_MIN_LEN);
1147 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1148 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1149 /* Use default value */
1150 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1155 * Setup new number of RX/TX queues and reconfigure device.
1157 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1159 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1164 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1166 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1168 rte_eth_dev_rx_queue_config(dev, 0);
1172 diag = (*dev->dev_ops->dev_configure)(dev);
1174 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1176 rte_eth_dev_rx_queue_config(dev, 0);
1177 rte_eth_dev_tx_queue_config(dev, 0);
1178 return eth_err(port_id, diag);
1181 /* Initialize Rx profiling if enabled at compilation time. */
1182 diag = __rte_eth_profile_rx_init(port_id, dev);
1184 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1186 rte_eth_dev_rx_queue_config(dev, 0);
1187 rte_eth_dev_tx_queue_config(dev, 0);
1188 return eth_err(port_id, diag);
1195 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1197 if (dev->data->dev_started) {
1198 RTE_PMD_DEBUG_TRACE(
1199 "port %d must be stopped to allow reset\n",
1200 dev->data->port_id);
1204 rte_eth_dev_rx_queue_config(dev, 0);
1205 rte_eth_dev_tx_queue_config(dev, 0);
1207 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1211 rte_eth_dev_config_restore(uint16_t port_id)
1213 struct rte_eth_dev *dev;
1214 struct rte_eth_dev_info dev_info;
1215 struct ether_addr *addr;
1220 dev = &rte_eth_devices[port_id];
1222 rte_eth_dev_info_get(port_id, &dev_info);
1224 /* replay MAC address configuration including default MAC */
1225 addr = &dev->data->mac_addrs[0];
1226 if (*dev->dev_ops->mac_addr_set != NULL)
1227 (*dev->dev_ops->mac_addr_set)(dev, addr);
1228 else if (*dev->dev_ops->mac_addr_add != NULL)
1229 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1231 if (*dev->dev_ops->mac_addr_add != NULL) {
1232 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1233 addr = &dev->data->mac_addrs[i];
1235 /* skip zero address */
1236 if (is_zero_ether_addr(addr))
1240 pool_mask = dev->data->mac_pool_sel[i];
1243 if (pool_mask & 1ULL)
1244 (*dev->dev_ops->mac_addr_add)(dev,
1248 } while (pool_mask);
1252 /* replay promiscuous configuration */
1253 if (rte_eth_promiscuous_get(port_id) == 1)
1254 rte_eth_promiscuous_enable(port_id);
1255 else if (rte_eth_promiscuous_get(port_id) == 0)
1256 rte_eth_promiscuous_disable(port_id);
1258 /* replay all multicast configuration */
1259 if (rte_eth_allmulticast_get(port_id) == 1)
1260 rte_eth_allmulticast_enable(port_id);
1261 else if (rte_eth_allmulticast_get(port_id) == 0)
1262 rte_eth_allmulticast_disable(port_id);
1266 rte_eth_dev_start(uint16_t port_id)
1268 struct rte_eth_dev *dev;
1271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1273 dev = &rte_eth_devices[port_id];
1275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1277 if (dev->data->dev_started != 0) {
1278 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1279 " already started\n",
1284 diag = (*dev->dev_ops->dev_start)(dev);
1286 dev->data->dev_started = 1;
1288 return eth_err(port_id, diag);
1290 rte_eth_dev_config_restore(port_id);
1292 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1293 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1294 (*dev->dev_ops->link_update)(dev, 0);
1300 rte_eth_dev_stop(uint16_t port_id)
1302 struct rte_eth_dev *dev;
1304 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1305 dev = &rte_eth_devices[port_id];
1307 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1309 if (dev->data->dev_started == 0) {
1310 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1311 " already stopped\n",
1316 dev->data->dev_started = 0;
1317 (*dev->dev_ops->dev_stop)(dev);
1321 rte_eth_dev_set_link_up(uint16_t port_id)
1323 struct rte_eth_dev *dev;
1325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1330 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1334 rte_eth_dev_set_link_down(uint16_t port_id)
1336 struct rte_eth_dev *dev;
1338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1340 dev = &rte_eth_devices[port_id];
1342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1343 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1347 rte_eth_dev_close(uint16_t port_id)
1349 struct rte_eth_dev *dev;
1351 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1352 dev = &rte_eth_devices[port_id];
1354 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1355 dev->data->dev_started = 0;
1356 (*dev->dev_ops->dev_close)(dev);
1358 dev->data->nb_rx_queues = 0;
1359 rte_free(dev->data->rx_queues);
1360 dev->data->rx_queues = NULL;
1361 dev->data->nb_tx_queues = 0;
1362 rte_free(dev->data->tx_queues);
1363 dev->data->tx_queues = NULL;
1367 rte_eth_dev_reset(uint16_t port_id)
1369 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1377 rte_eth_dev_stop(port_id);
1378 ret = dev->dev_ops->dev_reset(dev);
1380 return eth_err(port_id, ret);
1383 int __rte_experimental
1384 rte_eth_dev_is_removed(uint16_t port_id)
1386 struct rte_eth_dev *dev;
1389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1391 dev = &rte_eth_devices[port_id];
1393 if (dev->state == RTE_ETH_DEV_REMOVED)
1396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1398 ret = dev->dev_ops->is_removed(dev);
1400 /* Device is physically removed. */
1401 dev->state = RTE_ETH_DEV_REMOVED;
1407 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1408 uint16_t nb_rx_desc, unsigned int socket_id,
1409 const struct rte_eth_rxconf *rx_conf,
1410 struct rte_mempool *mp)
1413 uint32_t mbp_buf_size;
1414 struct rte_eth_dev *dev;
1415 struct rte_eth_dev_info dev_info;
1416 struct rte_eth_rxconf local_conf;
1419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1421 dev = &rte_eth_devices[port_id];
1422 if (rx_queue_id >= dev->data->nb_rx_queues) {
1423 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1427 if (dev->data->dev_started) {
1428 RTE_PMD_DEBUG_TRACE(
1429 "port %d must be stopped to allow configuration\n", port_id);
1433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1437 * Check the size of the mbuf data buffer.
1438 * This value must be provided in the private data of the memory pool.
1439 * First check that the memory pool has a valid private data.
1441 rte_eth_dev_info_get(port_id, &dev_info);
1442 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1443 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1444 mp->name, (int) mp->private_data_size,
1445 (int) sizeof(struct rte_pktmbuf_pool_private));
1448 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1450 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1451 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1452 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1456 (int)(RTE_PKTMBUF_HEADROOM +
1457 dev_info.min_rx_bufsize),
1458 (int)RTE_PKTMBUF_HEADROOM,
1459 (int)dev_info.min_rx_bufsize);
1463 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1464 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1465 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1467 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1468 "should be: <= %hu, = %hu, and a product of %hu\n",
1470 dev_info.rx_desc_lim.nb_max,
1471 dev_info.rx_desc_lim.nb_min,
1472 dev_info.rx_desc_lim.nb_align);
1476 rxq = dev->data->rx_queues;
1477 if (rxq[rx_queue_id]) {
1478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1480 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1481 rxq[rx_queue_id] = NULL;
1484 if (rx_conf == NULL)
1485 rx_conf = &dev_info.default_rxconf;
1487 local_conf = *rx_conf;
1488 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1490 * Reflect port offloads to queue offloads in order for
1491 * offloads to not be discarded.
1493 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1494 &local_conf.offloads);
1497 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1498 socket_id, &local_conf, mp);
1500 if (!dev->data->min_rx_buf_size ||
1501 dev->data->min_rx_buf_size > mbp_buf_size)
1502 dev->data->min_rx_buf_size = mbp_buf_size;
1505 return eth_err(port_id, ret);
1509 * A conversion function from txq_flags API.
1512 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1514 uint64_t offloads = 0;
1516 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1517 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1518 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1519 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1520 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1521 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1522 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1523 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1524 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1525 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1526 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1527 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1528 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1530 *tx_offloads = offloads;
1534 * A conversion function from offloads API.
1537 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1541 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1542 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1543 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1544 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1545 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1546 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1547 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1548 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1549 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1550 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1551 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1552 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1558 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1559 uint16_t nb_tx_desc, unsigned int socket_id,
1560 const struct rte_eth_txconf *tx_conf)
1562 struct rte_eth_dev *dev;
1563 struct rte_eth_dev_info dev_info;
1564 struct rte_eth_txconf local_conf;
1567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1569 dev = &rte_eth_devices[port_id];
1570 if (tx_queue_id >= dev->data->nb_tx_queues) {
1571 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1575 if (dev->data->dev_started) {
1576 RTE_PMD_DEBUG_TRACE(
1577 "port %d must be stopped to allow configuration\n", port_id);
1581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1584 rte_eth_dev_info_get(port_id, &dev_info);
1586 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1587 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1588 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1589 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1590 "should be: <= %hu, = %hu, and a product of %hu\n",
1592 dev_info.tx_desc_lim.nb_max,
1593 dev_info.tx_desc_lim.nb_min,
1594 dev_info.tx_desc_lim.nb_align);
1598 txq = dev->data->tx_queues;
1599 if (txq[tx_queue_id]) {
1600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1602 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1603 txq[tx_queue_id] = NULL;
1606 if (tx_conf == NULL)
1607 tx_conf = &dev_info.default_txconf;
1610 * Convert between the offloads API to enable PMDs to support
1613 local_conf = *tx_conf;
1614 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1615 rte_eth_convert_txq_offloads(tx_conf->offloads,
1616 &local_conf.txq_flags);
1617 /* Keep the ignore flag. */
1618 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1620 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1621 &local_conf.offloads);
1624 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1625 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1629 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1630 void *userdata __rte_unused)
1634 for (i = 0; i < unsent; i++)
1635 rte_pktmbuf_free(pkts[i]);
1639 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1642 uint64_t *count = userdata;
1645 for (i = 0; i < unsent; i++)
1646 rte_pktmbuf_free(pkts[i]);
1652 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1653 buffer_tx_error_fn cbfn, void *userdata)
1655 buffer->error_callback = cbfn;
1656 buffer->error_userdata = userdata;
1661 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1668 buffer->size = size;
1669 if (buffer->error_callback == NULL) {
1670 ret = rte_eth_tx_buffer_set_err_callback(
1671 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1678 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1680 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1683 /* Validate Input Data. Bail if not valid or not supported. */
1684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1687 /* Call driver to free pending mbufs. */
1688 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1690 return eth_err(port_id, ret);
1694 rte_eth_promiscuous_enable(uint16_t port_id)
1696 struct rte_eth_dev *dev;
1698 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1699 dev = &rte_eth_devices[port_id];
1701 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1702 (*dev->dev_ops->promiscuous_enable)(dev);
1703 dev->data->promiscuous = 1;
1707 rte_eth_promiscuous_disable(uint16_t port_id)
1709 struct rte_eth_dev *dev;
1711 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1712 dev = &rte_eth_devices[port_id];
1714 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1715 dev->data->promiscuous = 0;
1716 (*dev->dev_ops->promiscuous_disable)(dev);
1720 rte_eth_promiscuous_get(uint16_t port_id)
1722 struct rte_eth_dev *dev;
1724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1726 dev = &rte_eth_devices[port_id];
1727 return dev->data->promiscuous;
1731 rte_eth_allmulticast_enable(uint16_t port_id)
1733 struct rte_eth_dev *dev;
1735 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1736 dev = &rte_eth_devices[port_id];
1738 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1739 (*dev->dev_ops->allmulticast_enable)(dev);
1740 dev->data->all_multicast = 1;
1744 rte_eth_allmulticast_disable(uint16_t port_id)
1746 struct rte_eth_dev *dev;
1748 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1749 dev = &rte_eth_devices[port_id];
1751 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1752 dev->data->all_multicast = 0;
1753 (*dev->dev_ops->allmulticast_disable)(dev);
1757 rte_eth_allmulticast_get(uint16_t port_id)
1759 struct rte_eth_dev *dev;
1761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1763 dev = &rte_eth_devices[port_id];
1764 return dev->data->all_multicast;
1768 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1769 struct rte_eth_link *link)
1771 struct rte_eth_link *dst = link;
1772 struct rte_eth_link *src = &(dev->data->dev_link);
1774 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1775 *(uint64_t *)src) == 0)
1782 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1784 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1787 dev = &rte_eth_devices[port_id];
1789 if (dev->data->dev_conf.intr_conf.lsc != 0)
1790 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1792 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1793 (*dev->dev_ops->link_update)(dev, 1);
1794 *eth_link = dev->data->dev_link;
1799 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1801 struct rte_eth_dev *dev;
1803 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1804 dev = &rte_eth_devices[port_id];
1806 if (dev->data->dev_conf.intr_conf.lsc != 0)
1807 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1809 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1810 (*dev->dev_ops->link_update)(dev, 0);
1811 *eth_link = dev->data->dev_link;
1816 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1818 struct rte_eth_dev *dev;
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1822 dev = &rte_eth_devices[port_id];
1823 memset(stats, 0, sizeof(*stats));
1825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1826 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1827 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1831 rte_eth_stats_reset(uint16_t port_id)
1833 struct rte_eth_dev *dev;
1835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1836 dev = &rte_eth_devices[port_id];
1838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1839 (*dev->dev_ops->stats_reset)(dev);
1840 dev->data->rx_mbuf_alloc_failed = 0;
1846 get_xstats_basic_count(struct rte_eth_dev *dev)
1848 uint16_t nb_rxqs, nb_txqs;
1851 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1852 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1854 count = RTE_NB_STATS;
1855 count += nb_rxqs * RTE_NB_RXQ_STATS;
1856 count += nb_txqs * RTE_NB_TXQ_STATS;
1862 get_xstats_count(uint16_t port_id)
1864 struct rte_eth_dev *dev;
1867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1868 dev = &rte_eth_devices[port_id];
1869 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1870 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1873 return eth_err(port_id, count);
1875 if (dev->dev_ops->xstats_get_names != NULL) {
1876 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1878 return eth_err(port_id, count);
1883 count += get_xstats_basic_count(dev);
1889 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1892 int cnt_xstats, idx_xstat;
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1897 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1902 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1907 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1908 if (cnt_xstats < 0) {
1909 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1913 /* Get id-name lookup table */
1914 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1916 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1917 port_id, xstats_names, cnt_xstats, NULL)) {
1918 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1922 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1923 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1932 /* retrieve basic stats names */
1934 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1935 struct rte_eth_xstat_name *xstats_names)
1937 int cnt_used_entries = 0;
1938 uint32_t idx, id_queue;
1941 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1942 snprintf(xstats_names[cnt_used_entries].name,
1943 sizeof(xstats_names[0].name),
1944 "%s", rte_stats_strings[idx].name);
1947 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1948 for (id_queue = 0; id_queue < num_q; id_queue++) {
1949 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1950 snprintf(xstats_names[cnt_used_entries].name,
1951 sizeof(xstats_names[0].name),
1953 id_queue, rte_rxq_stats_strings[idx].name);
1958 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1959 for (id_queue = 0; id_queue < num_q; id_queue++) {
1960 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1961 snprintf(xstats_names[cnt_used_entries].name,
1962 sizeof(xstats_names[0].name),
1964 id_queue, rte_txq_stats_strings[idx].name);
1968 return cnt_used_entries;
1971 /* retrieve ethdev extended statistics names */
1973 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1974 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1977 struct rte_eth_xstat_name *xstats_names_copy;
1978 unsigned int no_basic_stat_requested = 1;
1979 unsigned int no_ext_stat_requested = 1;
1980 unsigned int expected_entries;
1981 unsigned int basic_count;
1982 struct rte_eth_dev *dev;
1986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1987 dev = &rte_eth_devices[port_id];
1989 basic_count = get_xstats_basic_count(dev);
1990 ret = get_xstats_count(port_id);
1993 expected_entries = (unsigned int)ret;
1995 /* Return max number of stats if no ids given */
1998 return expected_entries;
1999 else if (xstats_names && size < expected_entries)
2000 return expected_entries;
2003 if (ids && !xstats_names)
2006 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2007 uint64_t ids_copy[size];
2009 for (i = 0; i < size; i++) {
2010 if (ids[i] < basic_count) {
2011 no_basic_stat_requested = 0;
2016 * Convert ids to xstats ids that PMD knows.
2017 * ids known by user are basic + extended stats.
2019 ids_copy[i] = ids[i] - basic_count;
2022 if (no_basic_stat_requested)
2023 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2024 xstats_names, ids_copy, size);
2027 /* Retrieve all stats */
2029 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2031 if (num_stats < 0 || num_stats > (int)expected_entries)
2034 return expected_entries;
2037 xstats_names_copy = calloc(expected_entries,
2038 sizeof(struct rte_eth_xstat_name));
2040 if (!xstats_names_copy) {
2041 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2046 for (i = 0; i < size; i++) {
2047 if (ids[i] >= basic_count) {
2048 no_ext_stat_requested = 0;
2054 /* Fill xstats_names_copy structure */
2055 if (ids && no_ext_stat_requested) {
2056 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2058 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2061 free(xstats_names_copy);
2067 for (i = 0; i < size; i++) {
2068 if (ids[i] >= expected_entries) {
2069 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2070 free(xstats_names_copy);
2073 xstats_names[i] = xstats_names_copy[ids[i]];
2076 free(xstats_names_copy);
2081 rte_eth_xstats_get_names(uint16_t port_id,
2082 struct rte_eth_xstat_name *xstats_names,
2085 struct rte_eth_dev *dev;
2086 int cnt_used_entries;
2087 int cnt_expected_entries;
2088 int cnt_driver_entries;
2090 cnt_expected_entries = get_xstats_count(port_id);
2091 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2092 (int)size < cnt_expected_entries)
2093 return cnt_expected_entries;
2095 /* port_id checked in get_xstats_count() */
2096 dev = &rte_eth_devices[port_id];
2098 cnt_used_entries = rte_eth_basic_stats_get_names(
2101 if (dev->dev_ops->xstats_get_names != NULL) {
2102 /* If there are any driver-specific xstats, append them
2105 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2107 xstats_names + cnt_used_entries,
2108 size - cnt_used_entries);
2109 if (cnt_driver_entries < 0)
2110 return eth_err(port_id, cnt_driver_entries);
2111 cnt_used_entries += cnt_driver_entries;
2114 return cnt_used_entries;
2119 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2121 struct rte_eth_dev *dev;
2122 struct rte_eth_stats eth_stats;
2123 unsigned int count = 0, i, q;
2124 uint64_t val, *stats_ptr;
2125 uint16_t nb_rxqs, nb_txqs;
2128 ret = rte_eth_stats_get(port_id, ð_stats);
2132 dev = &rte_eth_devices[port_id];
2134 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2135 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2138 for (i = 0; i < RTE_NB_STATS; i++) {
2139 stats_ptr = RTE_PTR_ADD(ð_stats,
2140 rte_stats_strings[i].offset);
2142 xstats[count++].value = val;
2146 for (q = 0; q < nb_rxqs; q++) {
2147 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2148 stats_ptr = RTE_PTR_ADD(ð_stats,
2149 rte_rxq_stats_strings[i].offset +
2150 q * sizeof(uint64_t));
2152 xstats[count++].value = val;
2157 for (q = 0; q < nb_txqs; q++) {
2158 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2159 stats_ptr = RTE_PTR_ADD(ð_stats,
2160 rte_txq_stats_strings[i].offset +
2161 q * sizeof(uint64_t));
2163 xstats[count++].value = val;
2169 /* retrieve ethdev extended statistics */
2171 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2172 uint64_t *values, unsigned int size)
2174 unsigned int no_basic_stat_requested = 1;
2175 unsigned int no_ext_stat_requested = 1;
2176 unsigned int num_xstats_filled;
2177 unsigned int basic_count;
2178 uint16_t expected_entries;
2179 struct rte_eth_dev *dev;
2183 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2184 ret = get_xstats_count(port_id);
2187 expected_entries = (uint16_t)ret;
2188 struct rte_eth_xstat xstats[expected_entries];
2189 dev = &rte_eth_devices[port_id];
2190 basic_count = get_xstats_basic_count(dev);
2192 /* Return max number of stats if no ids given */
2195 return expected_entries;
2196 else if (values && size < expected_entries)
2197 return expected_entries;
2203 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2204 unsigned int basic_count = get_xstats_basic_count(dev);
2205 uint64_t ids_copy[size];
2207 for (i = 0; i < size; i++) {
2208 if (ids[i] < basic_count) {
2209 no_basic_stat_requested = 0;
2214 * Convert ids to xstats ids that PMD knows.
2215 * ids known by user are basic + extended stats.
2217 ids_copy[i] = ids[i] - basic_count;
2220 if (no_basic_stat_requested)
2221 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2226 for (i = 0; i < size; i++) {
2227 if (ids[i] >= basic_count) {
2228 no_ext_stat_requested = 0;
2234 /* Fill the xstats structure */
2235 if (ids && no_ext_stat_requested)
2236 ret = rte_eth_basic_stats_get(port_id, xstats);
2238 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2242 num_xstats_filled = (unsigned int)ret;
2244 /* Return all stats */
2246 for (i = 0; i < num_xstats_filled; i++)
2247 values[i] = xstats[i].value;
2248 return expected_entries;
2252 for (i = 0; i < size; i++) {
2253 if (ids[i] >= expected_entries) {
2254 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2257 values[i] = xstats[ids[i]].value;
2263 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2266 struct rte_eth_dev *dev;
2267 unsigned int count = 0, i;
2268 signed int xcount = 0;
2269 uint16_t nb_rxqs, nb_txqs;
2272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2274 dev = &rte_eth_devices[port_id];
2276 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2277 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2279 /* Return generic statistics */
2280 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2281 (nb_txqs * RTE_NB_TXQ_STATS);
2283 /* implemented by the driver */
2284 if (dev->dev_ops->xstats_get != NULL) {
2285 /* Retrieve the xstats from the driver at the end of the
2288 xcount = (*dev->dev_ops->xstats_get)(dev,
2289 xstats ? xstats + count : NULL,
2290 (n > count) ? n - count : 0);
2293 return eth_err(port_id, xcount);
2296 if (n < count + xcount || xstats == NULL)
2297 return count + xcount;
2299 /* now fill the xstats structure */
2300 ret = rte_eth_basic_stats_get(port_id, xstats);
2305 for (i = 0; i < count; i++)
2307 /* add an offset to driver-specific stats */
2308 for ( ; i < count + xcount; i++)
2309 xstats[i].id += count;
2311 return count + xcount;
2314 /* reset ethdev extended statistics */
2316 rte_eth_xstats_reset(uint16_t port_id)
2318 struct rte_eth_dev *dev;
2320 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2321 dev = &rte_eth_devices[port_id];
2323 /* implemented by the driver */
2324 if (dev->dev_ops->xstats_reset != NULL) {
2325 (*dev->dev_ops->xstats_reset)(dev);
2329 /* fallback to default */
2330 rte_eth_stats_reset(port_id);
2334 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2337 struct rte_eth_dev *dev;
2339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2341 dev = &rte_eth_devices[port_id];
2343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2344 return (*dev->dev_ops->queue_stats_mapping_set)
2345 (dev, queue_id, stat_idx, is_rx);
2350 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2353 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2354 stat_idx, STAT_QMAP_TX));
2359 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2362 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2363 stat_idx, STAT_QMAP_RX));
2367 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2369 struct rte_eth_dev *dev;
2371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2375 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2376 fw_version, fw_size));
2380 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2382 struct rte_eth_dev *dev;
2383 const struct rte_eth_desc_lim lim = {
2384 .nb_max = UINT16_MAX,
2389 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2390 dev = &rte_eth_devices[port_id];
2392 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2393 dev_info->rx_desc_lim = lim;
2394 dev_info->tx_desc_lim = lim;
2396 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2397 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2398 dev_info->driver_name = dev->device->driver->name;
2399 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2400 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2404 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2405 uint32_t *ptypes, int num)
2408 struct rte_eth_dev *dev;
2409 const uint32_t *all_ptypes;
2411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2412 dev = &rte_eth_devices[port_id];
2413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2414 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2419 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2420 if (all_ptypes[i] & ptype_mask) {
2422 ptypes[j] = all_ptypes[i];
2430 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2432 struct rte_eth_dev *dev;
2434 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2435 dev = &rte_eth_devices[port_id];
2436 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2441 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2443 struct rte_eth_dev *dev;
2445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2447 dev = &rte_eth_devices[port_id];
2448 *mtu = dev->data->mtu;
2453 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2456 struct rte_eth_dev *dev;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2459 dev = &rte_eth_devices[port_id];
2460 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2462 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2464 dev->data->mtu = mtu;
2466 return eth_err(port_id, ret);
2470 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2472 struct rte_eth_dev *dev;
2475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2476 dev = &rte_eth_devices[port_id];
2477 if (!(dev->data->dev_conf.rxmode.offloads &
2478 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2479 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2483 if (vlan_id > 4095) {
2484 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2485 port_id, (unsigned) vlan_id);
2488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2490 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2492 struct rte_vlan_filter_conf *vfc;
2496 vfc = &dev->data->vlan_filter_conf;
2497 vidx = vlan_id / 64;
2498 vbit = vlan_id % 64;
2501 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2503 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2506 return eth_err(port_id, ret);
2510 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2513 struct rte_eth_dev *dev;
2515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2516 dev = &rte_eth_devices[port_id];
2517 if (rx_queue_id >= dev->data->nb_rx_queues) {
2518 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2523 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2529 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2530 enum rte_vlan_type vlan_type,
2533 struct rte_eth_dev *dev;
2535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2536 dev = &rte_eth_devices[port_id];
2537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2539 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2544 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2546 struct rte_eth_dev *dev;
2550 uint64_t orig_offloads;
2552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2553 dev = &rte_eth_devices[port_id];
2555 /* save original values in case of failure */
2556 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2558 /*check which option changed by application*/
2559 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2560 org = !!(dev->data->dev_conf.rxmode.offloads &
2561 DEV_RX_OFFLOAD_VLAN_STRIP);
2564 dev->data->dev_conf.rxmode.offloads |=
2565 DEV_RX_OFFLOAD_VLAN_STRIP;
2567 dev->data->dev_conf.rxmode.offloads &=
2568 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2569 mask |= ETH_VLAN_STRIP_MASK;
2572 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2573 org = !!(dev->data->dev_conf.rxmode.offloads &
2574 DEV_RX_OFFLOAD_VLAN_FILTER);
2577 dev->data->dev_conf.rxmode.offloads |=
2578 DEV_RX_OFFLOAD_VLAN_FILTER;
2580 dev->data->dev_conf.rxmode.offloads &=
2581 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2582 mask |= ETH_VLAN_FILTER_MASK;
2585 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2586 org = !!(dev->data->dev_conf.rxmode.offloads &
2587 DEV_RX_OFFLOAD_VLAN_EXTEND);
2590 dev->data->dev_conf.rxmode.offloads |=
2591 DEV_RX_OFFLOAD_VLAN_EXTEND;
2593 dev->data->dev_conf.rxmode.offloads &=
2594 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2595 mask |= ETH_VLAN_EXTEND_MASK;
2602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2605 * Convert to the offload bitfield API just in case the underlying PMD
2606 * still supporting it.
2608 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2609 &dev->data->dev_conf.rxmode);
2610 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2612 /* hit an error restore original values */
2613 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2614 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2615 &dev->data->dev_conf.rxmode);
2618 return eth_err(port_id, ret);
2622 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2624 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2630 if (dev->data->dev_conf.rxmode.offloads &
2631 DEV_RX_OFFLOAD_VLAN_STRIP)
2632 ret |= ETH_VLAN_STRIP_OFFLOAD;
2634 if (dev->data->dev_conf.rxmode.offloads &
2635 DEV_RX_OFFLOAD_VLAN_FILTER)
2636 ret |= ETH_VLAN_FILTER_OFFLOAD;
2638 if (dev->data->dev_conf.rxmode.offloads &
2639 DEV_RX_OFFLOAD_VLAN_EXTEND)
2640 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2646 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2648 struct rte_eth_dev *dev;
2650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2651 dev = &rte_eth_devices[port_id];
2652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2654 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2658 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2660 struct rte_eth_dev *dev;
2662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2663 dev = &rte_eth_devices[port_id];
2664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2665 memset(fc_conf, 0, sizeof(*fc_conf));
2666 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2670 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2676 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2680 dev = &rte_eth_devices[port_id];
2681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2682 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2686 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2687 struct rte_eth_pfc_conf *pfc_conf)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2693 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2697 dev = &rte_eth_devices[port_id];
2698 /* High water, low water validation are device specific */
2699 if (*dev->dev_ops->priority_flow_ctrl_set)
2700 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2706 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2714 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2715 for (i = 0; i < num; i++) {
2716 if (reta_conf[i].mask)
2724 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2728 uint16_t i, idx, shift;
2734 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2738 for (i = 0; i < reta_size; i++) {
2739 idx = i / RTE_RETA_GROUP_SIZE;
2740 shift = i % RTE_RETA_GROUP_SIZE;
2741 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2742 (reta_conf[idx].reta[shift] >= max_rxq)) {
2743 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2744 "the maximum rxq index: %u\n", idx, shift,
2745 reta_conf[idx].reta[shift], max_rxq);
2754 rte_eth_dev_rss_reta_update(uint16_t port_id,
2755 struct rte_eth_rss_reta_entry64 *reta_conf,
2758 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2762 /* Check mask bits */
2763 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2767 dev = &rte_eth_devices[port_id];
2769 /* Check entry value */
2770 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2771 dev->data->nb_rx_queues);
2775 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2776 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2781 rte_eth_dev_rss_reta_query(uint16_t port_id,
2782 struct rte_eth_rss_reta_entry64 *reta_conf,
2785 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2790 /* Check mask bits */
2791 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2795 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2797 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2802 rte_eth_dev_rss_hash_update(uint16_t port_id,
2803 struct rte_eth_rss_conf *rss_conf)
2805 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808 dev = &rte_eth_devices[port_id];
2809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2810 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2815 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2816 struct rte_eth_rss_conf *rss_conf)
2818 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2821 dev = &rte_eth_devices[port_id];
2822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2823 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2828 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2829 struct rte_eth_udp_tunnel *udp_tunnel)
2831 struct rte_eth_dev *dev;
2833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2834 if (udp_tunnel == NULL) {
2835 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2839 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2840 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2844 dev = &rte_eth_devices[port_id];
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2846 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2851 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2852 struct rte_eth_udp_tunnel *udp_tunnel)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2859 if (udp_tunnel == NULL) {
2860 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2864 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2865 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2870 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2875 rte_eth_led_on(uint16_t port_id)
2877 struct rte_eth_dev *dev;
2879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2880 dev = &rte_eth_devices[port_id];
2881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2882 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2886 rte_eth_led_off(uint16_t port_id)
2888 struct rte_eth_dev *dev;
2890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 dev = &rte_eth_devices[port_id];
2892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2893 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2897 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2901 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2903 struct rte_eth_dev_info dev_info;
2904 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2908 rte_eth_dev_info_get(port_id, &dev_info);
2910 for (i = 0; i < dev_info.max_mac_addrs; i++)
2911 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2917 static const struct ether_addr null_mac_addr;
2920 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2923 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 dev = &rte_eth_devices[port_id];
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2932 if (is_zero_ether_addr(addr)) {
2933 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2937 if (pool >= ETH_64_POOLS) {
2938 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2942 index = get_mac_addr_index(port_id, addr);
2944 index = get_mac_addr_index(port_id, &null_mac_addr);
2946 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2951 pool_mask = dev->data->mac_pool_sel[index];
2953 /* Check if both MAC address and pool is already there, and do nothing */
2954 if (pool_mask & (1ULL << pool))
2959 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2962 /* Update address in NIC data structure */
2963 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2965 /* Update pool bitmap in NIC data structure */
2966 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2969 return eth_err(port_id, ret);
2973 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2975 struct rte_eth_dev *dev;
2978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2979 dev = &rte_eth_devices[port_id];
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2982 index = get_mac_addr_index(port_id, addr);
2984 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2986 } else if (index < 0)
2987 return 0; /* Do nothing if address wasn't found */
2990 (*dev->dev_ops->mac_addr_remove)(dev, index);
2992 /* Update address in NIC data structure */
2993 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2995 /* reset pool bitmap */
2996 dev->data->mac_pool_sel[index] = 0;
3002 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3004 struct rte_eth_dev *dev;
3006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3008 if (!is_valid_assigned_ether_addr(addr))
3011 dev = &rte_eth_devices[port_id];
3012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3014 /* Update default address in NIC data structure */
3015 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3017 (*dev->dev_ops->mac_addr_set)(dev, addr);
3024 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3028 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3030 struct rte_eth_dev_info dev_info;
3031 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3034 rte_eth_dev_info_get(port_id, &dev_info);
3035 if (!dev->data->hash_mac_addrs)
3038 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3039 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3040 ETHER_ADDR_LEN) == 0)
3047 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3052 struct rte_eth_dev *dev;
3054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3056 dev = &rte_eth_devices[port_id];
3057 if (is_zero_ether_addr(addr)) {
3058 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3063 index = get_hash_mac_addr_index(port_id, addr);
3064 /* Check if it's already there, and do nothing */
3065 if ((index >= 0) && on)
3070 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3071 "set in UTA\n", port_id);
3075 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3077 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3084 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3086 /* Update address in NIC data structure */
3088 ether_addr_copy(addr,
3089 &dev->data->hash_mac_addrs[index]);
3091 ether_addr_copy(&null_mac_addr,
3092 &dev->data->hash_mac_addrs[index]);
3095 return eth_err(port_id, ret);
3099 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3101 struct rte_eth_dev *dev;
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3105 dev = &rte_eth_devices[port_id];
3107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3108 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3112 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3115 struct rte_eth_dev *dev;
3116 struct rte_eth_dev_info dev_info;
3117 struct rte_eth_link link;
3119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3121 dev = &rte_eth_devices[port_id];
3122 rte_eth_dev_info_get(port_id, &dev_info);
3123 link = dev->data->dev_link;
3125 if (queue_idx > dev_info.max_tx_queues) {
3126 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3127 "invalid queue id=%d\n", port_id, queue_idx);
3131 if (tx_rate > link.link_speed) {
3132 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3133 "bigger than link speed= %d\n",
3134 tx_rate, link.link_speed);
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3139 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3140 queue_idx, tx_rate));
3144 rte_eth_mirror_rule_set(uint16_t port_id,
3145 struct rte_eth_mirror_conf *mirror_conf,
3146 uint8_t rule_id, uint8_t on)
3148 struct rte_eth_dev *dev;
3150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3151 if (mirror_conf->rule_type == 0) {
3152 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3156 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3157 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3162 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3163 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3164 (mirror_conf->pool_mask == 0)) {
3165 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3169 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3170 mirror_conf->vlan.vlan_mask == 0) {
3171 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3175 dev = &rte_eth_devices[port_id];
3176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3178 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3179 mirror_conf, rule_id, on));
3183 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3185 struct rte_eth_dev *dev;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3189 dev = &rte_eth_devices[port_id];
3190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3192 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3196 RTE_INIT(eth_dev_init_cb_lists)
3200 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3201 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3205 rte_eth_dev_callback_register(uint16_t port_id,
3206 enum rte_eth_event_type event,
3207 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3209 struct rte_eth_dev *dev;
3210 struct rte_eth_dev_callback *user_cb;
3211 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3217 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3218 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3222 if (port_id == RTE_ETH_ALL) {
3224 last_port = RTE_MAX_ETHPORTS - 1;
3226 next_port = last_port = port_id;
3229 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3232 dev = &rte_eth_devices[next_port];
3234 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3235 if (user_cb->cb_fn == cb_fn &&
3236 user_cb->cb_arg == cb_arg &&
3237 user_cb->event == event) {
3242 /* create a new callback. */
3243 if (user_cb == NULL) {
3244 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3245 sizeof(struct rte_eth_dev_callback), 0);
3246 if (user_cb != NULL) {
3247 user_cb->cb_fn = cb_fn;
3248 user_cb->cb_arg = cb_arg;
3249 user_cb->event = event;
3250 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3253 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3254 rte_eth_dev_callback_unregister(port_id, event,
3260 } while (++next_port <= last_port);
3262 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3267 rte_eth_dev_callback_unregister(uint16_t port_id,
3268 enum rte_eth_event_type event,
3269 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3272 struct rte_eth_dev *dev;
3273 struct rte_eth_dev_callback *cb, *next;
3274 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3280 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3281 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3285 if (port_id == RTE_ETH_ALL) {
3287 last_port = RTE_MAX_ETHPORTS - 1;
3289 next_port = last_port = port_id;
3292 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3295 dev = &rte_eth_devices[next_port];
3297 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3300 next = TAILQ_NEXT(cb, next);
3302 if (cb->cb_fn != cb_fn || cb->event != event ||
3303 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3307 * if this callback is not executing right now,
3310 if (cb->active == 0) {
3311 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3317 } while (++next_port <= last_port);
3319 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3324 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3325 enum rte_eth_event_type event, void *ret_param)
3327 struct rte_eth_dev_callback *cb_lst;
3328 struct rte_eth_dev_callback dev_cb;
3331 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3332 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3333 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3337 if (ret_param != NULL)
3338 dev_cb.ret_param = ret_param;
3340 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3341 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3342 dev_cb.cb_arg, dev_cb.ret_param);
3343 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3346 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3351 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3354 struct rte_eth_dev *dev;
3355 struct rte_intr_handle *intr_handle;
3359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3361 dev = &rte_eth_devices[port_id];
3363 if (!dev->intr_handle) {
3364 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3368 intr_handle = dev->intr_handle;
3369 if (!intr_handle->intr_vec) {
3370 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3374 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3375 vec = intr_handle->intr_vec[qid];
3376 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3377 if (rc && rc != -EEXIST) {
3378 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3379 " op %d epfd %d vec %u\n",
3380 port_id, qid, op, epfd, vec);
3387 const struct rte_memzone *
3388 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3389 uint16_t queue_id, size_t size, unsigned align,
3392 char z_name[RTE_MEMZONE_NAMESIZE];
3393 const struct rte_memzone *mz;
3395 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3396 dev->device->driver->name, ring_name,
3397 dev->data->port_id, queue_id);
3399 mz = rte_memzone_lookup(z_name);
3403 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3407 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3408 int epfd, int op, void *data)
3411 struct rte_eth_dev *dev;
3412 struct rte_intr_handle *intr_handle;
3415 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3417 dev = &rte_eth_devices[port_id];
3418 if (queue_id >= dev->data->nb_rx_queues) {
3419 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3423 if (!dev->intr_handle) {
3424 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3428 intr_handle = dev->intr_handle;
3429 if (!intr_handle->intr_vec) {
3430 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3434 vec = intr_handle->intr_vec[queue_id];
3435 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3436 if (rc && rc != -EEXIST) {
3437 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3438 " op %d epfd %d vec %u\n",
3439 port_id, queue_id, op, epfd, vec);
3447 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3450 struct rte_eth_dev *dev;
3452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3454 dev = &rte_eth_devices[port_id];
3456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3457 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3462 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3465 struct rte_eth_dev *dev;
3467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3469 dev = &rte_eth_devices[port_id];
3471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3472 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3478 rte_eth_dev_filter_supported(uint16_t port_id,
3479 enum rte_filter_type filter_type)
3481 struct rte_eth_dev *dev;
3483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3485 dev = &rte_eth_devices[port_id];
3486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3487 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3488 RTE_ETH_FILTER_NOP, NULL);
3492 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3493 enum rte_filter_type filter_type,
3494 enum rte_filter_op filter_op, void *arg);
3497 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3498 enum rte_filter_type filter_type,
3499 enum rte_filter_op filter_op, void *arg)
3501 struct rte_eth_fdir_info_v22 {
3502 enum rte_fdir_mode mode;
3503 struct rte_eth_fdir_masks mask;
3504 struct rte_eth_fdir_flex_conf flex_conf;
3505 uint32_t guarant_spc;
3507 uint32_t flow_types_mask[1];
3508 uint32_t max_flexpayload;
3509 uint32_t flex_payload_unit;
3510 uint32_t max_flex_payload_segment_num;
3511 uint16_t flex_payload_limit;
3512 uint32_t flex_bitmask_unit;
3513 uint32_t max_flex_bitmask_num;
3516 struct rte_eth_hash_global_conf_v22 {
3517 enum rte_eth_hash_function hash_func;
3518 uint32_t sym_hash_enable_mask[1];
3519 uint32_t valid_bit_mask[1];
3522 struct rte_eth_hash_filter_info_v22 {
3523 enum rte_eth_hash_filter_info_type info_type;
3526 struct rte_eth_hash_global_conf_v22 global_conf;
3527 struct rte_eth_input_set_conf input_set_conf;
3531 struct rte_eth_dev *dev;
3533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3535 dev = &rte_eth_devices[port_id];
3536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3537 if (filter_op == RTE_ETH_FILTER_INFO) {
3539 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3540 struct rte_eth_fdir_info fdir_info;
3542 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3544 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3545 filter_op, (void *)&fdir_info);
3546 fdir_info_v22->mode = fdir_info.mode;
3547 fdir_info_v22->mask = fdir_info.mask;
3548 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3549 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3550 fdir_info_v22->best_spc = fdir_info.best_spc;
3551 fdir_info_v22->flow_types_mask[0] =
3552 (uint32_t)fdir_info.flow_types_mask[0];
3553 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3554 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3555 fdir_info_v22->max_flex_payload_segment_num =
3556 fdir_info.max_flex_payload_segment_num;
3557 fdir_info_v22->flex_payload_limit =
3558 fdir_info.flex_payload_limit;
3559 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3560 fdir_info_v22->max_flex_bitmask_num =
3561 fdir_info.max_flex_bitmask_num;
3563 } else if (filter_op == RTE_ETH_FILTER_GET) {
3565 struct rte_eth_hash_filter_info f_info;
3566 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3567 (struct rte_eth_hash_filter_info_v22 *)arg;
3569 f_info.info_type = f_info_v22->info_type;
3570 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3571 filter_op, (void *)&f_info);
3573 switch (f_info_v22->info_type) {
3574 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3575 f_info_v22->info.enable = f_info.info.enable;
3577 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3578 f_info_v22->info.global_conf.hash_func =
3579 f_info.info.global_conf.hash_func;
3580 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3582 f_info.info.global_conf.sym_hash_enable_mask[0];
3583 f_info_v22->info.global_conf.valid_bit_mask[0] =
3585 f_info.info.global_conf.valid_bit_mask[0];
3587 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3588 f_info_v22->info.input_set_conf =
3589 f_info.info.input_set_conf;
3595 } else if (filter_op == RTE_ETH_FILTER_SET) {
3596 struct rte_eth_hash_filter_info f_info;
3597 struct rte_eth_hash_filter_info_v22 *f_v22 =
3598 (struct rte_eth_hash_filter_info_v22 *)arg;
3600 f_info.info_type = f_v22->info_type;
3601 switch (f_v22->info_type) {
3602 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3603 f_info.info.enable = f_v22->info.enable;
3605 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3606 f_info.info.global_conf.hash_func =
3607 f_v22->info.global_conf.hash_func;
3608 f_info.info.global_conf.sym_hash_enable_mask[0] =
3610 f_v22->info.global_conf.sym_hash_enable_mask[0];
3611 f_info.info.global_conf.valid_bit_mask[0] =
3613 f_v22->info.global_conf.valid_bit_mask[0];
3615 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3616 f_info.info.input_set_conf =
3617 f_v22->info.input_set_conf;
3622 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3625 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3628 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3631 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3632 enum rte_filter_type filter_type,
3633 enum rte_filter_op filter_op, void *arg);
3636 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3637 enum rte_filter_type filter_type,
3638 enum rte_filter_op filter_op, void *arg)
3640 struct rte_eth_dev *dev;
3642 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3644 dev = &rte_eth_devices[port_id];
3645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3646 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3649 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3650 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3651 enum rte_filter_type filter_type,
3652 enum rte_filter_op filter_op, void *arg),
3653 rte_eth_dev_filter_ctrl_v1802);
3656 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3657 rte_rx_callback_fn fn, void *user_param)
3659 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3660 rte_errno = ENOTSUP;
3663 /* check input parameters */
3664 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3665 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3669 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3677 cb->param = user_param;
3679 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3680 /* Add the callbacks in fifo order. */
3681 struct rte_eth_rxtx_callback *tail =
3682 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3685 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3692 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3698 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3699 rte_rx_callback_fn fn, void *user_param)
3701 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3702 rte_errno = ENOTSUP;
3705 /* check input parameters */
3706 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3707 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3712 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3720 cb->param = user_param;
3722 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3723 /* Add the callbacks at fisrt position*/
3724 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3726 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3727 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3733 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3734 rte_tx_callback_fn fn, void *user_param)
3736 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3737 rte_errno = ENOTSUP;
3740 /* check input parameters */
3741 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3742 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3747 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3755 cb->param = user_param;
3757 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3758 /* Add the callbacks in fifo order. */
3759 struct rte_eth_rxtx_callback *tail =
3760 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3763 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3770 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3776 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3777 struct rte_eth_rxtx_callback *user_cb)
3779 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3782 /* Check input parameters. */
3783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3784 if (user_cb == NULL ||
3785 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3788 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3789 struct rte_eth_rxtx_callback *cb;
3790 struct rte_eth_rxtx_callback **prev_cb;
3793 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3794 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3795 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3797 if (cb == user_cb) {
3798 /* Remove the user cb from the callback list. */
3799 *prev_cb = cb->next;
3804 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3810 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3811 struct rte_eth_rxtx_callback *user_cb)
3813 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3816 /* Check input parameters. */
3817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3818 if (user_cb == NULL ||
3819 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3822 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3824 struct rte_eth_rxtx_callback *cb;
3825 struct rte_eth_rxtx_callback **prev_cb;
3827 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3828 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3829 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3831 if (cb == user_cb) {
3832 /* Remove the user cb from the callback list. */
3833 *prev_cb = cb->next;
3838 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3844 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3845 struct rte_eth_rxq_info *qinfo)
3847 struct rte_eth_dev *dev;
3849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3854 dev = &rte_eth_devices[port_id];
3855 if (queue_id >= dev->data->nb_rx_queues) {
3856 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3862 memset(qinfo, 0, sizeof(*qinfo));
3863 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3868 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3869 struct rte_eth_txq_info *qinfo)
3871 struct rte_eth_dev *dev;
3873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3878 dev = &rte_eth_devices[port_id];
3879 if (queue_id >= dev->data->nb_tx_queues) {
3880 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3886 memset(qinfo, 0, sizeof(*qinfo));
3887 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3892 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3893 struct ether_addr *mc_addr_set,
3894 uint32_t nb_mc_addr)
3896 struct rte_eth_dev *dev;
3898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3900 dev = &rte_eth_devices[port_id];
3901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3902 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3903 mc_addr_set, nb_mc_addr));
3907 rte_eth_timesync_enable(uint16_t port_id)
3909 struct rte_eth_dev *dev;
3911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3912 dev = &rte_eth_devices[port_id];
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3915 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3919 rte_eth_timesync_disable(uint16_t port_id)
3921 struct rte_eth_dev *dev;
3923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3924 dev = &rte_eth_devices[port_id];
3926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3927 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3931 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3934 struct rte_eth_dev *dev;
3936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3937 dev = &rte_eth_devices[port_id];
3939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3940 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3941 (dev, timestamp, flags));
3945 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3946 struct timespec *timestamp)
3948 struct rte_eth_dev *dev;
3950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3951 dev = &rte_eth_devices[port_id];
3953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3954 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3959 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3961 struct rte_eth_dev *dev;
3963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3964 dev = &rte_eth_devices[port_id];
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3967 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3972 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3974 struct rte_eth_dev *dev;
3976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3977 dev = &rte_eth_devices[port_id];
3979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3980 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3985 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3987 struct rte_eth_dev *dev;
3989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3990 dev = &rte_eth_devices[port_id];
3992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3993 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3998 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4000 struct rte_eth_dev *dev;
4002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4004 dev = &rte_eth_devices[port_id];
4005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4006 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4010 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4012 struct rte_eth_dev *dev;
4014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4016 dev = &rte_eth_devices[port_id];
4017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4018 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4022 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4024 struct rte_eth_dev *dev;
4026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4028 dev = &rte_eth_devices[port_id];
4029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4030 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4034 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4036 struct rte_eth_dev *dev;
4038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4040 dev = &rte_eth_devices[port_id];
4041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4042 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4046 rte_eth_dev_get_dcb_info(uint16_t port_id,
4047 struct rte_eth_dcb_info *dcb_info)
4049 struct rte_eth_dev *dev;
4051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4053 dev = &rte_eth_devices[port_id];
4054 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4057 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4061 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4062 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4064 struct rte_eth_dev *dev;
4066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4067 if (l2_tunnel == NULL) {
4068 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4072 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4073 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4077 dev = &rte_eth_devices[port_id];
4078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4080 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4085 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4086 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4090 struct rte_eth_dev *dev;
4092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4094 if (l2_tunnel == NULL) {
4095 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4099 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4100 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4105 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4109 dev = &rte_eth_devices[port_id];
4110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4112 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4113 l2_tunnel, mask, en));
4117 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4118 const struct rte_eth_desc_lim *desc_lim)
4120 if (desc_lim->nb_align != 0)
4121 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4123 if (desc_lim->nb_max != 0)
4124 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4126 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4130 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4131 uint16_t *nb_rx_desc,
4132 uint16_t *nb_tx_desc)
4134 struct rte_eth_dev *dev;
4135 struct rte_eth_dev_info dev_info;
4137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4139 dev = &rte_eth_devices[port_id];
4140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4142 rte_eth_dev_info_get(port_id, &dev_info);
4144 if (nb_rx_desc != NULL)
4145 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4147 if (nb_tx_desc != NULL)
4148 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4154 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4156 struct rte_eth_dev *dev;
4158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4163 dev = &rte_eth_devices[port_id];
4165 if (*dev->dev_ops->pool_ops_supported == NULL)
4166 return 1; /* all pools are supported */
4168 return (*dev->dev_ops->pool_ops_supported)(dev, pool);