4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
192 static struct rte_eth_dev *
193 eth_dev_get(uint8_t port_id)
195 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
197 eth_dev->data = &rte_eth_dev_data[port_id];
198 eth_dev->attached = DEV_ATTACHED;
199 TAILQ_INIT(&(eth_dev->link_intr_cbs));
201 eth_dev_last_created_port = port_id;
208 rte_eth_dev_allocate(const char *name)
211 struct rte_eth_dev *eth_dev;
213 port_id = rte_eth_dev_find_free_port();
214 if (port_id == RTE_MAX_ETHPORTS) {
215 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
219 if (rte_eth_dev_data == NULL)
220 rte_eth_dev_data_alloc();
222 if (rte_eth_dev_allocated(name) != NULL) {
223 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
228 memset(&rte_eth_devices[port_id], 0, sizeof(*eth_dev->data));
229 eth_dev = eth_dev_get(port_id);
230 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
231 eth_dev->data->port_id = port_id;
232 eth_dev->data->mtu = ETHER_MTU;
238 * Attach to a port already registered by the primary process, which
239 * makes sure that the same device would have the same port id both
240 * in the primary and secondary process.
242 static struct rte_eth_dev *
243 eth_dev_attach_secondary(const char *name)
246 struct rte_eth_dev *eth_dev;
248 if (rte_eth_dev_data == NULL)
249 rte_eth_dev_data_alloc();
251 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
252 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
255 if (i == RTE_MAX_ETHPORTS) {
257 "device %s is not driven by the primary process\n",
262 eth_dev = eth_dev_get(i);
263 RTE_ASSERT(eth_dev->data->port_id == i);
269 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
274 eth_dev->attached = DEV_DETACHED;
280 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
281 struct rte_pci_device *pci_dev)
283 struct eth_driver *eth_drv;
284 struct rte_eth_dev *eth_dev;
285 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
289 eth_drv = (struct eth_driver *)pci_drv;
291 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
292 sizeof(ethdev_name));
294 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
295 eth_dev = rte_eth_dev_allocate(ethdev_name);
299 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
300 eth_drv->dev_private_size,
301 RTE_CACHE_LINE_SIZE);
302 if (eth_dev->data->dev_private == NULL)
303 rte_panic("Cannot allocate memzone for private port data\n");
305 eth_dev = eth_dev_attach_secondary(ethdev_name);
306 if (eth_dev == NULL) {
308 * if we failed to attach a device, it means the
309 * device is skipped in primary process, due to
310 * some errors. If so, we return a positive value,
311 * to let EAL skip it for the secondary process
317 eth_dev->device = &pci_dev->device;
318 eth_dev->intr_handle = &pci_dev->intr_handle;
319 eth_dev->driver = eth_drv;
321 /* Invoke PMD device initialization function */
322 diag = (*eth_drv->eth_dev_init)(eth_dev);
326 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
327 pci_drv->driver.name,
328 (unsigned) pci_dev->id.vendor_id,
329 (unsigned) pci_dev->id.device_id);
330 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
331 rte_free(eth_dev->data->dev_private);
332 rte_eth_dev_release_port(eth_dev);
337 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
339 const struct eth_driver *eth_drv;
340 struct rte_eth_dev *eth_dev;
341 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
347 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
348 sizeof(ethdev_name));
350 eth_dev = rte_eth_dev_allocated(ethdev_name);
354 eth_drv = (const struct eth_driver *)pci_dev->driver;
356 /* Invoke PMD device uninit function */
357 if (*eth_drv->eth_dev_uninit) {
358 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
363 /* free ether device */
364 rte_eth_dev_release_port(eth_dev);
366 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
367 rte_free(eth_dev->data->dev_private);
369 eth_dev->device = NULL;
370 eth_dev->driver = NULL;
371 eth_dev->data = NULL;
377 rte_eth_dev_is_valid_port(uint8_t port_id)
379 if (port_id >= RTE_MAX_ETHPORTS ||
380 rte_eth_devices[port_id].attached != DEV_ATTACHED)
387 rte_eth_dev_socket_id(uint8_t port_id)
389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
390 return rte_eth_devices[port_id].data->numa_node;
394 rte_eth_dev_count(void)
400 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
407 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
411 /* shouldn't check 'rte_eth_devices[i].data',
412 * because it might be overwritten by VDEV PMD */
413 tmp = rte_eth_dev_data[port_id].name;
419 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
424 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
431 *port_id = RTE_MAX_ETHPORTS;
433 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
436 rte_eth_dev_data[i].name, strlen(name))) {
447 rte_eth_dev_is_detachable(uint8_t port_id)
451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
453 switch (rte_eth_devices[port_id].data->kdrv) {
454 case RTE_KDRV_IGB_UIO:
455 case RTE_KDRV_UIO_GENERIC:
456 case RTE_KDRV_NIC_UIO:
463 dev_flags = rte_eth_devices[port_id].data->dev_flags;
464 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
465 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
471 /* attach the new device, then store port_id of the device */
473 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
476 int current = rte_eth_dev_count();
480 if ((devargs == NULL) || (port_id == NULL)) {
485 /* parse devargs, then retrieve device name and args */
486 if (rte_eal_parse_devargs_str(devargs, &name, &args))
489 ret = rte_eal_dev_attach(name, args);
493 /* no point looking at the port count if no port exists */
494 if (!rte_eth_dev_count()) {
495 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
500 /* if nothing happened, there is a bug here, since some driver told us
501 * it did attach a device, but did not create a port.
503 if (current == rte_eth_dev_count()) {
508 *port_id = eth_dev_last_created_port;
517 /* detach the device, then store the name of the device */
519 rte_eth_dev_detach(uint8_t port_id, char *name)
528 /* FIXME: move this to eal, once device flags are relocated there */
529 if (rte_eth_dev_is_detachable(port_id))
532 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
533 "%s", rte_eth_devices[port_id].data->name);
534 ret = rte_eal_dev_detach(name);
545 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
547 uint16_t old_nb_queues = dev->data->nb_rx_queues;
551 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
552 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
553 sizeof(dev->data->rx_queues[0]) * nb_queues,
554 RTE_CACHE_LINE_SIZE);
555 if (dev->data->rx_queues == NULL) {
556 dev->data->nb_rx_queues = 0;
559 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
562 rxq = dev->data->rx_queues;
564 for (i = nb_queues; i < old_nb_queues; i++)
565 (*dev->dev_ops->rx_queue_release)(rxq[i]);
566 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
567 RTE_CACHE_LINE_SIZE);
570 if (nb_queues > old_nb_queues) {
571 uint16_t new_qs = nb_queues - old_nb_queues;
573 memset(rxq + old_nb_queues, 0,
574 sizeof(rxq[0]) * new_qs);
577 dev->data->rx_queues = rxq;
579 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
582 rxq = dev->data->rx_queues;
584 for (i = nb_queues; i < old_nb_queues; i++)
585 (*dev->dev_ops->rx_queue_release)(rxq[i]);
587 rte_free(dev->data->rx_queues);
588 dev->data->rx_queues = NULL;
590 dev->data->nb_rx_queues = nb_queues;
595 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
597 struct rte_eth_dev *dev;
599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
601 dev = &rte_eth_devices[port_id];
602 if (rx_queue_id >= dev->data->nb_rx_queues) {
603 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
609 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
610 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
611 " already started\n",
612 rx_queue_id, port_id);
616 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
621 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
623 struct rte_eth_dev *dev;
625 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
627 dev = &rte_eth_devices[port_id];
628 if (rx_queue_id >= dev->data->nb_rx_queues) {
629 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
635 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
636 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
637 " already stopped\n",
638 rx_queue_id, port_id);
642 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
647 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
649 struct rte_eth_dev *dev;
651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
653 dev = &rte_eth_devices[port_id];
654 if (tx_queue_id >= dev->data->nb_tx_queues) {
655 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
659 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
661 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
662 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
663 " already started\n",
664 tx_queue_id, port_id);
668 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
673 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
675 struct rte_eth_dev *dev;
677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
679 dev = &rte_eth_devices[port_id];
680 if (tx_queue_id >= dev->data->nb_tx_queues) {
681 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
687 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
688 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
689 " already stopped\n",
690 tx_queue_id, port_id);
694 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
699 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
701 uint16_t old_nb_queues = dev->data->nb_tx_queues;
705 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
706 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
707 sizeof(dev->data->tx_queues[0]) * nb_queues,
708 RTE_CACHE_LINE_SIZE);
709 if (dev->data->tx_queues == NULL) {
710 dev->data->nb_tx_queues = 0;
713 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
716 txq = dev->data->tx_queues;
718 for (i = nb_queues; i < old_nb_queues; i++)
719 (*dev->dev_ops->tx_queue_release)(txq[i]);
720 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
721 RTE_CACHE_LINE_SIZE);
724 if (nb_queues > old_nb_queues) {
725 uint16_t new_qs = nb_queues - old_nb_queues;
727 memset(txq + old_nb_queues, 0,
728 sizeof(txq[0]) * new_qs);
731 dev->data->tx_queues = txq;
733 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
736 txq = dev->data->tx_queues;
738 for (i = nb_queues; i < old_nb_queues; i++)
739 (*dev->dev_ops->tx_queue_release)(txq[i]);
741 rte_free(dev->data->tx_queues);
742 dev->data->tx_queues = NULL;
744 dev->data->nb_tx_queues = nb_queues;
749 rte_eth_speed_bitflag(uint32_t speed, int duplex)
752 case ETH_SPEED_NUM_10M:
753 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
754 case ETH_SPEED_NUM_100M:
755 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
756 case ETH_SPEED_NUM_1G:
757 return ETH_LINK_SPEED_1G;
758 case ETH_SPEED_NUM_2_5G:
759 return ETH_LINK_SPEED_2_5G;
760 case ETH_SPEED_NUM_5G:
761 return ETH_LINK_SPEED_5G;
762 case ETH_SPEED_NUM_10G:
763 return ETH_LINK_SPEED_10G;
764 case ETH_SPEED_NUM_20G:
765 return ETH_LINK_SPEED_20G;
766 case ETH_SPEED_NUM_25G:
767 return ETH_LINK_SPEED_25G;
768 case ETH_SPEED_NUM_40G:
769 return ETH_LINK_SPEED_40G;
770 case ETH_SPEED_NUM_50G:
771 return ETH_LINK_SPEED_50G;
772 case ETH_SPEED_NUM_56G:
773 return ETH_LINK_SPEED_56G;
774 case ETH_SPEED_NUM_100G:
775 return ETH_LINK_SPEED_100G;
782 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
783 const struct rte_eth_conf *dev_conf)
785 struct rte_eth_dev *dev;
786 struct rte_eth_dev_info dev_info;
789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
793 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
794 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
798 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
800 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
801 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
805 dev = &rte_eth_devices[port_id];
807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
810 if (dev->data->dev_started) {
812 "port %d must be stopped to allow configuration\n", port_id);
816 /* Copy the dev_conf parameter into the dev structure */
817 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
820 * Check that the numbers of RX and TX queues are not greater
821 * than the maximum number of RX and TX queues supported by the
824 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
826 if (nb_rx_q == 0 && nb_tx_q == 0) {
827 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
831 if (nb_rx_q > dev_info.max_rx_queues) {
832 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
833 port_id, nb_rx_q, dev_info.max_rx_queues);
837 if (nb_tx_q > dev_info.max_tx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
839 port_id, nb_tx_q, dev_info.max_tx_queues);
844 * If link state interrupt is enabled, check that the
845 * device supports it.
847 if ((dev_conf->intr_conf.lsc == 1) &&
848 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
849 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
850 dev->data->drv_name);
855 * If jumbo frames are enabled, check that the maximum RX packet
856 * length is supported by the configured device.
858 if (dev_conf->rxmode.jumbo_frame == 1) {
859 if (dev_conf->rxmode.max_rx_pkt_len >
860 dev_info.max_rx_pktlen) {
861 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
862 " > max valid value %u\n",
864 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
865 (unsigned)dev_info.max_rx_pktlen);
867 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
868 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
869 " < min valid value %u\n",
871 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
872 (unsigned)ETHER_MIN_LEN);
876 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
877 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
878 /* Use default value */
879 dev->data->dev_conf.rxmode.max_rx_pkt_len =
884 * Setup new number of RX/TX queues and reconfigure device.
886 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
888 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
893 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
895 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
897 rte_eth_dev_rx_queue_config(dev, 0);
901 diag = (*dev->dev_ops->dev_configure)(dev);
903 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
905 rte_eth_dev_rx_queue_config(dev, 0);
906 rte_eth_dev_tx_queue_config(dev, 0);
914 _rte_eth_dev_reset(struct rte_eth_dev *dev)
916 if (dev->data->dev_started) {
918 "port %d must be stopped to allow reset\n",
923 rte_eth_dev_rx_queue_config(dev, 0);
924 rte_eth_dev_tx_queue_config(dev, 0);
926 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
930 rte_eth_dev_config_restore(uint8_t port_id)
932 struct rte_eth_dev *dev;
933 struct rte_eth_dev_info dev_info;
934 struct ether_addr addr;
938 dev = &rte_eth_devices[port_id];
940 rte_eth_dev_info_get(port_id, &dev_info);
942 if (RTE_ETH_DEV_SRIOV(dev).active)
943 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
945 /* replay MAC address configuration */
946 for (i = 0; i < dev_info.max_mac_addrs; i++) {
947 addr = dev->data->mac_addrs[i];
949 /* skip zero address */
950 if (is_zero_ether_addr(&addr))
953 /* add address to the hardware */
954 if (*dev->dev_ops->mac_addr_add &&
955 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
956 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
958 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
960 /* exit the loop but not return an error */
965 /* replay promiscuous configuration */
966 if (rte_eth_promiscuous_get(port_id) == 1)
967 rte_eth_promiscuous_enable(port_id);
968 else if (rte_eth_promiscuous_get(port_id) == 0)
969 rte_eth_promiscuous_disable(port_id);
971 /* replay all multicast configuration */
972 if (rte_eth_allmulticast_get(port_id) == 1)
973 rte_eth_allmulticast_enable(port_id);
974 else if (rte_eth_allmulticast_get(port_id) == 0)
975 rte_eth_allmulticast_disable(port_id);
979 rte_eth_dev_start(uint8_t port_id)
981 struct rte_eth_dev *dev;
984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
986 dev = &rte_eth_devices[port_id];
988 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
990 if (dev->data->dev_started != 0) {
991 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
992 " already started\n",
997 diag = (*dev->dev_ops->dev_start)(dev);
999 dev->data->dev_started = 1;
1003 rte_eth_dev_config_restore(port_id);
1005 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1007 (*dev->dev_ops->link_update)(dev, 0);
1013 rte_eth_dev_stop(uint8_t port_id)
1015 struct rte_eth_dev *dev;
1017 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1018 dev = &rte_eth_devices[port_id];
1020 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1022 if (dev->data->dev_started == 0) {
1023 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1024 " already stopped\n",
1029 dev->data->dev_started = 0;
1030 (*dev->dev_ops->dev_stop)(dev);
1034 rte_eth_dev_set_link_up(uint8_t port_id)
1036 struct rte_eth_dev *dev;
1038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1040 dev = &rte_eth_devices[port_id];
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1043 return (*dev->dev_ops->dev_set_link_up)(dev);
1047 rte_eth_dev_set_link_down(uint8_t port_id)
1049 struct rte_eth_dev *dev;
1051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1053 dev = &rte_eth_devices[port_id];
1055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1056 return (*dev->dev_ops->dev_set_link_down)(dev);
1060 rte_eth_dev_close(uint8_t port_id)
1062 struct rte_eth_dev *dev;
1064 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1065 dev = &rte_eth_devices[port_id];
1067 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1068 dev->data->dev_started = 0;
1069 (*dev->dev_ops->dev_close)(dev);
1071 rte_free(dev->data->rx_queues);
1072 dev->data->rx_queues = NULL;
1073 rte_free(dev->data->tx_queues);
1074 dev->data->tx_queues = NULL;
1078 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1079 uint16_t nb_rx_desc, unsigned int socket_id,
1080 const struct rte_eth_rxconf *rx_conf,
1081 struct rte_mempool *mp)
1084 uint32_t mbp_buf_size;
1085 struct rte_eth_dev *dev;
1086 struct rte_eth_dev_info dev_info;
1089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1091 dev = &rte_eth_devices[port_id];
1092 if (rx_queue_id >= dev->data->nb_rx_queues) {
1093 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1097 if (dev->data->dev_started) {
1098 RTE_PMD_DEBUG_TRACE(
1099 "port %d must be stopped to allow configuration\n", port_id);
1103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1107 * Check the size of the mbuf data buffer.
1108 * This value must be provided in the private data of the memory pool.
1109 * First check that the memory pool has a valid private data.
1111 rte_eth_dev_info_get(port_id, &dev_info);
1112 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1113 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1114 mp->name, (int) mp->private_data_size,
1115 (int) sizeof(struct rte_pktmbuf_pool_private));
1118 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1120 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1121 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1122 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1126 (int)(RTE_PKTMBUF_HEADROOM +
1127 dev_info.min_rx_bufsize),
1128 (int)RTE_PKTMBUF_HEADROOM,
1129 (int)dev_info.min_rx_bufsize);
1133 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1134 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1135 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1137 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1138 "should be: <= %hu, = %hu, and a product of %hu\n",
1140 dev_info.rx_desc_lim.nb_max,
1141 dev_info.rx_desc_lim.nb_min,
1142 dev_info.rx_desc_lim.nb_align);
1146 rxq = dev->data->rx_queues;
1147 if (rxq[rx_queue_id]) {
1148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1150 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1151 rxq[rx_queue_id] = NULL;
1154 if (rx_conf == NULL)
1155 rx_conf = &dev_info.default_rxconf;
1157 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1158 socket_id, rx_conf, mp);
1160 if (!dev->data->min_rx_buf_size ||
1161 dev->data->min_rx_buf_size > mbp_buf_size)
1162 dev->data->min_rx_buf_size = mbp_buf_size;
1169 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1170 uint16_t nb_tx_desc, unsigned int socket_id,
1171 const struct rte_eth_txconf *tx_conf)
1173 struct rte_eth_dev *dev;
1174 struct rte_eth_dev_info dev_info;
1177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1179 dev = &rte_eth_devices[port_id];
1180 if (tx_queue_id >= dev->data->nb_tx_queues) {
1181 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1185 if (dev->data->dev_started) {
1186 RTE_PMD_DEBUG_TRACE(
1187 "port %d must be stopped to allow configuration\n", port_id);
1191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1192 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1194 rte_eth_dev_info_get(port_id, &dev_info);
1196 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1197 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1198 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1199 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1200 "should be: <= %hu, = %hu, and a product of %hu\n",
1202 dev_info.tx_desc_lim.nb_max,
1203 dev_info.tx_desc_lim.nb_min,
1204 dev_info.tx_desc_lim.nb_align);
1208 txq = dev->data->tx_queues;
1209 if (txq[tx_queue_id]) {
1210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1212 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1213 txq[tx_queue_id] = NULL;
1216 if (tx_conf == NULL)
1217 tx_conf = &dev_info.default_txconf;
1219 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1220 socket_id, tx_conf);
1224 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1225 void *userdata __rte_unused)
1229 for (i = 0; i < unsent; i++)
1230 rte_pktmbuf_free(pkts[i]);
1234 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1237 uint64_t *count = userdata;
1240 for (i = 0; i < unsent; i++)
1241 rte_pktmbuf_free(pkts[i]);
1247 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1248 buffer_tx_error_fn cbfn, void *userdata)
1250 buffer->error_callback = cbfn;
1251 buffer->error_userdata = userdata;
1256 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1263 buffer->size = size;
1264 if (buffer->error_callback == NULL) {
1265 ret = rte_eth_tx_buffer_set_err_callback(
1266 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1273 rte_eth_promiscuous_enable(uint8_t port_id)
1275 struct rte_eth_dev *dev;
1277 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1278 dev = &rte_eth_devices[port_id];
1280 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1281 (*dev->dev_ops->promiscuous_enable)(dev);
1282 dev->data->promiscuous = 1;
1286 rte_eth_promiscuous_disable(uint8_t port_id)
1288 struct rte_eth_dev *dev;
1290 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1291 dev = &rte_eth_devices[port_id];
1293 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1294 dev->data->promiscuous = 0;
1295 (*dev->dev_ops->promiscuous_disable)(dev);
1299 rte_eth_promiscuous_get(uint8_t port_id)
1301 struct rte_eth_dev *dev;
1303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1305 dev = &rte_eth_devices[port_id];
1306 return dev->data->promiscuous;
1310 rte_eth_allmulticast_enable(uint8_t port_id)
1312 struct rte_eth_dev *dev;
1314 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1315 dev = &rte_eth_devices[port_id];
1317 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1318 (*dev->dev_ops->allmulticast_enable)(dev);
1319 dev->data->all_multicast = 1;
1323 rte_eth_allmulticast_disable(uint8_t port_id)
1325 struct rte_eth_dev *dev;
1327 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1328 dev = &rte_eth_devices[port_id];
1330 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1331 dev->data->all_multicast = 0;
1332 (*dev->dev_ops->allmulticast_disable)(dev);
1336 rte_eth_allmulticast_get(uint8_t port_id)
1338 struct rte_eth_dev *dev;
1340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1342 dev = &rte_eth_devices[port_id];
1343 return dev->data->all_multicast;
1347 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1348 struct rte_eth_link *link)
1350 struct rte_eth_link *dst = link;
1351 struct rte_eth_link *src = &(dev->data->dev_link);
1353 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1354 *(uint64_t *)src) == 0)
1361 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1363 struct rte_eth_dev *dev;
1365 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1366 dev = &rte_eth_devices[port_id];
1368 if (dev->data->dev_conf.intr_conf.lsc != 0)
1369 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1371 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1372 (*dev->dev_ops->link_update)(dev, 1);
1373 *eth_link = dev->data->dev_link;
1378 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1380 struct rte_eth_dev *dev;
1382 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1383 dev = &rte_eth_devices[port_id];
1385 if (dev->data->dev_conf.intr_conf.lsc != 0)
1386 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1388 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1389 (*dev->dev_ops->link_update)(dev, 0);
1390 *eth_link = dev->data->dev_link;
1395 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1397 struct rte_eth_dev *dev;
1399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1401 dev = &rte_eth_devices[port_id];
1402 memset(stats, 0, sizeof(*stats));
1404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1405 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1406 (*dev->dev_ops->stats_get)(dev, stats);
1411 rte_eth_stats_reset(uint8_t port_id)
1413 struct rte_eth_dev *dev;
1415 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1416 dev = &rte_eth_devices[port_id];
1418 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1419 (*dev->dev_ops->stats_reset)(dev);
1420 dev->data->rx_mbuf_alloc_failed = 0;
1424 get_xstats_count(uint8_t port_id)
1426 struct rte_eth_dev *dev;
1429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1430 dev = &rte_eth_devices[port_id];
1431 if (dev->dev_ops->xstats_get_names != NULL) {
1432 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1437 count += RTE_NB_STATS;
1438 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1440 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1446 rte_eth_xstats_get_names(uint8_t port_id,
1447 struct rte_eth_xstat_name *xstats_names,
1450 struct rte_eth_dev *dev;
1451 int cnt_used_entries;
1452 int cnt_expected_entries;
1453 int cnt_driver_entries;
1454 uint32_t idx, id_queue;
1457 cnt_expected_entries = get_xstats_count(port_id);
1458 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1459 (int)size < cnt_expected_entries)
1460 return cnt_expected_entries;
1462 /* port_id checked in get_xstats_count() */
1463 dev = &rte_eth_devices[port_id];
1464 cnt_used_entries = 0;
1466 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1467 snprintf(xstats_names[cnt_used_entries].name,
1468 sizeof(xstats_names[0].name),
1469 "%s", rte_stats_strings[idx].name);
1472 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1473 for (id_queue = 0; id_queue < num_q; id_queue++) {
1474 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1475 snprintf(xstats_names[cnt_used_entries].name,
1476 sizeof(xstats_names[0].name),
1478 id_queue, rte_rxq_stats_strings[idx].name);
1483 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1484 for (id_queue = 0; id_queue < num_q; id_queue++) {
1485 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1486 snprintf(xstats_names[cnt_used_entries].name,
1487 sizeof(xstats_names[0].name),
1489 id_queue, rte_txq_stats_strings[idx].name);
1494 if (dev->dev_ops->xstats_get_names != NULL) {
1495 /* If there are any driver-specific xstats, append them
1498 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1500 xstats_names + cnt_used_entries,
1501 size - cnt_used_entries);
1502 if (cnt_driver_entries < 0)
1503 return cnt_driver_entries;
1504 cnt_used_entries += cnt_driver_entries;
1507 return cnt_used_entries;
1510 /* retrieve ethdev extended statistics */
1512 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1515 struct rte_eth_stats eth_stats;
1516 struct rte_eth_dev *dev;
1517 unsigned count = 0, i, q;
1519 uint64_t val, *stats_ptr;
1520 uint16_t nb_rxqs, nb_txqs;
1522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1524 dev = &rte_eth_devices[port_id];
1526 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1527 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1529 /* Return generic statistics */
1530 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1531 (nb_txqs * RTE_NB_TXQ_STATS);
1533 /* implemented by the driver */
1534 if (dev->dev_ops->xstats_get != NULL) {
1535 /* Retrieve the xstats from the driver at the end of the
1538 xcount = (*dev->dev_ops->xstats_get)(dev,
1539 xstats ? xstats + count : NULL,
1540 (n > count) ? n - count : 0);
1546 if (n < count + xcount || xstats == NULL)
1547 return count + xcount;
1549 /* now fill the xstats structure */
1551 rte_eth_stats_get(port_id, ð_stats);
1554 for (i = 0; i < RTE_NB_STATS; i++) {
1555 stats_ptr = RTE_PTR_ADD(ð_stats,
1556 rte_stats_strings[i].offset);
1558 xstats[count++].value = val;
1562 for (q = 0; q < nb_rxqs; q++) {
1563 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1564 stats_ptr = RTE_PTR_ADD(ð_stats,
1565 rte_rxq_stats_strings[i].offset +
1566 q * sizeof(uint64_t));
1568 xstats[count++].value = val;
1573 for (q = 0; q < nb_txqs; q++) {
1574 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1575 stats_ptr = RTE_PTR_ADD(ð_stats,
1576 rte_txq_stats_strings[i].offset +
1577 q * sizeof(uint64_t));
1579 xstats[count++].value = val;
1583 for (i = 0; i < count; i++)
1585 /* add an offset to driver-specific stats */
1586 for ( ; i < count + xcount; i++)
1587 xstats[i].id += count;
1589 return count + xcount;
1592 /* reset ethdev extended statistics */
1594 rte_eth_xstats_reset(uint8_t port_id)
1596 struct rte_eth_dev *dev;
1598 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1599 dev = &rte_eth_devices[port_id];
1601 /* implemented by the driver */
1602 if (dev->dev_ops->xstats_reset != NULL) {
1603 (*dev->dev_ops->xstats_reset)(dev);
1607 /* fallback to default */
1608 rte_eth_stats_reset(port_id);
1612 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1615 struct rte_eth_dev *dev;
1617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1619 dev = &rte_eth_devices[port_id];
1621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1622 return (*dev->dev_ops->queue_stats_mapping_set)
1623 (dev, queue_id, stat_idx, is_rx);
1628 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1631 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1637 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1640 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1645 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1647 struct rte_eth_dev *dev;
1649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1650 dev = &rte_eth_devices[port_id];
1652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1653 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1657 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1659 struct rte_eth_dev *dev;
1660 const struct rte_eth_desc_lim lim = {
1661 .nb_max = UINT16_MAX,
1666 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1667 dev = &rte_eth_devices[port_id];
1669 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1670 dev_info->rx_desc_lim = lim;
1671 dev_info->tx_desc_lim = lim;
1673 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1674 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1675 dev_info->driver_name = dev->data->drv_name;
1676 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1677 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1681 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1682 uint32_t *ptypes, int num)
1685 struct rte_eth_dev *dev;
1686 const uint32_t *all_ptypes;
1688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1689 dev = &rte_eth_devices[port_id];
1690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1691 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1696 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1697 if (all_ptypes[i] & ptype_mask) {
1699 ptypes[j] = all_ptypes[i];
1707 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1709 struct rte_eth_dev *dev;
1711 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1712 dev = &rte_eth_devices[port_id];
1713 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1718 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1720 struct rte_eth_dev *dev;
1722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1724 dev = &rte_eth_devices[port_id];
1725 *mtu = dev->data->mtu;
1730 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1733 struct rte_eth_dev *dev;
1735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1736 dev = &rte_eth_devices[port_id];
1737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1739 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1741 dev->data->mtu = mtu;
1747 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1749 struct rte_eth_dev *dev;
1751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1752 dev = &rte_eth_devices[port_id];
1753 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1754 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1758 if (vlan_id > 4095) {
1759 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1760 port_id, (unsigned) vlan_id);
1763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1765 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1769 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1771 struct rte_eth_dev *dev;
1773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1774 dev = &rte_eth_devices[port_id];
1775 if (rx_queue_id >= dev->data->nb_rx_queues) {
1776 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1781 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1787 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1788 enum rte_vlan_type vlan_type,
1791 struct rte_eth_dev *dev;
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1794 dev = &rte_eth_devices[port_id];
1795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1797 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1801 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1803 struct rte_eth_dev *dev;
1808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1809 dev = &rte_eth_devices[port_id];
1811 /*check which option changed by application*/
1812 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1813 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1815 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1816 mask |= ETH_VLAN_STRIP_MASK;
1819 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1820 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1822 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1823 mask |= ETH_VLAN_FILTER_MASK;
1826 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1827 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1829 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1830 mask |= ETH_VLAN_EXTEND_MASK;
1837 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1838 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1844 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1846 struct rte_eth_dev *dev;
1849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1850 dev = &rte_eth_devices[port_id];
1852 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1853 ret |= ETH_VLAN_STRIP_OFFLOAD;
1855 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1856 ret |= ETH_VLAN_FILTER_OFFLOAD;
1858 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1859 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1865 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1867 struct rte_eth_dev *dev;
1869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1870 dev = &rte_eth_devices[port_id];
1871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1872 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1878 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1880 struct rte_eth_dev *dev;
1882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1883 dev = &rte_eth_devices[port_id];
1884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1885 memset(fc_conf, 0, sizeof(*fc_conf));
1886 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1890 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1892 struct rte_eth_dev *dev;
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1895 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1896 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1900 dev = &rte_eth_devices[port_id];
1901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1902 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1906 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1908 struct rte_eth_dev *dev;
1910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1911 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1912 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1916 dev = &rte_eth_devices[port_id];
1917 /* High water, low water validation are device specific */
1918 if (*dev->dev_ops->priority_flow_ctrl_set)
1919 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1924 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1932 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1933 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1934 RTE_RETA_GROUP_SIZE);
1938 num = reta_size / RTE_RETA_GROUP_SIZE;
1939 for (i = 0; i < num; i++) {
1940 if (reta_conf[i].mask)
1948 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1952 uint16_t i, idx, shift;
1958 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1962 for (i = 0; i < reta_size; i++) {
1963 idx = i / RTE_RETA_GROUP_SIZE;
1964 shift = i % RTE_RETA_GROUP_SIZE;
1965 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1966 (reta_conf[idx].reta[shift] >= max_rxq)) {
1967 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1968 "the maximum rxq index: %u\n", idx, shift,
1969 reta_conf[idx].reta[shift], max_rxq);
1978 rte_eth_dev_rss_reta_update(uint8_t port_id,
1979 struct rte_eth_rss_reta_entry64 *reta_conf,
1982 struct rte_eth_dev *dev;
1985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1986 /* Check mask bits */
1987 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1991 dev = &rte_eth_devices[port_id];
1993 /* Check entry value */
1994 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1995 dev->data->nb_rx_queues);
1999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2000 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2004 rte_eth_dev_rss_reta_query(uint8_t port_id,
2005 struct rte_eth_rss_reta_entry64 *reta_conf,
2008 struct rte_eth_dev *dev;
2011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2013 /* Check mask bits */
2014 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2018 dev = &rte_eth_devices[port_id];
2019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2020 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2024 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2026 struct rte_eth_dev *dev;
2027 uint16_t rss_hash_protos;
2029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2030 rss_hash_protos = rss_conf->rss_hf;
2031 if ((rss_hash_protos != 0) &&
2032 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2033 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2037 dev = &rte_eth_devices[port_id];
2038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2039 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2043 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2044 struct rte_eth_rss_conf *rss_conf)
2046 struct rte_eth_dev *dev;
2048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2049 dev = &rte_eth_devices[port_id];
2050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2051 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2055 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2056 struct rte_eth_udp_tunnel *udp_tunnel)
2058 struct rte_eth_dev *dev;
2060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2061 if (udp_tunnel == NULL) {
2062 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2066 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2067 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2071 dev = &rte_eth_devices[port_id];
2072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2073 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2077 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2078 struct rte_eth_udp_tunnel *udp_tunnel)
2080 struct rte_eth_dev *dev;
2082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2083 dev = &rte_eth_devices[port_id];
2085 if (udp_tunnel == NULL) {
2086 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2090 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2091 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2096 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2100 rte_eth_led_on(uint8_t port_id)
2102 struct rte_eth_dev *dev;
2104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2105 dev = &rte_eth_devices[port_id];
2106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2107 return (*dev->dev_ops->dev_led_on)(dev);
2111 rte_eth_led_off(uint8_t port_id)
2113 struct rte_eth_dev *dev;
2115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2116 dev = &rte_eth_devices[port_id];
2117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2118 return (*dev->dev_ops->dev_led_off)(dev);
2122 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2126 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2128 struct rte_eth_dev_info dev_info;
2129 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2132 rte_eth_dev_info_get(port_id, &dev_info);
2134 for (i = 0; i < dev_info.max_mac_addrs; i++)
2135 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2141 static const struct ether_addr null_mac_addr;
2144 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2147 struct rte_eth_dev *dev;
2151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2152 dev = &rte_eth_devices[port_id];
2153 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2155 if (is_zero_ether_addr(addr)) {
2156 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2160 if (pool >= ETH_64_POOLS) {
2161 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2165 index = get_mac_addr_index(port_id, addr);
2167 index = get_mac_addr_index(port_id, &null_mac_addr);
2169 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2174 pool_mask = dev->data->mac_pool_sel[index];
2176 /* Check if both MAC address and pool is already there, and do nothing */
2177 if (pool_mask & (1ULL << pool))
2182 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2184 /* Update address in NIC data structure */
2185 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2187 /* Update pool bitmap in NIC data structure */
2188 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2194 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2196 struct rte_eth_dev *dev;
2199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2200 dev = &rte_eth_devices[port_id];
2201 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2203 index = get_mac_addr_index(port_id, addr);
2205 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2207 } else if (index < 0)
2208 return 0; /* Do nothing if address wasn't found */
2211 (*dev->dev_ops->mac_addr_remove)(dev, index);
2213 /* Update address in NIC data structure */
2214 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2216 /* reset pool bitmap */
2217 dev->data->mac_pool_sel[index] = 0;
2223 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2225 struct rte_eth_dev *dev;
2227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2229 if (!is_valid_assigned_ether_addr(addr))
2232 dev = &rte_eth_devices[port_id];
2233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2235 /* Update default address in NIC data structure */
2236 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2238 (*dev->dev_ops->mac_addr_set)(dev, addr);
2245 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2249 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2251 struct rte_eth_dev_info dev_info;
2252 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2255 rte_eth_dev_info_get(port_id, &dev_info);
2256 if (!dev->data->hash_mac_addrs)
2259 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2260 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2261 ETHER_ADDR_LEN) == 0)
2268 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2273 struct rte_eth_dev *dev;
2275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2277 dev = &rte_eth_devices[port_id];
2278 if (is_zero_ether_addr(addr)) {
2279 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2284 index = get_hash_mac_addr_index(port_id, addr);
2285 /* Check if it's already there, and do nothing */
2286 if ((index >= 0) && (on))
2291 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2292 "set in UTA\n", port_id);
2296 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2298 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2305 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2307 /* Update address in NIC data structure */
2309 ether_addr_copy(addr,
2310 &dev->data->hash_mac_addrs[index]);
2312 ether_addr_copy(&null_mac_addr,
2313 &dev->data->hash_mac_addrs[index]);
2320 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2322 struct rte_eth_dev *dev;
2324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2326 dev = &rte_eth_devices[port_id];
2328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2329 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2332 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2335 struct rte_eth_dev *dev;
2336 struct rte_eth_dev_info dev_info;
2337 struct rte_eth_link link;
2339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2341 dev = &rte_eth_devices[port_id];
2342 rte_eth_dev_info_get(port_id, &dev_info);
2343 link = dev->data->dev_link;
2345 if (queue_idx > dev_info.max_tx_queues) {
2346 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2347 "invalid queue id=%d\n", port_id, queue_idx);
2351 if (tx_rate > link.link_speed) {
2352 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2353 "bigger than link speed= %d\n",
2354 tx_rate, link.link_speed);
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2359 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2363 rte_eth_mirror_rule_set(uint8_t port_id,
2364 struct rte_eth_mirror_conf *mirror_conf,
2365 uint8_t rule_id, uint8_t on)
2367 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2370 if (mirror_conf->rule_type == 0) {
2371 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2375 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2376 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2381 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2382 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2383 (mirror_conf->pool_mask == 0)) {
2384 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2388 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2389 mirror_conf->vlan.vlan_mask == 0) {
2390 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2394 dev = &rte_eth_devices[port_id];
2395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2397 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2401 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2403 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2407 dev = &rte_eth_devices[port_id];
2408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2410 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2414 rte_eth_dev_callback_register(uint8_t port_id,
2415 enum rte_eth_event_type event,
2416 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2418 struct rte_eth_dev *dev;
2419 struct rte_eth_dev_callback *user_cb;
2424 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2426 dev = &rte_eth_devices[port_id];
2427 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2429 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2430 if (user_cb->cb_fn == cb_fn &&
2431 user_cb->cb_arg == cb_arg &&
2432 user_cb->event == event) {
2437 /* create a new callback. */
2438 if (user_cb == NULL) {
2439 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2440 sizeof(struct rte_eth_dev_callback), 0);
2441 if (user_cb != NULL) {
2442 user_cb->cb_fn = cb_fn;
2443 user_cb->cb_arg = cb_arg;
2444 user_cb->event = event;
2445 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2449 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2450 return (user_cb == NULL) ? -ENOMEM : 0;
2454 rte_eth_dev_callback_unregister(uint8_t port_id,
2455 enum rte_eth_event_type event,
2456 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2459 struct rte_eth_dev *dev;
2460 struct rte_eth_dev_callback *cb, *next;
2465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2467 dev = &rte_eth_devices[port_id];
2468 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2471 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2473 next = TAILQ_NEXT(cb, next);
2475 if (cb->cb_fn != cb_fn || cb->event != event ||
2476 (cb->cb_arg != (void *)-1 &&
2477 cb->cb_arg != cb_arg))
2481 * if this callback is not executing right now,
2484 if (cb->active == 0) {
2485 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2492 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2497 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2498 enum rte_eth_event_type event, void *cb_arg)
2500 struct rte_eth_dev_callback *cb_lst;
2501 struct rte_eth_dev_callback dev_cb;
2503 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2504 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2505 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2510 dev_cb.cb_arg = (void *) cb_arg;
2512 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2513 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2515 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2518 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2522 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2525 struct rte_eth_dev *dev;
2526 struct rte_intr_handle *intr_handle;
2530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2532 dev = &rte_eth_devices[port_id];
2534 if (!dev->intr_handle) {
2535 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2539 intr_handle = dev->intr_handle;
2540 if (!intr_handle->intr_vec) {
2541 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2545 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2546 vec = intr_handle->intr_vec[qid];
2547 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2548 if (rc && rc != -EEXIST) {
2549 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2550 " op %d epfd %d vec %u\n",
2551 port_id, qid, op, epfd, vec);
2558 const struct rte_memzone *
2559 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2560 uint16_t queue_id, size_t size, unsigned align,
2563 char z_name[RTE_MEMZONE_NAMESIZE];
2564 const struct rte_memzone *mz;
2566 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2567 dev->data->drv_name, ring_name,
2568 dev->data->port_id, queue_id);
2570 mz = rte_memzone_lookup(z_name);
2574 if (rte_xen_dom0_supported())
2575 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2576 0, align, RTE_PGSIZE_2M);
2578 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2583 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2584 int epfd, int op, void *data)
2587 struct rte_eth_dev *dev;
2588 struct rte_intr_handle *intr_handle;
2591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2593 dev = &rte_eth_devices[port_id];
2594 if (queue_id >= dev->data->nb_rx_queues) {
2595 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2599 if (!dev->intr_handle) {
2600 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2604 intr_handle = dev->intr_handle;
2605 if (!intr_handle->intr_vec) {
2606 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2610 vec = intr_handle->intr_vec[queue_id];
2611 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2612 if (rc && rc != -EEXIST) {
2613 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2614 " op %d epfd %d vec %u\n",
2615 port_id, queue_id, op, epfd, vec);
2623 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2626 struct rte_eth_dev *dev;
2628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 dev = &rte_eth_devices[port_id];
2632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2633 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2637 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2640 struct rte_eth_dev *dev;
2642 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2644 dev = &rte_eth_devices[port_id];
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2647 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2650 #ifdef RTE_NIC_BYPASS
2651 int rte_eth_dev_bypass_init(uint8_t port_id)
2653 struct rte_eth_dev *dev;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 dev = &rte_eth_devices[port_id];
2658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2659 (*dev->dev_ops->bypass_init)(dev);
2664 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2666 struct rte_eth_dev *dev;
2668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2670 dev = &rte_eth_devices[port_id];
2671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2672 (*dev->dev_ops->bypass_state_show)(dev, state);
2677 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2679 struct rte_eth_dev *dev;
2681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2683 dev = &rte_eth_devices[port_id];
2684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2685 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2690 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2692 struct rte_eth_dev *dev;
2694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2696 dev = &rte_eth_devices[port_id];
2697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2698 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2703 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2705 struct rte_eth_dev *dev;
2707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2709 dev = &rte_eth_devices[port_id];
2711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2712 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2717 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2719 struct rte_eth_dev *dev;
2721 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2723 dev = &rte_eth_devices[port_id];
2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2726 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2731 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2733 struct rte_eth_dev *dev;
2735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2737 dev = &rte_eth_devices[port_id];
2739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2740 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2745 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2747 struct rte_eth_dev *dev;
2749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 dev = &rte_eth_devices[port_id];
2753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2754 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2759 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2761 struct rte_eth_dev *dev;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2768 (*dev->dev_ops->bypass_wd_reset)(dev);
2774 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2776 struct rte_eth_dev *dev;
2778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2782 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2783 RTE_ETH_FILTER_NOP, NULL);
2787 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2788 enum rte_filter_op filter_op, void *arg)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2796 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2800 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2801 rte_rx_callback_fn fn, void *user_param)
2803 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2804 rte_errno = ENOTSUP;
2807 /* check input parameters */
2808 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2809 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2813 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2821 cb->param = user_param;
2823 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2824 /* Add the callbacks in fifo order. */
2825 struct rte_eth_rxtx_callback *tail =
2826 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2829 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2836 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2842 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2843 rte_rx_callback_fn fn, void *user_param)
2845 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2846 rte_errno = ENOTSUP;
2849 /* check input parameters */
2850 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2851 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2856 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2864 cb->param = user_param;
2866 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2867 /* Add the callbacks at fisrt position*/
2868 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2870 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2871 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2877 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2878 rte_tx_callback_fn fn, void *user_param)
2880 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2881 rte_errno = ENOTSUP;
2884 /* check input parameters */
2885 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2886 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2891 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2899 cb->param = user_param;
2901 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2902 /* Add the callbacks in fifo order. */
2903 struct rte_eth_rxtx_callback *tail =
2904 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2907 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2914 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2920 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2921 struct rte_eth_rxtx_callback *user_cb)
2923 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2926 /* Check input parameters. */
2927 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2928 if (user_cb == NULL ||
2929 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2932 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2933 struct rte_eth_rxtx_callback *cb;
2934 struct rte_eth_rxtx_callback **prev_cb;
2937 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2938 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2939 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2941 if (cb == user_cb) {
2942 /* Remove the user cb from the callback list. */
2943 *prev_cb = cb->next;
2948 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2954 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2955 struct rte_eth_rxtx_callback *user_cb)
2957 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2960 /* Check input parameters. */
2961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2962 if (user_cb == NULL ||
2963 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2966 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2968 struct rte_eth_rxtx_callback *cb;
2969 struct rte_eth_rxtx_callback **prev_cb;
2971 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2972 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2973 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2975 if (cb == user_cb) {
2976 /* Remove the user cb from the callback list. */
2977 *prev_cb = cb->next;
2982 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2988 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2989 struct rte_eth_rxq_info *qinfo)
2991 struct rte_eth_dev *dev;
2993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2998 dev = &rte_eth_devices[port_id];
2999 if (queue_id >= dev->data->nb_rx_queues) {
3000 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3006 memset(qinfo, 0, sizeof(*qinfo));
3007 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3012 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3013 struct rte_eth_txq_info *qinfo)
3015 struct rte_eth_dev *dev;
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3022 dev = &rte_eth_devices[port_id];
3023 if (queue_id >= dev->data->nb_tx_queues) {
3024 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3030 memset(qinfo, 0, sizeof(*qinfo));
3031 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3036 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3037 struct ether_addr *mc_addr_set,
3038 uint32_t nb_mc_addr)
3040 struct rte_eth_dev *dev;
3042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3044 dev = &rte_eth_devices[port_id];
3045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3046 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3050 rte_eth_timesync_enable(uint8_t port_id)
3052 struct rte_eth_dev *dev;
3054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3055 dev = &rte_eth_devices[port_id];
3057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3058 return (*dev->dev_ops->timesync_enable)(dev);
3062 rte_eth_timesync_disable(uint8_t port_id)
3064 struct rte_eth_dev *dev;
3066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3067 dev = &rte_eth_devices[port_id];
3069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3070 return (*dev->dev_ops->timesync_disable)(dev);
3074 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3077 struct rte_eth_dev *dev;
3079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3080 dev = &rte_eth_devices[port_id];
3082 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3083 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3087 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3089 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3092 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3095 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3099 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3101 struct rte_eth_dev *dev;
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3104 dev = &rte_eth_devices[port_id];
3106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3107 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3111 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3113 struct rte_eth_dev *dev;
3115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3116 dev = &rte_eth_devices[port_id];
3118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3119 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3123 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3125 struct rte_eth_dev *dev;
3127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3128 dev = &rte_eth_devices[port_id];
3130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3131 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3135 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3137 struct rte_eth_dev *dev;
3139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3141 dev = &rte_eth_devices[port_id];
3142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3143 return (*dev->dev_ops->get_reg)(dev, info);
3147 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3153 dev = &rte_eth_devices[port_id];
3154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3155 return (*dev->dev_ops->get_eeprom_length)(dev);
3159 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3161 struct rte_eth_dev *dev;
3163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3165 dev = &rte_eth_devices[port_id];
3166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3167 return (*dev->dev_ops->get_eeprom)(dev, info);
3171 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3173 struct rte_eth_dev *dev;
3175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3177 dev = &rte_eth_devices[port_id];
3178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3179 return (*dev->dev_ops->set_eeprom)(dev, info);
3183 rte_eth_dev_get_dcb_info(uint8_t port_id,
3184 struct rte_eth_dcb_info *dcb_info)
3186 struct rte_eth_dev *dev;
3188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190 dev = &rte_eth_devices[port_id];
3191 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3194 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3198 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3200 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3201 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3206 eth_dev->intr_handle = &pci_dev->intr_handle;
3208 eth_dev->data->dev_flags = 0;
3209 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3210 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3212 eth_dev->data->kdrv = pci_dev->kdrv;
3213 eth_dev->data->numa_node = pci_dev->device.numa_node;
3214 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3218 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3219 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3221 struct rte_eth_dev *dev;
3223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3224 if (l2_tunnel == NULL) {
3225 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3229 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3230 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3234 dev = &rte_eth_devices[port_id];
3235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3237 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3241 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3242 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3246 struct rte_eth_dev *dev;
3248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3250 if (l2_tunnel == NULL) {
3251 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3255 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3256 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3261 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3265 dev = &rte_eth_devices[port_id];
3266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3268 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);