4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
182 strcmp(rte_eth_devices[i].data->name, name) == 0)
183 return &rte_eth_devices[i];
189 rte_eth_dev_find_free_port(void)
193 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
194 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
197 return RTE_MAX_ETHPORTS;
200 static struct rte_eth_dev *
201 eth_dev_get(uint8_t port_id)
203 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
205 eth_dev->data = &rte_eth_dev_data[port_id];
206 eth_dev->state = RTE_ETH_DEV_ATTACHED;
207 TAILQ_INIT(&(eth_dev->link_intr_cbs));
209 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
298 rte_eth_dev_socket_id(uint8_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_count(void)
311 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
318 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
322 /* shouldn't check 'rte_eth_devices[i].data',
323 * because it might be overwritten by VDEV PMD */
324 tmp = rte_eth_dev_data[port_id].name;
330 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
335 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
342 *port_id = RTE_MAX_ETHPORTS;
343 RTE_ETH_FOREACH_DEV(i) {
345 rte_eth_dev_data[i].name, strlen(name))) {
356 rte_eth_dev_is_detachable(uint8_t port_id)
360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
362 switch (rte_eth_devices[port_id].data->kdrv) {
363 case RTE_KDRV_IGB_UIO:
364 case RTE_KDRV_UIO_GENERIC:
365 case RTE_KDRV_NIC_UIO:
372 dev_flags = rte_eth_devices[port_id].data->dev_flags;
373 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
374 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
380 /* attach the new device, then store port_id of the device */
382 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
385 int current = rte_eth_dev_count();
389 if ((devargs == NULL) || (port_id == NULL)) {
394 /* parse devargs, then retrieve device name and args */
395 if (rte_eal_parse_devargs_str(devargs, &name, &args))
398 ret = rte_eal_dev_attach(name, args);
402 /* no point looking at the port count if no port exists */
403 if (!rte_eth_dev_count()) {
404 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
409 /* if nothing happened, there is a bug here, since some driver told us
410 * it did attach a device, but did not create a port.
412 if (current == rte_eth_dev_count()) {
417 *port_id = eth_dev_last_created_port;
426 /* detach the device, then store the name of the device */
428 rte_eth_dev_detach(uint8_t port_id, char *name)
437 /* FIXME: move this to eal, once device flags are relocated there */
438 if (rte_eth_dev_is_detachable(port_id))
441 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
442 "%s", rte_eth_devices[port_id].data->name);
443 ret = rte_eal_dev_detach(name);
454 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
456 uint16_t old_nb_queues = dev->data->nb_rx_queues;
460 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
461 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
462 sizeof(dev->data->rx_queues[0]) * nb_queues,
463 RTE_CACHE_LINE_SIZE);
464 if (dev->data->rx_queues == NULL) {
465 dev->data->nb_rx_queues = 0;
468 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
471 rxq = dev->data->rx_queues;
473 for (i = nb_queues; i < old_nb_queues; i++)
474 (*dev->dev_ops->rx_queue_release)(rxq[i]);
475 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
476 RTE_CACHE_LINE_SIZE);
479 if (nb_queues > old_nb_queues) {
480 uint16_t new_qs = nb_queues - old_nb_queues;
482 memset(rxq + old_nb_queues, 0,
483 sizeof(rxq[0]) * new_qs);
486 dev->data->rx_queues = rxq;
488 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
491 rxq = dev->data->rx_queues;
493 for (i = nb_queues; i < old_nb_queues; i++)
494 (*dev->dev_ops->rx_queue_release)(rxq[i]);
496 rte_free(dev->data->rx_queues);
497 dev->data->rx_queues = NULL;
499 dev->data->nb_rx_queues = nb_queues;
504 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
506 struct rte_eth_dev *dev;
508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
510 dev = &rte_eth_devices[port_id];
511 if (rx_queue_id >= dev->data->nb_rx_queues) {
512 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
518 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
519 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
520 " already started\n",
521 rx_queue_id, port_id);
525 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
530 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already stopped\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
556 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (tx_queue_id >= dev->data->nb_tx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
570 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already started\n",
573 tx_queue_id, port_id);
577 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
582 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already stopped\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
610 uint16_t old_nb_queues = dev->data->nb_tx_queues;
614 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
615 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
616 sizeof(dev->data->tx_queues[0]) * nb_queues,
617 RTE_CACHE_LINE_SIZE);
618 if (dev->data->tx_queues == NULL) {
619 dev->data->nb_tx_queues = 0;
622 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
625 txq = dev->data->tx_queues;
627 for (i = nb_queues; i < old_nb_queues; i++)
628 (*dev->dev_ops->tx_queue_release)(txq[i]);
629 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
633 if (nb_queues > old_nb_queues) {
634 uint16_t new_qs = nb_queues - old_nb_queues;
636 memset(txq + old_nb_queues, 0,
637 sizeof(txq[0]) * new_qs);
640 dev->data->tx_queues = txq;
642 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
645 txq = dev->data->tx_queues;
647 for (i = nb_queues; i < old_nb_queues; i++)
648 (*dev->dev_ops->tx_queue_release)(txq[i]);
650 rte_free(dev->data->tx_queues);
651 dev->data->tx_queues = NULL;
653 dev->data->nb_tx_queues = nb_queues;
658 rte_eth_speed_bitflag(uint32_t speed, int duplex)
661 case ETH_SPEED_NUM_10M:
662 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
663 case ETH_SPEED_NUM_100M:
664 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
665 case ETH_SPEED_NUM_1G:
666 return ETH_LINK_SPEED_1G;
667 case ETH_SPEED_NUM_2_5G:
668 return ETH_LINK_SPEED_2_5G;
669 case ETH_SPEED_NUM_5G:
670 return ETH_LINK_SPEED_5G;
671 case ETH_SPEED_NUM_10G:
672 return ETH_LINK_SPEED_10G;
673 case ETH_SPEED_NUM_20G:
674 return ETH_LINK_SPEED_20G;
675 case ETH_SPEED_NUM_25G:
676 return ETH_LINK_SPEED_25G;
677 case ETH_SPEED_NUM_40G:
678 return ETH_LINK_SPEED_40G;
679 case ETH_SPEED_NUM_50G:
680 return ETH_LINK_SPEED_50G;
681 case ETH_SPEED_NUM_56G:
682 return ETH_LINK_SPEED_56G;
683 case ETH_SPEED_NUM_100G:
684 return ETH_LINK_SPEED_100G;
691 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
692 const struct rte_eth_conf *dev_conf)
694 struct rte_eth_dev *dev;
695 struct rte_eth_dev_info dev_info;
698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
700 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
702 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
703 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
707 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
709 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
710 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
714 dev = &rte_eth_devices[port_id];
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
719 if (dev->data->dev_started) {
721 "port %d must be stopped to allow configuration\n", port_id);
725 /* Copy the dev_conf parameter into the dev structure */
726 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
729 * Check that the numbers of RX and TX queues are not greater
730 * than the maximum number of RX and TX queues supported by the
733 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
735 if (nb_rx_q == 0 && nb_tx_q == 0) {
736 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
740 if (nb_rx_q > dev_info.max_rx_queues) {
741 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
742 port_id, nb_rx_q, dev_info.max_rx_queues);
746 if (nb_tx_q > dev_info.max_tx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
748 port_id, nb_tx_q, dev_info.max_tx_queues);
752 /* Check that the device supports requested interrupts */
753 if ((dev_conf->intr_conf.lsc == 1) &&
754 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
755 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
756 dev->data->drv_name);
759 if ((dev_conf->intr_conf.rmv == 1) &&
760 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
761 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
762 dev->data->drv_name);
767 * If jumbo frames are enabled, check that the maximum RX packet
768 * length is supported by the configured device.
770 if (dev_conf->rxmode.jumbo_frame == 1) {
771 if (dev_conf->rxmode.max_rx_pkt_len >
772 dev_info.max_rx_pktlen) {
773 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
774 " > max valid value %u\n",
776 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
777 (unsigned)dev_info.max_rx_pktlen);
779 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
780 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
781 " < min valid value %u\n",
783 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
784 (unsigned)ETHER_MIN_LEN);
788 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
789 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
790 /* Use default value */
791 dev->data->dev_conf.rxmode.max_rx_pkt_len =
796 * Setup new number of RX/TX queues and reconfigure device.
798 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
800 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
805 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
807 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
809 rte_eth_dev_rx_queue_config(dev, 0);
813 diag = (*dev->dev_ops->dev_configure)(dev);
815 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
817 rte_eth_dev_rx_queue_config(dev, 0);
818 rte_eth_dev_tx_queue_config(dev, 0);
826 _rte_eth_dev_reset(struct rte_eth_dev *dev)
828 if (dev->data->dev_started) {
830 "port %d must be stopped to allow reset\n",
835 rte_eth_dev_rx_queue_config(dev, 0);
836 rte_eth_dev_tx_queue_config(dev, 0);
838 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
842 rte_eth_dev_config_restore(uint8_t port_id)
844 struct rte_eth_dev *dev;
845 struct rte_eth_dev_info dev_info;
846 struct ether_addr *addr;
851 dev = &rte_eth_devices[port_id];
853 rte_eth_dev_info_get(port_id, &dev_info);
855 /* replay MAC address configuration including default MAC */
856 addr = &dev->data->mac_addrs[0];
857 if (*dev->dev_ops->mac_addr_set != NULL)
858 (*dev->dev_ops->mac_addr_set)(dev, addr);
859 else if (*dev->dev_ops->mac_addr_add != NULL)
860 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
862 if (*dev->dev_ops->mac_addr_add != NULL) {
863 for (i = 1; i < dev_info.max_mac_addrs; i++) {
864 addr = &dev->data->mac_addrs[i];
866 /* skip zero address */
867 if (is_zero_ether_addr(addr))
871 pool_mask = dev->data->mac_pool_sel[i];
874 if (pool_mask & 1ULL)
875 (*dev->dev_ops->mac_addr_add)(dev,
883 /* replay promiscuous configuration */
884 if (rte_eth_promiscuous_get(port_id) == 1)
885 rte_eth_promiscuous_enable(port_id);
886 else if (rte_eth_promiscuous_get(port_id) == 0)
887 rte_eth_promiscuous_disable(port_id);
889 /* replay all multicast configuration */
890 if (rte_eth_allmulticast_get(port_id) == 1)
891 rte_eth_allmulticast_enable(port_id);
892 else if (rte_eth_allmulticast_get(port_id) == 0)
893 rte_eth_allmulticast_disable(port_id);
897 rte_eth_dev_start(uint8_t port_id)
899 struct rte_eth_dev *dev;
902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
904 dev = &rte_eth_devices[port_id];
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
908 if (dev->data->dev_started != 0) {
909 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
910 " already started\n",
915 diag = (*dev->dev_ops->dev_start)(dev);
917 dev->data->dev_started = 1;
921 rte_eth_dev_config_restore(port_id);
923 if (dev->data->dev_conf.intr_conf.lsc == 0) {
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
925 (*dev->dev_ops->link_update)(dev, 0);
931 rte_eth_dev_stop(uint8_t port_id)
933 struct rte_eth_dev *dev;
935 RTE_ETH_VALID_PORTID_OR_RET(port_id);
936 dev = &rte_eth_devices[port_id];
938 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
940 if (dev->data->dev_started == 0) {
941 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
942 " already stopped\n",
947 dev->data->dev_started = 0;
948 (*dev->dev_ops->dev_stop)(dev);
952 rte_eth_dev_set_link_up(uint8_t port_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
961 return (*dev->dev_ops->dev_set_link_up)(dev);
965 rte_eth_dev_set_link_down(uint8_t port_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
974 return (*dev->dev_ops->dev_set_link_down)(dev);
978 rte_eth_dev_close(uint8_t port_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_RET(port_id);
983 dev = &rte_eth_devices[port_id];
985 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
986 dev->data->dev_started = 0;
987 (*dev->dev_ops->dev_close)(dev);
989 rte_free(dev->data->rx_queues);
990 dev->data->rx_queues = NULL;
991 rte_free(dev->data->tx_queues);
992 dev->data->tx_queues = NULL;
996 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
997 uint16_t nb_rx_desc, unsigned int socket_id,
998 const struct rte_eth_rxconf *rx_conf,
999 struct rte_mempool *mp)
1002 uint32_t mbp_buf_size;
1003 struct rte_eth_dev *dev;
1004 struct rte_eth_dev_info dev_info;
1007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1009 dev = &rte_eth_devices[port_id];
1010 if (rx_queue_id >= dev->data->nb_rx_queues) {
1011 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1015 if (dev->data->dev_started) {
1016 RTE_PMD_DEBUG_TRACE(
1017 "port %d must be stopped to allow configuration\n", port_id);
1021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1025 * Check the size of the mbuf data buffer.
1026 * This value must be provided in the private data of the memory pool.
1027 * First check that the memory pool has a valid private data.
1029 rte_eth_dev_info_get(port_id, &dev_info);
1030 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1031 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1032 mp->name, (int) mp->private_data_size,
1033 (int) sizeof(struct rte_pktmbuf_pool_private));
1036 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1038 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1039 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1040 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1044 (int)(RTE_PKTMBUF_HEADROOM +
1045 dev_info.min_rx_bufsize),
1046 (int)RTE_PKTMBUF_HEADROOM,
1047 (int)dev_info.min_rx_bufsize);
1051 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1052 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1053 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1055 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1056 "should be: <= %hu, = %hu, and a product of %hu\n",
1058 dev_info.rx_desc_lim.nb_max,
1059 dev_info.rx_desc_lim.nb_min,
1060 dev_info.rx_desc_lim.nb_align);
1064 rxq = dev->data->rx_queues;
1065 if (rxq[rx_queue_id]) {
1066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1068 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1069 rxq[rx_queue_id] = NULL;
1072 if (rx_conf == NULL)
1073 rx_conf = &dev_info.default_rxconf;
1075 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1076 socket_id, rx_conf, mp);
1078 if (!dev->data->min_rx_buf_size ||
1079 dev->data->min_rx_buf_size > mbp_buf_size)
1080 dev->data->min_rx_buf_size = mbp_buf_size;
1087 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1088 uint16_t nb_tx_desc, unsigned int socket_id,
1089 const struct rte_eth_txconf *tx_conf)
1091 struct rte_eth_dev *dev;
1092 struct rte_eth_dev_info dev_info;
1095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1097 dev = &rte_eth_devices[port_id];
1098 if (tx_queue_id >= dev->data->nb_tx_queues) {
1099 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1103 if (dev->data->dev_started) {
1104 RTE_PMD_DEBUG_TRACE(
1105 "port %d must be stopped to allow configuration\n", port_id);
1109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1112 rte_eth_dev_info_get(port_id, &dev_info);
1114 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1115 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1116 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1117 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1118 "should be: <= %hu, = %hu, and a product of %hu\n",
1120 dev_info.tx_desc_lim.nb_max,
1121 dev_info.tx_desc_lim.nb_min,
1122 dev_info.tx_desc_lim.nb_align);
1126 txq = dev->data->tx_queues;
1127 if (txq[tx_queue_id]) {
1128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1130 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1131 txq[tx_queue_id] = NULL;
1134 if (tx_conf == NULL)
1135 tx_conf = &dev_info.default_txconf;
1137 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1138 socket_id, tx_conf);
1142 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1143 void *userdata __rte_unused)
1147 for (i = 0; i < unsent; i++)
1148 rte_pktmbuf_free(pkts[i]);
1152 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1155 uint64_t *count = userdata;
1158 for (i = 0; i < unsent; i++)
1159 rte_pktmbuf_free(pkts[i]);
1165 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1166 buffer_tx_error_fn cbfn, void *userdata)
1168 buffer->error_callback = cbfn;
1169 buffer->error_userdata = userdata;
1174 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1181 buffer->size = size;
1182 if (buffer->error_callback == NULL) {
1183 ret = rte_eth_tx_buffer_set_err_callback(
1184 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1191 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1193 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1195 /* Validate Input Data. Bail if not valid or not supported. */
1196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1199 /* Call driver to free pending mbufs. */
1200 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1205 rte_eth_promiscuous_enable(uint8_t port_id)
1207 struct rte_eth_dev *dev;
1209 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1210 dev = &rte_eth_devices[port_id];
1212 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1213 (*dev->dev_ops->promiscuous_enable)(dev);
1214 dev->data->promiscuous = 1;
1218 rte_eth_promiscuous_disable(uint8_t port_id)
1220 struct rte_eth_dev *dev;
1222 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1223 dev = &rte_eth_devices[port_id];
1225 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1226 dev->data->promiscuous = 0;
1227 (*dev->dev_ops->promiscuous_disable)(dev);
1231 rte_eth_promiscuous_get(uint8_t port_id)
1233 struct rte_eth_dev *dev;
1235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1237 dev = &rte_eth_devices[port_id];
1238 return dev->data->promiscuous;
1242 rte_eth_allmulticast_enable(uint8_t port_id)
1244 struct rte_eth_dev *dev;
1246 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1247 dev = &rte_eth_devices[port_id];
1249 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1250 (*dev->dev_ops->allmulticast_enable)(dev);
1251 dev->data->all_multicast = 1;
1255 rte_eth_allmulticast_disable(uint8_t port_id)
1257 struct rte_eth_dev *dev;
1259 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1260 dev = &rte_eth_devices[port_id];
1262 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1263 dev->data->all_multicast = 0;
1264 (*dev->dev_ops->allmulticast_disable)(dev);
1268 rte_eth_allmulticast_get(uint8_t port_id)
1270 struct rte_eth_dev *dev;
1272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1274 dev = &rte_eth_devices[port_id];
1275 return dev->data->all_multicast;
1279 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1280 struct rte_eth_link *link)
1282 struct rte_eth_link *dst = link;
1283 struct rte_eth_link *src = &(dev->data->dev_link);
1285 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1286 *(uint64_t *)src) == 0)
1293 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1295 struct rte_eth_dev *dev;
1297 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1298 dev = &rte_eth_devices[port_id];
1300 if (dev->data->dev_conf.intr_conf.lsc != 0)
1301 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1303 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1304 (*dev->dev_ops->link_update)(dev, 1);
1305 *eth_link = dev->data->dev_link;
1310 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1312 struct rte_eth_dev *dev;
1314 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1315 dev = &rte_eth_devices[port_id];
1317 if (dev->data->dev_conf.intr_conf.lsc != 0)
1318 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1320 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1321 (*dev->dev_ops->link_update)(dev, 0);
1322 *eth_link = dev->data->dev_link;
1327 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1329 struct rte_eth_dev *dev;
1331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1333 dev = &rte_eth_devices[port_id];
1334 memset(stats, 0, sizeof(*stats));
1336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1337 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1338 (*dev->dev_ops->stats_get)(dev, stats);
1343 rte_eth_stats_reset(uint8_t port_id)
1345 struct rte_eth_dev *dev;
1347 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1348 dev = &rte_eth_devices[port_id];
1350 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1351 (*dev->dev_ops->stats_reset)(dev);
1352 dev->data->rx_mbuf_alloc_failed = 0;
1356 get_xstats_count(uint8_t port_id)
1358 struct rte_eth_dev *dev;
1361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1362 dev = &rte_eth_devices[port_id];
1363 if (dev->dev_ops->xstats_get_names_by_ids != NULL) {
1364 count = (*dev->dev_ops->xstats_get_names_by_ids)(dev, NULL,
1369 if (dev->dev_ops->xstats_get_names != NULL) {
1370 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1376 count += RTE_NB_STATS;
1377 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1379 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1385 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1388 int cnt_xstats, idx_xstat;
1390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1393 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1398 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1403 cnt_xstats = rte_eth_xstats_get_names(port_id, NULL, 0, NULL);
1404 if (cnt_xstats < 0) {
1405 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1409 /* Get id-name lookup table */
1410 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1412 if (cnt_xstats != rte_eth_xstats_get_names(
1413 port_id, xstats_names, cnt_xstats, NULL)) {
1414 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1418 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1419 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1429 rte_eth_xstats_get_names_v1607(uint8_t port_id,
1430 struct rte_eth_xstat_name *xstats_names,
1433 return rte_eth_xstats_get_names(port_id, xstats_names, size, NULL);
1435 VERSION_SYMBOL(rte_eth_xstats_get_names, _v1607, 16.07);
1438 rte_eth_xstats_get_names_v1705(uint8_t port_id,
1439 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1442 /* Get all xstats */
1444 struct rte_eth_dev *dev;
1445 int cnt_used_entries;
1446 int cnt_expected_entries;
1447 int cnt_driver_entries;
1448 uint32_t idx, id_queue;
1451 cnt_expected_entries = get_xstats_count(port_id);
1452 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1453 (int)size < cnt_expected_entries)
1454 return cnt_expected_entries;
1456 /* port_id checked in get_xstats_count() */
1457 dev = &rte_eth_devices[port_id];
1458 cnt_used_entries = 0;
1460 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1461 snprintf(xstats_names[cnt_used_entries].name,
1462 sizeof(xstats_names[0].name),
1463 "%s", rte_stats_strings[idx].name);
1466 num_q = RTE_MIN(dev->data->nb_rx_queues,
1467 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1468 for (id_queue = 0; id_queue < num_q; id_queue++) {
1469 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1470 snprintf(xstats_names[cnt_used_entries].name,
1471 sizeof(xstats_names[0].name),
1474 rte_rxq_stats_strings[idx].name);
1479 num_q = RTE_MIN(dev->data->nb_tx_queues,
1480 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1481 for (id_queue = 0; id_queue < num_q; id_queue++) {
1482 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1483 snprintf(xstats_names[cnt_used_entries].name,
1484 sizeof(xstats_names[0].name),
1487 rte_txq_stats_strings[idx].name);
1492 if (dev->dev_ops->xstats_get_names_by_ids != NULL) {
1493 /* If there are any driver-specific xstats, append them
1496 cnt_driver_entries =
1497 (*dev->dev_ops->xstats_get_names_by_ids)(
1499 xstats_names + cnt_used_entries,
1501 size - cnt_used_entries);
1502 if (cnt_driver_entries < 0)
1503 return cnt_driver_entries;
1504 cnt_used_entries += cnt_driver_entries;
1506 } else if (dev->dev_ops->xstats_get_names != NULL) {
1507 /* If there are any driver-specific xstats, append them
1510 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1512 xstats_names + cnt_used_entries,
1513 size - cnt_used_entries);
1514 if (cnt_driver_entries < 0)
1515 return cnt_driver_entries;
1516 cnt_used_entries += cnt_driver_entries;
1519 return cnt_used_entries;
1521 /* Get only xstats given by IDS */
1524 struct rte_eth_xstat_name *xstats_names_copy;
1526 len = rte_eth_xstats_get_names_v1705(port_id, NULL, 0, NULL);
1529 malloc(sizeof(struct rte_eth_xstat_name) * len);
1530 if (!xstats_names_copy) {
1531 RTE_PMD_DEBUG_TRACE(
1532 "ERROR: can't allocate memory for values_copy\n");
1533 free(xstats_names_copy);
1537 rte_eth_xstats_get_names_v1705(port_id, xstats_names_copy,
1540 for (i = 0; i < size; i++) {
1541 if (ids[i] >= len) {
1542 RTE_PMD_DEBUG_TRACE(
1543 "ERROR: id value isn't valid\n");
1546 strcpy(xstats_names[i].name,
1547 xstats_names_copy[ids[i]].name);
1549 free(xstats_names_copy);
1553 BIND_DEFAULT_SYMBOL(rte_eth_xstats_get_names, _v1705, 17.05);
1555 MAP_STATIC_SYMBOL(int
1556 rte_eth_xstats_get_names(uint8_t port_id,
1557 struct rte_eth_xstat_name *xstats_names,
1559 uint64_t *ids), rte_eth_xstats_get_names_v1705);
1561 /* retrieve ethdev extended statistics */
1563 rte_eth_xstats_get_v22(uint8_t port_id, struct rte_eth_xstat *xstats,
1566 uint64_t *values_copy;
1569 values_copy = malloc(sizeof(values_copy) * n);
1571 RTE_PMD_DEBUG_TRACE(
1572 "ERROR: Cannot allocate memory for xstats\n");
1575 size = rte_eth_xstats_get(port_id, 0, values_copy, n);
1577 for (i = 0; i < n; i++) {
1579 xstats[i].value = values_copy[i];
1584 VERSION_SYMBOL(rte_eth_xstats_get, _v22, 2.2);
1586 /* retrieve ethdev extended statistics */
1588 rte_eth_xstats_get_v1705(uint8_t port_id, uint64_t *ids, uint64_t *values,
1591 /* If need all xstats */
1593 struct rte_eth_stats eth_stats;
1594 struct rte_eth_dev *dev;
1595 unsigned int count = 0, i, q;
1596 signed int xcount = 0;
1597 uint64_t val, *stats_ptr;
1598 uint16_t nb_rxqs, nb_txqs;
1600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1601 dev = &rte_eth_devices[port_id];
1603 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1604 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1605 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1606 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1608 /* Return generic statistics */
1609 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1610 (nb_txqs * RTE_NB_TXQ_STATS);
1613 /* implemented by the driver */
1614 if (dev->dev_ops->xstats_get_by_ids != NULL) {
1615 /* Retrieve the xstats from the driver at the end of the
1616 * xstats struct. Retrieve all xstats.
1618 xcount = (*dev->dev_ops->xstats_get_by_ids)(dev,
1620 values ? values + count : NULL,
1621 (n > count) ? n - count : 0);
1625 /* implemented by the driver */
1626 } else if (dev->dev_ops->xstats_get != NULL) {
1627 /* Retrieve the xstats from the driver at the end of the
1628 * xstats struct. Retrieve all xstats.
1629 * Compatibility for PMD without xstats_get_by_ids
1631 unsigned int size = (n > count) ? n - count : 1;
1632 struct rte_eth_xstat xstats[size];
1634 xcount = (*dev->dev_ops->xstats_get)(dev,
1635 values ? xstats : NULL, size);
1641 for (i = 0 ; i < (unsigned int)xcount; i++)
1642 values[i + count] = xstats[i].value;
1645 if (n < count + xcount || values == NULL)
1646 return count + xcount;
1648 /* now fill the xstats structure */
1650 rte_eth_stats_get(port_id, ð_stats);
1653 for (i = 0; i < RTE_NB_STATS; i++) {
1654 stats_ptr = RTE_PTR_ADD(ð_stats,
1655 rte_stats_strings[i].offset);
1657 values[count++] = val;
1661 for (q = 0; q < nb_rxqs; q++) {
1662 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1663 stats_ptr = RTE_PTR_ADD(ð_stats,
1664 rte_rxq_stats_strings[i].offset +
1665 q * sizeof(uint64_t));
1667 values[count++] = val;
1672 for (q = 0; q < nb_txqs; q++) {
1673 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1674 stats_ptr = RTE_PTR_ADD(ð_stats,
1675 rte_txq_stats_strings[i].offset +
1676 q * sizeof(uint64_t));
1678 values[count++] = val;
1682 return count + xcount;
1684 /* Need only xstats given by IDS array */
1687 uint64_t *values_copy;
1689 size = rte_eth_xstats_get_v1705(port_id, NULL, NULL, 0);
1691 values_copy = malloc(sizeof(values_copy) * size);
1693 RTE_PMD_DEBUG_TRACE(
1694 "ERROR: can't allocate memory for values_copy\n");
1698 rte_eth_xstats_get_v1705(port_id, NULL, values_copy, size);
1700 for (i = 0; i < n; i++) {
1701 if (ids[i] >= size) {
1702 RTE_PMD_DEBUG_TRACE(
1703 "ERROR: id value isn't valid\n");
1706 values[i] = values_copy[ids[i]];
1712 BIND_DEFAULT_SYMBOL(rte_eth_xstats_get, _v1705, 17.05);
1714 MAP_STATIC_SYMBOL(int
1715 rte_eth_xstats_get(uint8_t port_id, uint64_t *ids,
1716 uint64_t *values, unsigned int n), rte_eth_xstats_get_v1705);
1718 __rte_deprecated int
1719 rte_eth_xstats_get_all(uint8_t port_id, struct rte_eth_xstat *xstats,
1722 uint64_t *values_copy;
1725 values_copy = malloc(sizeof(values_copy) * n);
1727 RTE_PMD_DEBUG_TRACE(
1728 "ERROR: Cannot allocate memory for xstats\n");
1731 size = rte_eth_xstats_get(port_id, 0, values_copy, n);
1733 for (i = 0; i < n; i++) {
1735 xstats[i].value = values_copy[i];
1741 __rte_deprecated int
1742 rte_eth_xstats_get_names_all(uint8_t port_id,
1743 struct rte_eth_xstat_name *xstats_names, unsigned int n)
1745 return rte_eth_xstats_get_names(port_id, xstats_names, n, NULL);
1748 /* reset ethdev extended statistics */
1750 rte_eth_xstats_reset(uint8_t port_id)
1752 struct rte_eth_dev *dev;
1754 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1755 dev = &rte_eth_devices[port_id];
1757 /* implemented by the driver */
1758 if (dev->dev_ops->xstats_reset != NULL) {
1759 (*dev->dev_ops->xstats_reset)(dev);
1763 /* fallback to default */
1764 rte_eth_stats_reset(port_id);
1768 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1771 struct rte_eth_dev *dev;
1773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1775 dev = &rte_eth_devices[port_id];
1777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1778 return (*dev->dev_ops->queue_stats_mapping_set)
1779 (dev, queue_id, stat_idx, is_rx);
1784 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1787 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1793 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1796 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1801 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1803 struct rte_eth_dev *dev;
1805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1806 dev = &rte_eth_devices[port_id];
1808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1809 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1813 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1815 struct rte_eth_dev *dev;
1816 const struct rte_eth_desc_lim lim = {
1817 .nb_max = UINT16_MAX,
1822 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1823 dev = &rte_eth_devices[port_id];
1825 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1826 dev_info->rx_desc_lim = lim;
1827 dev_info->tx_desc_lim = lim;
1829 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1830 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1831 dev_info->driver_name = dev->data->drv_name;
1832 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1833 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1837 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1838 uint32_t *ptypes, int num)
1841 struct rte_eth_dev *dev;
1842 const uint32_t *all_ptypes;
1844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1845 dev = &rte_eth_devices[port_id];
1846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1847 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1852 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1853 if (all_ptypes[i] & ptype_mask) {
1855 ptypes[j] = all_ptypes[i];
1863 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1865 struct rte_eth_dev *dev;
1867 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1868 dev = &rte_eth_devices[port_id];
1869 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1874 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1876 struct rte_eth_dev *dev;
1878 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1880 dev = &rte_eth_devices[port_id];
1881 *mtu = dev->data->mtu;
1886 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1889 struct rte_eth_dev *dev;
1891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1892 dev = &rte_eth_devices[port_id];
1893 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1895 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1897 dev->data->mtu = mtu;
1903 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1905 struct rte_eth_dev *dev;
1907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1908 dev = &rte_eth_devices[port_id];
1909 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1910 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1914 if (vlan_id > 4095) {
1915 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1916 port_id, (unsigned) vlan_id);
1919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1921 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1925 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1927 struct rte_eth_dev *dev;
1929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1930 dev = &rte_eth_devices[port_id];
1931 if (rx_queue_id >= dev->data->nb_rx_queues) {
1932 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1937 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1943 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1944 enum rte_vlan_type vlan_type,
1947 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1950 dev = &rte_eth_devices[port_id];
1951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1953 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1957 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1959 struct rte_eth_dev *dev;
1964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1965 dev = &rte_eth_devices[port_id];
1967 /*check which option changed by application*/
1968 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1969 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1971 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1972 mask |= ETH_VLAN_STRIP_MASK;
1975 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1976 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1978 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1979 mask |= ETH_VLAN_FILTER_MASK;
1982 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1983 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1985 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1986 mask |= ETH_VLAN_EXTEND_MASK;
1993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1994 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2000 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2002 struct rte_eth_dev *dev;
2005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2006 dev = &rte_eth_devices[port_id];
2008 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
2009 ret |= ETH_VLAN_STRIP_OFFLOAD;
2011 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
2012 ret |= ETH_VLAN_FILTER_OFFLOAD;
2014 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
2015 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2021 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2023 struct rte_eth_dev *dev;
2025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2026 dev = &rte_eth_devices[port_id];
2027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2028 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2034 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2036 struct rte_eth_dev *dev;
2038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2039 dev = &rte_eth_devices[port_id];
2040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2041 memset(fc_conf, 0, sizeof(*fc_conf));
2042 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2046 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2048 struct rte_eth_dev *dev;
2050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2052 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2056 dev = &rte_eth_devices[port_id];
2057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2058 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2062 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2064 struct rte_eth_dev *dev;
2066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2067 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2068 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2072 dev = &rte_eth_devices[port_id];
2073 /* High water, low water validation are device specific */
2074 if (*dev->dev_ops->priority_flow_ctrl_set)
2075 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2080 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2088 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2089 for (i = 0; i < num; i++) {
2090 if (reta_conf[i].mask)
2098 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2102 uint16_t i, idx, shift;
2108 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2112 for (i = 0; i < reta_size; i++) {
2113 idx = i / RTE_RETA_GROUP_SIZE;
2114 shift = i % RTE_RETA_GROUP_SIZE;
2115 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2116 (reta_conf[idx].reta[shift] >= max_rxq)) {
2117 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2118 "the maximum rxq index: %u\n", idx, shift,
2119 reta_conf[idx].reta[shift], max_rxq);
2128 rte_eth_dev_rss_reta_update(uint8_t port_id,
2129 struct rte_eth_rss_reta_entry64 *reta_conf,
2132 struct rte_eth_dev *dev;
2135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2136 /* Check mask bits */
2137 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2141 dev = &rte_eth_devices[port_id];
2143 /* Check entry value */
2144 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2145 dev->data->nb_rx_queues);
2149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2150 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2154 rte_eth_dev_rss_reta_query(uint8_t port_id,
2155 struct rte_eth_rss_reta_entry64 *reta_conf,
2158 struct rte_eth_dev *dev;
2161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2163 /* Check mask bits */
2164 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2168 dev = &rte_eth_devices[port_id];
2169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2170 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2174 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2176 struct rte_eth_dev *dev;
2177 uint16_t rss_hash_protos;
2179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2180 rss_hash_protos = rss_conf->rss_hf;
2181 if ((rss_hash_protos != 0) &&
2182 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2183 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2187 dev = &rte_eth_devices[port_id];
2188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2189 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2193 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2194 struct rte_eth_rss_conf *rss_conf)
2196 struct rte_eth_dev *dev;
2198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2199 dev = &rte_eth_devices[port_id];
2200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2201 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2205 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2206 struct rte_eth_udp_tunnel *udp_tunnel)
2208 struct rte_eth_dev *dev;
2210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2211 if (udp_tunnel == NULL) {
2212 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2216 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2217 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2221 dev = &rte_eth_devices[port_id];
2222 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2223 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2227 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2228 struct rte_eth_udp_tunnel *udp_tunnel)
2230 struct rte_eth_dev *dev;
2232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2233 dev = &rte_eth_devices[port_id];
2235 if (udp_tunnel == NULL) {
2236 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2240 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2241 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2246 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2250 rte_eth_led_on(uint8_t port_id)
2252 struct rte_eth_dev *dev;
2254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2255 dev = &rte_eth_devices[port_id];
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2257 return (*dev->dev_ops->dev_led_on)(dev);
2261 rte_eth_led_off(uint8_t port_id)
2263 struct rte_eth_dev *dev;
2265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2266 dev = &rte_eth_devices[port_id];
2267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2268 return (*dev->dev_ops->dev_led_off)(dev);
2272 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2276 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2278 struct rte_eth_dev_info dev_info;
2279 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2282 rte_eth_dev_info_get(port_id, &dev_info);
2284 for (i = 0; i < dev_info.max_mac_addrs; i++)
2285 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2291 static const struct ether_addr null_mac_addr;
2294 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2297 struct rte_eth_dev *dev;
2301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2305 if (is_zero_ether_addr(addr)) {
2306 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2310 if (pool >= ETH_64_POOLS) {
2311 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2315 index = get_mac_addr_index(port_id, addr);
2317 index = get_mac_addr_index(port_id, &null_mac_addr);
2319 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2324 pool_mask = dev->data->mac_pool_sel[index];
2326 /* Check if both MAC address and pool is already there, and do nothing */
2327 if (pool_mask & (1ULL << pool))
2332 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2334 /* Update address in NIC data structure */
2335 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2337 /* Update pool bitmap in NIC data structure */
2338 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2344 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2346 struct rte_eth_dev *dev;
2349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2350 dev = &rte_eth_devices[port_id];
2351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2353 index = get_mac_addr_index(port_id, addr);
2355 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2357 } else if (index < 0)
2358 return 0; /* Do nothing if address wasn't found */
2361 (*dev->dev_ops->mac_addr_remove)(dev, index);
2363 /* Update address in NIC data structure */
2364 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2366 /* reset pool bitmap */
2367 dev->data->mac_pool_sel[index] = 0;
2373 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2375 struct rte_eth_dev *dev;
2377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2379 if (!is_valid_assigned_ether_addr(addr))
2382 dev = &rte_eth_devices[port_id];
2383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2385 /* Update default address in NIC data structure */
2386 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2388 (*dev->dev_ops->mac_addr_set)(dev, addr);
2395 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2399 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2401 struct rte_eth_dev_info dev_info;
2402 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2405 rte_eth_dev_info_get(port_id, &dev_info);
2406 if (!dev->data->hash_mac_addrs)
2409 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2410 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2411 ETHER_ADDR_LEN) == 0)
2418 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2423 struct rte_eth_dev *dev;
2425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 dev = &rte_eth_devices[port_id];
2428 if (is_zero_ether_addr(addr)) {
2429 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2434 index = get_hash_mac_addr_index(port_id, addr);
2435 /* Check if it's already there, and do nothing */
2436 if ((index >= 0) && (on))
2441 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2442 "set in UTA\n", port_id);
2446 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2448 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2455 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2457 /* Update address in NIC data structure */
2459 ether_addr_copy(addr,
2460 &dev->data->hash_mac_addrs[index]);
2462 ether_addr_copy(&null_mac_addr,
2463 &dev->data->hash_mac_addrs[index]);
2470 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2472 struct rte_eth_dev *dev;
2474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2476 dev = &rte_eth_devices[port_id];
2478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2479 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2482 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2485 struct rte_eth_dev *dev;
2486 struct rte_eth_dev_info dev_info;
2487 struct rte_eth_link link;
2489 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2491 dev = &rte_eth_devices[port_id];
2492 rte_eth_dev_info_get(port_id, &dev_info);
2493 link = dev->data->dev_link;
2495 if (queue_idx > dev_info.max_tx_queues) {
2496 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2497 "invalid queue id=%d\n", port_id, queue_idx);
2501 if (tx_rate > link.link_speed) {
2502 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2503 "bigger than link speed= %d\n",
2504 tx_rate, link.link_speed);
2508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2509 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2513 rte_eth_mirror_rule_set(uint8_t port_id,
2514 struct rte_eth_mirror_conf *mirror_conf,
2515 uint8_t rule_id, uint8_t on)
2517 struct rte_eth_dev *dev;
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2520 if (mirror_conf->rule_type == 0) {
2521 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2525 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2526 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2531 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2532 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2533 (mirror_conf->pool_mask == 0)) {
2534 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2538 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2539 mirror_conf->vlan.vlan_mask == 0) {
2540 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2544 dev = &rte_eth_devices[port_id];
2545 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2547 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2551 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2553 struct rte_eth_dev *dev;
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2557 dev = &rte_eth_devices[port_id];
2558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2560 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2564 rte_eth_dev_callback_register(uint8_t port_id,
2565 enum rte_eth_event_type event,
2566 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2568 struct rte_eth_dev *dev;
2569 struct rte_eth_dev_callback *user_cb;
2574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2576 dev = &rte_eth_devices[port_id];
2577 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2579 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2580 if (user_cb->cb_fn == cb_fn &&
2581 user_cb->cb_arg == cb_arg &&
2582 user_cb->event == event) {
2587 /* create a new callback. */
2588 if (user_cb == NULL) {
2589 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2590 sizeof(struct rte_eth_dev_callback), 0);
2591 if (user_cb != NULL) {
2592 user_cb->cb_fn = cb_fn;
2593 user_cb->cb_arg = cb_arg;
2594 user_cb->event = event;
2595 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2599 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2600 return (user_cb == NULL) ? -ENOMEM : 0;
2604 rte_eth_dev_callback_unregister(uint8_t port_id,
2605 enum rte_eth_event_type event,
2606 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2609 struct rte_eth_dev *dev;
2610 struct rte_eth_dev_callback *cb, *next;
2615 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2617 dev = &rte_eth_devices[port_id];
2618 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2621 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2623 next = TAILQ_NEXT(cb, next);
2625 if (cb->cb_fn != cb_fn || cb->event != event ||
2626 (cb->cb_arg != (void *)-1 &&
2627 cb->cb_arg != cb_arg))
2631 * if this callback is not executing right now,
2634 if (cb->active == 0) {
2635 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2642 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2647 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2648 enum rte_eth_event_type event, void *cb_arg)
2650 struct rte_eth_dev_callback *cb_lst;
2651 struct rte_eth_dev_callback dev_cb;
2653 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2654 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2655 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2660 dev_cb.cb_arg = cb_arg;
2662 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2663 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2665 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2668 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2672 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2675 struct rte_eth_dev *dev;
2676 struct rte_intr_handle *intr_handle;
2680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2682 dev = &rte_eth_devices[port_id];
2684 if (!dev->intr_handle) {
2685 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2689 intr_handle = dev->intr_handle;
2690 if (!intr_handle->intr_vec) {
2691 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2695 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2696 vec = intr_handle->intr_vec[qid];
2697 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2698 if (rc && rc != -EEXIST) {
2699 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2700 " op %d epfd %d vec %u\n",
2701 port_id, qid, op, epfd, vec);
2708 const struct rte_memzone *
2709 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2710 uint16_t queue_id, size_t size, unsigned align,
2713 char z_name[RTE_MEMZONE_NAMESIZE];
2714 const struct rte_memzone *mz;
2716 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2717 dev->data->drv_name, ring_name,
2718 dev->data->port_id, queue_id);
2720 mz = rte_memzone_lookup(z_name);
2724 if (rte_xen_dom0_supported())
2725 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2726 0, align, RTE_PGSIZE_2M);
2728 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2733 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2734 int epfd, int op, void *data)
2737 struct rte_eth_dev *dev;
2738 struct rte_intr_handle *intr_handle;
2741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2743 dev = &rte_eth_devices[port_id];
2744 if (queue_id >= dev->data->nb_rx_queues) {
2745 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2749 if (!dev->intr_handle) {
2750 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2754 intr_handle = dev->intr_handle;
2755 if (!intr_handle->intr_vec) {
2756 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2760 vec = intr_handle->intr_vec[queue_id];
2761 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2762 if (rc && rc != -EEXIST) {
2763 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2764 " op %d epfd %d vec %u\n",
2765 port_id, queue_id, op, epfd, vec);
2773 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2776 struct rte_eth_dev *dev;
2778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2783 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2787 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2797 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2800 #ifdef RTE_NIC_BYPASS
2801 int rte_eth_dev_bypass_init(uint8_t port_id)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2807 dev = &rte_eth_devices[port_id];
2808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2809 (*dev->dev_ops->bypass_init)(dev);
2814 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2820 dev = &rte_eth_devices[port_id];
2821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2822 (*dev->dev_ops->bypass_state_show)(dev, state);
2827 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 dev = &rte_eth_devices[port_id];
2834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2835 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2840 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2846 dev = &rte_eth_devices[port_id];
2847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2848 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2853 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2855 struct rte_eth_dev *dev;
2857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2859 dev = &rte_eth_devices[port_id];
2861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2862 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2867 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2869 struct rte_eth_dev *dev;
2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 dev = &rte_eth_devices[port_id];
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2876 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2881 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2883 struct rte_eth_dev *dev;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2887 dev = &rte_eth_devices[port_id];
2889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2890 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2895 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2897 struct rte_eth_dev *dev;
2899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901 dev = &rte_eth_devices[port_id];
2903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2904 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2909 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2911 struct rte_eth_dev *dev;
2913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2915 dev = &rte_eth_devices[port_id];
2917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2918 (*dev->dev_ops->bypass_wd_reset)(dev);
2924 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2926 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2930 dev = &rte_eth_devices[port_id];
2931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2932 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2933 RTE_ETH_FILTER_NOP, NULL);
2937 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2938 enum rte_filter_op filter_op, void *arg)
2940 struct rte_eth_dev *dev;
2942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2946 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2950 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2951 rte_rx_callback_fn fn, void *user_param)
2953 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2954 rte_errno = ENOTSUP;
2957 /* check input parameters */
2958 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2959 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2963 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2971 cb->param = user_param;
2973 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2974 /* Add the callbacks in fifo order. */
2975 struct rte_eth_rxtx_callback *tail =
2976 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2979 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2986 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2992 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2993 rte_rx_callback_fn fn, void *user_param)
2995 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2996 rte_errno = ENOTSUP;
2999 /* check input parameters */
3000 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3001 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3006 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3014 cb->param = user_param;
3016 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3017 /* Add the callbacks at fisrt position*/
3018 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3020 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3021 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3027 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3028 rte_tx_callback_fn fn, void *user_param)
3030 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3031 rte_errno = ENOTSUP;
3034 /* check input parameters */
3035 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3036 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3041 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3049 cb->param = user_param;
3051 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3052 /* Add the callbacks in fifo order. */
3053 struct rte_eth_rxtx_callback *tail =
3054 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3057 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3064 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3070 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3071 struct rte_eth_rxtx_callback *user_cb)
3073 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3076 /* Check input parameters. */
3077 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3078 if (user_cb == NULL ||
3079 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3082 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3083 struct rte_eth_rxtx_callback *cb;
3084 struct rte_eth_rxtx_callback **prev_cb;
3087 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3088 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3089 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3091 if (cb == user_cb) {
3092 /* Remove the user cb from the callback list. */
3093 *prev_cb = cb->next;
3098 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3104 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3105 struct rte_eth_rxtx_callback *user_cb)
3107 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3110 /* Check input parameters. */
3111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3112 if (user_cb == NULL ||
3113 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3116 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3118 struct rte_eth_rxtx_callback *cb;
3119 struct rte_eth_rxtx_callback **prev_cb;
3121 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3122 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3123 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3125 if (cb == user_cb) {
3126 /* Remove the user cb from the callback list. */
3127 *prev_cb = cb->next;
3132 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3138 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3139 struct rte_eth_rxq_info *qinfo)
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3148 dev = &rte_eth_devices[port_id];
3149 if (queue_id >= dev->data->nb_rx_queues) {
3150 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3156 memset(qinfo, 0, sizeof(*qinfo));
3157 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3162 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3163 struct rte_eth_txq_info *qinfo)
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3172 dev = &rte_eth_devices[port_id];
3173 if (queue_id >= dev->data->nb_tx_queues) {
3174 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3180 memset(qinfo, 0, sizeof(*qinfo));
3181 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3186 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3187 struct ether_addr *mc_addr_set,
3188 uint32_t nb_mc_addr)
3190 struct rte_eth_dev *dev;
3192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3194 dev = &rte_eth_devices[port_id];
3195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3196 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3200 rte_eth_timesync_enable(uint8_t port_id)
3202 struct rte_eth_dev *dev;
3204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3205 dev = &rte_eth_devices[port_id];
3207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3208 return (*dev->dev_ops->timesync_enable)(dev);
3212 rte_eth_timesync_disable(uint8_t port_id)
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3217 dev = &rte_eth_devices[port_id];
3219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3220 return (*dev->dev_ops->timesync_disable)(dev);
3224 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3227 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3232 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3233 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3237 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3239 struct rte_eth_dev *dev;
3241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3242 dev = &rte_eth_devices[port_id];
3244 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3245 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3249 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3251 struct rte_eth_dev *dev;
3253 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3254 dev = &rte_eth_devices[port_id];
3256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3257 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3261 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3263 struct rte_eth_dev *dev;
3265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3266 dev = &rte_eth_devices[port_id];
3268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3269 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3273 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3275 struct rte_eth_dev *dev;
3277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 dev = &rte_eth_devices[port_id];
3280 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3281 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3285 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3287 struct rte_eth_dev *dev;
3289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3291 dev = &rte_eth_devices[port_id];
3292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3293 return (*dev->dev_ops->get_reg)(dev, info);
3297 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3299 struct rte_eth_dev *dev;
3301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 dev = &rte_eth_devices[port_id];
3304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3305 return (*dev->dev_ops->get_eeprom_length)(dev);
3309 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3311 struct rte_eth_dev *dev;
3313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3315 dev = &rte_eth_devices[port_id];
3316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3317 return (*dev->dev_ops->get_eeprom)(dev, info);
3321 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3327 dev = &rte_eth_devices[port_id];
3328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3329 return (*dev->dev_ops->set_eeprom)(dev, info);
3333 rte_eth_dev_get_dcb_info(uint8_t port_id,
3334 struct rte_eth_dcb_info *dcb_info)
3336 struct rte_eth_dev *dev;
3338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3340 dev = &rte_eth_devices[port_id];
3341 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3344 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3348 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3349 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3351 struct rte_eth_dev *dev;
3353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3354 if (l2_tunnel == NULL) {
3355 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3359 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3360 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3364 dev = &rte_eth_devices[port_id];
3365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3367 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3371 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3372 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3376 struct rte_eth_dev *dev;
3378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3380 if (l2_tunnel == NULL) {
3381 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3385 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3386 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3391 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3395 dev = &rte_eth_devices[port_id];
3396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3398 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);