4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
70 #include "ethdev_profile.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t eth_dev_last_created_port;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
183 strcmp(rte_eth_devices[i].data->name, name) == 0)
184 return &rte_eth_devices[i];
190 rte_eth_dev_find_free_port(void)
194 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
195 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
198 return RTE_MAX_ETHPORTS;
201 static struct rte_eth_dev *
202 eth_dev_get(uint16_t port_id)
204 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
206 eth_dev->data = &rte_eth_dev_data[port_id];
207 eth_dev->state = RTE_ETH_DEV_ATTACHED;
208 TAILQ_INIT(&(eth_dev->link_intr_cbs));
210 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
287 rte_eth_dev_is_valid_port(uint16_t port_id)
289 if (port_id >= RTE_MAX_ETHPORTS ||
290 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
298 rte_eth_dev_socket_id(uint16_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_count(void)
312 RTE_ETH_FOREACH_DEV(p)
319 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
326 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
330 /* shouldn't check 'rte_eth_devices[i].data',
331 * because it might be overwritten by VDEV PMD */
332 tmp = rte_eth_dev_data[port_id].name;
338 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
343 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
347 RTE_ETH_FOREACH_DEV(i) {
349 rte_eth_dev_data[i].name, strlen(name))) {
360 rte_eth_dev_is_detachable(uint16_t port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
366 dev_flags = rte_eth_devices[port_id].data->dev_flags;
367 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
368 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
374 /* attach the new device, then store port_id of the device */
376 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
379 int current = rte_eth_dev_count();
383 if ((devargs == NULL) || (port_id == NULL)) {
388 /* parse devargs, then retrieve device name and args */
389 if (rte_eal_parse_devargs_str(devargs, &name, &args))
392 ret = rte_eal_dev_attach(name, args);
396 /* no point looking at the port count if no port exists */
397 if (!rte_eth_dev_count()) {
398 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
403 /* if nothing happened, there is a bug here, since some driver told us
404 * it did attach a device, but did not create a port.
406 if (current == rte_eth_dev_count()) {
411 *port_id = eth_dev_last_created_port;
420 /* detach the device, then store the name of the device */
422 rte_eth_dev_detach(uint16_t port_id, char *name)
431 /* FIXME: move this to eal, once device flags are relocated there */
432 if (rte_eth_dev_is_detachable(port_id))
435 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
436 "%s", rte_eth_devices[port_id].data->name);
438 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
442 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
450 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
452 uint16_t old_nb_queues = dev->data->nb_rx_queues;
456 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
457 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
458 sizeof(dev->data->rx_queues[0]) * nb_queues,
459 RTE_CACHE_LINE_SIZE);
460 if (dev->data->rx_queues == NULL) {
461 dev->data->nb_rx_queues = 0;
464 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
467 rxq = dev->data->rx_queues;
469 for (i = nb_queues; i < old_nb_queues; i++)
470 (*dev->dev_ops->rx_queue_release)(rxq[i]);
471 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
472 RTE_CACHE_LINE_SIZE);
475 if (nb_queues > old_nb_queues) {
476 uint16_t new_qs = nb_queues - old_nb_queues;
478 memset(rxq + old_nb_queues, 0,
479 sizeof(rxq[0]) * new_qs);
482 dev->data->rx_queues = rxq;
484 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
487 rxq = dev->data->rx_queues;
489 for (i = nb_queues; i < old_nb_queues; i++)
490 (*dev->dev_ops->rx_queue_release)(rxq[i]);
492 rte_free(dev->data->rx_queues);
493 dev->data->rx_queues = NULL;
495 dev->data->nb_rx_queues = nb_queues;
500 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
502 struct rte_eth_dev *dev;
504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
506 dev = &rte_eth_devices[port_id];
507 if (rx_queue_id >= dev->data->nb_rx_queues) {
508 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
514 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
515 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
516 " already started\n",
517 rx_queue_id, port_id);
521 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
526 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
528 struct rte_eth_dev *dev;
530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
532 dev = &rte_eth_devices[port_id];
533 if (rx_queue_id >= dev->data->nb_rx_queues) {
534 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
540 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
541 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
542 " already stopped\n",
543 rx_queue_id, port_id);
547 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
552 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
554 struct rte_eth_dev *dev;
556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
558 dev = &rte_eth_devices[port_id];
559 if (tx_queue_id >= dev->data->nb_tx_queues) {
560 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
566 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
567 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
568 " already started\n",
569 tx_queue_id, port_id);
573 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
578 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
580 struct rte_eth_dev *dev;
582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
584 dev = &rte_eth_devices[port_id];
585 if (tx_queue_id >= dev->data->nb_tx_queues) {
586 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
592 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
593 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
594 " already stopped\n",
595 tx_queue_id, port_id);
599 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
604 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
606 uint16_t old_nb_queues = dev->data->nb_tx_queues;
610 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
611 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
612 sizeof(dev->data->tx_queues[0]) * nb_queues,
613 RTE_CACHE_LINE_SIZE);
614 if (dev->data->tx_queues == NULL) {
615 dev->data->nb_tx_queues = 0;
618 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
621 txq = dev->data->tx_queues;
623 for (i = nb_queues; i < old_nb_queues; i++)
624 (*dev->dev_ops->tx_queue_release)(txq[i]);
625 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
626 RTE_CACHE_LINE_SIZE);
629 if (nb_queues > old_nb_queues) {
630 uint16_t new_qs = nb_queues - old_nb_queues;
632 memset(txq + old_nb_queues, 0,
633 sizeof(txq[0]) * new_qs);
636 dev->data->tx_queues = txq;
638 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
639 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
641 txq = dev->data->tx_queues;
643 for (i = nb_queues; i < old_nb_queues; i++)
644 (*dev->dev_ops->tx_queue_release)(txq[i]);
646 rte_free(dev->data->tx_queues);
647 dev->data->tx_queues = NULL;
649 dev->data->nb_tx_queues = nb_queues;
654 rte_eth_speed_bitflag(uint32_t speed, int duplex)
657 case ETH_SPEED_NUM_10M:
658 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
659 case ETH_SPEED_NUM_100M:
660 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
661 case ETH_SPEED_NUM_1G:
662 return ETH_LINK_SPEED_1G;
663 case ETH_SPEED_NUM_2_5G:
664 return ETH_LINK_SPEED_2_5G;
665 case ETH_SPEED_NUM_5G:
666 return ETH_LINK_SPEED_5G;
667 case ETH_SPEED_NUM_10G:
668 return ETH_LINK_SPEED_10G;
669 case ETH_SPEED_NUM_20G:
670 return ETH_LINK_SPEED_20G;
671 case ETH_SPEED_NUM_25G:
672 return ETH_LINK_SPEED_25G;
673 case ETH_SPEED_NUM_40G:
674 return ETH_LINK_SPEED_40G;
675 case ETH_SPEED_NUM_50G:
676 return ETH_LINK_SPEED_50G;
677 case ETH_SPEED_NUM_56G:
678 return ETH_LINK_SPEED_56G;
679 case ETH_SPEED_NUM_100G:
680 return ETH_LINK_SPEED_100G;
687 * A conversion function from rxmode bitfield API.
690 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
691 uint64_t *rx_offloads)
693 uint64_t offloads = 0;
695 if (rxmode->header_split == 1)
696 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
697 if (rxmode->hw_ip_checksum == 1)
698 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
699 if (rxmode->hw_vlan_filter == 1)
700 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
701 if (rxmode->hw_vlan_strip == 1)
702 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
703 if (rxmode->hw_vlan_extend == 1)
704 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
705 if (rxmode->jumbo_frame == 1)
706 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
707 if (rxmode->hw_strip_crc == 1)
708 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
709 if (rxmode->enable_scatter == 1)
710 offloads |= DEV_RX_OFFLOAD_SCATTER;
711 if (rxmode->enable_lro == 1)
712 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
713 if (rxmode->hw_timestamp == 1)
714 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
716 *rx_offloads = offloads;
720 * A conversion function from rxmode offloads API.
723 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
724 struct rte_eth_rxmode *rxmode)
727 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
728 rxmode->header_split = 1;
730 rxmode->header_split = 0;
731 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
732 rxmode->hw_ip_checksum = 1;
734 rxmode->hw_ip_checksum = 0;
735 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
736 rxmode->hw_vlan_filter = 1;
738 rxmode->hw_vlan_filter = 0;
739 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
740 rxmode->hw_vlan_strip = 1;
742 rxmode->hw_vlan_strip = 0;
743 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
744 rxmode->hw_vlan_extend = 1;
746 rxmode->hw_vlan_extend = 0;
747 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
748 rxmode->jumbo_frame = 1;
750 rxmode->jumbo_frame = 0;
751 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
752 rxmode->hw_strip_crc = 1;
754 rxmode->hw_strip_crc = 0;
755 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
756 rxmode->enable_scatter = 1;
758 rxmode->enable_scatter = 0;
759 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
760 rxmode->enable_lro = 1;
762 rxmode->enable_lro = 0;
763 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
764 rxmode->hw_timestamp = 1;
766 rxmode->hw_timestamp = 0;
770 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
771 const struct rte_eth_conf *dev_conf)
773 struct rte_eth_dev *dev;
774 struct rte_eth_dev_info dev_info;
775 struct rte_eth_conf local_conf = *dev_conf;
778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
780 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
782 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
783 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
787 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
789 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
790 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
794 dev = &rte_eth_devices[port_id];
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
799 if (dev->data->dev_started) {
801 "port %d must be stopped to allow configuration\n", port_id);
806 * Convert between the offloads API to enable PMDs to support
809 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
810 rte_eth_convert_rx_offload_bitfield(
811 &dev_conf->rxmode, &local_conf.rxmode.offloads);
813 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
817 /* Copy the dev_conf parameter into the dev structure */
818 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
821 * Check that the numbers of RX and TX queues are not greater
822 * than the maximum number of RX and TX queues supported by the
825 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
827 if (nb_rx_q == 0 && nb_tx_q == 0) {
828 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
832 if (nb_rx_q > dev_info.max_rx_queues) {
833 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
834 port_id, nb_rx_q, dev_info.max_rx_queues);
838 if (nb_tx_q > dev_info.max_tx_queues) {
839 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
840 port_id, nb_tx_q, dev_info.max_tx_queues);
844 /* Check that the device supports requested interrupts */
845 if ((dev_conf->intr_conf.lsc == 1) &&
846 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
847 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
848 dev->device->driver->name);
851 if ((dev_conf->intr_conf.rmv == 1) &&
852 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
853 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
854 dev->device->driver->name);
859 * If jumbo frames are enabled, check that the maximum RX packet
860 * length is supported by the configured device.
862 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
863 if (dev_conf->rxmode.max_rx_pkt_len >
864 dev_info.max_rx_pktlen) {
865 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
866 " > max valid value %u\n",
868 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
869 (unsigned)dev_info.max_rx_pktlen);
871 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
872 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
873 " < min valid value %u\n",
875 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
876 (unsigned)ETHER_MIN_LEN);
880 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
881 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
882 /* Use default value */
883 dev->data->dev_conf.rxmode.max_rx_pkt_len =
888 * Setup new number of RX/TX queues and reconfigure device.
890 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
892 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
897 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
899 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
901 rte_eth_dev_rx_queue_config(dev, 0);
905 diag = (*dev->dev_ops->dev_configure)(dev);
907 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
909 rte_eth_dev_rx_queue_config(dev, 0);
910 rte_eth_dev_tx_queue_config(dev, 0);
914 /* Initialize Rx profiling if enabled at compilation time. */
915 diag = __rte_eth_profile_rx_init(port_id, dev);
917 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
919 rte_eth_dev_rx_queue_config(dev, 0);
920 rte_eth_dev_tx_queue_config(dev, 0);
928 _rte_eth_dev_reset(struct rte_eth_dev *dev)
930 if (dev->data->dev_started) {
932 "port %d must be stopped to allow reset\n",
937 rte_eth_dev_rx_queue_config(dev, 0);
938 rte_eth_dev_tx_queue_config(dev, 0);
940 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
944 rte_eth_dev_config_restore(uint16_t port_id)
946 struct rte_eth_dev *dev;
947 struct rte_eth_dev_info dev_info;
948 struct ether_addr *addr;
953 dev = &rte_eth_devices[port_id];
955 rte_eth_dev_info_get(port_id, &dev_info);
957 /* replay MAC address configuration including default MAC */
958 addr = &dev->data->mac_addrs[0];
959 if (*dev->dev_ops->mac_addr_set != NULL)
960 (*dev->dev_ops->mac_addr_set)(dev, addr);
961 else if (*dev->dev_ops->mac_addr_add != NULL)
962 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
964 if (*dev->dev_ops->mac_addr_add != NULL) {
965 for (i = 1; i < dev_info.max_mac_addrs; i++) {
966 addr = &dev->data->mac_addrs[i];
968 /* skip zero address */
969 if (is_zero_ether_addr(addr))
973 pool_mask = dev->data->mac_pool_sel[i];
976 if (pool_mask & 1ULL)
977 (*dev->dev_ops->mac_addr_add)(dev,
985 /* replay promiscuous configuration */
986 if (rte_eth_promiscuous_get(port_id) == 1)
987 rte_eth_promiscuous_enable(port_id);
988 else if (rte_eth_promiscuous_get(port_id) == 0)
989 rte_eth_promiscuous_disable(port_id);
991 /* replay all multicast configuration */
992 if (rte_eth_allmulticast_get(port_id) == 1)
993 rte_eth_allmulticast_enable(port_id);
994 else if (rte_eth_allmulticast_get(port_id) == 0)
995 rte_eth_allmulticast_disable(port_id);
999 rte_eth_dev_start(uint16_t port_id)
1001 struct rte_eth_dev *dev;
1004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1006 dev = &rte_eth_devices[port_id];
1008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1010 if (dev->data->dev_started != 0) {
1011 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1012 " already started\n",
1017 diag = (*dev->dev_ops->dev_start)(dev);
1019 dev->data->dev_started = 1;
1023 rte_eth_dev_config_restore(port_id);
1025 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1027 (*dev->dev_ops->link_update)(dev, 0);
1033 rte_eth_dev_stop(uint16_t port_id)
1035 struct rte_eth_dev *dev;
1037 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1038 dev = &rte_eth_devices[port_id];
1040 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1042 if (dev->data->dev_started == 0) {
1043 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1044 " already stopped\n",
1049 dev->data->dev_started = 0;
1050 (*dev->dev_ops->dev_stop)(dev);
1054 rte_eth_dev_set_link_up(uint16_t port_id)
1056 struct rte_eth_dev *dev;
1058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1060 dev = &rte_eth_devices[port_id];
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1063 return (*dev->dev_ops->dev_set_link_up)(dev);
1067 rte_eth_dev_set_link_down(uint16_t port_id)
1069 struct rte_eth_dev *dev;
1071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1073 dev = &rte_eth_devices[port_id];
1075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1076 return (*dev->dev_ops->dev_set_link_down)(dev);
1080 rte_eth_dev_close(uint16_t port_id)
1082 struct rte_eth_dev *dev;
1084 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1085 dev = &rte_eth_devices[port_id];
1087 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1088 dev->data->dev_started = 0;
1089 (*dev->dev_ops->dev_close)(dev);
1091 dev->data->nb_rx_queues = 0;
1092 rte_free(dev->data->rx_queues);
1093 dev->data->rx_queues = NULL;
1094 dev->data->nb_tx_queues = 0;
1095 rte_free(dev->data->tx_queues);
1096 dev->data->tx_queues = NULL;
1100 rte_eth_dev_reset(uint16_t port_id)
1102 struct rte_eth_dev *dev;
1105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1106 dev = &rte_eth_devices[port_id];
1108 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1110 rte_eth_dev_stop(port_id);
1111 ret = dev->dev_ops->dev_reset(dev);
1117 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1118 uint16_t nb_rx_desc, unsigned int socket_id,
1119 const struct rte_eth_rxconf *rx_conf,
1120 struct rte_mempool *mp)
1123 uint32_t mbp_buf_size;
1124 struct rte_eth_dev *dev;
1125 struct rte_eth_dev_info dev_info;
1126 struct rte_eth_rxconf local_conf;
1129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1131 dev = &rte_eth_devices[port_id];
1132 if (rx_queue_id >= dev->data->nb_rx_queues) {
1133 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1137 if (dev->data->dev_started) {
1138 RTE_PMD_DEBUG_TRACE(
1139 "port %d must be stopped to allow configuration\n", port_id);
1143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1147 * Check the size of the mbuf data buffer.
1148 * This value must be provided in the private data of the memory pool.
1149 * First check that the memory pool has a valid private data.
1151 rte_eth_dev_info_get(port_id, &dev_info);
1152 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1153 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1154 mp->name, (int) mp->private_data_size,
1155 (int) sizeof(struct rte_pktmbuf_pool_private));
1158 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1160 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1161 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1162 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1166 (int)(RTE_PKTMBUF_HEADROOM +
1167 dev_info.min_rx_bufsize),
1168 (int)RTE_PKTMBUF_HEADROOM,
1169 (int)dev_info.min_rx_bufsize);
1173 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1174 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1175 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1177 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1178 "should be: <= %hu, = %hu, and a product of %hu\n",
1180 dev_info.rx_desc_lim.nb_max,
1181 dev_info.rx_desc_lim.nb_min,
1182 dev_info.rx_desc_lim.nb_align);
1186 rxq = dev->data->rx_queues;
1187 if (rxq[rx_queue_id]) {
1188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1190 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1191 rxq[rx_queue_id] = NULL;
1194 if (rx_conf == NULL)
1195 rx_conf = &dev_info.default_rxconf;
1197 local_conf = *rx_conf;
1198 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1200 * Reflect port offloads to queue offloads in order for
1201 * offloads to not be discarded.
1203 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1204 &local_conf.offloads);
1207 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1208 socket_id, &local_conf, mp);
1210 if (!dev->data->min_rx_buf_size ||
1211 dev->data->min_rx_buf_size > mbp_buf_size)
1212 dev->data->min_rx_buf_size = mbp_buf_size;
1219 * A conversion function from txq_flags API.
1222 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1224 uint64_t offloads = 0;
1226 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1227 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1228 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1229 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1230 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1231 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1232 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1233 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1234 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1235 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1236 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1237 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1238 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1240 *tx_offloads = offloads;
1244 * A conversion function from offloads API.
1247 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1251 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1252 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1253 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1254 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1255 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1256 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1257 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1258 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1259 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1260 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1261 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1262 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1268 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1269 uint16_t nb_tx_desc, unsigned int socket_id,
1270 const struct rte_eth_txconf *tx_conf)
1272 struct rte_eth_dev *dev;
1273 struct rte_eth_dev_info dev_info;
1274 struct rte_eth_txconf local_conf;
1277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1279 dev = &rte_eth_devices[port_id];
1280 if (tx_queue_id >= dev->data->nb_tx_queues) {
1281 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1285 if (dev->data->dev_started) {
1286 RTE_PMD_DEBUG_TRACE(
1287 "port %d must be stopped to allow configuration\n", port_id);
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1294 rte_eth_dev_info_get(port_id, &dev_info);
1296 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1297 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1298 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1299 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1300 "should be: <= %hu, = %hu, and a product of %hu\n",
1302 dev_info.tx_desc_lim.nb_max,
1303 dev_info.tx_desc_lim.nb_min,
1304 dev_info.tx_desc_lim.nb_align);
1308 txq = dev->data->tx_queues;
1309 if (txq[tx_queue_id]) {
1310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1312 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1313 txq[tx_queue_id] = NULL;
1316 if (tx_conf == NULL)
1317 tx_conf = &dev_info.default_txconf;
1320 * Convert between the offloads API to enable PMDs to support
1323 local_conf = *tx_conf;
1324 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1325 rte_eth_convert_txq_offloads(tx_conf->offloads,
1326 &local_conf.txq_flags);
1327 /* Keep the ignore flag. */
1328 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1330 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1331 &local_conf.offloads);
1334 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1335 socket_id, &local_conf);
1339 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1340 void *userdata __rte_unused)
1344 for (i = 0; i < unsent; i++)
1345 rte_pktmbuf_free(pkts[i]);
1349 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1352 uint64_t *count = userdata;
1355 for (i = 0; i < unsent; i++)
1356 rte_pktmbuf_free(pkts[i]);
1362 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1363 buffer_tx_error_fn cbfn, void *userdata)
1365 buffer->error_callback = cbfn;
1366 buffer->error_userdata = userdata;
1371 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1378 buffer->size = size;
1379 if (buffer->error_callback == NULL) {
1380 ret = rte_eth_tx_buffer_set_err_callback(
1381 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1388 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1390 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1392 /* Validate Input Data. Bail if not valid or not supported. */
1393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1396 /* Call driver to free pending mbufs. */
1397 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1402 rte_eth_promiscuous_enable(uint16_t port_id)
1404 struct rte_eth_dev *dev;
1406 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1407 dev = &rte_eth_devices[port_id];
1409 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1410 (*dev->dev_ops->promiscuous_enable)(dev);
1411 dev->data->promiscuous = 1;
1415 rte_eth_promiscuous_disable(uint16_t port_id)
1417 struct rte_eth_dev *dev;
1419 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1420 dev = &rte_eth_devices[port_id];
1422 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1423 dev->data->promiscuous = 0;
1424 (*dev->dev_ops->promiscuous_disable)(dev);
1428 rte_eth_promiscuous_get(uint16_t port_id)
1430 struct rte_eth_dev *dev;
1432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1434 dev = &rte_eth_devices[port_id];
1435 return dev->data->promiscuous;
1439 rte_eth_allmulticast_enable(uint16_t port_id)
1441 struct rte_eth_dev *dev;
1443 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1444 dev = &rte_eth_devices[port_id];
1446 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1447 (*dev->dev_ops->allmulticast_enable)(dev);
1448 dev->data->all_multicast = 1;
1452 rte_eth_allmulticast_disable(uint16_t port_id)
1454 struct rte_eth_dev *dev;
1456 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1457 dev = &rte_eth_devices[port_id];
1459 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1460 dev->data->all_multicast = 0;
1461 (*dev->dev_ops->allmulticast_disable)(dev);
1465 rte_eth_allmulticast_get(uint16_t port_id)
1467 struct rte_eth_dev *dev;
1469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1471 dev = &rte_eth_devices[port_id];
1472 return dev->data->all_multicast;
1476 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1477 struct rte_eth_link *link)
1479 struct rte_eth_link *dst = link;
1480 struct rte_eth_link *src = &(dev->data->dev_link);
1482 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1483 *(uint64_t *)src) == 0)
1490 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1492 struct rte_eth_dev *dev;
1494 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1495 dev = &rte_eth_devices[port_id];
1497 if (dev->data->dev_conf.intr_conf.lsc != 0)
1498 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1501 (*dev->dev_ops->link_update)(dev, 1);
1502 *eth_link = dev->data->dev_link;
1507 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1509 struct rte_eth_dev *dev;
1511 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1512 dev = &rte_eth_devices[port_id];
1514 if (dev->data->dev_conf.intr_conf.lsc != 0)
1515 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1517 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1518 (*dev->dev_ops->link_update)(dev, 0);
1519 *eth_link = dev->data->dev_link;
1524 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1526 struct rte_eth_dev *dev;
1528 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1530 dev = &rte_eth_devices[port_id];
1531 memset(stats, 0, sizeof(*stats));
1533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1534 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1535 return (*dev->dev_ops->stats_get)(dev, stats);
1539 rte_eth_stats_reset(uint16_t port_id)
1541 struct rte_eth_dev *dev;
1543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1544 dev = &rte_eth_devices[port_id];
1546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1547 (*dev->dev_ops->stats_reset)(dev);
1548 dev->data->rx_mbuf_alloc_failed = 0;
1554 get_xstats_count(uint16_t port_id)
1556 struct rte_eth_dev *dev;
1559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1560 dev = &rte_eth_devices[port_id];
1561 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1562 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1567 if (dev->dev_ops->xstats_get_names != NULL) {
1568 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1574 count += RTE_NB_STATS;
1575 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1577 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1583 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1586 int cnt_xstats, idx_xstat;
1588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1591 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1596 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1601 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1602 if (cnt_xstats < 0) {
1603 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1607 /* Get id-name lookup table */
1608 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1610 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1611 port_id, xstats_names, cnt_xstats, NULL)) {
1612 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1616 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1617 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1627 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1628 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1631 /* Get all xstats */
1633 struct rte_eth_dev *dev;
1634 int cnt_used_entries;
1635 int cnt_expected_entries;
1636 int cnt_driver_entries;
1637 uint32_t idx, id_queue;
1640 cnt_expected_entries = get_xstats_count(port_id);
1641 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1642 (int)size < cnt_expected_entries)
1643 return cnt_expected_entries;
1645 /* port_id checked in get_xstats_count() */
1646 dev = &rte_eth_devices[port_id];
1647 cnt_used_entries = 0;
1649 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1650 snprintf(xstats_names[cnt_used_entries].name,
1651 sizeof(xstats_names[0].name),
1652 "%s", rte_stats_strings[idx].name);
1655 num_q = RTE_MIN(dev->data->nb_rx_queues,
1656 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1657 for (id_queue = 0; id_queue < num_q; id_queue++) {
1658 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1659 snprintf(xstats_names[cnt_used_entries].name,
1660 sizeof(xstats_names[0].name),
1663 rte_rxq_stats_strings[idx].name);
1668 num_q = RTE_MIN(dev->data->nb_tx_queues,
1669 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1670 for (id_queue = 0; id_queue < num_q; id_queue++) {
1671 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1672 snprintf(xstats_names[cnt_used_entries].name,
1673 sizeof(xstats_names[0].name),
1676 rte_txq_stats_strings[idx].name);
1681 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1682 /* If there are any driver-specific xstats, append them
1685 cnt_driver_entries =
1686 (*dev->dev_ops->xstats_get_names_by_id)(
1688 xstats_names + cnt_used_entries,
1690 size - cnt_used_entries);
1691 if (cnt_driver_entries < 0)
1692 return cnt_driver_entries;
1693 cnt_used_entries += cnt_driver_entries;
1695 } else if (dev->dev_ops->xstats_get_names != NULL) {
1696 /* If there are any driver-specific xstats, append them
1699 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1701 xstats_names + cnt_used_entries,
1702 size - cnt_used_entries);
1703 if (cnt_driver_entries < 0)
1704 return cnt_driver_entries;
1705 cnt_used_entries += cnt_driver_entries;
1708 return cnt_used_entries;
1710 /* Get only xstats given by IDS */
1713 struct rte_eth_xstat_name *xstats_names_copy;
1715 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1718 malloc(sizeof(struct rte_eth_xstat_name) * len);
1719 if (!xstats_names_copy) {
1720 RTE_PMD_DEBUG_TRACE(
1721 "ERROR: can't allocate memory for values_copy\n");
1722 free(xstats_names_copy);
1726 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1729 for (i = 0; i < size; i++) {
1730 if (ids[i] >= len) {
1731 RTE_PMD_DEBUG_TRACE(
1732 "ERROR: id value isn't valid\n");
1735 strcpy(xstats_names[i].name,
1736 xstats_names_copy[ids[i]].name);
1738 free(xstats_names_copy);
1744 rte_eth_xstats_get_names(uint16_t port_id,
1745 struct rte_eth_xstat_name *xstats_names,
1748 struct rte_eth_dev *dev;
1749 int cnt_used_entries;
1750 int cnt_expected_entries;
1751 int cnt_driver_entries;
1752 uint32_t idx, id_queue;
1755 cnt_expected_entries = get_xstats_count(port_id);
1756 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1757 (int)size < cnt_expected_entries)
1758 return cnt_expected_entries;
1760 /* port_id checked in get_xstats_count() */
1761 dev = &rte_eth_devices[port_id];
1762 cnt_used_entries = 0;
1764 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1765 snprintf(xstats_names[cnt_used_entries].name,
1766 sizeof(xstats_names[0].name),
1767 "%s", rte_stats_strings[idx].name);
1770 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1771 for (id_queue = 0; id_queue < num_q; id_queue++) {
1772 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1773 snprintf(xstats_names[cnt_used_entries].name,
1774 sizeof(xstats_names[0].name),
1776 id_queue, rte_rxq_stats_strings[idx].name);
1781 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1782 for (id_queue = 0; id_queue < num_q; id_queue++) {
1783 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1784 snprintf(xstats_names[cnt_used_entries].name,
1785 sizeof(xstats_names[0].name),
1787 id_queue, rte_txq_stats_strings[idx].name);
1792 if (dev->dev_ops->xstats_get_names != NULL) {
1793 /* If there are any driver-specific xstats, append them
1796 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1798 xstats_names + cnt_used_entries,
1799 size - cnt_used_entries);
1800 if (cnt_driver_entries < 0)
1801 return cnt_driver_entries;
1802 cnt_used_entries += cnt_driver_entries;
1805 return cnt_used_entries;
1808 /* retrieve ethdev extended statistics */
1810 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1811 uint64_t *values, unsigned int n)
1813 /* If need all xstats */
1815 struct rte_eth_stats eth_stats;
1816 struct rte_eth_dev *dev;
1817 unsigned int count = 0, i, q;
1818 signed int xcount = 0;
1819 uint64_t val, *stats_ptr;
1820 uint16_t nb_rxqs, nb_txqs;
1822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1823 dev = &rte_eth_devices[port_id];
1825 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1826 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1827 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1828 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1830 /* Return generic statistics */
1831 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1832 (nb_txqs * RTE_NB_TXQ_STATS);
1835 /* implemented by the driver */
1836 if (dev->dev_ops->xstats_get_by_id != NULL) {
1837 /* Retrieve the xstats from the driver at the end of the
1838 * xstats struct. Retrieve all xstats.
1840 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1842 values ? values + count : NULL,
1843 (n > count) ? n - count : 0);
1847 /* implemented by the driver */
1848 } else if (dev->dev_ops->xstats_get != NULL) {
1849 /* Retrieve the xstats from the driver at the end of the
1850 * xstats struct. Retrieve all xstats.
1851 * Compatibility for PMD without xstats_get_by_ids
1853 unsigned int size = (n > count) ? n - count : 1;
1854 struct rte_eth_xstat xstats[size];
1856 xcount = (*dev->dev_ops->xstats_get)(dev,
1857 values ? xstats : NULL, size);
1863 for (i = 0 ; i < (unsigned int)xcount; i++)
1864 values[i + count] = xstats[i].value;
1867 if (n < count + xcount || values == NULL)
1868 return count + xcount;
1870 /* now fill the xstats structure */
1872 rte_eth_stats_get(port_id, ð_stats);
1875 for (i = 0; i < RTE_NB_STATS; i++) {
1876 stats_ptr = RTE_PTR_ADD(ð_stats,
1877 rte_stats_strings[i].offset);
1879 values[count++] = val;
1883 for (q = 0; q < nb_rxqs; q++) {
1884 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1885 stats_ptr = RTE_PTR_ADD(ð_stats,
1886 rte_rxq_stats_strings[i].offset +
1887 q * sizeof(uint64_t));
1889 values[count++] = val;
1894 for (q = 0; q < nb_txqs; q++) {
1895 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1896 stats_ptr = RTE_PTR_ADD(ð_stats,
1897 rte_txq_stats_strings[i].offset +
1898 q * sizeof(uint64_t));
1900 values[count++] = val;
1904 return count + xcount;
1906 /* Need only xstats given by IDS array */
1909 uint64_t *values_copy;
1911 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1913 values_copy = malloc(sizeof(*values_copy) * size);
1915 RTE_PMD_DEBUG_TRACE(
1916 "ERROR: can't allocate memory for values_copy\n");
1920 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1922 for (i = 0; i < n; i++) {
1923 if (ids[i] >= size) {
1924 RTE_PMD_DEBUG_TRACE(
1925 "ERROR: id value isn't valid\n");
1928 values[i] = values_copy[ids[i]];
1936 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1939 struct rte_eth_stats eth_stats;
1940 struct rte_eth_dev *dev;
1941 unsigned int count = 0, i, q;
1942 signed int xcount = 0;
1943 uint64_t val, *stats_ptr;
1944 uint16_t nb_rxqs, nb_txqs;
1946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1948 dev = &rte_eth_devices[port_id];
1950 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1951 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1953 /* Return generic statistics */
1954 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1955 (nb_txqs * RTE_NB_TXQ_STATS);
1957 /* implemented by the driver */
1958 if (dev->dev_ops->xstats_get != NULL) {
1959 /* Retrieve the xstats from the driver at the end of the
1962 xcount = (*dev->dev_ops->xstats_get)(dev,
1963 xstats ? xstats + count : NULL,
1964 (n > count) ? n - count : 0);
1970 if (n < count + xcount || xstats == NULL)
1971 return count + xcount;
1973 /* now fill the xstats structure */
1975 rte_eth_stats_get(port_id, ð_stats);
1978 for (i = 0; i < RTE_NB_STATS; i++) {
1979 stats_ptr = RTE_PTR_ADD(ð_stats,
1980 rte_stats_strings[i].offset);
1982 xstats[count++].value = val;
1986 for (q = 0; q < nb_rxqs; q++) {
1987 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1988 stats_ptr = RTE_PTR_ADD(ð_stats,
1989 rte_rxq_stats_strings[i].offset +
1990 q * sizeof(uint64_t));
1992 xstats[count++].value = val;
1997 for (q = 0; q < nb_txqs; q++) {
1998 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1999 stats_ptr = RTE_PTR_ADD(ð_stats,
2000 rte_txq_stats_strings[i].offset +
2001 q * sizeof(uint64_t));
2003 xstats[count++].value = val;
2007 for (i = 0; i < count; i++)
2009 /* add an offset to driver-specific stats */
2010 for ( ; i < count + xcount; i++)
2011 xstats[i].id += count;
2013 return count + xcount;
2016 /* reset ethdev extended statistics */
2018 rte_eth_xstats_reset(uint16_t port_id)
2020 struct rte_eth_dev *dev;
2022 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2023 dev = &rte_eth_devices[port_id];
2025 /* implemented by the driver */
2026 if (dev->dev_ops->xstats_reset != NULL) {
2027 (*dev->dev_ops->xstats_reset)(dev);
2031 /* fallback to default */
2032 rte_eth_stats_reset(port_id);
2036 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2039 struct rte_eth_dev *dev;
2041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2043 dev = &rte_eth_devices[port_id];
2045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2046 return (*dev->dev_ops->queue_stats_mapping_set)
2047 (dev, queue_id, stat_idx, is_rx);
2052 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2055 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2061 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2064 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2069 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2071 struct rte_eth_dev *dev;
2073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2074 dev = &rte_eth_devices[port_id];
2076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2077 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2081 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2083 struct rte_eth_dev *dev;
2084 const struct rte_eth_desc_lim lim = {
2085 .nb_max = UINT16_MAX,
2090 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2091 dev = &rte_eth_devices[port_id];
2093 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2094 dev_info->rx_desc_lim = lim;
2095 dev_info->tx_desc_lim = lim;
2097 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2098 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2099 dev_info->driver_name = dev->device->driver->name;
2100 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2101 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2105 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2106 uint32_t *ptypes, int num)
2109 struct rte_eth_dev *dev;
2110 const uint32_t *all_ptypes;
2112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2113 dev = &rte_eth_devices[port_id];
2114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2115 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2120 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2121 if (all_ptypes[i] & ptype_mask) {
2123 ptypes[j] = all_ptypes[i];
2131 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2133 struct rte_eth_dev *dev;
2135 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2136 dev = &rte_eth_devices[port_id];
2137 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2142 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2144 struct rte_eth_dev *dev;
2146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2148 dev = &rte_eth_devices[port_id];
2149 *mtu = dev->data->mtu;
2154 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2157 struct rte_eth_dev *dev;
2159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2160 dev = &rte_eth_devices[port_id];
2161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2163 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2165 dev->data->mtu = mtu;
2171 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2173 struct rte_eth_dev *dev;
2176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2177 dev = &rte_eth_devices[port_id];
2178 if (!(dev->data->dev_conf.rxmode.offloads &
2179 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2180 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2184 if (vlan_id > 4095) {
2185 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2186 port_id, (unsigned) vlan_id);
2189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2191 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2193 struct rte_vlan_filter_conf *vfc;
2197 vfc = &dev->data->vlan_filter_conf;
2198 vidx = vlan_id / 64;
2199 vbit = vlan_id % 64;
2202 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2204 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2211 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2214 struct rte_eth_dev *dev;
2216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2217 dev = &rte_eth_devices[port_id];
2218 if (rx_queue_id >= dev->data->nb_rx_queues) {
2219 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2224 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2230 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2231 enum rte_vlan_type vlan_type,
2234 struct rte_eth_dev *dev;
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2237 dev = &rte_eth_devices[port_id];
2238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2240 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2244 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2246 struct rte_eth_dev *dev;
2251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2252 dev = &rte_eth_devices[port_id];
2254 /*check which option changed by application*/
2255 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2256 org = !!(dev->data->dev_conf.rxmode.offloads &
2257 DEV_RX_OFFLOAD_VLAN_STRIP);
2260 dev->data->dev_conf.rxmode.offloads |=
2261 DEV_RX_OFFLOAD_VLAN_STRIP;
2263 dev->data->dev_conf.rxmode.offloads &=
2264 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2265 mask |= ETH_VLAN_STRIP_MASK;
2268 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2269 org = !!(dev->data->dev_conf.rxmode.offloads &
2270 DEV_RX_OFFLOAD_VLAN_FILTER);
2273 dev->data->dev_conf.rxmode.offloads |=
2274 DEV_RX_OFFLOAD_VLAN_FILTER;
2276 dev->data->dev_conf.rxmode.offloads &=
2277 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2278 mask |= ETH_VLAN_FILTER_MASK;
2281 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2282 org = !!(dev->data->dev_conf.rxmode.offloads &
2283 DEV_RX_OFFLOAD_VLAN_EXTEND);
2286 dev->data->dev_conf.rxmode.offloads |=
2287 DEV_RX_OFFLOAD_VLAN_EXTEND;
2289 dev->data->dev_conf.rxmode.offloads &=
2290 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2291 mask |= ETH_VLAN_EXTEND_MASK;
2298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2301 * Convert to the offload bitfield API just in case the underlying PMD
2302 * still supporting it.
2304 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2305 &dev->data->dev_conf.rxmode);
2306 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2312 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2314 struct rte_eth_dev *dev;
2317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2318 dev = &rte_eth_devices[port_id];
2320 if (dev->data->dev_conf.rxmode.offloads &
2321 DEV_RX_OFFLOAD_VLAN_STRIP)
2322 ret |= ETH_VLAN_STRIP_OFFLOAD;
2324 if (dev->data->dev_conf.rxmode.offloads &
2325 DEV_RX_OFFLOAD_VLAN_FILTER)
2326 ret |= ETH_VLAN_FILTER_OFFLOAD;
2328 if (dev->data->dev_conf.rxmode.offloads &
2329 DEV_RX_OFFLOAD_VLAN_EXTEND)
2330 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2336 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2341 dev = &rte_eth_devices[port_id];
2342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2343 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2349 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2351 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2354 dev = &rte_eth_devices[port_id];
2355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2356 memset(fc_conf, 0, sizeof(*fc_conf));
2357 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2361 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2363 struct rte_eth_dev *dev;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2366 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2367 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2371 dev = &rte_eth_devices[port_id];
2372 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2373 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2377 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2378 struct rte_eth_pfc_conf *pfc_conf)
2380 struct rte_eth_dev *dev;
2382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2383 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2384 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2388 dev = &rte_eth_devices[port_id];
2389 /* High water, low water validation are device specific */
2390 if (*dev->dev_ops->priority_flow_ctrl_set)
2391 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2396 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2404 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2405 for (i = 0; i < num; i++) {
2406 if (reta_conf[i].mask)
2414 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2418 uint16_t i, idx, shift;
2424 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2428 for (i = 0; i < reta_size; i++) {
2429 idx = i / RTE_RETA_GROUP_SIZE;
2430 shift = i % RTE_RETA_GROUP_SIZE;
2431 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2432 (reta_conf[idx].reta[shift] >= max_rxq)) {
2433 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2434 "the maximum rxq index: %u\n", idx, shift,
2435 reta_conf[idx].reta[shift], max_rxq);
2444 rte_eth_dev_rss_reta_update(uint16_t port_id,
2445 struct rte_eth_rss_reta_entry64 *reta_conf,
2448 struct rte_eth_dev *dev;
2451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2452 /* Check mask bits */
2453 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2457 dev = &rte_eth_devices[port_id];
2459 /* Check entry value */
2460 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2461 dev->data->nb_rx_queues);
2465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2466 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2470 rte_eth_dev_rss_reta_query(uint16_t port_id,
2471 struct rte_eth_rss_reta_entry64 *reta_conf,
2474 struct rte_eth_dev *dev;
2477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2479 /* Check mask bits */
2480 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2484 dev = &rte_eth_devices[port_id];
2485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2486 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2490 rte_eth_dev_rss_hash_update(uint16_t port_id,
2491 struct rte_eth_rss_conf *rss_conf)
2493 struct rte_eth_dev *dev;
2495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2496 dev = &rte_eth_devices[port_id];
2497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2498 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2502 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2503 struct rte_eth_rss_conf *rss_conf)
2505 struct rte_eth_dev *dev;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2508 dev = &rte_eth_devices[port_id];
2509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2510 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2514 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2515 struct rte_eth_udp_tunnel *udp_tunnel)
2517 struct rte_eth_dev *dev;
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2520 if (udp_tunnel == NULL) {
2521 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2525 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2526 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2530 dev = &rte_eth_devices[port_id];
2531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2532 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2536 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2537 struct rte_eth_udp_tunnel *udp_tunnel)
2539 struct rte_eth_dev *dev;
2541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2542 dev = &rte_eth_devices[port_id];
2544 if (udp_tunnel == NULL) {
2545 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2549 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2550 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2555 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2559 rte_eth_led_on(uint16_t port_id)
2561 struct rte_eth_dev *dev;
2563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2564 dev = &rte_eth_devices[port_id];
2565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2566 return (*dev->dev_ops->dev_led_on)(dev);
2570 rte_eth_led_off(uint16_t port_id)
2572 struct rte_eth_dev *dev;
2574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2575 dev = &rte_eth_devices[port_id];
2576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2577 return (*dev->dev_ops->dev_led_off)(dev);
2581 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2585 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2587 struct rte_eth_dev_info dev_info;
2588 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2592 rte_eth_dev_info_get(port_id, &dev_info);
2594 for (i = 0; i < dev_info.max_mac_addrs; i++)
2595 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2601 static const struct ether_addr null_mac_addr;
2604 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2607 struct rte_eth_dev *dev;
2612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2616 if (is_zero_ether_addr(addr)) {
2617 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2621 if (pool >= ETH_64_POOLS) {
2622 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2626 index = get_mac_addr_index(port_id, addr);
2628 index = get_mac_addr_index(port_id, &null_mac_addr);
2630 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2635 pool_mask = dev->data->mac_pool_sel[index];
2637 /* Check if both MAC address and pool is already there, and do nothing */
2638 if (pool_mask & (1ULL << pool))
2643 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2646 /* Update address in NIC data structure */
2647 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2649 /* Update pool bitmap in NIC data structure */
2650 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2657 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2659 struct rte_eth_dev *dev;
2662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2663 dev = &rte_eth_devices[port_id];
2664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2666 index = get_mac_addr_index(port_id, addr);
2668 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2670 } else if (index < 0)
2671 return 0; /* Do nothing if address wasn't found */
2674 (*dev->dev_ops->mac_addr_remove)(dev, index);
2676 /* Update address in NIC data structure */
2677 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2679 /* reset pool bitmap */
2680 dev->data->mac_pool_sel[index] = 0;
2686 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2688 struct rte_eth_dev *dev;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 if (!is_valid_assigned_ether_addr(addr))
2695 dev = &rte_eth_devices[port_id];
2696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2698 /* Update default address in NIC data structure */
2699 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2701 (*dev->dev_ops->mac_addr_set)(dev, addr);
2708 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2712 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2714 struct rte_eth_dev_info dev_info;
2715 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2718 rte_eth_dev_info_get(port_id, &dev_info);
2719 if (!dev->data->hash_mac_addrs)
2722 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2723 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2724 ETHER_ADDR_LEN) == 0)
2731 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2736 struct rte_eth_dev *dev;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2740 dev = &rte_eth_devices[port_id];
2741 if (is_zero_ether_addr(addr)) {
2742 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2747 index = get_hash_mac_addr_index(port_id, addr);
2748 /* Check if it's already there, and do nothing */
2749 if ((index >= 0) && (on))
2754 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2755 "set in UTA\n", port_id);
2759 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2761 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2768 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2770 /* Update address in NIC data structure */
2772 ether_addr_copy(addr,
2773 &dev->data->hash_mac_addrs[index]);
2775 ether_addr_copy(&null_mac_addr,
2776 &dev->data->hash_mac_addrs[index]);
2783 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2785 struct rte_eth_dev *dev;
2787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2789 dev = &rte_eth_devices[port_id];
2791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2792 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2795 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2798 struct rte_eth_dev *dev;
2799 struct rte_eth_dev_info dev_info;
2800 struct rte_eth_link link;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 dev = &rte_eth_devices[port_id];
2805 rte_eth_dev_info_get(port_id, &dev_info);
2806 link = dev->data->dev_link;
2808 if (queue_idx > dev_info.max_tx_queues) {
2809 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2810 "invalid queue id=%d\n", port_id, queue_idx);
2814 if (tx_rate > link.link_speed) {
2815 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2816 "bigger than link speed= %d\n",
2817 tx_rate, link.link_speed);
2821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2822 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2826 rte_eth_mirror_rule_set(uint16_t port_id,
2827 struct rte_eth_mirror_conf *mirror_conf,
2828 uint8_t rule_id, uint8_t on)
2830 struct rte_eth_dev *dev;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 if (mirror_conf->rule_type == 0) {
2834 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2838 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2839 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2844 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2845 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2846 (mirror_conf->pool_mask == 0)) {
2847 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2851 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2852 mirror_conf->vlan.vlan_mask == 0) {
2853 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2857 dev = &rte_eth_devices[port_id];
2858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2860 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2864 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2866 struct rte_eth_dev *dev;
2868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2870 dev = &rte_eth_devices[port_id];
2871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2873 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2877 rte_eth_dev_callback_register(uint16_t port_id,
2878 enum rte_eth_event_type event,
2879 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2881 struct rte_eth_dev *dev;
2882 struct rte_eth_dev_callback *user_cb;
2887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2889 dev = &rte_eth_devices[port_id];
2890 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2892 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2893 if (user_cb->cb_fn == cb_fn &&
2894 user_cb->cb_arg == cb_arg &&
2895 user_cb->event == event) {
2900 /* create a new callback. */
2901 if (user_cb == NULL) {
2902 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2903 sizeof(struct rte_eth_dev_callback), 0);
2904 if (user_cb != NULL) {
2905 user_cb->cb_fn = cb_fn;
2906 user_cb->cb_arg = cb_arg;
2907 user_cb->event = event;
2908 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2912 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2913 return (user_cb == NULL) ? -ENOMEM : 0;
2917 rte_eth_dev_callback_unregister(uint16_t port_id,
2918 enum rte_eth_event_type event,
2919 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2922 struct rte_eth_dev *dev;
2923 struct rte_eth_dev_callback *cb, *next;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2930 dev = &rte_eth_devices[port_id];
2931 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2934 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2936 next = TAILQ_NEXT(cb, next);
2938 if (cb->cb_fn != cb_fn || cb->event != event ||
2939 (cb->cb_arg != (void *)-1 &&
2940 cb->cb_arg != cb_arg))
2944 * if this callback is not executing right now,
2947 if (cb->active == 0) {
2948 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2955 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2960 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2961 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2963 struct rte_eth_dev_callback *cb_lst;
2964 struct rte_eth_dev_callback dev_cb;
2967 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2968 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2969 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2974 dev_cb.cb_arg = cb_arg;
2975 if (ret_param != NULL)
2976 dev_cb.ret_param = ret_param;
2978 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2979 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2980 dev_cb.cb_arg, dev_cb.ret_param);
2981 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2984 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2989 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2992 struct rte_eth_dev *dev;
2993 struct rte_intr_handle *intr_handle;
2997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2999 dev = &rte_eth_devices[port_id];
3001 if (!dev->intr_handle) {
3002 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3006 intr_handle = dev->intr_handle;
3007 if (!intr_handle->intr_vec) {
3008 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3012 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3013 vec = intr_handle->intr_vec[qid];
3014 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3015 if (rc && rc != -EEXIST) {
3016 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3017 " op %d epfd %d vec %u\n",
3018 port_id, qid, op, epfd, vec);
3025 const struct rte_memzone *
3026 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3027 uint16_t queue_id, size_t size, unsigned align,
3030 char z_name[RTE_MEMZONE_NAMESIZE];
3031 const struct rte_memzone *mz;
3033 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3034 dev->device->driver->name, ring_name,
3035 dev->data->port_id, queue_id);
3037 mz = rte_memzone_lookup(z_name);
3041 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3045 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3046 int epfd, int op, void *data)
3049 struct rte_eth_dev *dev;
3050 struct rte_intr_handle *intr_handle;
3053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3055 dev = &rte_eth_devices[port_id];
3056 if (queue_id >= dev->data->nb_rx_queues) {
3057 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3061 if (!dev->intr_handle) {
3062 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3066 intr_handle = dev->intr_handle;
3067 if (!intr_handle->intr_vec) {
3068 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3072 vec = intr_handle->intr_vec[queue_id];
3073 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3074 if (rc && rc != -EEXIST) {
3075 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3076 " op %d epfd %d vec %u\n",
3077 port_id, queue_id, op, epfd, vec);
3085 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3088 struct rte_eth_dev *dev;
3090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3092 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3095 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3099 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3102 struct rte_eth_dev *dev;
3104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3106 dev = &rte_eth_devices[port_id];
3108 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3109 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3114 rte_eth_dev_filter_supported(uint16_t port_id,
3115 enum rte_filter_type filter_type)
3117 struct rte_eth_dev *dev;
3119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3121 dev = &rte_eth_devices[port_id];
3122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3123 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3124 RTE_ETH_FILTER_NOP, NULL);
3128 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3129 enum rte_filter_op filter_op, void *arg)
3131 struct rte_eth_dev *dev;
3133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3135 dev = &rte_eth_devices[port_id];
3136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3137 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3141 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3142 rte_rx_callback_fn fn, void *user_param)
3144 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3145 rte_errno = ENOTSUP;
3148 /* check input parameters */
3149 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3150 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3154 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3162 cb->param = user_param;
3164 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3165 /* Add the callbacks in fifo order. */
3166 struct rte_eth_rxtx_callback *tail =
3167 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3170 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3177 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3183 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3184 rte_rx_callback_fn fn, void *user_param)
3186 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3187 rte_errno = ENOTSUP;
3190 /* check input parameters */
3191 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3192 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3197 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3205 cb->param = user_param;
3207 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3208 /* Add the callbacks at fisrt position*/
3209 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3211 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3212 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3218 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3219 rte_tx_callback_fn fn, void *user_param)
3221 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3222 rte_errno = ENOTSUP;
3225 /* check input parameters */
3226 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3227 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3232 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3240 cb->param = user_param;
3242 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3243 /* Add the callbacks in fifo order. */
3244 struct rte_eth_rxtx_callback *tail =
3245 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3248 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3255 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3261 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3262 struct rte_eth_rxtx_callback *user_cb)
3264 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3267 /* Check input parameters. */
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3269 if (user_cb == NULL ||
3270 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3273 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3274 struct rte_eth_rxtx_callback *cb;
3275 struct rte_eth_rxtx_callback **prev_cb;
3278 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3279 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3280 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3282 if (cb == user_cb) {
3283 /* Remove the user cb from the callback list. */
3284 *prev_cb = cb->next;
3289 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3295 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3296 struct rte_eth_rxtx_callback *user_cb)
3298 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3301 /* Check input parameters. */
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3303 if (user_cb == NULL ||
3304 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3307 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3309 struct rte_eth_rxtx_callback *cb;
3310 struct rte_eth_rxtx_callback **prev_cb;
3312 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3313 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3314 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3316 if (cb == user_cb) {
3317 /* Remove the user cb from the callback list. */
3318 *prev_cb = cb->next;
3323 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3329 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3330 struct rte_eth_rxq_info *qinfo)
3332 struct rte_eth_dev *dev;
3334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3339 dev = &rte_eth_devices[port_id];
3340 if (queue_id >= dev->data->nb_rx_queues) {
3341 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3347 memset(qinfo, 0, sizeof(*qinfo));
3348 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3353 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3354 struct rte_eth_txq_info *qinfo)
3356 struct rte_eth_dev *dev;
3358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3363 dev = &rte_eth_devices[port_id];
3364 if (queue_id >= dev->data->nb_tx_queues) {
3365 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3371 memset(qinfo, 0, sizeof(*qinfo));
3372 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3377 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3378 struct ether_addr *mc_addr_set,
3379 uint32_t nb_mc_addr)
3381 struct rte_eth_dev *dev;
3383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3385 dev = &rte_eth_devices[port_id];
3386 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3387 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3391 rte_eth_timesync_enable(uint16_t port_id)
3393 struct rte_eth_dev *dev;
3395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3396 dev = &rte_eth_devices[port_id];
3398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3399 return (*dev->dev_ops->timesync_enable)(dev);
3403 rte_eth_timesync_disable(uint16_t port_id)
3405 struct rte_eth_dev *dev;
3407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3408 dev = &rte_eth_devices[port_id];
3410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3411 return (*dev->dev_ops->timesync_disable)(dev);
3415 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3418 struct rte_eth_dev *dev;
3420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3421 dev = &rte_eth_devices[port_id];
3423 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3424 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3428 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3429 struct timespec *timestamp)
3431 struct rte_eth_dev *dev;
3433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3434 dev = &rte_eth_devices[port_id];
3436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3437 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3441 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3443 struct rte_eth_dev *dev;
3445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3446 dev = &rte_eth_devices[port_id];
3448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3449 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3453 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3455 struct rte_eth_dev *dev;
3457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3458 dev = &rte_eth_devices[port_id];
3460 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3461 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3465 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3467 struct rte_eth_dev *dev;
3469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3470 dev = &rte_eth_devices[port_id];
3472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3473 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3477 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3479 struct rte_eth_dev *dev;
3481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3483 dev = &rte_eth_devices[port_id];
3484 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3485 return (*dev->dev_ops->get_reg)(dev, info);
3489 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3491 struct rte_eth_dev *dev;
3493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3495 dev = &rte_eth_devices[port_id];
3496 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3497 return (*dev->dev_ops->get_eeprom_length)(dev);
3501 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3503 struct rte_eth_dev *dev;
3505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3507 dev = &rte_eth_devices[port_id];
3508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3509 return (*dev->dev_ops->get_eeprom)(dev, info);
3513 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3515 struct rte_eth_dev *dev;
3517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3519 dev = &rte_eth_devices[port_id];
3520 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3521 return (*dev->dev_ops->set_eeprom)(dev, info);
3525 rte_eth_dev_get_dcb_info(uint16_t port_id,
3526 struct rte_eth_dcb_info *dcb_info)
3528 struct rte_eth_dev *dev;
3530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3532 dev = &rte_eth_devices[port_id];
3533 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3536 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3540 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3541 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3543 struct rte_eth_dev *dev;
3545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3546 if (l2_tunnel == NULL) {
3547 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3551 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3552 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3556 dev = &rte_eth_devices[port_id];
3557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3559 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3563 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3564 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3568 struct rte_eth_dev *dev;
3570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3572 if (l2_tunnel == NULL) {
3573 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3577 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3578 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3583 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3587 dev = &rte_eth_devices[port_id];
3588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3590 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3594 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3595 const struct rte_eth_desc_lim *desc_lim)
3597 if (desc_lim->nb_align != 0)
3598 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3600 if (desc_lim->nb_max != 0)
3601 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3603 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3607 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3608 uint16_t *nb_rx_desc,
3609 uint16_t *nb_tx_desc)
3611 struct rte_eth_dev *dev;
3612 struct rte_eth_dev_info dev_info;
3614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3616 dev = &rte_eth_devices[port_id];
3617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3619 rte_eth_dev_info_get(port_id, &dev_info);
3621 if (nb_rx_desc != NULL)
3622 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3624 if (nb_tx_desc != NULL)
3625 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3631 rte_eth_dev_pool_ops_supported(uint8_t port_id, const char *pool)
3633 struct rte_eth_dev *dev;
3635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3640 dev = &rte_eth_devices[port_id];
3642 if (*dev->dev_ops->pool_ops_supported == NULL)
3643 return 1; /* all pools are supported */
3645 return (*dev->dev_ops->pool_ops_supported)(dev, pool);