1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "ethdev_profile.h"
43 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
44 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 static struct rte_eth_dev_data *rte_eth_dev_data;
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* store statistics names and its offset in stats structure */
58 struct rte_eth_xstats_name_off {
59 char name[RTE_ETH_XSTATS_NAME_SIZE];
63 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
64 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
65 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
66 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
67 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
68 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
69 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
70 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
71 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
75 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
77 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
78 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
79 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
80 {"errors", offsetof(struct rte_eth_stats, q_errors)},
83 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
84 sizeof(rte_rxq_stats_strings[0]))
86 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
90 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
91 sizeof(rte_txq_stats_strings[0]))
93 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
94 { DEV_RX_OFFLOAD_##_name, #_name }
99 } rte_rx_offload_names[] = {
100 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
101 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
102 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
103 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
104 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
105 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
106 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
107 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
108 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
109 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
111 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
112 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
114 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
115 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
118 #undef RTE_RX_OFFLOAD_BIT2STR
120 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
121 { DEV_TX_OFFLOAD_##_name, #_name }
123 static const struct {
126 } rte_tx_offload_names[] = {
127 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
128 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
129 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
130 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
131 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
133 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
134 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
135 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
136 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
137 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
138 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
139 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
140 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
141 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
142 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
143 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
144 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
147 #undef RTE_TX_OFFLOAD_BIT2STR
150 * The user application callback description.
152 * It contains callback address to be registered by user application,
153 * the pointer to the parameters for callback, and the event type.
155 struct rte_eth_dev_callback {
156 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
157 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
158 void *cb_arg; /**< Parameter for callback */
159 void *ret_param; /**< Return parameter */
160 enum rte_eth_event_type event; /**< Interrupt event type */
161 uint32_t active; /**< Callback is executing */
170 rte_eth_find_next(uint16_t port_id)
172 while (port_id < RTE_MAX_ETHPORTS &&
173 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
174 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
177 if (port_id >= RTE_MAX_ETHPORTS)
178 return RTE_MAX_ETHPORTS;
184 rte_eth_dev_data_alloc(void)
186 const unsigned flags = 0;
187 const struct rte_memzone *mz;
189 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
190 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
191 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
192 rte_socket_id(), flags);
194 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
196 rte_panic("Cannot allocate memzone for ethernet port data\n");
198 rte_eth_dev_data = mz->addr;
199 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
200 memset(rte_eth_dev_data, 0,
201 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
205 rte_eth_dev_allocated(const char *name)
209 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
210 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
211 strcmp(rte_eth_devices[i].data->name, name) == 0)
212 return &rte_eth_devices[i];
218 rte_eth_dev_find_free_port(void)
222 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
223 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
226 return RTE_MAX_ETHPORTS;
229 static struct rte_eth_dev *
230 eth_dev_get(uint16_t port_id)
232 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
234 eth_dev->data = &rte_eth_dev_data[port_id];
235 eth_dev->state = RTE_ETH_DEV_ATTACHED;
237 eth_dev_last_created_port = port_id;
243 rte_eth_dev_allocate(const char *name)
246 struct rte_eth_dev *eth_dev;
248 port_id = rte_eth_dev_find_free_port();
249 if (port_id == RTE_MAX_ETHPORTS) {
250 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
254 if (rte_eth_dev_data == NULL)
255 rte_eth_dev_data_alloc();
257 if (rte_eth_dev_allocated(name) != NULL) {
258 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
263 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
264 eth_dev = eth_dev_get(port_id);
265 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
266 eth_dev->data->port_id = port_id;
267 eth_dev->data->mtu = ETHER_MTU;
269 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
275 * Attach to a port already registered by the primary process, which
276 * makes sure that the same device would have the same port id both
277 * in the primary and secondary process.
280 rte_eth_dev_attach_secondary(const char *name)
283 struct rte_eth_dev *eth_dev;
285 if (rte_eth_dev_data == NULL)
286 rte_eth_dev_data_alloc();
288 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
289 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
292 if (i == RTE_MAX_ETHPORTS) {
294 "device %s is not driven by the primary process\n",
299 eth_dev = eth_dev_get(i);
300 RTE_ASSERT(eth_dev->data->port_id == i);
306 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
311 eth_dev->state = RTE_ETH_DEV_UNUSED;
313 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
319 rte_eth_dev_is_valid_port(uint16_t port_id)
321 if (port_id >= RTE_MAX_ETHPORTS ||
322 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
329 rte_eth_dev_socket_id(uint16_t port_id)
331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
332 return rte_eth_devices[port_id].data->numa_node;
336 rte_eth_dev_get_sec_ctx(uint8_t port_id)
338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
339 return rte_eth_devices[port_id].security_ctx;
343 rte_eth_dev_count(void)
350 RTE_ETH_FOREACH_DEV(p)
357 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
364 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
368 /* shouldn't check 'rte_eth_devices[i].data',
369 * because it might be overwritten by VDEV PMD */
370 tmp = rte_eth_dev_data[port_id].name;
376 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
381 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
385 RTE_ETH_FOREACH_DEV(i) {
387 rte_eth_dev_data[i].name, strlen(name))) {
397 /* attach the new device, then store port_id of the device */
399 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
402 int current = rte_eth_dev_count();
406 if ((devargs == NULL) || (port_id == NULL)) {
411 /* parse devargs, then retrieve device name and args */
412 if (rte_eal_parse_devargs_str(devargs, &name, &args))
415 ret = rte_eal_dev_attach(name, args);
419 /* no point looking at the port count if no port exists */
420 if (!rte_eth_dev_count()) {
421 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
426 /* if nothing happened, there is a bug here, since some driver told us
427 * it did attach a device, but did not create a port.
429 if (current == rte_eth_dev_count()) {
434 *port_id = eth_dev_last_created_port;
443 /* detach the device, then store the name of the device */
445 rte_eth_dev_detach(uint16_t port_id, char *name)
450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
457 dev_flags = rte_eth_devices[port_id].data->dev_flags;
458 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
459 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
465 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
466 "%s", rte_eth_devices[port_id].data->name);
468 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
472 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
480 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
482 uint16_t old_nb_queues = dev->data->nb_rx_queues;
486 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
487 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
488 sizeof(dev->data->rx_queues[0]) * nb_queues,
489 RTE_CACHE_LINE_SIZE);
490 if (dev->data->rx_queues == NULL) {
491 dev->data->nb_rx_queues = 0;
494 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
497 rxq = dev->data->rx_queues;
499 for (i = nb_queues; i < old_nb_queues; i++)
500 (*dev->dev_ops->rx_queue_release)(rxq[i]);
501 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
502 RTE_CACHE_LINE_SIZE);
505 if (nb_queues > old_nb_queues) {
506 uint16_t new_qs = nb_queues - old_nb_queues;
508 memset(rxq + old_nb_queues, 0,
509 sizeof(rxq[0]) * new_qs);
512 dev->data->rx_queues = rxq;
514 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
517 rxq = dev->data->rx_queues;
519 for (i = nb_queues; i < old_nb_queues; i++)
520 (*dev->dev_ops->rx_queue_release)(rxq[i]);
522 rte_free(dev->data->rx_queues);
523 dev->data->rx_queues = NULL;
525 dev->data->nb_rx_queues = nb_queues;
530 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already started\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
556 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (rx_queue_id >= dev->data->nb_rx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
570 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already stopped\n",
573 rx_queue_id, port_id);
577 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
582 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already started\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
610 struct rte_eth_dev *dev;
612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
614 dev = &rte_eth_devices[port_id];
615 if (tx_queue_id >= dev->data->nb_tx_queues) {
616 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
622 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
623 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
624 " already stopped\n",
625 tx_queue_id, port_id);
629 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
634 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
636 uint16_t old_nb_queues = dev->data->nb_tx_queues;
640 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
641 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
642 sizeof(dev->data->tx_queues[0]) * nb_queues,
643 RTE_CACHE_LINE_SIZE);
644 if (dev->data->tx_queues == NULL) {
645 dev->data->nb_tx_queues = 0;
648 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
651 txq = dev->data->tx_queues;
653 for (i = nb_queues; i < old_nb_queues; i++)
654 (*dev->dev_ops->tx_queue_release)(txq[i]);
655 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
656 RTE_CACHE_LINE_SIZE);
659 if (nb_queues > old_nb_queues) {
660 uint16_t new_qs = nb_queues - old_nb_queues;
662 memset(txq + old_nb_queues, 0,
663 sizeof(txq[0]) * new_qs);
666 dev->data->tx_queues = txq;
668 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
669 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
671 txq = dev->data->tx_queues;
673 for (i = nb_queues; i < old_nb_queues; i++)
674 (*dev->dev_ops->tx_queue_release)(txq[i]);
676 rte_free(dev->data->tx_queues);
677 dev->data->tx_queues = NULL;
679 dev->data->nb_tx_queues = nb_queues;
684 rte_eth_speed_bitflag(uint32_t speed, int duplex)
687 case ETH_SPEED_NUM_10M:
688 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
689 case ETH_SPEED_NUM_100M:
690 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
691 case ETH_SPEED_NUM_1G:
692 return ETH_LINK_SPEED_1G;
693 case ETH_SPEED_NUM_2_5G:
694 return ETH_LINK_SPEED_2_5G;
695 case ETH_SPEED_NUM_5G:
696 return ETH_LINK_SPEED_5G;
697 case ETH_SPEED_NUM_10G:
698 return ETH_LINK_SPEED_10G;
699 case ETH_SPEED_NUM_20G:
700 return ETH_LINK_SPEED_20G;
701 case ETH_SPEED_NUM_25G:
702 return ETH_LINK_SPEED_25G;
703 case ETH_SPEED_NUM_40G:
704 return ETH_LINK_SPEED_40G;
705 case ETH_SPEED_NUM_50G:
706 return ETH_LINK_SPEED_50G;
707 case ETH_SPEED_NUM_56G:
708 return ETH_LINK_SPEED_56G;
709 case ETH_SPEED_NUM_100G:
710 return ETH_LINK_SPEED_100G;
717 * A conversion function from rxmode bitfield API.
720 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
721 uint64_t *rx_offloads)
723 uint64_t offloads = 0;
725 if (rxmode->header_split == 1)
726 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
727 if (rxmode->hw_ip_checksum == 1)
728 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
729 if (rxmode->hw_vlan_filter == 1)
730 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
731 if (rxmode->hw_vlan_strip == 1)
732 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
733 if (rxmode->hw_vlan_extend == 1)
734 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
735 if (rxmode->jumbo_frame == 1)
736 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
737 if (rxmode->hw_strip_crc == 1)
738 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
739 if (rxmode->enable_scatter == 1)
740 offloads |= DEV_RX_OFFLOAD_SCATTER;
741 if (rxmode->enable_lro == 1)
742 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
743 if (rxmode->hw_timestamp == 1)
744 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
745 if (rxmode->security == 1)
746 offloads |= DEV_RX_OFFLOAD_SECURITY;
748 *rx_offloads = offloads;
752 * A conversion function from rxmode offloads API.
755 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
756 struct rte_eth_rxmode *rxmode)
759 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
760 rxmode->header_split = 1;
762 rxmode->header_split = 0;
763 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
764 rxmode->hw_ip_checksum = 1;
766 rxmode->hw_ip_checksum = 0;
767 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
768 rxmode->hw_vlan_filter = 1;
770 rxmode->hw_vlan_filter = 0;
771 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
772 rxmode->hw_vlan_strip = 1;
774 rxmode->hw_vlan_strip = 0;
775 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
776 rxmode->hw_vlan_extend = 1;
778 rxmode->hw_vlan_extend = 0;
779 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
780 rxmode->jumbo_frame = 1;
782 rxmode->jumbo_frame = 0;
783 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
784 rxmode->hw_strip_crc = 1;
786 rxmode->hw_strip_crc = 0;
787 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
788 rxmode->enable_scatter = 1;
790 rxmode->enable_scatter = 0;
791 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
792 rxmode->enable_lro = 1;
794 rxmode->enable_lro = 0;
795 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
796 rxmode->hw_timestamp = 1;
798 rxmode->hw_timestamp = 0;
799 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
800 rxmode->security = 1;
802 rxmode->security = 0;
806 rte_eth_dev_rx_offload_name(uint64_t offload)
808 const char *name = "UNKNOWN";
811 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
812 if (offload == rte_rx_offload_names[i].offload) {
813 name = rte_rx_offload_names[i].name;
822 rte_eth_dev_tx_offload_name(uint64_t offload)
824 const char *name = "UNKNOWN";
827 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
828 if (offload == rte_tx_offload_names[i].offload) {
829 name = rte_tx_offload_names[i].name;
838 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
839 const struct rte_eth_conf *dev_conf)
841 struct rte_eth_dev *dev;
842 struct rte_eth_dev_info dev_info;
843 struct rte_eth_conf local_conf = *dev_conf;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
850 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
851 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
855 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
857 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
858 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
862 dev = &rte_eth_devices[port_id];
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
867 if (dev->data->dev_started) {
869 "port %d must be stopped to allow configuration\n", port_id);
874 * Convert between the offloads API to enable PMDs to support
877 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
878 rte_eth_convert_rx_offload_bitfield(
879 &dev_conf->rxmode, &local_conf.rxmode.offloads);
881 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
885 /* Copy the dev_conf parameter into the dev structure */
886 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
889 * Check that the numbers of RX and TX queues are not greater
890 * than the maximum number of RX and TX queues supported by the
893 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
895 if (nb_rx_q == 0 && nb_tx_q == 0) {
896 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
900 if (nb_rx_q > dev_info.max_rx_queues) {
901 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
902 port_id, nb_rx_q, dev_info.max_rx_queues);
906 if (nb_tx_q > dev_info.max_tx_queues) {
907 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
908 port_id, nb_tx_q, dev_info.max_tx_queues);
912 /* Check that the device supports requested interrupts */
913 if ((dev_conf->intr_conf.lsc == 1) &&
914 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
915 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
916 dev->device->driver->name);
919 if ((dev_conf->intr_conf.rmv == 1) &&
920 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
921 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
922 dev->device->driver->name);
927 * If jumbo frames are enabled, check that the maximum RX packet
928 * length is supported by the configured device.
930 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
931 if (dev_conf->rxmode.max_rx_pkt_len >
932 dev_info.max_rx_pktlen) {
933 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
934 " > max valid value %u\n",
936 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
937 (unsigned)dev_info.max_rx_pktlen);
939 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
940 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
941 " < min valid value %u\n",
943 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
944 (unsigned)ETHER_MIN_LEN);
948 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
949 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
950 /* Use default value */
951 dev->data->dev_conf.rxmode.max_rx_pkt_len =
956 * Setup new number of RX/TX queues and reconfigure device.
958 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
960 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
965 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
967 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
969 rte_eth_dev_rx_queue_config(dev, 0);
973 diag = (*dev->dev_ops->dev_configure)(dev);
975 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
977 rte_eth_dev_rx_queue_config(dev, 0);
978 rte_eth_dev_tx_queue_config(dev, 0);
982 /* Initialize Rx profiling if enabled at compilation time. */
983 diag = __rte_eth_profile_rx_init(port_id, dev);
985 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
987 rte_eth_dev_rx_queue_config(dev, 0);
988 rte_eth_dev_tx_queue_config(dev, 0);
996 _rte_eth_dev_reset(struct rte_eth_dev *dev)
998 if (dev->data->dev_started) {
1000 "port %d must be stopped to allow reset\n",
1001 dev->data->port_id);
1005 rte_eth_dev_rx_queue_config(dev, 0);
1006 rte_eth_dev_tx_queue_config(dev, 0);
1008 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1012 rte_eth_dev_config_restore(uint16_t port_id)
1014 struct rte_eth_dev *dev;
1015 struct rte_eth_dev_info dev_info;
1016 struct ether_addr *addr;
1021 dev = &rte_eth_devices[port_id];
1023 rte_eth_dev_info_get(port_id, &dev_info);
1025 /* replay MAC address configuration including default MAC */
1026 addr = &dev->data->mac_addrs[0];
1027 if (*dev->dev_ops->mac_addr_set != NULL)
1028 (*dev->dev_ops->mac_addr_set)(dev, addr);
1029 else if (*dev->dev_ops->mac_addr_add != NULL)
1030 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1032 if (*dev->dev_ops->mac_addr_add != NULL) {
1033 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1034 addr = &dev->data->mac_addrs[i];
1036 /* skip zero address */
1037 if (is_zero_ether_addr(addr))
1041 pool_mask = dev->data->mac_pool_sel[i];
1044 if (pool_mask & 1ULL)
1045 (*dev->dev_ops->mac_addr_add)(dev,
1049 } while (pool_mask);
1053 /* replay promiscuous configuration */
1054 if (rte_eth_promiscuous_get(port_id) == 1)
1055 rte_eth_promiscuous_enable(port_id);
1056 else if (rte_eth_promiscuous_get(port_id) == 0)
1057 rte_eth_promiscuous_disable(port_id);
1059 /* replay all multicast configuration */
1060 if (rte_eth_allmulticast_get(port_id) == 1)
1061 rte_eth_allmulticast_enable(port_id);
1062 else if (rte_eth_allmulticast_get(port_id) == 0)
1063 rte_eth_allmulticast_disable(port_id);
1067 rte_eth_dev_start(uint16_t port_id)
1069 struct rte_eth_dev *dev;
1072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1074 dev = &rte_eth_devices[port_id];
1076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1078 if (dev->data->dev_started != 0) {
1079 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1080 " already started\n",
1085 diag = (*dev->dev_ops->dev_start)(dev);
1087 dev->data->dev_started = 1;
1091 rte_eth_dev_config_restore(port_id);
1093 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1095 (*dev->dev_ops->link_update)(dev, 0);
1101 rte_eth_dev_stop(uint16_t port_id)
1103 struct rte_eth_dev *dev;
1105 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1106 dev = &rte_eth_devices[port_id];
1108 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1110 if (dev->data->dev_started == 0) {
1111 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1112 " already stopped\n",
1117 dev->data->dev_started = 0;
1118 (*dev->dev_ops->dev_stop)(dev);
1122 rte_eth_dev_set_link_up(uint16_t port_id)
1124 struct rte_eth_dev *dev;
1126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1128 dev = &rte_eth_devices[port_id];
1130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1131 return (*dev->dev_ops->dev_set_link_up)(dev);
1135 rte_eth_dev_set_link_down(uint16_t port_id)
1137 struct rte_eth_dev *dev;
1139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1141 dev = &rte_eth_devices[port_id];
1143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1144 return (*dev->dev_ops->dev_set_link_down)(dev);
1148 rte_eth_dev_close(uint16_t port_id)
1150 struct rte_eth_dev *dev;
1152 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1153 dev = &rte_eth_devices[port_id];
1155 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1156 dev->data->dev_started = 0;
1157 (*dev->dev_ops->dev_close)(dev);
1159 dev->data->nb_rx_queues = 0;
1160 rte_free(dev->data->rx_queues);
1161 dev->data->rx_queues = NULL;
1162 dev->data->nb_tx_queues = 0;
1163 rte_free(dev->data->tx_queues);
1164 dev->data->tx_queues = NULL;
1168 rte_eth_dev_reset(uint16_t port_id)
1170 struct rte_eth_dev *dev;
1173 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1174 dev = &rte_eth_devices[port_id];
1176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1178 rte_eth_dev_stop(port_id);
1179 ret = dev->dev_ops->dev_reset(dev);
1185 rte_eth_dev_is_removed(uint16_t port_id)
1187 struct rte_eth_dev *dev;
1190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1192 dev = &rte_eth_devices[port_id];
1194 if (dev->state == RTE_ETH_DEV_REMOVED)
1197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1199 ret = dev->dev_ops->is_removed(dev);
1201 /* Device is physically removed. */
1202 dev->state = RTE_ETH_DEV_REMOVED;
1208 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1209 uint16_t nb_rx_desc, unsigned int socket_id,
1210 const struct rte_eth_rxconf *rx_conf,
1211 struct rte_mempool *mp)
1214 uint32_t mbp_buf_size;
1215 struct rte_eth_dev *dev;
1216 struct rte_eth_dev_info dev_info;
1217 struct rte_eth_rxconf local_conf;
1220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1222 dev = &rte_eth_devices[port_id];
1223 if (rx_queue_id >= dev->data->nb_rx_queues) {
1224 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1228 if (dev->data->dev_started) {
1229 RTE_PMD_DEBUG_TRACE(
1230 "port %d must be stopped to allow configuration\n", port_id);
1234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1238 * Check the size of the mbuf data buffer.
1239 * This value must be provided in the private data of the memory pool.
1240 * First check that the memory pool has a valid private data.
1242 rte_eth_dev_info_get(port_id, &dev_info);
1243 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1244 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1245 mp->name, (int) mp->private_data_size,
1246 (int) sizeof(struct rte_pktmbuf_pool_private));
1249 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1251 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1252 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1253 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1257 (int)(RTE_PKTMBUF_HEADROOM +
1258 dev_info.min_rx_bufsize),
1259 (int)RTE_PKTMBUF_HEADROOM,
1260 (int)dev_info.min_rx_bufsize);
1264 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1265 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1266 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1268 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1269 "should be: <= %hu, = %hu, and a product of %hu\n",
1271 dev_info.rx_desc_lim.nb_max,
1272 dev_info.rx_desc_lim.nb_min,
1273 dev_info.rx_desc_lim.nb_align);
1277 rxq = dev->data->rx_queues;
1278 if (rxq[rx_queue_id]) {
1279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1281 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1282 rxq[rx_queue_id] = NULL;
1285 if (rx_conf == NULL)
1286 rx_conf = &dev_info.default_rxconf;
1288 local_conf = *rx_conf;
1289 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1291 * Reflect port offloads to queue offloads in order for
1292 * offloads to not be discarded.
1294 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1295 &local_conf.offloads);
1298 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1299 socket_id, &local_conf, mp);
1301 if (!dev->data->min_rx_buf_size ||
1302 dev->data->min_rx_buf_size > mbp_buf_size)
1303 dev->data->min_rx_buf_size = mbp_buf_size;
1310 * A conversion function from txq_flags API.
1313 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1315 uint64_t offloads = 0;
1317 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1318 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1319 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1320 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1321 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1322 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1323 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1324 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1325 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1326 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1327 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1328 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1329 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1331 *tx_offloads = offloads;
1335 * A conversion function from offloads API.
1338 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1342 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1343 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1344 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1345 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1346 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1347 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1348 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1349 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1350 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1351 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1352 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1353 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1359 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1360 uint16_t nb_tx_desc, unsigned int socket_id,
1361 const struct rte_eth_txconf *tx_conf)
1363 struct rte_eth_dev *dev;
1364 struct rte_eth_dev_info dev_info;
1365 struct rte_eth_txconf local_conf;
1368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1370 dev = &rte_eth_devices[port_id];
1371 if (tx_queue_id >= dev->data->nb_tx_queues) {
1372 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1376 if (dev->data->dev_started) {
1377 RTE_PMD_DEBUG_TRACE(
1378 "port %d must be stopped to allow configuration\n", port_id);
1382 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1385 rte_eth_dev_info_get(port_id, &dev_info);
1387 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1388 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1389 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1390 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1391 "should be: <= %hu, = %hu, and a product of %hu\n",
1393 dev_info.tx_desc_lim.nb_max,
1394 dev_info.tx_desc_lim.nb_min,
1395 dev_info.tx_desc_lim.nb_align);
1399 txq = dev->data->tx_queues;
1400 if (txq[tx_queue_id]) {
1401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1403 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1404 txq[tx_queue_id] = NULL;
1407 if (tx_conf == NULL)
1408 tx_conf = &dev_info.default_txconf;
1411 * Convert between the offloads API to enable PMDs to support
1414 local_conf = *tx_conf;
1415 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1416 rte_eth_convert_txq_offloads(tx_conf->offloads,
1417 &local_conf.txq_flags);
1418 /* Keep the ignore flag. */
1419 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1421 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1422 &local_conf.offloads);
1425 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1426 socket_id, &local_conf);
1430 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1431 void *userdata __rte_unused)
1435 for (i = 0; i < unsent; i++)
1436 rte_pktmbuf_free(pkts[i]);
1440 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1443 uint64_t *count = userdata;
1446 for (i = 0; i < unsent; i++)
1447 rte_pktmbuf_free(pkts[i]);
1453 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1454 buffer_tx_error_fn cbfn, void *userdata)
1456 buffer->error_callback = cbfn;
1457 buffer->error_userdata = userdata;
1462 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1469 buffer->size = size;
1470 if (buffer->error_callback == NULL) {
1471 ret = rte_eth_tx_buffer_set_err_callback(
1472 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1479 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1481 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1483 /* Validate Input Data. Bail if not valid or not supported. */
1484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1487 /* Call driver to free pending mbufs. */
1488 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1493 rte_eth_promiscuous_enable(uint16_t port_id)
1495 struct rte_eth_dev *dev;
1497 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1498 dev = &rte_eth_devices[port_id];
1500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1501 (*dev->dev_ops->promiscuous_enable)(dev);
1502 dev->data->promiscuous = 1;
1506 rte_eth_promiscuous_disable(uint16_t port_id)
1508 struct rte_eth_dev *dev;
1510 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1511 dev = &rte_eth_devices[port_id];
1513 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1514 dev->data->promiscuous = 0;
1515 (*dev->dev_ops->promiscuous_disable)(dev);
1519 rte_eth_promiscuous_get(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1525 dev = &rte_eth_devices[port_id];
1526 return dev->data->promiscuous;
1530 rte_eth_allmulticast_enable(uint16_t port_id)
1532 struct rte_eth_dev *dev;
1534 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1535 dev = &rte_eth_devices[port_id];
1537 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1538 (*dev->dev_ops->allmulticast_enable)(dev);
1539 dev->data->all_multicast = 1;
1543 rte_eth_allmulticast_disable(uint16_t port_id)
1545 struct rte_eth_dev *dev;
1547 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1548 dev = &rte_eth_devices[port_id];
1550 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1551 dev->data->all_multicast = 0;
1552 (*dev->dev_ops->allmulticast_disable)(dev);
1556 rte_eth_allmulticast_get(uint16_t port_id)
1558 struct rte_eth_dev *dev;
1560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1562 dev = &rte_eth_devices[port_id];
1563 return dev->data->all_multicast;
1567 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1568 struct rte_eth_link *link)
1570 struct rte_eth_link *dst = link;
1571 struct rte_eth_link *src = &(dev->data->dev_link);
1573 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1574 *(uint64_t *)src) == 0)
1581 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1583 struct rte_eth_dev *dev;
1585 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1586 dev = &rte_eth_devices[port_id];
1588 if (dev->data->dev_conf.intr_conf.lsc != 0)
1589 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1591 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1592 (*dev->dev_ops->link_update)(dev, 1);
1593 *eth_link = dev->data->dev_link;
1598 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1600 struct rte_eth_dev *dev;
1602 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1603 dev = &rte_eth_devices[port_id];
1605 if (dev->data->dev_conf.intr_conf.lsc != 0)
1606 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1608 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1609 (*dev->dev_ops->link_update)(dev, 0);
1610 *eth_link = dev->data->dev_link;
1615 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1617 struct rte_eth_dev *dev;
1619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1621 dev = &rte_eth_devices[port_id];
1622 memset(stats, 0, sizeof(*stats));
1624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1625 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1626 return (*dev->dev_ops->stats_get)(dev, stats);
1630 rte_eth_stats_reset(uint16_t port_id)
1632 struct rte_eth_dev *dev;
1634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1635 dev = &rte_eth_devices[port_id];
1637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1638 (*dev->dev_ops->stats_reset)(dev);
1639 dev->data->rx_mbuf_alloc_failed = 0;
1645 get_xstats_basic_count(struct rte_eth_dev *dev)
1647 uint16_t nb_rxqs, nb_txqs;
1650 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1651 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1653 count = RTE_NB_STATS;
1654 count += nb_rxqs * RTE_NB_RXQ_STATS;
1655 count += nb_txqs * RTE_NB_TXQ_STATS;
1661 get_xstats_count(uint16_t port_id)
1663 struct rte_eth_dev *dev;
1666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1667 dev = &rte_eth_devices[port_id];
1668 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1669 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1674 if (dev->dev_ops->xstats_get_names != NULL) {
1675 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1682 count += get_xstats_basic_count(dev);
1688 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1691 int cnt_xstats, idx_xstat;
1693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1696 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1701 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1706 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1707 if (cnt_xstats < 0) {
1708 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1712 /* Get id-name lookup table */
1713 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1715 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1716 port_id, xstats_names, cnt_xstats, NULL)) {
1717 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1721 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1722 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1731 /* retrieve basic stats names */
1733 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1734 struct rte_eth_xstat_name *xstats_names)
1736 int cnt_used_entries = 0;
1737 uint32_t idx, id_queue;
1740 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1741 snprintf(xstats_names[cnt_used_entries].name,
1742 sizeof(xstats_names[0].name),
1743 "%s", rte_stats_strings[idx].name);
1746 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1747 for (id_queue = 0; id_queue < num_q; id_queue++) {
1748 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1749 snprintf(xstats_names[cnt_used_entries].name,
1750 sizeof(xstats_names[0].name),
1752 id_queue, rte_rxq_stats_strings[idx].name);
1757 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1758 for (id_queue = 0; id_queue < num_q; id_queue++) {
1759 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1760 snprintf(xstats_names[cnt_used_entries].name,
1761 sizeof(xstats_names[0].name),
1763 id_queue, rte_txq_stats_strings[idx].name);
1767 return cnt_used_entries;
1770 /* retrieve ethdev extended statistics names */
1772 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1773 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1776 struct rte_eth_xstat_name *xstats_names_copy;
1777 unsigned int no_basic_stat_requested = 1;
1778 unsigned int no_ext_stat_requested = 1;
1779 unsigned int expected_entries;
1780 unsigned int basic_count;
1781 struct rte_eth_dev *dev;
1785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1786 dev = &rte_eth_devices[port_id];
1788 basic_count = get_xstats_basic_count(dev);
1789 ret = get_xstats_count(port_id);
1792 expected_entries = (unsigned int)ret;
1794 /* Return max number of stats if no ids given */
1797 return expected_entries;
1798 else if (xstats_names && size < expected_entries)
1799 return expected_entries;
1802 if (ids && !xstats_names)
1805 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1806 uint64_t ids_copy[size];
1808 for (i = 0; i < size; i++) {
1809 if (ids[i] < basic_count) {
1810 no_basic_stat_requested = 0;
1815 * Convert ids to xstats ids that PMD knows.
1816 * ids known by user are basic + extended stats.
1818 ids_copy[i] = ids[i] - basic_count;
1821 if (no_basic_stat_requested)
1822 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1823 xstats_names, ids_copy, size);
1826 /* Retrieve all stats */
1828 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1830 if (num_stats < 0 || num_stats > (int)expected_entries)
1833 return expected_entries;
1836 xstats_names_copy = calloc(expected_entries,
1837 sizeof(struct rte_eth_xstat_name));
1839 if (!xstats_names_copy) {
1840 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1845 for (i = 0; i < size; i++) {
1846 if (ids[i] > basic_count) {
1847 no_ext_stat_requested = 0;
1853 /* Fill xstats_names_copy structure */
1854 if (ids && no_ext_stat_requested) {
1855 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1857 rte_eth_xstats_get_names(port_id, xstats_names_copy,
1862 for (i = 0; i < size; i++) {
1863 if (ids[i] >= expected_entries) {
1864 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1865 free(xstats_names_copy);
1868 xstats_names[i] = xstats_names_copy[ids[i]];
1871 free(xstats_names_copy);
1876 rte_eth_xstats_get_names(uint16_t port_id,
1877 struct rte_eth_xstat_name *xstats_names,
1880 struct rte_eth_dev *dev;
1881 int cnt_used_entries;
1882 int cnt_expected_entries;
1883 int cnt_driver_entries;
1885 cnt_expected_entries = get_xstats_count(port_id);
1886 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1887 (int)size < cnt_expected_entries)
1888 return cnt_expected_entries;
1890 /* port_id checked in get_xstats_count() */
1891 dev = &rte_eth_devices[port_id];
1893 cnt_used_entries = rte_eth_basic_stats_get_names(
1896 if (dev->dev_ops->xstats_get_names != NULL) {
1897 /* If there are any driver-specific xstats, append them
1900 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1902 xstats_names + cnt_used_entries,
1903 size - cnt_used_entries);
1904 if (cnt_driver_entries < 0)
1905 return cnt_driver_entries;
1906 cnt_used_entries += cnt_driver_entries;
1909 return cnt_used_entries;
1914 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1916 struct rte_eth_dev *dev;
1917 struct rte_eth_stats eth_stats;
1918 unsigned int count = 0, i, q;
1919 uint64_t val, *stats_ptr;
1920 uint16_t nb_rxqs, nb_txqs;
1922 rte_eth_stats_get(port_id, ð_stats);
1923 dev = &rte_eth_devices[port_id];
1925 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1926 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1929 for (i = 0; i < RTE_NB_STATS; i++) {
1930 stats_ptr = RTE_PTR_ADD(ð_stats,
1931 rte_stats_strings[i].offset);
1933 xstats[count++].value = val;
1937 for (q = 0; q < nb_rxqs; q++) {
1938 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1939 stats_ptr = RTE_PTR_ADD(ð_stats,
1940 rte_rxq_stats_strings[i].offset +
1941 q * sizeof(uint64_t));
1943 xstats[count++].value = val;
1948 for (q = 0; q < nb_txqs; q++) {
1949 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1950 stats_ptr = RTE_PTR_ADD(ð_stats,
1951 rte_txq_stats_strings[i].offset +
1952 q * sizeof(uint64_t));
1954 xstats[count++].value = val;
1960 /* retrieve ethdev extended statistics */
1962 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1963 uint64_t *values, unsigned int size)
1965 unsigned int no_basic_stat_requested = 1;
1966 unsigned int no_ext_stat_requested = 1;
1967 unsigned int num_xstats_filled;
1968 unsigned int basic_count;
1969 uint16_t expected_entries;
1970 struct rte_eth_dev *dev;
1974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1975 expected_entries = get_xstats_count(port_id);
1976 struct rte_eth_xstat xstats[expected_entries];
1977 dev = &rte_eth_devices[port_id];
1978 basic_count = get_xstats_basic_count(dev);
1980 /* Return max number of stats if no ids given */
1983 return expected_entries;
1984 else if (values && size < expected_entries)
1985 return expected_entries;
1991 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1992 unsigned int basic_count = get_xstats_basic_count(dev);
1993 uint64_t ids_copy[size];
1995 for (i = 0; i < size; i++) {
1996 if (ids[i] < basic_count) {
1997 no_basic_stat_requested = 0;
2002 * Convert ids to xstats ids that PMD knows.
2003 * ids known by user are basic + extended stats.
2005 ids_copy[i] = ids[i] - basic_count;
2008 if (no_basic_stat_requested)
2009 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2014 for (i = 0; i < size; i++) {
2015 if (ids[i] > basic_count) {
2016 no_ext_stat_requested = 0;
2022 /* Fill the xstats structure */
2023 if (ids && no_ext_stat_requested)
2024 ret = rte_eth_basic_stats_get(port_id, xstats);
2026 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2030 num_xstats_filled = (unsigned int)ret;
2032 /* Return all stats */
2034 for (i = 0; i < num_xstats_filled; i++)
2035 values[i] = xstats[i].value;
2036 return expected_entries;
2040 for (i = 0; i < size; i++) {
2041 if (ids[i] >= expected_entries) {
2042 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2045 values[i] = xstats[ids[i]].value;
2051 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2054 struct rte_eth_dev *dev;
2055 unsigned int count = 0, i;
2056 signed int xcount = 0;
2057 uint16_t nb_rxqs, nb_txqs;
2059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2061 dev = &rte_eth_devices[port_id];
2063 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2064 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2066 /* Return generic statistics */
2067 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2068 (nb_txqs * RTE_NB_TXQ_STATS);
2070 /* implemented by the driver */
2071 if (dev->dev_ops->xstats_get != NULL) {
2072 /* Retrieve the xstats from the driver at the end of the
2075 xcount = (*dev->dev_ops->xstats_get)(dev,
2076 xstats ? xstats + count : NULL,
2077 (n > count) ? n - count : 0);
2083 if (n < count + xcount || xstats == NULL)
2084 return count + xcount;
2086 /* now fill the xstats structure */
2087 count = rte_eth_basic_stats_get(port_id, xstats);
2089 for (i = 0; i < count; i++)
2091 /* add an offset to driver-specific stats */
2092 for ( ; i < count + xcount; i++)
2093 xstats[i].id += count;
2095 return count + xcount;
2098 /* reset ethdev extended statistics */
2100 rte_eth_xstats_reset(uint16_t port_id)
2102 struct rte_eth_dev *dev;
2104 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2105 dev = &rte_eth_devices[port_id];
2107 /* implemented by the driver */
2108 if (dev->dev_ops->xstats_reset != NULL) {
2109 (*dev->dev_ops->xstats_reset)(dev);
2113 /* fallback to default */
2114 rte_eth_stats_reset(port_id);
2118 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2121 struct rte_eth_dev *dev;
2123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2125 dev = &rte_eth_devices[port_id];
2127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2128 return (*dev->dev_ops->queue_stats_mapping_set)
2129 (dev, queue_id, stat_idx, is_rx);
2134 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2137 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2143 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2146 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2151 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2153 struct rte_eth_dev *dev;
2155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2156 dev = &rte_eth_devices[port_id];
2158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2159 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2163 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2165 struct rte_eth_dev *dev;
2166 const struct rte_eth_desc_lim lim = {
2167 .nb_max = UINT16_MAX,
2172 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2173 dev = &rte_eth_devices[port_id];
2175 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2176 dev_info->rx_desc_lim = lim;
2177 dev_info->tx_desc_lim = lim;
2179 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2180 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2181 dev_info->driver_name = dev->device->driver->name;
2182 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2183 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2187 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2188 uint32_t *ptypes, int num)
2191 struct rte_eth_dev *dev;
2192 const uint32_t *all_ptypes;
2194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2195 dev = &rte_eth_devices[port_id];
2196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2197 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2202 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2203 if (all_ptypes[i] & ptype_mask) {
2205 ptypes[j] = all_ptypes[i];
2213 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2215 struct rte_eth_dev *dev;
2217 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2218 dev = &rte_eth_devices[port_id];
2219 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2224 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2226 struct rte_eth_dev *dev;
2228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2230 dev = &rte_eth_devices[port_id];
2231 *mtu = dev->data->mtu;
2236 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2239 struct rte_eth_dev *dev;
2241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2242 dev = &rte_eth_devices[port_id];
2243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2245 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2247 dev->data->mtu = mtu;
2253 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2255 struct rte_eth_dev *dev;
2258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2259 dev = &rte_eth_devices[port_id];
2260 if (!(dev->data->dev_conf.rxmode.offloads &
2261 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2262 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2266 if (vlan_id > 4095) {
2267 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2268 port_id, (unsigned) vlan_id);
2271 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2273 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2275 struct rte_vlan_filter_conf *vfc;
2279 vfc = &dev->data->vlan_filter_conf;
2280 vidx = vlan_id / 64;
2281 vbit = vlan_id % 64;
2284 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2286 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2293 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2296 struct rte_eth_dev *dev;
2298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2299 dev = &rte_eth_devices[port_id];
2300 if (rx_queue_id >= dev->data->nb_rx_queues) {
2301 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2306 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2312 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2313 enum rte_vlan_type vlan_type,
2316 struct rte_eth_dev *dev;
2318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2319 dev = &rte_eth_devices[port_id];
2320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2322 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2326 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2328 struct rte_eth_dev *dev;
2332 uint64_t orig_offloads;
2334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2335 dev = &rte_eth_devices[port_id];
2337 /* save original values in case of failure */
2338 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2340 /*check which option changed by application*/
2341 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2342 org = !!(dev->data->dev_conf.rxmode.offloads &
2343 DEV_RX_OFFLOAD_VLAN_STRIP);
2346 dev->data->dev_conf.rxmode.offloads |=
2347 DEV_RX_OFFLOAD_VLAN_STRIP;
2349 dev->data->dev_conf.rxmode.offloads &=
2350 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2351 mask |= ETH_VLAN_STRIP_MASK;
2354 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2355 org = !!(dev->data->dev_conf.rxmode.offloads &
2356 DEV_RX_OFFLOAD_VLAN_FILTER);
2359 dev->data->dev_conf.rxmode.offloads |=
2360 DEV_RX_OFFLOAD_VLAN_FILTER;
2362 dev->data->dev_conf.rxmode.offloads &=
2363 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2364 mask |= ETH_VLAN_FILTER_MASK;
2367 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2368 org = !!(dev->data->dev_conf.rxmode.offloads &
2369 DEV_RX_OFFLOAD_VLAN_EXTEND);
2372 dev->data->dev_conf.rxmode.offloads |=
2373 DEV_RX_OFFLOAD_VLAN_EXTEND;
2375 dev->data->dev_conf.rxmode.offloads &=
2376 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2377 mask |= ETH_VLAN_EXTEND_MASK;
2384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2387 * Convert to the offload bitfield API just in case the underlying PMD
2388 * still supporting it.
2390 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2391 &dev->data->dev_conf.rxmode);
2392 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2394 /* hit an error restore original values */
2395 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2396 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2397 &dev->data->dev_conf.rxmode);
2404 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2406 struct rte_eth_dev *dev;
2409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 dev = &rte_eth_devices[port_id];
2412 if (dev->data->dev_conf.rxmode.offloads &
2413 DEV_RX_OFFLOAD_VLAN_STRIP)
2414 ret |= ETH_VLAN_STRIP_OFFLOAD;
2416 if (dev->data->dev_conf.rxmode.offloads &
2417 DEV_RX_OFFLOAD_VLAN_FILTER)
2418 ret |= ETH_VLAN_FILTER_OFFLOAD;
2420 if (dev->data->dev_conf.rxmode.offloads &
2421 DEV_RX_OFFLOAD_VLAN_EXTEND)
2422 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2428 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2430 struct rte_eth_dev *dev;
2432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 dev = &rte_eth_devices[port_id];
2434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2435 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2441 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2443 struct rte_eth_dev *dev;
2445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2446 dev = &rte_eth_devices[port_id];
2447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2448 memset(fc_conf, 0, sizeof(*fc_conf));
2449 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2453 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2455 struct rte_eth_dev *dev;
2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2458 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2459 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2463 dev = &rte_eth_devices[port_id];
2464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2465 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2469 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2470 struct rte_eth_pfc_conf *pfc_conf)
2472 struct rte_eth_dev *dev;
2474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2475 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2476 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2480 dev = &rte_eth_devices[port_id];
2481 /* High water, low water validation are device specific */
2482 if (*dev->dev_ops->priority_flow_ctrl_set)
2483 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2488 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2496 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2497 for (i = 0; i < num; i++) {
2498 if (reta_conf[i].mask)
2506 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2510 uint16_t i, idx, shift;
2516 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2520 for (i = 0; i < reta_size; i++) {
2521 idx = i / RTE_RETA_GROUP_SIZE;
2522 shift = i % RTE_RETA_GROUP_SIZE;
2523 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2524 (reta_conf[idx].reta[shift] >= max_rxq)) {
2525 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2526 "the maximum rxq index: %u\n", idx, shift,
2527 reta_conf[idx].reta[shift], max_rxq);
2536 rte_eth_dev_rss_reta_update(uint16_t port_id,
2537 struct rte_eth_rss_reta_entry64 *reta_conf,
2540 struct rte_eth_dev *dev;
2543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2544 /* Check mask bits */
2545 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2549 dev = &rte_eth_devices[port_id];
2551 /* Check entry value */
2552 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2553 dev->data->nb_rx_queues);
2557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2558 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2562 rte_eth_dev_rss_reta_query(uint16_t port_id,
2563 struct rte_eth_rss_reta_entry64 *reta_conf,
2566 struct rte_eth_dev *dev;
2569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2571 /* Check mask bits */
2572 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2576 dev = &rte_eth_devices[port_id];
2577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2578 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2582 rte_eth_dev_rss_hash_update(uint16_t port_id,
2583 struct rte_eth_rss_conf *rss_conf)
2585 struct rte_eth_dev *dev;
2587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2588 dev = &rte_eth_devices[port_id];
2589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2590 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2594 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2595 struct rte_eth_rss_conf *rss_conf)
2597 struct rte_eth_dev *dev;
2599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2602 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2606 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2607 struct rte_eth_udp_tunnel *udp_tunnel)
2609 struct rte_eth_dev *dev;
2611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2612 if (udp_tunnel == NULL) {
2613 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2617 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2618 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2622 dev = &rte_eth_devices[port_id];
2623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2624 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2628 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2629 struct rte_eth_udp_tunnel *udp_tunnel)
2631 struct rte_eth_dev *dev;
2633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2634 dev = &rte_eth_devices[port_id];
2636 if (udp_tunnel == NULL) {
2637 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2641 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2642 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2647 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2651 rte_eth_led_on(uint16_t port_id)
2653 struct rte_eth_dev *dev;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2656 dev = &rte_eth_devices[port_id];
2657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2658 return (*dev->dev_ops->dev_led_on)(dev);
2662 rte_eth_led_off(uint16_t port_id)
2664 struct rte_eth_dev *dev;
2666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2667 dev = &rte_eth_devices[port_id];
2668 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2669 return (*dev->dev_ops->dev_led_off)(dev);
2673 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2677 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2679 struct rte_eth_dev_info dev_info;
2680 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 rte_eth_dev_info_get(port_id, &dev_info);
2686 for (i = 0; i < dev_info.max_mac_addrs; i++)
2687 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2693 static const struct ether_addr null_mac_addr;
2696 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2699 struct rte_eth_dev *dev;
2704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2705 dev = &rte_eth_devices[port_id];
2706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2708 if (is_zero_ether_addr(addr)) {
2709 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2713 if (pool >= ETH_64_POOLS) {
2714 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2718 index = get_mac_addr_index(port_id, addr);
2720 index = get_mac_addr_index(port_id, &null_mac_addr);
2722 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2727 pool_mask = dev->data->mac_pool_sel[index];
2729 /* Check if both MAC address and pool is already there, and do nothing */
2730 if (pool_mask & (1ULL << pool))
2735 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2738 /* Update address in NIC data structure */
2739 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2741 /* Update pool bitmap in NIC data structure */
2742 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2749 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2751 struct rte_eth_dev *dev;
2754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2755 dev = &rte_eth_devices[port_id];
2756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2758 index = get_mac_addr_index(port_id, addr);
2760 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2762 } else if (index < 0)
2763 return 0; /* Do nothing if address wasn't found */
2766 (*dev->dev_ops->mac_addr_remove)(dev, index);
2768 /* Update address in NIC data structure */
2769 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2771 /* reset pool bitmap */
2772 dev->data->mac_pool_sel[index] = 0;
2778 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2780 struct rte_eth_dev *dev;
2782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2784 if (!is_valid_assigned_ether_addr(addr))
2787 dev = &rte_eth_devices[port_id];
2788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2790 /* Update default address in NIC data structure */
2791 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2793 (*dev->dev_ops->mac_addr_set)(dev, addr);
2800 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2804 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2806 struct rte_eth_dev_info dev_info;
2807 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2810 rte_eth_dev_info_get(port_id, &dev_info);
2811 if (!dev->data->hash_mac_addrs)
2814 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2815 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2816 ETHER_ADDR_LEN) == 0)
2823 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2828 struct rte_eth_dev *dev;
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2833 if (is_zero_ether_addr(addr)) {
2834 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2839 index = get_hash_mac_addr_index(port_id, addr);
2840 /* Check if it's already there, and do nothing */
2841 if ((index >= 0) && on)
2846 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2847 "set in UTA\n", port_id);
2851 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2853 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2860 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2862 /* Update address in NIC data structure */
2864 ether_addr_copy(addr,
2865 &dev->data->hash_mac_addrs[index]);
2867 ether_addr_copy(&null_mac_addr,
2868 &dev->data->hash_mac_addrs[index]);
2875 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2877 struct rte_eth_dev *dev;
2879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2881 dev = &rte_eth_devices[port_id];
2883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2884 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2887 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2890 struct rte_eth_dev *dev;
2891 struct rte_eth_dev_info dev_info;
2892 struct rte_eth_link link;
2894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2896 dev = &rte_eth_devices[port_id];
2897 rte_eth_dev_info_get(port_id, &dev_info);
2898 link = dev->data->dev_link;
2900 if (queue_idx > dev_info.max_tx_queues) {
2901 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2902 "invalid queue id=%d\n", port_id, queue_idx);
2906 if (tx_rate > link.link_speed) {
2907 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2908 "bigger than link speed= %d\n",
2909 tx_rate, link.link_speed);
2913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2914 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2918 rte_eth_mirror_rule_set(uint16_t port_id,
2919 struct rte_eth_mirror_conf *mirror_conf,
2920 uint8_t rule_id, uint8_t on)
2922 struct rte_eth_dev *dev;
2924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2925 if (mirror_conf->rule_type == 0) {
2926 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2930 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2931 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2936 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2937 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2938 (mirror_conf->pool_mask == 0)) {
2939 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2943 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2944 mirror_conf->vlan.vlan_mask == 0) {
2945 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2949 dev = &rte_eth_devices[port_id];
2950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2952 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2956 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2958 struct rte_eth_dev *dev;
2960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2962 dev = &rte_eth_devices[port_id];
2963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2965 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2968 RTE_INIT(eth_dev_init_cb_lists)
2972 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
2973 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
2977 rte_eth_dev_callback_register(uint16_t port_id,
2978 enum rte_eth_event_type event,
2979 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2981 struct rte_eth_dev *dev;
2982 struct rte_eth_dev_callback *user_cb;
2983 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2989 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2990 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2994 if (port_id == RTE_ETH_ALL) {
2996 last_port = RTE_MAX_ETHPORTS - 1;
2998 next_port = last_port = port_id;
3001 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3004 dev = &rte_eth_devices[next_port];
3006 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3007 if (user_cb->cb_fn == cb_fn &&
3008 user_cb->cb_arg == cb_arg &&
3009 user_cb->event == event) {
3014 /* create a new callback. */
3015 if (user_cb == NULL) {
3016 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3017 sizeof(struct rte_eth_dev_callback), 0);
3018 if (user_cb != NULL) {
3019 user_cb->cb_fn = cb_fn;
3020 user_cb->cb_arg = cb_arg;
3021 user_cb->event = event;
3022 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3025 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3026 rte_eth_dev_callback_unregister(port_id, event,
3032 } while (++next_port <= last_port);
3034 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3039 rte_eth_dev_callback_unregister(uint16_t port_id,
3040 enum rte_eth_event_type event,
3041 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3044 struct rte_eth_dev *dev;
3045 struct rte_eth_dev_callback *cb, *next;
3046 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3052 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3053 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3057 if (port_id == RTE_ETH_ALL) {
3059 last_port = RTE_MAX_ETHPORTS - 1;
3061 next_port = last_port = port_id;
3064 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3067 dev = &rte_eth_devices[next_port];
3069 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3072 next = TAILQ_NEXT(cb, next);
3074 if (cb->cb_fn != cb_fn || cb->event != event ||
3075 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3079 * if this callback is not executing right now,
3082 if (cb->active == 0) {
3083 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3089 } while (++next_port <= last_port);
3091 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3096 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3097 enum rte_eth_event_type event, void *ret_param)
3099 struct rte_eth_dev_callback *cb_lst;
3100 struct rte_eth_dev_callback dev_cb;
3103 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3104 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3105 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3109 if (ret_param != NULL)
3110 dev_cb.ret_param = ret_param;
3112 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3113 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3114 dev_cb.cb_arg, dev_cb.ret_param);
3115 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3118 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3123 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3126 struct rte_eth_dev *dev;
3127 struct rte_intr_handle *intr_handle;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3133 dev = &rte_eth_devices[port_id];
3135 if (!dev->intr_handle) {
3136 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3140 intr_handle = dev->intr_handle;
3141 if (!intr_handle->intr_vec) {
3142 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3146 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3147 vec = intr_handle->intr_vec[qid];
3148 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3149 if (rc && rc != -EEXIST) {
3150 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3151 " op %d epfd %d vec %u\n",
3152 port_id, qid, op, epfd, vec);
3159 const struct rte_memzone *
3160 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3161 uint16_t queue_id, size_t size, unsigned align,
3164 char z_name[RTE_MEMZONE_NAMESIZE];
3165 const struct rte_memzone *mz;
3167 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3168 dev->device->driver->name, ring_name,
3169 dev->data->port_id, queue_id);
3171 mz = rte_memzone_lookup(z_name);
3175 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3179 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3180 int epfd, int op, void *data)
3183 struct rte_eth_dev *dev;
3184 struct rte_intr_handle *intr_handle;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3189 dev = &rte_eth_devices[port_id];
3190 if (queue_id >= dev->data->nb_rx_queues) {
3191 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3195 if (!dev->intr_handle) {
3196 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3200 intr_handle = dev->intr_handle;
3201 if (!intr_handle->intr_vec) {
3202 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3206 vec = intr_handle->intr_vec[queue_id];
3207 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3208 if (rc && rc != -EEXIST) {
3209 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3210 " op %d epfd %d vec %u\n",
3211 port_id, queue_id, op, epfd, vec);
3219 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3222 struct rte_eth_dev *dev;
3224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3226 dev = &rte_eth_devices[port_id];
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3229 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3233 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3236 struct rte_eth_dev *dev;
3238 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3240 dev = &rte_eth_devices[port_id];
3242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3243 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3248 rte_eth_dev_filter_supported(uint16_t port_id,
3249 enum rte_filter_type filter_type)
3251 struct rte_eth_dev *dev;
3253 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3255 dev = &rte_eth_devices[port_id];
3256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3257 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3258 RTE_ETH_FILTER_NOP, NULL);
3262 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3263 enum rte_filter_type filter_type,
3264 enum rte_filter_op filter_op, void *arg);
3267 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3268 enum rte_filter_type filter_type,
3269 enum rte_filter_op filter_op, void *arg)
3271 struct rte_eth_fdir_info_v22 {
3272 enum rte_fdir_mode mode;
3273 struct rte_eth_fdir_masks mask;
3274 struct rte_eth_fdir_flex_conf flex_conf;
3275 uint32_t guarant_spc;
3277 uint32_t flow_types_mask[1];
3278 uint32_t max_flexpayload;
3279 uint32_t flex_payload_unit;
3280 uint32_t max_flex_payload_segment_num;
3281 uint16_t flex_payload_limit;
3282 uint32_t flex_bitmask_unit;
3283 uint32_t max_flex_bitmask_num;
3286 struct rte_eth_hash_global_conf_v22 {
3287 enum rte_eth_hash_function hash_func;
3288 uint32_t sym_hash_enable_mask[1];
3289 uint32_t valid_bit_mask[1];
3292 struct rte_eth_hash_filter_info_v22 {
3293 enum rte_eth_hash_filter_info_type info_type;
3296 struct rte_eth_hash_global_conf_v22 global_conf;
3297 struct rte_eth_input_set_conf input_set_conf;
3301 struct rte_eth_dev *dev;
3303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3305 dev = &rte_eth_devices[port_id];
3306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3307 if (filter_op == RTE_ETH_FILTER_INFO) {
3309 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3310 struct rte_eth_fdir_info fdir_info;
3312 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3314 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3315 filter_op, (void *)&fdir_info);
3316 fdir_info_v22->mode = fdir_info.mode;
3317 fdir_info_v22->mask = fdir_info.mask;
3318 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3319 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3320 fdir_info_v22->best_spc = fdir_info.best_spc;
3321 fdir_info_v22->flow_types_mask[0] =
3322 (uint32_t)fdir_info.flow_types_mask[0];
3323 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3324 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3325 fdir_info_v22->max_flex_payload_segment_num =
3326 fdir_info.max_flex_payload_segment_num;
3327 fdir_info_v22->flex_payload_limit =
3328 fdir_info.flex_payload_limit;
3329 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3330 fdir_info_v22->max_flex_bitmask_num =
3331 fdir_info.max_flex_bitmask_num;
3333 } else if (filter_op == RTE_ETH_FILTER_GET) {
3335 struct rte_eth_hash_filter_info f_info;
3336 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3337 (struct rte_eth_hash_filter_info_v22 *)arg;
3339 f_info.info_type = f_info_v22->info_type;
3340 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3341 filter_op, (void *)&f_info);
3343 switch (f_info_v22->info_type) {
3344 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3345 f_info_v22->info.enable = f_info.info.enable;
3347 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3348 f_info_v22->info.global_conf.hash_func =
3349 f_info.info.global_conf.hash_func;
3350 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3352 f_info.info.global_conf.sym_hash_enable_mask[0];
3353 f_info_v22->info.global_conf.valid_bit_mask[0] =
3355 f_info.info.global_conf.valid_bit_mask[0];
3357 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3358 f_info_v22->info.input_set_conf =
3359 f_info.info.input_set_conf;
3365 } else if (filter_op == RTE_ETH_FILTER_SET) {
3366 struct rte_eth_hash_filter_info f_info;
3367 struct rte_eth_hash_filter_info_v22 *f_v22 =
3368 (struct rte_eth_hash_filter_info_v22 *)arg;
3370 f_info.info_type = f_v22->info_type;
3371 switch (f_v22->info_type) {
3372 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3373 f_info.info.enable = f_v22->info.enable;
3375 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3376 f_info.info.global_conf.hash_func =
3377 f_v22->info.global_conf.hash_func;
3378 f_info.info.global_conf.sym_hash_enable_mask[0] =
3380 f_v22->info.global_conf.sym_hash_enable_mask[0];
3381 f_info.info.global_conf.valid_bit_mask[0] =
3383 f_v22->info.global_conf.valid_bit_mask[0];
3385 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3386 f_info.info.input_set_conf =
3387 f_v22->info.input_set_conf;
3392 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3395 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3398 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3401 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3402 enum rte_filter_type filter_type,
3403 enum rte_filter_op filter_op, void *arg);
3406 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3407 enum rte_filter_type filter_type,
3408 enum rte_filter_op filter_op, void *arg)
3410 struct rte_eth_dev *dev;
3412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3414 dev = &rte_eth_devices[port_id];
3415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3416 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3418 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3419 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3420 enum rte_filter_type filter_type,
3421 enum rte_filter_op filter_op, void *arg),
3422 rte_eth_dev_filter_ctrl_v1802);
3425 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3426 rte_rx_callback_fn fn, void *user_param)
3428 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3429 rte_errno = ENOTSUP;
3432 /* check input parameters */
3433 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3434 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3438 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3446 cb->param = user_param;
3448 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3449 /* Add the callbacks in fifo order. */
3450 struct rte_eth_rxtx_callback *tail =
3451 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3454 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3461 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3467 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3468 rte_rx_callback_fn fn, void *user_param)
3470 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3471 rte_errno = ENOTSUP;
3474 /* check input parameters */
3475 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3476 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3481 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3489 cb->param = user_param;
3491 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3492 /* Add the callbacks at fisrt position*/
3493 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3495 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3496 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3502 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3503 rte_tx_callback_fn fn, void *user_param)
3505 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3506 rte_errno = ENOTSUP;
3509 /* check input parameters */
3510 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3511 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3516 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3524 cb->param = user_param;
3526 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3527 /* Add the callbacks in fifo order. */
3528 struct rte_eth_rxtx_callback *tail =
3529 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3532 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3539 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3545 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3546 struct rte_eth_rxtx_callback *user_cb)
3548 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3551 /* Check input parameters. */
3552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3553 if (user_cb == NULL ||
3554 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3557 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3558 struct rte_eth_rxtx_callback *cb;
3559 struct rte_eth_rxtx_callback **prev_cb;
3562 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3563 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3564 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3566 if (cb == user_cb) {
3567 /* Remove the user cb from the callback list. */
3568 *prev_cb = cb->next;
3573 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3579 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3580 struct rte_eth_rxtx_callback *user_cb)
3582 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3585 /* Check input parameters. */
3586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3587 if (user_cb == NULL ||
3588 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3591 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3593 struct rte_eth_rxtx_callback *cb;
3594 struct rte_eth_rxtx_callback **prev_cb;
3596 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3597 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3598 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3600 if (cb == user_cb) {
3601 /* Remove the user cb from the callback list. */
3602 *prev_cb = cb->next;
3607 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3613 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3614 struct rte_eth_rxq_info *qinfo)
3616 struct rte_eth_dev *dev;
3618 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3623 dev = &rte_eth_devices[port_id];
3624 if (queue_id >= dev->data->nb_rx_queues) {
3625 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3631 memset(qinfo, 0, sizeof(*qinfo));
3632 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3637 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3638 struct rte_eth_txq_info *qinfo)
3640 struct rte_eth_dev *dev;
3642 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3647 dev = &rte_eth_devices[port_id];
3648 if (queue_id >= dev->data->nb_tx_queues) {
3649 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3655 memset(qinfo, 0, sizeof(*qinfo));
3656 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3661 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3662 struct ether_addr *mc_addr_set,
3663 uint32_t nb_mc_addr)
3665 struct rte_eth_dev *dev;
3667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3669 dev = &rte_eth_devices[port_id];
3670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3671 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3675 rte_eth_timesync_enable(uint16_t port_id)
3677 struct rte_eth_dev *dev;
3679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3680 dev = &rte_eth_devices[port_id];
3682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3683 return (*dev->dev_ops->timesync_enable)(dev);
3687 rte_eth_timesync_disable(uint16_t port_id)
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3692 dev = &rte_eth_devices[port_id];
3694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3695 return (*dev->dev_ops->timesync_disable)(dev);
3699 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3702 struct rte_eth_dev *dev;
3704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3705 dev = &rte_eth_devices[port_id];
3707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3708 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3712 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3713 struct timespec *timestamp)
3715 struct rte_eth_dev *dev;
3717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3718 dev = &rte_eth_devices[port_id];
3720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3721 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3725 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3727 struct rte_eth_dev *dev;
3729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3730 dev = &rte_eth_devices[port_id];
3732 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3733 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3737 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3739 struct rte_eth_dev *dev;
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3742 dev = &rte_eth_devices[port_id];
3744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3745 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3749 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3751 struct rte_eth_dev *dev;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3754 dev = &rte_eth_devices[port_id];
3756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3757 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3761 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3763 struct rte_eth_dev *dev;
3765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3767 dev = &rte_eth_devices[port_id];
3768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3769 return (*dev->dev_ops->get_reg)(dev, info);
3773 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3775 struct rte_eth_dev *dev;
3777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3779 dev = &rte_eth_devices[port_id];
3780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3781 return (*dev->dev_ops->get_eeprom_length)(dev);
3785 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3787 struct rte_eth_dev *dev;
3789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3791 dev = &rte_eth_devices[port_id];
3792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3793 return (*dev->dev_ops->get_eeprom)(dev, info);
3797 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3799 struct rte_eth_dev *dev;
3801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3803 dev = &rte_eth_devices[port_id];
3804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3805 return (*dev->dev_ops->set_eeprom)(dev, info);
3809 rte_eth_dev_get_dcb_info(uint16_t port_id,
3810 struct rte_eth_dcb_info *dcb_info)
3812 struct rte_eth_dev *dev;
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3816 dev = &rte_eth_devices[port_id];
3817 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3820 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3824 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3825 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3827 struct rte_eth_dev *dev;
3829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3830 if (l2_tunnel == NULL) {
3831 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3835 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3836 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3840 dev = &rte_eth_devices[port_id];
3841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3843 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3847 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3848 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3852 struct rte_eth_dev *dev;
3854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3856 if (l2_tunnel == NULL) {
3857 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3861 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3862 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3867 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3871 dev = &rte_eth_devices[port_id];
3872 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3874 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3878 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3879 const struct rte_eth_desc_lim *desc_lim)
3881 if (desc_lim->nb_align != 0)
3882 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3884 if (desc_lim->nb_max != 0)
3885 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3887 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3891 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3892 uint16_t *nb_rx_desc,
3893 uint16_t *nb_tx_desc)
3895 struct rte_eth_dev *dev;
3896 struct rte_eth_dev_info dev_info;
3898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3900 dev = &rte_eth_devices[port_id];
3901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3903 rte_eth_dev_info_get(port_id, &dev_info);
3905 if (nb_rx_desc != NULL)
3906 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3908 if (nb_tx_desc != NULL)
3909 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3915 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3917 struct rte_eth_dev *dev;
3919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3924 dev = &rte_eth_devices[port_id];
3926 if (*dev->dev_ops->pool_ops_supported == NULL)
3927 return 1; /* all pools are supported */
3929 return (*dev->dev_ops->pool_ops_supported)(dev, pool);