4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
70 #include "ethdev_profile.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t eth_dev_last_created_port;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
183 rte_eth_devices[i].device) {
184 if (!strcmp(rte_eth_devices[i].device->name, name))
185 return &rte_eth_devices[i];
192 rte_eth_dev_find_free_port(void)
196 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
197 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
200 return RTE_MAX_ETHPORTS;
203 static struct rte_eth_dev *
204 eth_dev_get(uint16_t port_id)
206 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 eth_dev->state = RTE_ETH_DEV_ATTACHED;
210 TAILQ_INIT(&(eth_dev->link_intr_cbs));
212 eth_dev_last_created_port = port_id;
218 rte_eth_dev_allocate(const char *name)
221 struct rte_eth_dev *eth_dev;
223 port_id = rte_eth_dev_find_free_port();
224 if (port_id == RTE_MAX_ETHPORTS) {
225 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
229 if (rte_eth_dev_data == NULL)
230 rte_eth_dev_data_alloc();
232 if (rte_eth_dev_allocated(name) != NULL) {
233 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
238 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
239 eth_dev = eth_dev_get(port_id);
240 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
241 eth_dev->data->port_id = port_id;
242 eth_dev->data->mtu = ETHER_MTU;
248 * Attach to a port already registered by the primary process, which
249 * makes sure that the same device would have the same port id both
250 * in the primary and secondary process.
253 rte_eth_dev_attach_secondary(const char *name)
256 struct rte_eth_dev *eth_dev;
258 if (rte_eth_dev_data == NULL)
259 rte_eth_dev_data_alloc();
261 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
262 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
265 if (i == RTE_MAX_ETHPORTS) {
267 "device %s is not driven by the primary process\n",
272 eth_dev = eth_dev_get(i);
273 RTE_ASSERT(eth_dev->data->port_id == i);
279 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
284 eth_dev->state = RTE_ETH_DEV_UNUSED;
289 rte_eth_dev_is_valid_port(uint16_t port_id)
291 if (port_id >= RTE_MAX_ETHPORTS ||
292 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
293 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
300 rte_eth_dev_socket_id(uint16_t port_id)
302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
303 return rte_eth_devices[port_id].data->numa_node;
307 rte_eth_dev_count(void)
314 RTE_ETH_FOREACH_DEV(p)
321 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
328 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
332 /* shouldn't check 'rte_eth_devices[i].data',
333 * because it might be overwritten by VDEV PMD */
334 tmp = rte_eth_devices[port_id].device->name;
340 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
346 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
350 RTE_ETH_FOREACH_DEV(i) {
351 if (!rte_eth_devices[i].device)
354 ret = strncmp(name, rte_eth_devices[i].device->name,
365 rte_eth_dev_is_detachable(uint16_t port_id)
369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
371 dev_flags = rte_eth_devices[port_id].data->dev_flags;
372 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
373 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
379 /* attach the new device, then store port_id of the device */
381 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
384 int current = rte_eth_dev_count();
388 if ((devargs == NULL) || (port_id == NULL)) {
393 /* parse devargs, then retrieve device name and args */
394 if (rte_eal_parse_devargs_str(devargs, &name, &args))
397 ret = rte_eal_dev_attach(name, args);
401 /* no point looking at the port count if no port exists */
402 if (!rte_eth_dev_count()) {
403 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
408 /* if nothing happened, there is a bug here, since some driver told us
409 * it did attach a device, but did not create a port.
411 if (current == rte_eth_dev_count()) {
416 *port_id = eth_dev_last_created_port;
425 /* detach the device, then store the name of the device */
427 rte_eth_dev_detach(uint16_t port_id, char *name)
436 /* FIXME: move this to eal, once device flags are relocated there */
437 if (rte_eth_dev_is_detachable(port_id))
440 snprintf(name, RTE_DEV_NAME_MAX_LEN, "%s",
441 rte_eth_devices[port_id].device->name);
443 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
447 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
455 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
457 uint16_t old_nb_queues = dev->data->nb_rx_queues;
461 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
462 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
463 sizeof(dev->data->rx_queues[0]) * nb_queues,
464 RTE_CACHE_LINE_SIZE);
465 if (dev->data->rx_queues == NULL) {
466 dev->data->nb_rx_queues = 0;
469 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
472 rxq = dev->data->rx_queues;
474 for (i = nb_queues; i < old_nb_queues; i++)
475 (*dev->dev_ops->rx_queue_release)(rxq[i]);
476 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
477 RTE_CACHE_LINE_SIZE);
480 if (nb_queues > old_nb_queues) {
481 uint16_t new_qs = nb_queues - old_nb_queues;
483 memset(rxq + old_nb_queues, 0,
484 sizeof(rxq[0]) * new_qs);
487 dev->data->rx_queues = rxq;
489 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
492 rxq = dev->data->rx_queues;
494 for (i = nb_queues; i < old_nb_queues; i++)
495 (*dev->dev_ops->rx_queue_release)(rxq[i]);
497 rte_free(dev->data->rx_queues);
498 dev->data->rx_queues = NULL;
500 dev->data->nb_rx_queues = nb_queues;
505 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
507 struct rte_eth_dev *dev;
509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
511 dev = &rte_eth_devices[port_id];
512 if (rx_queue_id >= dev->data->nb_rx_queues) {
513 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
519 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
520 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
521 " already started\n",
522 rx_queue_id, port_id);
526 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
531 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
533 struct rte_eth_dev *dev;
535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
537 dev = &rte_eth_devices[port_id];
538 if (rx_queue_id >= dev->data->nb_rx_queues) {
539 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
545 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
546 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
547 " already stopped\n",
548 rx_queue_id, port_id);
552 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
557 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
559 struct rte_eth_dev *dev;
561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
563 dev = &rte_eth_devices[port_id];
564 if (tx_queue_id >= dev->data->nb_tx_queues) {
565 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
571 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
572 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
573 " already started\n",
574 tx_queue_id, port_id);
578 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
583 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
585 struct rte_eth_dev *dev;
587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
589 dev = &rte_eth_devices[port_id];
590 if (tx_queue_id >= dev->data->nb_tx_queues) {
591 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
597 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
598 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
599 " already stopped\n",
600 tx_queue_id, port_id);
604 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
609 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
611 uint16_t old_nb_queues = dev->data->nb_tx_queues;
615 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
616 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
617 sizeof(dev->data->tx_queues[0]) * nb_queues,
618 RTE_CACHE_LINE_SIZE);
619 if (dev->data->tx_queues == NULL) {
620 dev->data->nb_tx_queues = 0;
623 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
626 txq = dev->data->tx_queues;
628 for (i = nb_queues; i < old_nb_queues; i++)
629 (*dev->dev_ops->tx_queue_release)(txq[i]);
630 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
631 RTE_CACHE_LINE_SIZE);
634 if (nb_queues > old_nb_queues) {
635 uint16_t new_qs = nb_queues - old_nb_queues;
637 memset(txq + old_nb_queues, 0,
638 sizeof(txq[0]) * new_qs);
641 dev->data->tx_queues = txq;
643 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
646 txq = dev->data->tx_queues;
648 for (i = nb_queues; i < old_nb_queues; i++)
649 (*dev->dev_ops->tx_queue_release)(txq[i]);
651 rte_free(dev->data->tx_queues);
652 dev->data->tx_queues = NULL;
654 dev->data->nb_tx_queues = nb_queues;
659 rte_eth_speed_bitflag(uint32_t speed, int duplex)
662 case ETH_SPEED_NUM_10M:
663 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
664 case ETH_SPEED_NUM_100M:
665 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
666 case ETH_SPEED_NUM_1G:
667 return ETH_LINK_SPEED_1G;
668 case ETH_SPEED_NUM_2_5G:
669 return ETH_LINK_SPEED_2_5G;
670 case ETH_SPEED_NUM_5G:
671 return ETH_LINK_SPEED_5G;
672 case ETH_SPEED_NUM_10G:
673 return ETH_LINK_SPEED_10G;
674 case ETH_SPEED_NUM_20G:
675 return ETH_LINK_SPEED_20G;
676 case ETH_SPEED_NUM_25G:
677 return ETH_LINK_SPEED_25G;
678 case ETH_SPEED_NUM_40G:
679 return ETH_LINK_SPEED_40G;
680 case ETH_SPEED_NUM_50G:
681 return ETH_LINK_SPEED_50G;
682 case ETH_SPEED_NUM_56G:
683 return ETH_LINK_SPEED_56G;
684 case ETH_SPEED_NUM_100G:
685 return ETH_LINK_SPEED_100G;
692 * A conversion function from rxmode bitfield API.
695 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
696 uint64_t *rx_offloads)
698 uint64_t offloads = 0;
700 if (rxmode->header_split == 1)
701 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
702 if (rxmode->hw_ip_checksum == 1)
703 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
704 if (rxmode->hw_vlan_filter == 1)
705 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
706 if (rxmode->hw_vlan_strip == 1)
707 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
708 if (rxmode->hw_vlan_extend == 1)
709 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
710 if (rxmode->jumbo_frame == 1)
711 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
712 if (rxmode->hw_strip_crc == 1)
713 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
714 if (rxmode->enable_scatter == 1)
715 offloads |= DEV_RX_OFFLOAD_SCATTER;
716 if (rxmode->enable_lro == 1)
717 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
718 if (rxmode->hw_timestamp == 1)
719 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
721 *rx_offloads = offloads;
725 * A conversion function from rxmode offloads API.
728 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
729 struct rte_eth_rxmode *rxmode)
732 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
733 rxmode->header_split = 1;
735 rxmode->header_split = 0;
736 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
737 rxmode->hw_ip_checksum = 1;
739 rxmode->hw_ip_checksum = 0;
740 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
741 rxmode->hw_vlan_filter = 1;
743 rxmode->hw_vlan_filter = 0;
744 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
745 rxmode->hw_vlan_strip = 1;
747 rxmode->hw_vlan_strip = 0;
748 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
749 rxmode->hw_vlan_extend = 1;
751 rxmode->hw_vlan_extend = 0;
752 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
753 rxmode->jumbo_frame = 1;
755 rxmode->jumbo_frame = 0;
756 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
757 rxmode->hw_strip_crc = 1;
759 rxmode->hw_strip_crc = 0;
760 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
761 rxmode->enable_scatter = 1;
763 rxmode->enable_scatter = 0;
764 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
765 rxmode->enable_lro = 1;
767 rxmode->enable_lro = 0;
768 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
769 rxmode->hw_timestamp = 1;
771 rxmode->hw_timestamp = 0;
775 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
776 const struct rte_eth_conf *dev_conf)
778 struct rte_eth_dev *dev;
779 struct rte_eth_dev_info dev_info;
780 struct rte_eth_conf local_conf = *dev_conf;
783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
785 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
787 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
788 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
792 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
794 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
795 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
799 dev = &rte_eth_devices[port_id];
801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
804 if (dev->data->dev_started) {
806 "port %d must be stopped to allow configuration\n", port_id);
811 * Convert between the offloads API to enable PMDs to support
814 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
815 rte_eth_convert_rx_offload_bitfield(
816 &dev_conf->rxmode, &local_conf.rxmode.offloads);
818 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
822 /* Copy the dev_conf parameter into the dev structure */
823 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
826 * Check that the numbers of RX and TX queues are not greater
827 * than the maximum number of RX and TX queues supported by the
830 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
832 if (nb_rx_q == 0 && nb_tx_q == 0) {
833 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
837 if (nb_rx_q > dev_info.max_rx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
839 port_id, nb_rx_q, dev_info.max_rx_queues);
843 if (nb_tx_q > dev_info.max_tx_queues) {
844 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
845 port_id, nb_tx_q, dev_info.max_tx_queues);
849 /* Check that the device supports requested interrupts */
850 if ((dev_conf->intr_conf.lsc == 1) &&
851 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
852 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
853 dev->device->driver->name);
856 if ((dev_conf->intr_conf.rmv == 1) &&
857 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
858 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
859 dev->device->driver->name);
864 * If jumbo frames are enabled, check that the maximum RX packet
865 * length is supported by the configured device.
867 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
868 if (dev_conf->rxmode.max_rx_pkt_len >
869 dev_info.max_rx_pktlen) {
870 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
871 " > max valid value %u\n",
873 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
874 (unsigned)dev_info.max_rx_pktlen);
876 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
877 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
878 " < min valid value %u\n",
880 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
881 (unsigned)ETHER_MIN_LEN);
885 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
886 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
887 /* Use default value */
888 dev->data->dev_conf.rxmode.max_rx_pkt_len =
893 * Setup new number of RX/TX queues and reconfigure device.
895 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
897 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
902 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
904 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
906 rte_eth_dev_rx_queue_config(dev, 0);
910 diag = (*dev->dev_ops->dev_configure)(dev);
912 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
914 rte_eth_dev_rx_queue_config(dev, 0);
915 rte_eth_dev_tx_queue_config(dev, 0);
919 /* Initialize Rx profiling if enabled at compilation time. */
920 diag = __rte_eth_profile_rx_init(port_id, dev);
922 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
924 rte_eth_dev_rx_queue_config(dev, 0);
925 rte_eth_dev_tx_queue_config(dev, 0);
933 _rte_eth_dev_reset(struct rte_eth_dev *dev)
935 if (dev->data->dev_started) {
937 "port %d must be stopped to allow reset\n",
942 rte_eth_dev_rx_queue_config(dev, 0);
943 rte_eth_dev_tx_queue_config(dev, 0);
945 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
949 rte_eth_dev_config_restore(uint16_t port_id)
951 struct rte_eth_dev *dev;
952 struct rte_eth_dev_info dev_info;
953 struct ether_addr *addr;
958 dev = &rte_eth_devices[port_id];
960 rte_eth_dev_info_get(port_id, &dev_info);
962 /* replay MAC address configuration including default MAC */
963 addr = &dev->data->mac_addrs[0];
964 if (*dev->dev_ops->mac_addr_set != NULL)
965 (*dev->dev_ops->mac_addr_set)(dev, addr);
966 else if (*dev->dev_ops->mac_addr_add != NULL)
967 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
969 if (*dev->dev_ops->mac_addr_add != NULL) {
970 for (i = 1; i < dev_info.max_mac_addrs; i++) {
971 addr = &dev->data->mac_addrs[i];
973 /* skip zero address */
974 if (is_zero_ether_addr(addr))
978 pool_mask = dev->data->mac_pool_sel[i];
981 if (pool_mask & 1ULL)
982 (*dev->dev_ops->mac_addr_add)(dev,
990 /* replay promiscuous configuration */
991 if (rte_eth_promiscuous_get(port_id) == 1)
992 rte_eth_promiscuous_enable(port_id);
993 else if (rte_eth_promiscuous_get(port_id) == 0)
994 rte_eth_promiscuous_disable(port_id);
996 /* replay all multicast configuration */
997 if (rte_eth_allmulticast_get(port_id) == 1)
998 rte_eth_allmulticast_enable(port_id);
999 else if (rte_eth_allmulticast_get(port_id) == 0)
1000 rte_eth_allmulticast_disable(port_id);
1004 rte_eth_dev_start(uint16_t port_id)
1006 struct rte_eth_dev *dev;
1009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1011 dev = &rte_eth_devices[port_id];
1013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1015 if (dev->data->dev_started != 0) {
1016 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1017 " already started\n",
1022 diag = (*dev->dev_ops->dev_start)(dev);
1024 dev->data->dev_started = 1;
1028 rte_eth_dev_config_restore(port_id);
1030 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1032 (*dev->dev_ops->link_update)(dev, 0);
1038 rte_eth_dev_stop(uint16_t port_id)
1040 struct rte_eth_dev *dev;
1042 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1043 dev = &rte_eth_devices[port_id];
1045 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1047 if (dev->data->dev_started == 0) {
1048 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1049 " already stopped\n",
1054 dev->data->dev_started = 0;
1055 (*dev->dev_ops->dev_stop)(dev);
1059 rte_eth_dev_set_link_up(uint16_t port_id)
1061 struct rte_eth_dev *dev;
1063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1065 dev = &rte_eth_devices[port_id];
1067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1068 return (*dev->dev_ops->dev_set_link_up)(dev);
1072 rte_eth_dev_set_link_down(uint16_t port_id)
1074 struct rte_eth_dev *dev;
1076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1078 dev = &rte_eth_devices[port_id];
1080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1081 return (*dev->dev_ops->dev_set_link_down)(dev);
1085 rte_eth_dev_close(uint16_t port_id)
1087 struct rte_eth_dev *dev;
1089 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1090 dev = &rte_eth_devices[port_id];
1092 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1093 dev->data->dev_started = 0;
1094 (*dev->dev_ops->dev_close)(dev);
1096 dev->data->nb_rx_queues = 0;
1097 rte_free(dev->data->rx_queues);
1098 dev->data->rx_queues = NULL;
1099 dev->data->nb_tx_queues = 0;
1100 rte_free(dev->data->tx_queues);
1101 dev->data->tx_queues = NULL;
1105 rte_eth_dev_reset(uint16_t port_id)
1107 struct rte_eth_dev *dev;
1110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1111 dev = &rte_eth_devices[port_id];
1113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1115 rte_eth_dev_stop(port_id);
1116 ret = dev->dev_ops->dev_reset(dev);
1122 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1123 uint16_t nb_rx_desc, unsigned int socket_id,
1124 const struct rte_eth_rxconf *rx_conf,
1125 struct rte_mempool *mp)
1128 uint32_t mbp_buf_size;
1129 struct rte_eth_dev *dev;
1130 struct rte_eth_dev_info dev_info;
1131 struct rte_eth_rxconf local_conf;
1134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1136 dev = &rte_eth_devices[port_id];
1137 if (rx_queue_id >= dev->data->nb_rx_queues) {
1138 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1142 if (dev->data->dev_started) {
1143 RTE_PMD_DEBUG_TRACE(
1144 "port %d must be stopped to allow configuration\n", port_id);
1148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1152 * Check the size of the mbuf data buffer.
1153 * This value must be provided in the private data of the memory pool.
1154 * First check that the memory pool has a valid private data.
1156 rte_eth_dev_info_get(port_id, &dev_info);
1157 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1158 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1159 mp->name, (int) mp->private_data_size,
1160 (int) sizeof(struct rte_pktmbuf_pool_private));
1163 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1165 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1166 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1167 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1171 (int)(RTE_PKTMBUF_HEADROOM +
1172 dev_info.min_rx_bufsize),
1173 (int)RTE_PKTMBUF_HEADROOM,
1174 (int)dev_info.min_rx_bufsize);
1178 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1179 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1180 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1182 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1183 "should be: <= %hu, = %hu, and a product of %hu\n",
1185 dev_info.rx_desc_lim.nb_max,
1186 dev_info.rx_desc_lim.nb_min,
1187 dev_info.rx_desc_lim.nb_align);
1191 rxq = dev->data->rx_queues;
1192 if (rxq[rx_queue_id]) {
1193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1195 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1196 rxq[rx_queue_id] = NULL;
1199 if (rx_conf == NULL)
1200 rx_conf = &dev_info.default_rxconf;
1202 local_conf = *rx_conf;
1203 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1205 * Reflect port offloads to queue offloads in order for
1206 * offloads to not be discarded.
1208 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1209 &local_conf.offloads);
1212 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1213 socket_id, &local_conf, mp);
1215 if (!dev->data->min_rx_buf_size ||
1216 dev->data->min_rx_buf_size > mbp_buf_size)
1217 dev->data->min_rx_buf_size = mbp_buf_size;
1224 * A conversion function from txq_flags API.
1227 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1229 uint64_t offloads = 0;
1231 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1232 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1233 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1234 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1235 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1236 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1237 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1238 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1239 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1240 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1241 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1242 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1243 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1245 *tx_offloads = offloads;
1249 * A conversion function from offloads API.
1252 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1256 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1257 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1258 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1259 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1260 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1261 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1262 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1263 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1264 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1265 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1266 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1267 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1273 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1274 uint16_t nb_tx_desc, unsigned int socket_id,
1275 const struct rte_eth_txconf *tx_conf)
1277 struct rte_eth_dev *dev;
1278 struct rte_eth_dev_info dev_info;
1279 struct rte_eth_txconf local_conf;
1282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1284 dev = &rte_eth_devices[port_id];
1285 if (tx_queue_id >= dev->data->nb_tx_queues) {
1286 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1290 if (dev->data->dev_started) {
1291 RTE_PMD_DEBUG_TRACE(
1292 "port %d must be stopped to allow configuration\n", port_id);
1296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1299 rte_eth_dev_info_get(port_id, &dev_info);
1301 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1302 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1303 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1304 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1305 "should be: <= %hu, = %hu, and a product of %hu\n",
1307 dev_info.tx_desc_lim.nb_max,
1308 dev_info.tx_desc_lim.nb_min,
1309 dev_info.tx_desc_lim.nb_align);
1313 txq = dev->data->tx_queues;
1314 if (txq[tx_queue_id]) {
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1317 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1318 txq[tx_queue_id] = NULL;
1321 if (tx_conf == NULL)
1322 tx_conf = &dev_info.default_txconf;
1325 * Convert between the offloads API to enable PMDs to support
1328 local_conf = *tx_conf;
1329 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1330 rte_eth_convert_txq_offloads(tx_conf->offloads,
1331 &local_conf.txq_flags);
1332 /* Keep the ignore flag. */
1333 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1335 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1336 &local_conf.offloads);
1339 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1340 socket_id, &local_conf);
1344 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1345 void *userdata __rte_unused)
1349 for (i = 0; i < unsent; i++)
1350 rte_pktmbuf_free(pkts[i]);
1354 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1357 uint64_t *count = userdata;
1360 for (i = 0; i < unsent; i++)
1361 rte_pktmbuf_free(pkts[i]);
1367 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1368 buffer_tx_error_fn cbfn, void *userdata)
1370 buffer->error_callback = cbfn;
1371 buffer->error_userdata = userdata;
1376 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1383 buffer->size = size;
1384 if (buffer->error_callback == NULL) {
1385 ret = rte_eth_tx_buffer_set_err_callback(
1386 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1393 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1395 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1397 /* Validate Input Data. Bail if not valid or not supported. */
1398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1399 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1401 /* Call driver to free pending mbufs. */
1402 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1407 rte_eth_promiscuous_enable(uint16_t port_id)
1409 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1412 dev = &rte_eth_devices[port_id];
1414 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1415 (*dev->dev_ops->promiscuous_enable)(dev);
1416 dev->data->promiscuous = 1;
1420 rte_eth_promiscuous_disable(uint16_t port_id)
1422 struct rte_eth_dev *dev;
1424 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1425 dev = &rte_eth_devices[port_id];
1427 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1428 dev->data->promiscuous = 0;
1429 (*dev->dev_ops->promiscuous_disable)(dev);
1433 rte_eth_promiscuous_get(uint16_t port_id)
1435 struct rte_eth_dev *dev;
1437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1439 dev = &rte_eth_devices[port_id];
1440 return dev->data->promiscuous;
1444 rte_eth_allmulticast_enable(uint16_t port_id)
1446 struct rte_eth_dev *dev;
1448 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1449 dev = &rte_eth_devices[port_id];
1451 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1452 (*dev->dev_ops->allmulticast_enable)(dev);
1453 dev->data->all_multicast = 1;
1457 rte_eth_allmulticast_disable(uint16_t port_id)
1459 struct rte_eth_dev *dev;
1461 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1462 dev = &rte_eth_devices[port_id];
1464 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1465 dev->data->all_multicast = 0;
1466 (*dev->dev_ops->allmulticast_disable)(dev);
1470 rte_eth_allmulticast_get(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1476 dev = &rte_eth_devices[port_id];
1477 return dev->data->all_multicast;
1481 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1482 struct rte_eth_link *link)
1484 struct rte_eth_link *dst = link;
1485 struct rte_eth_link *src = &(dev->data->dev_link);
1487 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1488 *(uint64_t *)src) == 0)
1495 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1497 struct rte_eth_dev *dev;
1499 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1500 dev = &rte_eth_devices[port_id];
1502 if (dev->data->dev_conf.intr_conf.lsc != 0)
1503 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1505 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1506 (*dev->dev_ops->link_update)(dev, 1);
1507 *eth_link = dev->data->dev_link;
1512 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1514 struct rte_eth_dev *dev;
1516 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1517 dev = &rte_eth_devices[port_id];
1519 if (dev->data->dev_conf.intr_conf.lsc != 0)
1520 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1522 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1523 (*dev->dev_ops->link_update)(dev, 0);
1524 *eth_link = dev->data->dev_link;
1529 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1531 struct rte_eth_dev *dev;
1533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1535 dev = &rte_eth_devices[port_id];
1536 memset(stats, 0, sizeof(*stats));
1538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1539 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1540 return (*dev->dev_ops->stats_get)(dev, stats);
1544 rte_eth_stats_reset(uint16_t port_id)
1546 struct rte_eth_dev *dev;
1548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1549 dev = &rte_eth_devices[port_id];
1551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1552 (*dev->dev_ops->stats_reset)(dev);
1553 dev->data->rx_mbuf_alloc_failed = 0;
1559 get_xstats_count(uint16_t port_id)
1561 struct rte_eth_dev *dev;
1564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1565 dev = &rte_eth_devices[port_id];
1566 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1567 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1572 if (dev->dev_ops->xstats_get_names != NULL) {
1573 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1579 count += RTE_NB_STATS;
1580 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1582 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1588 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1591 int cnt_xstats, idx_xstat;
1593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1596 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1601 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1606 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1607 if (cnt_xstats < 0) {
1608 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1612 /* Get id-name lookup table */
1613 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1615 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1616 port_id, xstats_names, cnt_xstats, NULL)) {
1617 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1621 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1622 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1632 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1633 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1636 /* Get all xstats */
1638 struct rte_eth_dev *dev;
1639 int cnt_used_entries;
1640 int cnt_expected_entries;
1641 int cnt_driver_entries;
1642 uint32_t idx, id_queue;
1645 cnt_expected_entries = get_xstats_count(port_id);
1646 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1647 (int)size < cnt_expected_entries)
1648 return cnt_expected_entries;
1650 /* port_id checked in get_xstats_count() */
1651 dev = &rte_eth_devices[port_id];
1652 cnt_used_entries = 0;
1654 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1655 snprintf(xstats_names[cnt_used_entries].name,
1656 sizeof(xstats_names[0].name),
1657 "%s", rte_stats_strings[idx].name);
1660 num_q = RTE_MIN(dev->data->nb_rx_queues,
1661 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1662 for (id_queue = 0; id_queue < num_q; id_queue++) {
1663 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1664 snprintf(xstats_names[cnt_used_entries].name,
1665 sizeof(xstats_names[0].name),
1668 rte_rxq_stats_strings[idx].name);
1673 num_q = RTE_MIN(dev->data->nb_tx_queues,
1674 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1675 for (id_queue = 0; id_queue < num_q; id_queue++) {
1676 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1677 snprintf(xstats_names[cnt_used_entries].name,
1678 sizeof(xstats_names[0].name),
1681 rte_txq_stats_strings[idx].name);
1686 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1687 /* If there are any driver-specific xstats, append them
1690 cnt_driver_entries =
1691 (*dev->dev_ops->xstats_get_names_by_id)(
1693 xstats_names + cnt_used_entries,
1695 size - cnt_used_entries);
1696 if (cnt_driver_entries < 0)
1697 return cnt_driver_entries;
1698 cnt_used_entries += cnt_driver_entries;
1700 } else if (dev->dev_ops->xstats_get_names != NULL) {
1701 /* If there are any driver-specific xstats, append them
1704 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1706 xstats_names + cnt_used_entries,
1707 size - cnt_used_entries);
1708 if (cnt_driver_entries < 0)
1709 return cnt_driver_entries;
1710 cnt_used_entries += cnt_driver_entries;
1713 return cnt_used_entries;
1715 /* Get only xstats given by IDS */
1718 struct rte_eth_xstat_name *xstats_names_copy;
1720 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1723 malloc(sizeof(struct rte_eth_xstat_name) * len);
1724 if (!xstats_names_copy) {
1725 RTE_PMD_DEBUG_TRACE(
1726 "ERROR: can't allocate memory for values_copy\n");
1727 free(xstats_names_copy);
1731 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1734 for (i = 0; i < size; i++) {
1735 if (ids[i] >= len) {
1736 RTE_PMD_DEBUG_TRACE(
1737 "ERROR: id value isn't valid\n");
1740 strcpy(xstats_names[i].name,
1741 xstats_names_copy[ids[i]].name);
1743 free(xstats_names_copy);
1749 rte_eth_xstats_get_names(uint16_t port_id,
1750 struct rte_eth_xstat_name *xstats_names,
1753 struct rte_eth_dev *dev;
1754 int cnt_used_entries;
1755 int cnt_expected_entries;
1756 int cnt_driver_entries;
1757 uint32_t idx, id_queue;
1760 cnt_expected_entries = get_xstats_count(port_id);
1761 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1762 (int)size < cnt_expected_entries)
1763 return cnt_expected_entries;
1765 /* port_id checked in get_xstats_count() */
1766 dev = &rte_eth_devices[port_id];
1767 cnt_used_entries = 0;
1769 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1770 snprintf(xstats_names[cnt_used_entries].name,
1771 sizeof(xstats_names[0].name),
1772 "%s", rte_stats_strings[idx].name);
1775 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1776 for (id_queue = 0; id_queue < num_q; id_queue++) {
1777 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1778 snprintf(xstats_names[cnt_used_entries].name,
1779 sizeof(xstats_names[0].name),
1781 id_queue, rte_rxq_stats_strings[idx].name);
1786 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1787 for (id_queue = 0; id_queue < num_q; id_queue++) {
1788 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1789 snprintf(xstats_names[cnt_used_entries].name,
1790 sizeof(xstats_names[0].name),
1792 id_queue, rte_txq_stats_strings[idx].name);
1797 if (dev->dev_ops->xstats_get_names != NULL) {
1798 /* If there are any driver-specific xstats, append them
1801 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1803 xstats_names + cnt_used_entries,
1804 size - cnt_used_entries);
1805 if (cnt_driver_entries < 0)
1806 return cnt_driver_entries;
1807 cnt_used_entries += cnt_driver_entries;
1810 return cnt_used_entries;
1813 /* retrieve ethdev extended statistics */
1815 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1816 uint64_t *values, unsigned int n)
1818 /* If need all xstats */
1820 struct rte_eth_stats eth_stats;
1821 struct rte_eth_dev *dev;
1822 unsigned int count = 0, i, q;
1823 signed int xcount = 0;
1824 uint64_t val, *stats_ptr;
1825 uint16_t nb_rxqs, nb_txqs;
1827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1828 dev = &rte_eth_devices[port_id];
1830 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1831 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1832 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1833 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1835 /* Return generic statistics */
1836 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1837 (nb_txqs * RTE_NB_TXQ_STATS);
1840 /* implemented by the driver */
1841 if (dev->dev_ops->xstats_get_by_id != NULL) {
1842 /* Retrieve the xstats from the driver at the end of the
1843 * xstats struct. Retrieve all xstats.
1845 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1847 values ? values + count : NULL,
1848 (n > count) ? n - count : 0);
1852 /* implemented by the driver */
1853 } else if (dev->dev_ops->xstats_get != NULL) {
1854 /* Retrieve the xstats from the driver at the end of the
1855 * xstats struct. Retrieve all xstats.
1856 * Compatibility for PMD without xstats_get_by_ids
1858 unsigned int size = (n > count) ? n - count : 1;
1859 struct rte_eth_xstat xstats[size];
1861 xcount = (*dev->dev_ops->xstats_get)(dev,
1862 values ? xstats : NULL, size);
1868 for (i = 0 ; i < (unsigned int)xcount; i++)
1869 values[i + count] = xstats[i].value;
1872 if (n < count + xcount || values == NULL)
1873 return count + xcount;
1875 /* now fill the xstats structure */
1877 rte_eth_stats_get(port_id, ð_stats);
1880 for (i = 0; i < RTE_NB_STATS; i++) {
1881 stats_ptr = RTE_PTR_ADD(ð_stats,
1882 rte_stats_strings[i].offset);
1884 values[count++] = val;
1888 for (q = 0; q < nb_rxqs; q++) {
1889 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1890 stats_ptr = RTE_PTR_ADD(ð_stats,
1891 rte_rxq_stats_strings[i].offset +
1892 q * sizeof(uint64_t));
1894 values[count++] = val;
1899 for (q = 0; q < nb_txqs; q++) {
1900 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1901 stats_ptr = RTE_PTR_ADD(ð_stats,
1902 rte_txq_stats_strings[i].offset +
1903 q * sizeof(uint64_t));
1905 values[count++] = val;
1909 return count + xcount;
1911 /* Need only xstats given by IDS array */
1914 uint64_t *values_copy;
1916 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1918 values_copy = malloc(sizeof(*values_copy) * size);
1920 RTE_PMD_DEBUG_TRACE(
1921 "ERROR: can't allocate memory for values_copy\n");
1925 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1927 for (i = 0; i < n; i++) {
1928 if (ids[i] >= size) {
1929 RTE_PMD_DEBUG_TRACE(
1930 "ERROR: id value isn't valid\n");
1933 values[i] = values_copy[ids[i]];
1941 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1944 struct rte_eth_stats eth_stats;
1945 struct rte_eth_dev *dev;
1946 unsigned int count = 0, i, q;
1947 signed int xcount = 0;
1948 uint64_t val, *stats_ptr;
1949 uint16_t nb_rxqs, nb_txqs;
1951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1953 dev = &rte_eth_devices[port_id];
1955 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1956 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1958 /* Return generic statistics */
1959 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1960 (nb_txqs * RTE_NB_TXQ_STATS);
1962 /* implemented by the driver */
1963 if (dev->dev_ops->xstats_get != NULL) {
1964 /* Retrieve the xstats from the driver at the end of the
1967 xcount = (*dev->dev_ops->xstats_get)(dev,
1968 xstats ? xstats + count : NULL,
1969 (n > count) ? n - count : 0);
1975 if (n < count + xcount || xstats == NULL)
1976 return count + xcount;
1978 /* now fill the xstats structure */
1980 rte_eth_stats_get(port_id, ð_stats);
1983 for (i = 0; i < RTE_NB_STATS; i++) {
1984 stats_ptr = RTE_PTR_ADD(ð_stats,
1985 rte_stats_strings[i].offset);
1987 xstats[count++].value = val;
1991 for (q = 0; q < nb_rxqs; q++) {
1992 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1993 stats_ptr = RTE_PTR_ADD(ð_stats,
1994 rte_rxq_stats_strings[i].offset +
1995 q * sizeof(uint64_t));
1997 xstats[count++].value = val;
2002 for (q = 0; q < nb_txqs; q++) {
2003 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2004 stats_ptr = RTE_PTR_ADD(ð_stats,
2005 rte_txq_stats_strings[i].offset +
2006 q * sizeof(uint64_t));
2008 xstats[count++].value = val;
2012 for (i = 0; i < count; i++)
2014 /* add an offset to driver-specific stats */
2015 for ( ; i < count + xcount; i++)
2016 xstats[i].id += count;
2018 return count + xcount;
2021 /* reset ethdev extended statistics */
2023 rte_eth_xstats_reset(uint16_t port_id)
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2028 dev = &rte_eth_devices[port_id];
2030 /* implemented by the driver */
2031 if (dev->dev_ops->xstats_reset != NULL) {
2032 (*dev->dev_ops->xstats_reset)(dev);
2036 /* fallback to default */
2037 rte_eth_stats_reset(port_id);
2041 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2044 struct rte_eth_dev *dev;
2046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2048 dev = &rte_eth_devices[port_id];
2050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2051 return (*dev->dev_ops->queue_stats_mapping_set)
2052 (dev, queue_id, stat_idx, is_rx);
2057 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2060 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2066 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2069 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2074 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2076 struct rte_eth_dev *dev;
2078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2079 dev = &rte_eth_devices[port_id];
2081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2082 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2086 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2088 struct rte_eth_dev *dev;
2089 const struct rte_eth_desc_lim lim = {
2090 .nb_max = UINT16_MAX,
2095 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2096 dev = &rte_eth_devices[port_id];
2098 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2099 dev_info->rx_desc_lim = lim;
2100 dev_info->tx_desc_lim = lim;
2102 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2103 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2104 dev_info->driver_name = dev->device->driver->name;
2105 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2106 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2110 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2111 uint32_t *ptypes, int num)
2114 struct rte_eth_dev *dev;
2115 const uint32_t *all_ptypes;
2117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2118 dev = &rte_eth_devices[port_id];
2119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2120 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2125 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2126 if (all_ptypes[i] & ptype_mask) {
2128 ptypes[j] = all_ptypes[i];
2136 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2138 struct rte_eth_dev *dev;
2140 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2141 dev = &rte_eth_devices[port_id];
2142 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2147 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2149 struct rte_eth_dev *dev;
2151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2153 dev = &rte_eth_devices[port_id];
2154 *mtu = dev->data->mtu;
2159 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2162 struct rte_eth_dev *dev;
2164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2165 dev = &rte_eth_devices[port_id];
2166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2168 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2170 dev->data->mtu = mtu;
2176 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2178 struct rte_eth_dev *dev;
2181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2182 dev = &rte_eth_devices[port_id];
2183 if (!(dev->data->dev_conf.rxmode.offloads &
2184 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2185 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2189 if (vlan_id > 4095) {
2190 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2191 port_id, (unsigned) vlan_id);
2194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2196 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2198 struct rte_vlan_filter_conf *vfc;
2202 vfc = &dev->data->vlan_filter_conf;
2203 vidx = vlan_id / 64;
2204 vbit = vlan_id % 64;
2207 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2209 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2216 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2219 struct rte_eth_dev *dev;
2221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2222 dev = &rte_eth_devices[port_id];
2223 if (rx_queue_id >= dev->data->nb_rx_queues) {
2224 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2229 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2235 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2236 enum rte_vlan_type vlan_type,
2239 struct rte_eth_dev *dev;
2241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2242 dev = &rte_eth_devices[port_id];
2243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2245 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2249 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2251 struct rte_eth_dev *dev;
2256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2257 dev = &rte_eth_devices[port_id];
2259 /*check which option changed by application*/
2260 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2261 org = !!(dev->data->dev_conf.rxmode.offloads &
2262 DEV_RX_OFFLOAD_VLAN_STRIP);
2265 dev->data->dev_conf.rxmode.offloads |=
2266 DEV_RX_OFFLOAD_VLAN_STRIP;
2268 dev->data->dev_conf.rxmode.offloads &=
2269 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2270 mask |= ETH_VLAN_STRIP_MASK;
2273 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2274 org = !!(dev->data->dev_conf.rxmode.offloads &
2275 DEV_RX_OFFLOAD_VLAN_FILTER);
2278 dev->data->dev_conf.rxmode.offloads |=
2279 DEV_RX_OFFLOAD_VLAN_FILTER;
2281 dev->data->dev_conf.rxmode.offloads &=
2282 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2283 mask |= ETH_VLAN_FILTER_MASK;
2286 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2287 org = !!(dev->data->dev_conf.rxmode.offloads &
2288 DEV_RX_OFFLOAD_VLAN_EXTEND);
2291 dev->data->dev_conf.rxmode.offloads |=
2292 DEV_RX_OFFLOAD_VLAN_EXTEND;
2294 dev->data->dev_conf.rxmode.offloads &=
2295 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2296 mask |= ETH_VLAN_EXTEND_MASK;
2303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2306 * Convert to the offload bitfield API just in case the underlying PMD
2307 * still supporting it.
2309 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2310 &dev->data->dev_conf.rxmode);
2311 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2317 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2319 struct rte_eth_dev *dev;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2323 dev = &rte_eth_devices[port_id];
2325 if (dev->data->dev_conf.rxmode.offloads &
2326 DEV_RX_OFFLOAD_VLAN_STRIP)
2327 ret |= ETH_VLAN_STRIP_OFFLOAD;
2329 if (dev->data->dev_conf.rxmode.offloads &
2330 DEV_RX_OFFLOAD_VLAN_FILTER)
2331 ret |= ETH_VLAN_FILTER_OFFLOAD;
2333 if (dev->data->dev_conf.rxmode.offloads &
2334 DEV_RX_OFFLOAD_VLAN_EXTEND)
2335 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2341 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2343 struct rte_eth_dev *dev;
2345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2346 dev = &rte_eth_devices[port_id];
2347 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2348 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2354 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2356 struct rte_eth_dev *dev;
2358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2359 dev = &rte_eth_devices[port_id];
2360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2361 memset(fc_conf, 0, sizeof(*fc_conf));
2362 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2366 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2368 struct rte_eth_dev *dev;
2370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2371 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2372 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2376 dev = &rte_eth_devices[port_id];
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2378 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2382 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2383 struct rte_eth_pfc_conf *pfc_conf)
2385 struct rte_eth_dev *dev;
2387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2388 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2389 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2393 dev = &rte_eth_devices[port_id];
2394 /* High water, low water validation are device specific */
2395 if (*dev->dev_ops->priority_flow_ctrl_set)
2396 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2401 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2409 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2410 for (i = 0; i < num; i++) {
2411 if (reta_conf[i].mask)
2419 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2423 uint16_t i, idx, shift;
2429 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2433 for (i = 0; i < reta_size; i++) {
2434 idx = i / RTE_RETA_GROUP_SIZE;
2435 shift = i % RTE_RETA_GROUP_SIZE;
2436 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2437 (reta_conf[idx].reta[shift] >= max_rxq)) {
2438 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2439 "the maximum rxq index: %u\n", idx, shift,
2440 reta_conf[idx].reta[shift], max_rxq);
2449 rte_eth_dev_rss_reta_update(uint16_t port_id,
2450 struct rte_eth_rss_reta_entry64 *reta_conf,
2453 struct rte_eth_dev *dev;
2456 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2457 /* Check mask bits */
2458 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2462 dev = &rte_eth_devices[port_id];
2464 /* Check entry value */
2465 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2466 dev->data->nb_rx_queues);
2470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2471 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2475 rte_eth_dev_rss_reta_query(uint16_t port_id,
2476 struct rte_eth_rss_reta_entry64 *reta_conf,
2479 struct rte_eth_dev *dev;
2482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 /* Check mask bits */
2485 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2489 dev = &rte_eth_devices[port_id];
2490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2491 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2495 rte_eth_dev_rss_hash_update(uint16_t port_id,
2496 struct rte_eth_rss_conf *rss_conf)
2498 struct rte_eth_dev *dev;
2500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2501 dev = &rte_eth_devices[port_id];
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2503 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2507 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2508 struct rte_eth_rss_conf *rss_conf)
2510 struct rte_eth_dev *dev;
2512 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2513 dev = &rte_eth_devices[port_id];
2514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2515 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2519 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2520 struct rte_eth_udp_tunnel *udp_tunnel)
2522 struct rte_eth_dev *dev;
2524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2525 if (udp_tunnel == NULL) {
2526 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2530 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2531 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2535 dev = &rte_eth_devices[port_id];
2536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2537 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2541 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2542 struct rte_eth_udp_tunnel *udp_tunnel)
2544 struct rte_eth_dev *dev;
2546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2547 dev = &rte_eth_devices[port_id];
2549 if (udp_tunnel == NULL) {
2550 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2554 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2555 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2560 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2564 rte_eth_led_on(uint16_t port_id)
2566 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2569 dev = &rte_eth_devices[port_id];
2570 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2571 return (*dev->dev_ops->dev_led_on)(dev);
2575 rte_eth_led_off(uint16_t port_id)
2577 struct rte_eth_dev *dev;
2579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2580 dev = &rte_eth_devices[port_id];
2581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2582 return (*dev->dev_ops->dev_led_off)(dev);
2586 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2590 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2592 struct rte_eth_dev_info dev_info;
2593 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2597 rte_eth_dev_info_get(port_id, &dev_info);
2599 for (i = 0; i < dev_info.max_mac_addrs; i++)
2600 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2606 static const struct ether_addr null_mac_addr;
2609 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2612 struct rte_eth_dev *dev;
2617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2618 dev = &rte_eth_devices[port_id];
2619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2621 if (is_zero_ether_addr(addr)) {
2622 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2626 if (pool >= ETH_64_POOLS) {
2627 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2631 index = get_mac_addr_index(port_id, addr);
2633 index = get_mac_addr_index(port_id, &null_mac_addr);
2635 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2640 pool_mask = dev->data->mac_pool_sel[index];
2642 /* Check if both MAC address and pool is already there, and do nothing */
2643 if (pool_mask & (1ULL << pool))
2648 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2651 /* Update address in NIC data structure */
2652 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2654 /* Update pool bitmap in NIC data structure */
2655 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2662 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2664 struct rte_eth_dev *dev;
2667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2668 dev = &rte_eth_devices[port_id];
2669 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2671 index = get_mac_addr_index(port_id, addr);
2673 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2675 } else if (index < 0)
2676 return 0; /* Do nothing if address wasn't found */
2679 (*dev->dev_ops->mac_addr_remove)(dev, index);
2681 /* Update address in NIC data structure */
2682 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2684 /* reset pool bitmap */
2685 dev->data->mac_pool_sel[index] = 0;
2691 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2693 struct rte_eth_dev *dev;
2695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2697 if (!is_valid_assigned_ether_addr(addr))
2700 dev = &rte_eth_devices[port_id];
2701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2703 /* Update default address in NIC data structure */
2704 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2706 (*dev->dev_ops->mac_addr_set)(dev, addr);
2713 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2717 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2719 struct rte_eth_dev_info dev_info;
2720 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2723 rte_eth_dev_info_get(port_id, &dev_info);
2724 if (!dev->data->hash_mac_addrs)
2727 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2728 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2729 ETHER_ADDR_LEN) == 0)
2736 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2741 struct rte_eth_dev *dev;
2743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2745 dev = &rte_eth_devices[port_id];
2746 if (is_zero_ether_addr(addr)) {
2747 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2752 index = get_hash_mac_addr_index(port_id, addr);
2753 /* Check if it's already there, and do nothing */
2754 if ((index >= 0) && (on))
2759 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2760 "set in UTA\n", port_id);
2764 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2766 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2773 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2775 /* Update address in NIC data structure */
2777 ether_addr_copy(addr,
2778 &dev->data->hash_mac_addrs[index]);
2780 ether_addr_copy(&null_mac_addr,
2781 &dev->data->hash_mac_addrs[index]);
2788 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2797 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2800 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2803 struct rte_eth_dev *dev;
2804 struct rte_eth_dev_info dev_info;
2805 struct rte_eth_link link;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 rte_eth_dev_info_get(port_id, &dev_info);
2811 link = dev->data->dev_link;
2813 if (queue_idx > dev_info.max_tx_queues) {
2814 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2815 "invalid queue id=%d\n", port_id, queue_idx);
2819 if (tx_rate > link.link_speed) {
2820 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2821 "bigger than link speed= %d\n",
2822 tx_rate, link.link_speed);
2826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2827 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2831 rte_eth_mirror_rule_set(uint16_t port_id,
2832 struct rte_eth_mirror_conf *mirror_conf,
2833 uint8_t rule_id, uint8_t on)
2835 struct rte_eth_dev *dev;
2837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2838 if (mirror_conf->rule_type == 0) {
2839 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2843 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2844 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2849 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2850 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2851 (mirror_conf->pool_mask == 0)) {
2852 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2856 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2857 mirror_conf->vlan.vlan_mask == 0) {
2858 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2862 dev = &rte_eth_devices[port_id];
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2865 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2869 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2871 struct rte_eth_dev *dev;
2873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 dev = &rte_eth_devices[port_id];
2876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2878 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2882 rte_eth_dev_callback_register(uint16_t port_id,
2883 enum rte_eth_event_type event,
2884 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2886 struct rte_eth_dev *dev;
2887 struct rte_eth_dev_callback *user_cb;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2894 dev = &rte_eth_devices[port_id];
2895 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2897 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2898 if (user_cb->cb_fn == cb_fn &&
2899 user_cb->cb_arg == cb_arg &&
2900 user_cb->event == event) {
2905 /* create a new callback. */
2906 if (user_cb == NULL) {
2907 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2908 sizeof(struct rte_eth_dev_callback), 0);
2909 if (user_cb != NULL) {
2910 user_cb->cb_fn = cb_fn;
2911 user_cb->cb_arg = cb_arg;
2912 user_cb->event = event;
2913 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2917 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2918 return (user_cb == NULL) ? -ENOMEM : 0;
2922 rte_eth_dev_callback_unregister(uint16_t port_id,
2923 enum rte_eth_event_type event,
2924 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2927 struct rte_eth_dev *dev;
2928 struct rte_eth_dev_callback *cb, *next;
2933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2935 dev = &rte_eth_devices[port_id];
2936 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2939 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2941 next = TAILQ_NEXT(cb, next);
2943 if (cb->cb_fn != cb_fn || cb->event != event ||
2944 (cb->cb_arg != (void *)-1 &&
2945 cb->cb_arg != cb_arg))
2949 * if this callback is not executing right now,
2952 if (cb->active == 0) {
2953 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2960 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2965 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2966 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2968 struct rte_eth_dev_callback *cb_lst;
2969 struct rte_eth_dev_callback dev_cb;
2972 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2973 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2974 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2979 dev_cb.cb_arg = cb_arg;
2980 if (ret_param != NULL)
2981 dev_cb.ret_param = ret_param;
2983 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2984 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2985 dev_cb.cb_arg, dev_cb.ret_param);
2986 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2989 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2994 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2997 struct rte_eth_dev *dev;
2998 struct rte_intr_handle *intr_handle;
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3004 dev = &rte_eth_devices[port_id];
3006 if (!dev->intr_handle) {
3007 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3011 intr_handle = dev->intr_handle;
3012 if (!intr_handle->intr_vec) {
3013 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3017 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3018 vec = intr_handle->intr_vec[qid];
3019 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3020 if (rc && rc != -EEXIST) {
3021 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3022 " op %d epfd %d vec %u\n",
3023 port_id, qid, op, epfd, vec);
3030 const struct rte_memzone *
3031 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3032 uint16_t queue_id, size_t size, unsigned align,
3035 char z_name[RTE_MEMZONE_NAMESIZE];
3036 const struct rte_memzone *mz;
3038 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3039 dev->device->driver->name, ring_name,
3040 dev->data->port_id, queue_id);
3042 mz = rte_memzone_lookup(z_name);
3046 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3050 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3051 int epfd, int op, void *data)
3054 struct rte_eth_dev *dev;
3055 struct rte_intr_handle *intr_handle;
3058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3060 dev = &rte_eth_devices[port_id];
3061 if (queue_id >= dev->data->nb_rx_queues) {
3062 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3066 if (!dev->intr_handle) {
3067 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3071 intr_handle = dev->intr_handle;
3072 if (!intr_handle->intr_vec) {
3073 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3077 vec = intr_handle->intr_vec[queue_id];
3078 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3079 if (rc && rc != -EEXIST) {
3080 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3081 " op %d epfd %d vec %u\n",
3082 port_id, queue_id, op, epfd, vec);
3090 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3093 struct rte_eth_dev *dev;
3095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3097 dev = &rte_eth_devices[port_id];
3099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3100 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3104 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3107 struct rte_eth_dev *dev;
3109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 dev = &rte_eth_devices[port_id];
3113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3114 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3119 rte_eth_dev_filter_supported(uint16_t port_id,
3120 enum rte_filter_type filter_type)
3122 struct rte_eth_dev *dev;
3124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3126 dev = &rte_eth_devices[port_id];
3127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3128 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3129 RTE_ETH_FILTER_NOP, NULL);
3133 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3134 enum rte_filter_op filter_op, void *arg)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3140 dev = &rte_eth_devices[port_id];
3141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3142 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3146 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3147 rte_rx_callback_fn fn, void *user_param)
3149 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3150 rte_errno = ENOTSUP;
3153 /* check input parameters */
3154 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3155 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3159 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3167 cb->param = user_param;
3169 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3170 /* Add the callbacks in fifo order. */
3171 struct rte_eth_rxtx_callback *tail =
3172 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3175 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3182 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3188 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3189 rte_rx_callback_fn fn, void *user_param)
3191 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3192 rte_errno = ENOTSUP;
3195 /* check input parameters */
3196 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3197 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3202 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3210 cb->param = user_param;
3212 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3213 /* Add the callbacks at fisrt position*/
3214 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3216 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3217 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3223 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3224 rte_tx_callback_fn fn, void *user_param)
3226 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3227 rte_errno = ENOTSUP;
3230 /* check input parameters */
3231 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3232 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3237 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3245 cb->param = user_param;
3247 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3248 /* Add the callbacks in fifo order. */
3249 struct rte_eth_rxtx_callback *tail =
3250 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3253 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3260 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3266 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3267 struct rte_eth_rxtx_callback *user_cb)
3269 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3272 /* Check input parameters. */
3273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3274 if (user_cb == NULL ||
3275 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3278 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3279 struct rte_eth_rxtx_callback *cb;
3280 struct rte_eth_rxtx_callback **prev_cb;
3283 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3284 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3285 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3287 if (cb == user_cb) {
3288 /* Remove the user cb from the callback list. */
3289 *prev_cb = cb->next;
3294 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3300 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3301 struct rte_eth_rxtx_callback *user_cb)
3303 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3306 /* Check input parameters. */
3307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3308 if (user_cb == NULL ||
3309 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3312 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3314 struct rte_eth_rxtx_callback *cb;
3315 struct rte_eth_rxtx_callback **prev_cb;
3317 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3318 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3319 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3321 if (cb == user_cb) {
3322 /* Remove the user cb from the callback list. */
3323 *prev_cb = cb->next;
3328 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3334 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3335 struct rte_eth_rxq_info *qinfo)
3337 struct rte_eth_dev *dev;
3339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3344 dev = &rte_eth_devices[port_id];
3345 if (queue_id >= dev->data->nb_rx_queues) {
3346 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3352 memset(qinfo, 0, sizeof(*qinfo));
3353 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3358 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3359 struct rte_eth_txq_info *qinfo)
3361 struct rte_eth_dev *dev;
3363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3368 dev = &rte_eth_devices[port_id];
3369 if (queue_id >= dev->data->nb_tx_queues) {
3370 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3376 memset(qinfo, 0, sizeof(*qinfo));
3377 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3382 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3383 struct ether_addr *mc_addr_set,
3384 uint32_t nb_mc_addr)
3386 struct rte_eth_dev *dev;
3388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3390 dev = &rte_eth_devices[port_id];
3391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3392 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3396 rte_eth_timesync_enable(uint16_t port_id)
3398 struct rte_eth_dev *dev;
3400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3401 dev = &rte_eth_devices[port_id];
3403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3404 return (*dev->dev_ops->timesync_enable)(dev);
3408 rte_eth_timesync_disable(uint16_t port_id)
3410 struct rte_eth_dev *dev;
3412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3413 dev = &rte_eth_devices[port_id];
3415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3416 return (*dev->dev_ops->timesync_disable)(dev);
3420 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3423 struct rte_eth_dev *dev;
3425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3426 dev = &rte_eth_devices[port_id];
3428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3429 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3433 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3434 struct timespec *timestamp)
3436 struct rte_eth_dev *dev;
3438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3439 dev = &rte_eth_devices[port_id];
3441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3442 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3446 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3448 struct rte_eth_dev *dev;
3450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3451 dev = &rte_eth_devices[port_id];
3453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3454 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3458 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3460 struct rte_eth_dev *dev;
3462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3463 dev = &rte_eth_devices[port_id];
3465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3466 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3470 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3472 struct rte_eth_dev *dev;
3474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3475 dev = &rte_eth_devices[port_id];
3477 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3478 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3482 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3484 struct rte_eth_dev *dev;
3486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3488 dev = &rte_eth_devices[port_id];
3489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3490 return (*dev->dev_ops->get_reg)(dev, info);
3494 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3496 struct rte_eth_dev *dev;
3498 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3500 dev = &rte_eth_devices[port_id];
3501 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3502 return (*dev->dev_ops->get_eeprom_length)(dev);
3506 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3508 struct rte_eth_dev *dev;
3510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3512 dev = &rte_eth_devices[port_id];
3513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3514 return (*dev->dev_ops->get_eeprom)(dev, info);
3518 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3520 struct rte_eth_dev *dev;
3522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3524 dev = &rte_eth_devices[port_id];
3525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3526 return (*dev->dev_ops->set_eeprom)(dev, info);
3530 rte_eth_dev_get_dcb_info(uint16_t port_id,
3531 struct rte_eth_dcb_info *dcb_info)
3533 struct rte_eth_dev *dev;
3535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3537 dev = &rte_eth_devices[port_id];
3538 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3540 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3541 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3545 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3546 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3548 struct rte_eth_dev *dev;
3550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3551 if (l2_tunnel == NULL) {
3552 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3556 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3557 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3561 dev = &rte_eth_devices[port_id];
3562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3564 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3568 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3569 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3573 struct rte_eth_dev *dev;
3575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3577 if (l2_tunnel == NULL) {
3578 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3582 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3583 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3588 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3592 dev = &rte_eth_devices[port_id];
3593 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3595 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3599 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3600 const struct rte_eth_desc_lim *desc_lim)
3602 if (desc_lim->nb_align != 0)
3603 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3605 if (desc_lim->nb_max != 0)
3606 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3608 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3612 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3613 uint16_t *nb_rx_desc,
3614 uint16_t *nb_tx_desc)
3616 struct rte_eth_dev *dev;
3617 struct rte_eth_dev_info dev_info;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3621 dev = &rte_eth_devices[port_id];
3622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3624 rte_eth_dev_info_get(port_id, &dev_info);
3626 if (nb_rx_desc != NULL)
3627 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3629 if (nb_tx_desc != NULL)
3630 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3636 rte_eth_dev_pool_ops_supported(uint8_t port_id, const char *pool)
3638 struct rte_eth_dev *dev;
3640 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3645 dev = &rte_eth_devices[port_id];
3647 if (*dev->dev_ops->pool_ops_supported == NULL)
3648 return 1; /* all pools are supported */
3650 return (*dev->dev_ops->pool_ops_supported)(dev, pool);