1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for shared data allocation */
58 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
60 /* store statistics names and its offset in stats structure */
61 struct rte_eth_xstats_name_off {
62 char name[RTE_ETH_XSTATS_NAME_SIZE];
66 /* Shared memory between primary and secondary processes. */
68 uint64_t next_owner_id;
69 rte_spinlock_t ownership_lock;
70 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
71 } *rte_eth_dev_shared_data;
73 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
74 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
75 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
76 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
77 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
78 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
79 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
80 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
81 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
85 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
87 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
88 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
89 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
90 {"errors", offsetof(struct rte_eth_stats, q_errors)},
93 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
94 sizeof(rte_rxq_stats_strings[0]))
96 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
97 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
98 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
100 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
101 sizeof(rte_txq_stats_strings[0]))
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { DEV_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } rte_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
122 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
124 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
125 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 #undef RTE_RX_OFFLOAD_BIT2STR
130 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
131 { DEV_TX_OFFLOAD_##_name, #_name }
133 static const struct {
136 } rte_tx_offload_names[] = {
137 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
138 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
139 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
140 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
141 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
142 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
144 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
146 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
152 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
153 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
154 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
157 #undef RTE_TX_OFFLOAD_BIT2STR
160 * The user application callback description.
162 * It contains callback address to be registered by user application,
163 * the pointer to the parameters for callback, and the event type.
165 struct rte_eth_dev_callback {
166 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
167 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
168 void *cb_arg; /**< Parameter for callback */
169 void *ret_param; /**< Return parameter */
170 enum rte_eth_event_type event; /**< Interrupt event type */
171 uint32_t active; /**< Callback is executing */
180 rte_eth_find_next(uint16_t port_id)
182 while (port_id < RTE_MAX_ETHPORTS &&
183 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
184 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
187 if (port_id >= RTE_MAX_ETHPORTS)
188 return RTE_MAX_ETHPORTS;
194 rte_eth_dev_shared_data_prepare(void)
196 const unsigned flags = 0;
197 const struct rte_memzone *mz;
199 rte_spinlock_lock(&rte_eth_shared_data_lock);
201 if (rte_eth_dev_shared_data == NULL) {
202 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
203 /* Allocate port data and ownership shared memory. */
204 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
205 sizeof(*rte_eth_dev_shared_data),
206 rte_socket_id(), flags);
208 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
210 rte_panic("Cannot allocate ethdev shared data\n");
212 rte_eth_dev_shared_data = mz->addr;
213 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
214 rte_eth_dev_shared_data->next_owner_id =
215 RTE_ETH_DEV_NO_OWNER + 1;
216 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
217 memset(rte_eth_dev_shared_data->data, 0,
218 sizeof(rte_eth_dev_shared_data->data));
222 rte_spinlock_unlock(&rte_eth_shared_data_lock);
226 rte_eth_dev_allocated(const char *name)
230 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
231 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
232 strcmp(rte_eth_devices[i].data->name, name) == 0)
233 return &rte_eth_devices[i];
239 rte_eth_dev_find_free_port(void)
243 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
244 /* Using shared name field to find a free port. */
245 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
246 RTE_ASSERT(rte_eth_devices[i].state ==
251 return RTE_MAX_ETHPORTS;
254 static struct rte_eth_dev *
255 eth_dev_get(uint16_t port_id)
257 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
259 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
260 eth_dev->state = RTE_ETH_DEV_ATTACHED;
262 eth_dev_last_created_port = port_id;
268 rte_eth_dev_allocate(const char *name)
271 struct rte_eth_dev *eth_dev = NULL;
273 rte_eth_dev_shared_data_prepare();
275 /* Synchronize port creation between primary and secondary threads. */
276 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
278 port_id = rte_eth_dev_find_free_port();
279 if (port_id == RTE_MAX_ETHPORTS) {
280 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
284 if (rte_eth_dev_allocated(name) != NULL) {
285 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
290 eth_dev = eth_dev_get(port_id);
291 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
292 eth_dev->data->port_id = port_id;
293 eth_dev->data->mtu = ETHER_MTU;
296 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
299 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
305 * Attach to a port already registered by the primary process, which
306 * makes sure that the same device would have the same port id both
307 * in the primary and secondary process.
310 rte_eth_dev_attach_secondary(const char *name)
313 struct rte_eth_dev *eth_dev = NULL;
315 rte_eth_dev_shared_data_prepare();
317 /* Synchronize port attachment to primary port creation and release. */
318 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
320 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
321 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
324 if (i == RTE_MAX_ETHPORTS) {
326 "device %s is not driven by the primary process\n",
329 eth_dev = eth_dev_get(i);
330 RTE_ASSERT(eth_dev->data->port_id == i);
333 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
338 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
343 rte_eth_dev_shared_data_prepare();
345 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
347 eth_dev->state = RTE_ETH_DEV_UNUSED;
349 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
351 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
353 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
359 rte_eth_dev_is_valid_port(uint16_t port_id)
361 if (port_id >= RTE_MAX_ETHPORTS ||
362 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
369 rte_eth_is_valid_owner_id(uint64_t owner_id)
371 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
372 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
373 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
379 uint64_t __rte_experimental
380 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
382 while (port_id < RTE_MAX_ETHPORTS &&
383 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
384 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
385 rte_eth_devices[port_id].data->owner.id != owner_id))
388 if (port_id >= RTE_MAX_ETHPORTS)
389 return RTE_MAX_ETHPORTS;
394 int __rte_experimental
395 rte_eth_dev_owner_new(uint64_t *owner_id)
397 rte_eth_dev_shared_data_prepare();
399 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
401 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
403 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
408 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
409 const struct rte_eth_dev_owner *new_owner)
411 struct rte_eth_dev_owner *port_owner;
414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
416 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
417 !rte_eth_is_valid_owner_id(old_owner_id))
420 port_owner = &rte_eth_devices[port_id].data->owner;
421 if (port_owner->id != old_owner_id) {
422 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
423 " by %s_%016lX.\n", port_id,
424 port_owner->name, port_owner->id);
428 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
430 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
431 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
434 port_owner->id = new_owner->id;
436 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
437 new_owner->name, new_owner->id);
442 int __rte_experimental
443 rte_eth_dev_owner_set(const uint16_t port_id,
444 const struct rte_eth_dev_owner *owner)
448 rte_eth_dev_shared_data_prepare();
450 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
452 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
454 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
458 int __rte_experimental
459 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
461 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
462 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
465 rte_eth_dev_shared_data_prepare();
467 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
469 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
471 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
475 void __rte_experimental
476 rte_eth_dev_owner_delete(const uint64_t owner_id)
480 rte_eth_dev_shared_data_prepare();
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 if (rte_eth_is_valid_owner_id(owner_id)) {
485 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
486 memset(&rte_eth_devices[port_id].data->owner, 0,
487 sizeof(struct rte_eth_dev_owner));
488 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
489 " have removed.\n", owner_id);
492 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
495 int __rte_experimental
496 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
500 rte_eth_dev_shared_data_prepare();
502 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
504 if (!rte_eth_dev_is_valid_port(port_id)) {
505 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
508 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
512 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
517 rte_eth_dev_socket_id(uint16_t port_id)
519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
520 return rte_eth_devices[port_id].data->numa_node;
524 rte_eth_dev_get_sec_ctx(uint8_t port_id)
526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
527 return rte_eth_devices[port_id].security_ctx;
531 rte_eth_dev_count(void)
538 RTE_ETH_FOREACH_DEV(p)
545 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
552 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
556 /* shouldn't check 'rte_eth_devices[i].data',
557 * because it might be overwritten by VDEV PMD */
558 tmp = rte_eth_dev_shared_data->data[port_id].name;
564 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
569 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
573 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
574 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
575 !strncmp(name, rte_eth_dev_shared_data->data[pid].name,
586 eth_err(uint16_t port_id, int ret)
590 if (rte_eth_dev_is_removed(port_id))
595 /* attach the new device, then store port_id of the device */
597 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
600 int current = rte_eth_dev_count();
604 if ((devargs == NULL) || (port_id == NULL)) {
609 /* parse devargs, then retrieve device name and args */
610 if (rte_eal_parse_devargs_str(devargs, &name, &args))
613 ret = rte_eal_dev_attach(name, args);
617 /* no point looking at the port count if no port exists */
618 if (!rte_eth_dev_count()) {
619 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
624 /* if nothing happened, there is a bug here, since some driver told us
625 * it did attach a device, but did not create a port.
627 if (current == rte_eth_dev_count()) {
632 *port_id = eth_dev_last_created_port;
641 /* detach the device, then store the name of the device */
643 rte_eth_dev_detach(uint16_t port_id, char *name)
648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
655 dev_flags = rte_eth_devices[port_id].data->dev_flags;
656 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
657 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
663 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
664 "%s", rte_eth_devices[port_id].data->name);
666 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
670 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
678 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
680 uint16_t old_nb_queues = dev->data->nb_rx_queues;
684 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
685 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
686 sizeof(dev->data->rx_queues[0]) * nb_queues,
687 RTE_CACHE_LINE_SIZE);
688 if (dev->data->rx_queues == NULL) {
689 dev->data->nb_rx_queues = 0;
692 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
695 rxq = dev->data->rx_queues;
697 for (i = nb_queues; i < old_nb_queues; i++)
698 (*dev->dev_ops->rx_queue_release)(rxq[i]);
699 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
700 RTE_CACHE_LINE_SIZE);
703 if (nb_queues > old_nb_queues) {
704 uint16_t new_qs = nb_queues - old_nb_queues;
706 memset(rxq + old_nb_queues, 0,
707 sizeof(rxq[0]) * new_qs);
710 dev->data->rx_queues = rxq;
712 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
715 rxq = dev->data->rx_queues;
717 for (i = nb_queues; i < old_nb_queues; i++)
718 (*dev->dev_ops->rx_queue_release)(rxq[i]);
720 rte_free(dev->data->rx_queues);
721 dev->data->rx_queues = NULL;
723 dev->data->nb_rx_queues = nb_queues;
728 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
730 struct rte_eth_dev *dev;
732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
734 dev = &rte_eth_devices[port_id];
735 if (rx_queue_id >= dev->data->nb_rx_queues) {
736 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
742 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
743 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
744 " already started\n",
745 rx_queue_id, port_id);
749 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
755 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
757 struct rte_eth_dev *dev;
759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
761 dev = &rte_eth_devices[port_id];
762 if (rx_queue_id >= dev->data->nb_rx_queues) {
763 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
769 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
770 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
771 " already stopped\n",
772 rx_queue_id, port_id);
776 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
781 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
783 struct rte_eth_dev *dev;
785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
787 dev = &rte_eth_devices[port_id];
788 if (tx_queue_id >= dev->data->nb_tx_queues) {
789 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
795 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
796 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
797 " already started\n",
798 tx_queue_id, port_id);
802 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
808 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
810 struct rte_eth_dev *dev;
812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 dev = &rte_eth_devices[port_id];
815 if (tx_queue_id >= dev->data->nb_tx_queues) {
816 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
822 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
823 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
824 " already stopped\n",
825 tx_queue_id, port_id);
829 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
834 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
836 uint16_t old_nb_queues = dev->data->nb_tx_queues;
840 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
841 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
842 sizeof(dev->data->tx_queues[0]) * nb_queues,
843 RTE_CACHE_LINE_SIZE);
844 if (dev->data->tx_queues == NULL) {
845 dev->data->nb_tx_queues = 0;
848 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
851 txq = dev->data->tx_queues;
853 for (i = nb_queues; i < old_nb_queues; i++)
854 (*dev->dev_ops->tx_queue_release)(txq[i]);
855 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
856 RTE_CACHE_LINE_SIZE);
859 if (nb_queues > old_nb_queues) {
860 uint16_t new_qs = nb_queues - old_nb_queues;
862 memset(txq + old_nb_queues, 0,
863 sizeof(txq[0]) * new_qs);
866 dev->data->tx_queues = txq;
868 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
871 txq = dev->data->tx_queues;
873 for (i = nb_queues; i < old_nb_queues; i++)
874 (*dev->dev_ops->tx_queue_release)(txq[i]);
876 rte_free(dev->data->tx_queues);
877 dev->data->tx_queues = NULL;
879 dev->data->nb_tx_queues = nb_queues;
884 rte_eth_speed_bitflag(uint32_t speed, int duplex)
887 case ETH_SPEED_NUM_10M:
888 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
889 case ETH_SPEED_NUM_100M:
890 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
891 case ETH_SPEED_NUM_1G:
892 return ETH_LINK_SPEED_1G;
893 case ETH_SPEED_NUM_2_5G:
894 return ETH_LINK_SPEED_2_5G;
895 case ETH_SPEED_NUM_5G:
896 return ETH_LINK_SPEED_5G;
897 case ETH_SPEED_NUM_10G:
898 return ETH_LINK_SPEED_10G;
899 case ETH_SPEED_NUM_20G:
900 return ETH_LINK_SPEED_20G;
901 case ETH_SPEED_NUM_25G:
902 return ETH_LINK_SPEED_25G;
903 case ETH_SPEED_NUM_40G:
904 return ETH_LINK_SPEED_40G;
905 case ETH_SPEED_NUM_50G:
906 return ETH_LINK_SPEED_50G;
907 case ETH_SPEED_NUM_56G:
908 return ETH_LINK_SPEED_56G;
909 case ETH_SPEED_NUM_100G:
910 return ETH_LINK_SPEED_100G;
917 * A conversion function from rxmode bitfield API.
920 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
921 uint64_t *rx_offloads)
923 uint64_t offloads = 0;
925 if (rxmode->header_split == 1)
926 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
927 if (rxmode->hw_ip_checksum == 1)
928 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
929 if (rxmode->hw_vlan_filter == 1)
930 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
931 if (rxmode->hw_vlan_strip == 1)
932 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
933 if (rxmode->hw_vlan_extend == 1)
934 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
935 if (rxmode->jumbo_frame == 1)
936 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
937 if (rxmode->hw_strip_crc == 1)
938 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
939 if (rxmode->enable_scatter == 1)
940 offloads |= DEV_RX_OFFLOAD_SCATTER;
941 if (rxmode->enable_lro == 1)
942 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
943 if (rxmode->hw_timestamp == 1)
944 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
945 if (rxmode->security == 1)
946 offloads |= DEV_RX_OFFLOAD_SECURITY;
948 *rx_offloads = offloads;
952 * A conversion function from rxmode offloads API.
955 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
956 struct rte_eth_rxmode *rxmode)
959 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
960 rxmode->header_split = 1;
962 rxmode->header_split = 0;
963 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
964 rxmode->hw_ip_checksum = 1;
966 rxmode->hw_ip_checksum = 0;
967 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
968 rxmode->hw_vlan_filter = 1;
970 rxmode->hw_vlan_filter = 0;
971 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
972 rxmode->hw_vlan_strip = 1;
974 rxmode->hw_vlan_strip = 0;
975 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
976 rxmode->hw_vlan_extend = 1;
978 rxmode->hw_vlan_extend = 0;
979 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
980 rxmode->jumbo_frame = 1;
982 rxmode->jumbo_frame = 0;
983 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
984 rxmode->hw_strip_crc = 1;
986 rxmode->hw_strip_crc = 0;
987 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
988 rxmode->enable_scatter = 1;
990 rxmode->enable_scatter = 0;
991 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
992 rxmode->enable_lro = 1;
994 rxmode->enable_lro = 0;
995 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
996 rxmode->hw_timestamp = 1;
998 rxmode->hw_timestamp = 0;
999 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
1000 rxmode->security = 1;
1002 rxmode->security = 0;
1005 const char * __rte_experimental
1006 rte_eth_dev_rx_offload_name(uint64_t offload)
1008 const char *name = "UNKNOWN";
1011 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1012 if (offload == rte_rx_offload_names[i].offload) {
1013 name = rte_rx_offload_names[i].name;
1021 const char * __rte_experimental
1022 rte_eth_dev_tx_offload_name(uint64_t offload)
1024 const char *name = "UNKNOWN";
1027 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1028 if (offload == rte_tx_offload_names[i].offload) {
1029 name = rte_tx_offload_names[i].name;
1038 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1039 const struct rte_eth_conf *dev_conf)
1041 struct rte_eth_dev *dev;
1042 struct rte_eth_dev_info dev_info;
1043 struct rte_eth_conf local_conf = *dev_conf;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1048 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1049 RTE_PMD_DEBUG_TRACE(
1050 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1051 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1055 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1056 RTE_PMD_DEBUG_TRACE(
1057 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1058 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1062 dev = &rte_eth_devices[port_id];
1064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1067 if (dev->data->dev_started) {
1068 RTE_PMD_DEBUG_TRACE(
1069 "port %d must be stopped to allow configuration\n", port_id);
1074 * Convert between the offloads API to enable PMDs to support
1077 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1078 rte_eth_convert_rx_offload_bitfield(
1079 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1081 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1082 &local_conf.rxmode);
1085 /* Copy the dev_conf parameter into the dev structure */
1086 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1089 * Check that the numbers of RX and TX queues are not greater
1090 * than the maximum number of RX and TX queues supported by the
1091 * configured device.
1093 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1095 if (nb_rx_q == 0 && nb_tx_q == 0) {
1096 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
1100 if (nb_rx_q > dev_info.max_rx_queues) {
1101 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1102 port_id, nb_rx_q, dev_info.max_rx_queues);
1106 if (nb_tx_q > dev_info.max_tx_queues) {
1107 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1108 port_id, nb_tx_q, dev_info.max_tx_queues);
1112 /* Check that the device supports requested interrupts */
1113 if ((dev_conf->intr_conf.lsc == 1) &&
1114 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1115 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1116 dev->device->driver->name);
1119 if ((dev_conf->intr_conf.rmv == 1) &&
1120 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1121 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1122 dev->device->driver->name);
1127 * If jumbo frames are enabled, check that the maximum RX packet
1128 * length is supported by the configured device.
1130 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1131 if (dev_conf->rxmode.max_rx_pkt_len >
1132 dev_info.max_rx_pktlen) {
1133 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1134 " > max valid value %u\n",
1136 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1137 (unsigned)dev_info.max_rx_pktlen);
1139 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1140 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1141 " < min valid value %u\n",
1143 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1144 (unsigned)ETHER_MIN_LEN);
1148 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1149 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1150 /* Use default value */
1151 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1156 * Setup new number of RX/TX queues and reconfigure device.
1158 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1160 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1165 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1167 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1169 rte_eth_dev_rx_queue_config(dev, 0);
1173 diag = (*dev->dev_ops->dev_configure)(dev);
1175 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1177 rte_eth_dev_rx_queue_config(dev, 0);
1178 rte_eth_dev_tx_queue_config(dev, 0);
1179 return eth_err(port_id, diag);
1182 /* Initialize Rx profiling if enabled at compilation time. */
1183 diag = __rte_eth_profile_rx_init(port_id, dev);
1185 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1187 rte_eth_dev_rx_queue_config(dev, 0);
1188 rte_eth_dev_tx_queue_config(dev, 0);
1189 return eth_err(port_id, diag);
1196 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1198 if (dev->data->dev_started) {
1199 RTE_PMD_DEBUG_TRACE(
1200 "port %d must be stopped to allow reset\n",
1201 dev->data->port_id);
1205 rte_eth_dev_rx_queue_config(dev, 0);
1206 rte_eth_dev_tx_queue_config(dev, 0);
1208 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1212 rte_eth_dev_config_restore(uint16_t port_id)
1214 struct rte_eth_dev *dev;
1215 struct rte_eth_dev_info dev_info;
1216 struct ether_addr *addr;
1221 dev = &rte_eth_devices[port_id];
1223 rte_eth_dev_info_get(port_id, &dev_info);
1225 /* replay MAC address configuration including default MAC */
1226 addr = &dev->data->mac_addrs[0];
1227 if (*dev->dev_ops->mac_addr_set != NULL)
1228 (*dev->dev_ops->mac_addr_set)(dev, addr);
1229 else if (*dev->dev_ops->mac_addr_add != NULL)
1230 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1232 if (*dev->dev_ops->mac_addr_add != NULL) {
1233 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1234 addr = &dev->data->mac_addrs[i];
1236 /* skip zero address */
1237 if (is_zero_ether_addr(addr))
1241 pool_mask = dev->data->mac_pool_sel[i];
1244 if (pool_mask & 1ULL)
1245 (*dev->dev_ops->mac_addr_add)(dev,
1249 } while (pool_mask);
1253 /* replay promiscuous configuration */
1254 if (rte_eth_promiscuous_get(port_id) == 1)
1255 rte_eth_promiscuous_enable(port_id);
1256 else if (rte_eth_promiscuous_get(port_id) == 0)
1257 rte_eth_promiscuous_disable(port_id);
1259 /* replay all multicast configuration */
1260 if (rte_eth_allmulticast_get(port_id) == 1)
1261 rte_eth_allmulticast_enable(port_id);
1262 else if (rte_eth_allmulticast_get(port_id) == 0)
1263 rte_eth_allmulticast_disable(port_id);
1267 rte_eth_dev_start(uint16_t port_id)
1269 struct rte_eth_dev *dev;
1272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1274 dev = &rte_eth_devices[port_id];
1276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1278 if (dev->data->dev_started != 0) {
1279 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1280 " already started\n",
1285 diag = (*dev->dev_ops->dev_start)(dev);
1287 dev->data->dev_started = 1;
1289 return eth_err(port_id, diag);
1291 rte_eth_dev_config_restore(port_id);
1293 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1294 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1295 (*dev->dev_ops->link_update)(dev, 0);
1301 rte_eth_dev_stop(uint16_t port_id)
1303 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1306 dev = &rte_eth_devices[port_id];
1308 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1310 if (dev->data->dev_started == 0) {
1311 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1312 " already stopped\n",
1317 dev->data->dev_started = 0;
1318 (*dev->dev_ops->dev_stop)(dev);
1322 rte_eth_dev_set_link_up(uint16_t port_id)
1324 struct rte_eth_dev *dev;
1326 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1328 dev = &rte_eth_devices[port_id];
1330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1331 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1335 rte_eth_dev_set_link_down(uint16_t port_id)
1337 struct rte_eth_dev *dev;
1339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1341 dev = &rte_eth_devices[port_id];
1343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1344 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1348 rte_eth_dev_close(uint16_t port_id)
1350 struct rte_eth_dev *dev;
1352 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1353 dev = &rte_eth_devices[port_id];
1355 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1356 dev->data->dev_started = 0;
1357 (*dev->dev_ops->dev_close)(dev);
1359 dev->data->nb_rx_queues = 0;
1360 rte_free(dev->data->rx_queues);
1361 dev->data->rx_queues = NULL;
1362 dev->data->nb_tx_queues = 0;
1363 rte_free(dev->data->tx_queues);
1364 dev->data->tx_queues = NULL;
1368 rte_eth_dev_reset(uint16_t port_id)
1370 struct rte_eth_dev *dev;
1373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1378 rte_eth_dev_stop(port_id);
1379 ret = dev->dev_ops->dev_reset(dev);
1381 return eth_err(port_id, ret);
1384 int __rte_experimental
1385 rte_eth_dev_is_removed(uint16_t port_id)
1387 struct rte_eth_dev *dev;
1390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1392 dev = &rte_eth_devices[port_id];
1394 if (dev->state == RTE_ETH_DEV_REMOVED)
1397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1399 ret = dev->dev_ops->is_removed(dev);
1401 /* Device is physically removed. */
1402 dev->state = RTE_ETH_DEV_REMOVED;
1408 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1409 uint16_t nb_rx_desc, unsigned int socket_id,
1410 const struct rte_eth_rxconf *rx_conf,
1411 struct rte_mempool *mp)
1414 uint32_t mbp_buf_size;
1415 struct rte_eth_dev *dev;
1416 struct rte_eth_dev_info dev_info;
1417 struct rte_eth_rxconf local_conf;
1420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1422 dev = &rte_eth_devices[port_id];
1423 if (rx_queue_id >= dev->data->nb_rx_queues) {
1424 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1428 if (dev->data->dev_started) {
1429 RTE_PMD_DEBUG_TRACE(
1430 "port %d must be stopped to allow configuration\n", port_id);
1434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1438 * Check the size of the mbuf data buffer.
1439 * This value must be provided in the private data of the memory pool.
1440 * First check that the memory pool has a valid private data.
1442 rte_eth_dev_info_get(port_id, &dev_info);
1443 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1444 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1445 mp->name, (int) mp->private_data_size,
1446 (int) sizeof(struct rte_pktmbuf_pool_private));
1449 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1451 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1452 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1453 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1457 (int)(RTE_PKTMBUF_HEADROOM +
1458 dev_info.min_rx_bufsize),
1459 (int)RTE_PKTMBUF_HEADROOM,
1460 (int)dev_info.min_rx_bufsize);
1464 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1465 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1466 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1468 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1469 "should be: <= %hu, = %hu, and a product of %hu\n",
1471 dev_info.rx_desc_lim.nb_max,
1472 dev_info.rx_desc_lim.nb_min,
1473 dev_info.rx_desc_lim.nb_align);
1477 rxq = dev->data->rx_queues;
1478 if (rxq[rx_queue_id]) {
1479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1481 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1482 rxq[rx_queue_id] = NULL;
1485 if (rx_conf == NULL)
1486 rx_conf = &dev_info.default_rxconf;
1488 local_conf = *rx_conf;
1489 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1491 * Reflect port offloads to queue offloads in order for
1492 * offloads to not be discarded.
1494 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1495 &local_conf.offloads);
1498 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1499 socket_id, &local_conf, mp);
1501 if (!dev->data->min_rx_buf_size ||
1502 dev->data->min_rx_buf_size > mbp_buf_size)
1503 dev->data->min_rx_buf_size = mbp_buf_size;
1506 return eth_err(port_id, ret);
1510 * A conversion function from txq_flags API.
1513 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1515 uint64_t offloads = 0;
1517 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1518 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1519 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1520 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1521 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1522 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1523 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1524 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1525 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1526 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1527 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1528 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1529 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1531 *tx_offloads = offloads;
1535 * A conversion function from offloads API.
1538 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1542 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1543 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1544 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1545 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1546 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1547 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1548 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1549 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1550 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1551 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1552 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1553 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1559 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1560 uint16_t nb_tx_desc, unsigned int socket_id,
1561 const struct rte_eth_txconf *tx_conf)
1563 struct rte_eth_dev *dev;
1564 struct rte_eth_dev_info dev_info;
1565 struct rte_eth_txconf local_conf;
1568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1570 dev = &rte_eth_devices[port_id];
1571 if (tx_queue_id >= dev->data->nb_tx_queues) {
1572 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1576 if (dev->data->dev_started) {
1577 RTE_PMD_DEBUG_TRACE(
1578 "port %d must be stopped to allow configuration\n", port_id);
1582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1585 rte_eth_dev_info_get(port_id, &dev_info);
1587 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1588 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1589 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1590 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1591 "should be: <= %hu, = %hu, and a product of %hu\n",
1593 dev_info.tx_desc_lim.nb_max,
1594 dev_info.tx_desc_lim.nb_min,
1595 dev_info.tx_desc_lim.nb_align);
1599 txq = dev->data->tx_queues;
1600 if (txq[tx_queue_id]) {
1601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1603 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1604 txq[tx_queue_id] = NULL;
1607 if (tx_conf == NULL)
1608 tx_conf = &dev_info.default_txconf;
1611 * Convert between the offloads API to enable PMDs to support
1614 local_conf = *tx_conf;
1615 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1616 rte_eth_convert_txq_offloads(tx_conf->offloads,
1617 &local_conf.txq_flags);
1618 /* Keep the ignore flag. */
1619 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1621 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1622 &local_conf.offloads);
1625 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1626 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1630 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1631 void *userdata __rte_unused)
1635 for (i = 0; i < unsent; i++)
1636 rte_pktmbuf_free(pkts[i]);
1640 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1643 uint64_t *count = userdata;
1646 for (i = 0; i < unsent; i++)
1647 rte_pktmbuf_free(pkts[i]);
1653 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1654 buffer_tx_error_fn cbfn, void *userdata)
1656 buffer->error_callback = cbfn;
1657 buffer->error_userdata = userdata;
1662 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1669 buffer->size = size;
1670 if (buffer->error_callback == NULL) {
1671 ret = rte_eth_tx_buffer_set_err_callback(
1672 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1679 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1681 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1684 /* Validate Input Data. Bail if not valid or not supported. */
1685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1688 /* Call driver to free pending mbufs. */
1689 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1691 return eth_err(port_id, ret);
1695 rte_eth_promiscuous_enable(uint16_t port_id)
1697 struct rte_eth_dev *dev;
1699 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1700 dev = &rte_eth_devices[port_id];
1702 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1703 (*dev->dev_ops->promiscuous_enable)(dev);
1704 dev->data->promiscuous = 1;
1708 rte_eth_promiscuous_disable(uint16_t port_id)
1710 struct rte_eth_dev *dev;
1712 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1713 dev = &rte_eth_devices[port_id];
1715 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1716 dev->data->promiscuous = 0;
1717 (*dev->dev_ops->promiscuous_disable)(dev);
1721 rte_eth_promiscuous_get(uint16_t port_id)
1723 struct rte_eth_dev *dev;
1725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1727 dev = &rte_eth_devices[port_id];
1728 return dev->data->promiscuous;
1732 rte_eth_allmulticast_enable(uint16_t port_id)
1734 struct rte_eth_dev *dev;
1736 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1737 dev = &rte_eth_devices[port_id];
1739 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1740 (*dev->dev_ops->allmulticast_enable)(dev);
1741 dev->data->all_multicast = 1;
1745 rte_eth_allmulticast_disable(uint16_t port_id)
1747 struct rte_eth_dev *dev;
1749 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1750 dev = &rte_eth_devices[port_id];
1752 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1753 dev->data->all_multicast = 0;
1754 (*dev->dev_ops->allmulticast_disable)(dev);
1758 rte_eth_allmulticast_get(uint16_t port_id)
1760 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1764 dev = &rte_eth_devices[port_id];
1765 return dev->data->all_multicast;
1769 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1770 struct rte_eth_link *link)
1772 struct rte_eth_link *dst = link;
1773 struct rte_eth_link *src = &(dev->data->dev_link);
1775 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1776 *(uint64_t *)src) == 0)
1783 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1785 struct rte_eth_dev *dev;
1787 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1788 dev = &rte_eth_devices[port_id];
1790 if (dev->data->dev_conf.intr_conf.lsc != 0)
1791 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1793 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1794 (*dev->dev_ops->link_update)(dev, 1);
1795 *eth_link = dev->data->dev_link;
1800 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1805 dev = &rte_eth_devices[port_id];
1807 if (dev->data->dev_conf.intr_conf.lsc != 0)
1808 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1810 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1811 (*dev->dev_ops->link_update)(dev, 0);
1812 *eth_link = dev->data->dev_link;
1817 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1819 struct rte_eth_dev *dev;
1821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1823 dev = &rte_eth_devices[port_id];
1824 memset(stats, 0, sizeof(*stats));
1826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1827 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1828 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1832 rte_eth_stats_reset(uint16_t port_id)
1834 struct rte_eth_dev *dev;
1836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1837 dev = &rte_eth_devices[port_id];
1839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1840 (*dev->dev_ops->stats_reset)(dev);
1841 dev->data->rx_mbuf_alloc_failed = 0;
1847 get_xstats_basic_count(struct rte_eth_dev *dev)
1849 uint16_t nb_rxqs, nb_txqs;
1852 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1853 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1855 count = RTE_NB_STATS;
1856 count += nb_rxqs * RTE_NB_RXQ_STATS;
1857 count += nb_txqs * RTE_NB_TXQ_STATS;
1863 get_xstats_count(uint16_t port_id)
1865 struct rte_eth_dev *dev;
1868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1869 dev = &rte_eth_devices[port_id];
1870 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1871 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1874 return eth_err(port_id, count);
1876 if (dev->dev_ops->xstats_get_names != NULL) {
1877 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1879 return eth_err(port_id, count);
1884 count += get_xstats_basic_count(dev);
1890 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1893 int cnt_xstats, idx_xstat;
1895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1898 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1903 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1908 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1909 if (cnt_xstats < 0) {
1910 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1914 /* Get id-name lookup table */
1915 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1917 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1918 port_id, xstats_names, cnt_xstats, NULL)) {
1919 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1923 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1924 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1933 /* retrieve basic stats names */
1935 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1936 struct rte_eth_xstat_name *xstats_names)
1938 int cnt_used_entries = 0;
1939 uint32_t idx, id_queue;
1942 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1943 snprintf(xstats_names[cnt_used_entries].name,
1944 sizeof(xstats_names[0].name),
1945 "%s", rte_stats_strings[idx].name);
1948 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1949 for (id_queue = 0; id_queue < num_q; id_queue++) {
1950 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1951 snprintf(xstats_names[cnt_used_entries].name,
1952 sizeof(xstats_names[0].name),
1954 id_queue, rte_rxq_stats_strings[idx].name);
1959 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1960 for (id_queue = 0; id_queue < num_q; id_queue++) {
1961 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1962 snprintf(xstats_names[cnt_used_entries].name,
1963 sizeof(xstats_names[0].name),
1965 id_queue, rte_txq_stats_strings[idx].name);
1969 return cnt_used_entries;
1972 /* retrieve ethdev extended statistics names */
1974 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1975 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1978 struct rte_eth_xstat_name *xstats_names_copy;
1979 unsigned int no_basic_stat_requested = 1;
1980 unsigned int no_ext_stat_requested = 1;
1981 unsigned int expected_entries;
1982 unsigned int basic_count;
1983 struct rte_eth_dev *dev;
1987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1988 dev = &rte_eth_devices[port_id];
1990 basic_count = get_xstats_basic_count(dev);
1991 ret = get_xstats_count(port_id);
1994 expected_entries = (unsigned int)ret;
1996 /* Return max number of stats if no ids given */
1999 return expected_entries;
2000 else if (xstats_names && size < expected_entries)
2001 return expected_entries;
2004 if (ids && !xstats_names)
2007 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2008 uint64_t ids_copy[size];
2010 for (i = 0; i < size; i++) {
2011 if (ids[i] < basic_count) {
2012 no_basic_stat_requested = 0;
2017 * Convert ids to xstats ids that PMD knows.
2018 * ids known by user are basic + extended stats.
2020 ids_copy[i] = ids[i] - basic_count;
2023 if (no_basic_stat_requested)
2024 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2025 xstats_names, ids_copy, size);
2028 /* Retrieve all stats */
2030 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2032 if (num_stats < 0 || num_stats > (int)expected_entries)
2035 return expected_entries;
2038 xstats_names_copy = calloc(expected_entries,
2039 sizeof(struct rte_eth_xstat_name));
2041 if (!xstats_names_copy) {
2042 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2047 for (i = 0; i < size; i++) {
2048 if (ids[i] >= basic_count) {
2049 no_ext_stat_requested = 0;
2055 /* Fill xstats_names_copy structure */
2056 if (ids && no_ext_stat_requested) {
2057 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2059 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2062 free(xstats_names_copy);
2068 for (i = 0; i < size; i++) {
2069 if (ids[i] >= expected_entries) {
2070 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2071 free(xstats_names_copy);
2074 xstats_names[i] = xstats_names_copy[ids[i]];
2077 free(xstats_names_copy);
2082 rte_eth_xstats_get_names(uint16_t port_id,
2083 struct rte_eth_xstat_name *xstats_names,
2086 struct rte_eth_dev *dev;
2087 int cnt_used_entries;
2088 int cnt_expected_entries;
2089 int cnt_driver_entries;
2091 cnt_expected_entries = get_xstats_count(port_id);
2092 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2093 (int)size < cnt_expected_entries)
2094 return cnt_expected_entries;
2096 /* port_id checked in get_xstats_count() */
2097 dev = &rte_eth_devices[port_id];
2099 cnt_used_entries = rte_eth_basic_stats_get_names(
2102 if (dev->dev_ops->xstats_get_names != NULL) {
2103 /* If there are any driver-specific xstats, append them
2106 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2108 xstats_names + cnt_used_entries,
2109 size - cnt_used_entries);
2110 if (cnt_driver_entries < 0)
2111 return eth_err(port_id, cnt_driver_entries);
2112 cnt_used_entries += cnt_driver_entries;
2115 return cnt_used_entries;
2120 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2122 struct rte_eth_dev *dev;
2123 struct rte_eth_stats eth_stats;
2124 unsigned int count = 0, i, q;
2125 uint64_t val, *stats_ptr;
2126 uint16_t nb_rxqs, nb_txqs;
2129 ret = rte_eth_stats_get(port_id, ð_stats);
2133 dev = &rte_eth_devices[port_id];
2135 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2136 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2139 for (i = 0; i < RTE_NB_STATS; i++) {
2140 stats_ptr = RTE_PTR_ADD(ð_stats,
2141 rte_stats_strings[i].offset);
2143 xstats[count++].value = val;
2147 for (q = 0; q < nb_rxqs; q++) {
2148 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2149 stats_ptr = RTE_PTR_ADD(ð_stats,
2150 rte_rxq_stats_strings[i].offset +
2151 q * sizeof(uint64_t));
2153 xstats[count++].value = val;
2158 for (q = 0; q < nb_txqs; q++) {
2159 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2160 stats_ptr = RTE_PTR_ADD(ð_stats,
2161 rte_txq_stats_strings[i].offset +
2162 q * sizeof(uint64_t));
2164 xstats[count++].value = val;
2170 /* retrieve ethdev extended statistics */
2172 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2173 uint64_t *values, unsigned int size)
2175 unsigned int no_basic_stat_requested = 1;
2176 unsigned int no_ext_stat_requested = 1;
2177 unsigned int num_xstats_filled;
2178 unsigned int basic_count;
2179 uint16_t expected_entries;
2180 struct rte_eth_dev *dev;
2184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2185 ret = get_xstats_count(port_id);
2188 expected_entries = (uint16_t)ret;
2189 struct rte_eth_xstat xstats[expected_entries];
2190 dev = &rte_eth_devices[port_id];
2191 basic_count = get_xstats_basic_count(dev);
2193 /* Return max number of stats if no ids given */
2196 return expected_entries;
2197 else if (values && size < expected_entries)
2198 return expected_entries;
2204 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2205 unsigned int basic_count = get_xstats_basic_count(dev);
2206 uint64_t ids_copy[size];
2208 for (i = 0; i < size; i++) {
2209 if (ids[i] < basic_count) {
2210 no_basic_stat_requested = 0;
2215 * Convert ids to xstats ids that PMD knows.
2216 * ids known by user are basic + extended stats.
2218 ids_copy[i] = ids[i] - basic_count;
2221 if (no_basic_stat_requested)
2222 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2227 for (i = 0; i < size; i++) {
2228 if (ids[i] >= basic_count) {
2229 no_ext_stat_requested = 0;
2235 /* Fill the xstats structure */
2236 if (ids && no_ext_stat_requested)
2237 ret = rte_eth_basic_stats_get(port_id, xstats);
2239 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2243 num_xstats_filled = (unsigned int)ret;
2245 /* Return all stats */
2247 for (i = 0; i < num_xstats_filled; i++)
2248 values[i] = xstats[i].value;
2249 return expected_entries;
2253 for (i = 0; i < size; i++) {
2254 if (ids[i] >= expected_entries) {
2255 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2258 values[i] = xstats[ids[i]].value;
2264 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2267 struct rte_eth_dev *dev;
2268 unsigned int count = 0, i;
2269 signed int xcount = 0;
2270 uint16_t nb_rxqs, nb_txqs;
2273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2275 dev = &rte_eth_devices[port_id];
2277 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2278 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2280 /* Return generic statistics */
2281 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2282 (nb_txqs * RTE_NB_TXQ_STATS);
2284 /* implemented by the driver */
2285 if (dev->dev_ops->xstats_get != NULL) {
2286 /* Retrieve the xstats from the driver at the end of the
2289 xcount = (*dev->dev_ops->xstats_get)(dev,
2290 xstats ? xstats + count : NULL,
2291 (n > count) ? n - count : 0);
2294 return eth_err(port_id, xcount);
2297 if (n < count + xcount || xstats == NULL)
2298 return count + xcount;
2300 /* now fill the xstats structure */
2301 ret = rte_eth_basic_stats_get(port_id, xstats);
2306 for (i = 0; i < count; i++)
2308 /* add an offset to driver-specific stats */
2309 for ( ; i < count + xcount; i++)
2310 xstats[i].id += count;
2312 return count + xcount;
2315 /* reset ethdev extended statistics */
2317 rte_eth_xstats_reset(uint16_t port_id)
2319 struct rte_eth_dev *dev;
2321 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2322 dev = &rte_eth_devices[port_id];
2324 /* implemented by the driver */
2325 if (dev->dev_ops->xstats_reset != NULL) {
2326 (*dev->dev_ops->xstats_reset)(dev);
2330 /* fallback to default */
2331 rte_eth_stats_reset(port_id);
2335 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2342 dev = &rte_eth_devices[port_id];
2344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2345 return (*dev->dev_ops->queue_stats_mapping_set)
2346 (dev, queue_id, stat_idx, is_rx);
2351 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2354 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2355 stat_idx, STAT_QMAP_TX));
2360 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2363 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2364 stat_idx, STAT_QMAP_RX));
2368 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2370 struct rte_eth_dev *dev;
2372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2373 dev = &rte_eth_devices[port_id];
2375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2376 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2377 fw_version, fw_size));
2381 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2383 struct rte_eth_dev *dev;
2384 const struct rte_eth_desc_lim lim = {
2385 .nb_max = UINT16_MAX,
2390 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2391 dev = &rte_eth_devices[port_id];
2393 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2394 dev_info->rx_desc_lim = lim;
2395 dev_info->tx_desc_lim = lim;
2397 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2398 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2399 dev_info->driver_name = dev->device->driver->name;
2400 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2401 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2405 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2406 uint32_t *ptypes, int num)
2409 struct rte_eth_dev *dev;
2410 const uint32_t *all_ptypes;
2412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2413 dev = &rte_eth_devices[port_id];
2414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2415 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2420 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2421 if (all_ptypes[i] & ptype_mask) {
2423 ptypes[j] = all_ptypes[i];
2431 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2433 struct rte_eth_dev *dev;
2435 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2436 dev = &rte_eth_devices[port_id];
2437 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2442 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2444 struct rte_eth_dev *dev;
2446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2448 dev = &rte_eth_devices[port_id];
2449 *mtu = dev->data->mtu;
2454 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2457 struct rte_eth_dev *dev;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2463 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2465 dev->data->mtu = mtu;
2467 return eth_err(port_id, ret);
2471 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2473 struct rte_eth_dev *dev;
2476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2477 dev = &rte_eth_devices[port_id];
2478 if (!(dev->data->dev_conf.rxmode.offloads &
2479 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2480 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2484 if (vlan_id > 4095) {
2485 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2486 port_id, (unsigned) vlan_id);
2489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2491 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2493 struct rte_vlan_filter_conf *vfc;
2497 vfc = &dev->data->vlan_filter_conf;
2498 vidx = vlan_id / 64;
2499 vbit = vlan_id % 64;
2502 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2504 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2507 return eth_err(port_id, ret);
2511 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2514 struct rte_eth_dev *dev;
2516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2517 dev = &rte_eth_devices[port_id];
2518 if (rx_queue_id >= dev->data->nb_rx_queues) {
2519 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2524 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2530 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2531 enum rte_vlan_type vlan_type,
2534 struct rte_eth_dev *dev;
2536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2537 dev = &rte_eth_devices[port_id];
2538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2540 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2545 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2547 struct rte_eth_dev *dev;
2551 uint64_t orig_offloads;
2553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2554 dev = &rte_eth_devices[port_id];
2556 /* save original values in case of failure */
2557 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2559 /*check which option changed by application*/
2560 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2561 org = !!(dev->data->dev_conf.rxmode.offloads &
2562 DEV_RX_OFFLOAD_VLAN_STRIP);
2565 dev->data->dev_conf.rxmode.offloads |=
2566 DEV_RX_OFFLOAD_VLAN_STRIP;
2568 dev->data->dev_conf.rxmode.offloads &=
2569 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2570 mask |= ETH_VLAN_STRIP_MASK;
2573 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2574 org = !!(dev->data->dev_conf.rxmode.offloads &
2575 DEV_RX_OFFLOAD_VLAN_FILTER);
2578 dev->data->dev_conf.rxmode.offloads |=
2579 DEV_RX_OFFLOAD_VLAN_FILTER;
2581 dev->data->dev_conf.rxmode.offloads &=
2582 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2583 mask |= ETH_VLAN_FILTER_MASK;
2586 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2587 org = !!(dev->data->dev_conf.rxmode.offloads &
2588 DEV_RX_OFFLOAD_VLAN_EXTEND);
2591 dev->data->dev_conf.rxmode.offloads |=
2592 DEV_RX_OFFLOAD_VLAN_EXTEND;
2594 dev->data->dev_conf.rxmode.offloads &=
2595 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2596 mask |= ETH_VLAN_EXTEND_MASK;
2603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2606 * Convert to the offload bitfield API just in case the underlying PMD
2607 * still supporting it.
2609 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2610 &dev->data->dev_conf.rxmode);
2611 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2613 /* hit an error restore original values */
2614 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2615 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2616 &dev->data->dev_conf.rxmode);
2619 return eth_err(port_id, ret);
2623 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2625 struct rte_eth_dev *dev;
2628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2629 dev = &rte_eth_devices[port_id];
2631 if (dev->data->dev_conf.rxmode.offloads &
2632 DEV_RX_OFFLOAD_VLAN_STRIP)
2633 ret |= ETH_VLAN_STRIP_OFFLOAD;
2635 if (dev->data->dev_conf.rxmode.offloads &
2636 DEV_RX_OFFLOAD_VLAN_FILTER)
2637 ret |= ETH_VLAN_FILTER_OFFLOAD;
2639 if (dev->data->dev_conf.rxmode.offloads &
2640 DEV_RX_OFFLOAD_VLAN_EXTEND)
2641 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2647 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2649 struct rte_eth_dev *dev;
2651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2652 dev = &rte_eth_devices[port_id];
2653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2655 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2659 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2661 struct rte_eth_dev *dev;
2663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2664 dev = &rte_eth_devices[port_id];
2665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2666 memset(fc_conf, 0, sizeof(*fc_conf));
2667 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2671 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2673 struct rte_eth_dev *dev;
2675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2677 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2681 dev = &rte_eth_devices[port_id];
2682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2683 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2687 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2688 struct rte_eth_pfc_conf *pfc_conf)
2690 struct rte_eth_dev *dev;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2694 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2698 dev = &rte_eth_devices[port_id];
2699 /* High water, low water validation are device specific */
2700 if (*dev->dev_ops->priority_flow_ctrl_set)
2701 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2707 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2715 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2716 for (i = 0; i < num; i++) {
2717 if (reta_conf[i].mask)
2725 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2729 uint16_t i, idx, shift;
2735 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2739 for (i = 0; i < reta_size; i++) {
2740 idx = i / RTE_RETA_GROUP_SIZE;
2741 shift = i % RTE_RETA_GROUP_SIZE;
2742 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2743 (reta_conf[idx].reta[shift] >= max_rxq)) {
2744 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2745 "the maximum rxq index: %u\n", idx, shift,
2746 reta_conf[idx].reta[shift], max_rxq);
2755 rte_eth_dev_rss_reta_update(uint16_t port_id,
2756 struct rte_eth_rss_reta_entry64 *reta_conf,
2759 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 /* Check mask bits */
2764 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2768 dev = &rte_eth_devices[port_id];
2770 /* Check entry value */
2771 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2772 dev->data->nb_rx_queues);
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2777 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2782 rte_eth_dev_rss_reta_query(uint16_t port_id,
2783 struct rte_eth_rss_reta_entry64 *reta_conf,
2786 struct rte_eth_dev *dev;
2789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2791 /* Check mask bits */
2792 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2796 dev = &rte_eth_devices[port_id];
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2798 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2803 rte_eth_dev_rss_hash_update(uint16_t port_id,
2804 struct rte_eth_rss_conf *rss_conf)
2806 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2811 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2816 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2817 struct rte_eth_rss_conf *rss_conf)
2819 struct rte_eth_dev *dev;
2821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 dev = &rte_eth_devices[port_id];
2823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2824 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2829 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2830 struct rte_eth_udp_tunnel *udp_tunnel)
2832 struct rte_eth_dev *dev;
2834 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2835 if (udp_tunnel == NULL) {
2836 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2840 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2841 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2845 dev = &rte_eth_devices[port_id];
2846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2847 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2852 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2853 struct rte_eth_udp_tunnel *udp_tunnel)
2855 struct rte_eth_dev *dev;
2857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2858 dev = &rte_eth_devices[port_id];
2860 if (udp_tunnel == NULL) {
2861 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2865 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2866 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2871 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2876 rte_eth_led_on(uint16_t port_id)
2878 struct rte_eth_dev *dev;
2880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2881 dev = &rte_eth_devices[port_id];
2882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2883 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2887 rte_eth_led_off(uint16_t port_id)
2889 struct rte_eth_dev *dev;
2891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2892 dev = &rte_eth_devices[port_id];
2893 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2894 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2898 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2902 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2904 struct rte_eth_dev_info dev_info;
2905 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2909 rte_eth_dev_info_get(port_id, &dev_info);
2911 for (i = 0; i < dev_info.max_mac_addrs; i++)
2912 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2918 static const struct ether_addr null_mac_addr;
2921 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2924 struct rte_eth_dev *dev;
2929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2930 dev = &rte_eth_devices[port_id];
2931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2933 if (is_zero_ether_addr(addr)) {
2934 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2938 if (pool >= ETH_64_POOLS) {
2939 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2943 index = get_mac_addr_index(port_id, addr);
2945 index = get_mac_addr_index(port_id, &null_mac_addr);
2947 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2952 pool_mask = dev->data->mac_pool_sel[index];
2954 /* Check if both MAC address and pool is already there, and do nothing */
2955 if (pool_mask & (1ULL << pool))
2960 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2963 /* Update address in NIC data structure */
2964 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2966 /* Update pool bitmap in NIC data structure */
2967 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2970 return eth_err(port_id, ret);
2974 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2976 struct rte_eth_dev *dev;
2979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2980 dev = &rte_eth_devices[port_id];
2981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2983 index = get_mac_addr_index(port_id, addr);
2985 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2987 } else if (index < 0)
2988 return 0; /* Do nothing if address wasn't found */
2991 (*dev->dev_ops->mac_addr_remove)(dev, index);
2993 /* Update address in NIC data structure */
2994 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2996 /* reset pool bitmap */
2997 dev->data->mac_pool_sel[index] = 0;
3003 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3005 struct rte_eth_dev *dev;
3007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3009 if (!is_valid_assigned_ether_addr(addr))
3012 dev = &rte_eth_devices[port_id];
3013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3015 /* Update default address in NIC data structure */
3016 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3018 (*dev->dev_ops->mac_addr_set)(dev, addr);
3025 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3029 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3031 struct rte_eth_dev_info dev_info;
3032 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3035 rte_eth_dev_info_get(port_id, &dev_info);
3036 if (!dev->data->hash_mac_addrs)
3039 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3040 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3041 ETHER_ADDR_LEN) == 0)
3048 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3053 struct rte_eth_dev *dev;
3055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3057 dev = &rte_eth_devices[port_id];
3058 if (is_zero_ether_addr(addr)) {
3059 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3064 index = get_hash_mac_addr_index(port_id, addr);
3065 /* Check if it's already there, and do nothing */
3066 if ((index >= 0) && on)
3071 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3072 "set in UTA\n", port_id);
3076 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3078 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3085 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3087 /* Update address in NIC data structure */
3089 ether_addr_copy(addr,
3090 &dev->data->hash_mac_addrs[index]);
3092 ether_addr_copy(&null_mac_addr,
3093 &dev->data->hash_mac_addrs[index]);
3096 return eth_err(port_id, ret);
3100 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3102 struct rte_eth_dev *dev;
3104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3106 dev = &rte_eth_devices[port_id];
3108 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3109 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3113 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3116 struct rte_eth_dev *dev;
3117 struct rte_eth_dev_info dev_info;
3118 struct rte_eth_link link;
3120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3122 dev = &rte_eth_devices[port_id];
3123 rte_eth_dev_info_get(port_id, &dev_info);
3124 link = dev->data->dev_link;
3126 if (queue_idx > dev_info.max_tx_queues) {
3127 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3128 "invalid queue id=%d\n", port_id, queue_idx);
3132 if (tx_rate > link.link_speed) {
3133 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3134 "bigger than link speed= %d\n",
3135 tx_rate, link.link_speed);
3139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3140 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3141 queue_idx, tx_rate));
3145 rte_eth_mirror_rule_set(uint16_t port_id,
3146 struct rte_eth_mirror_conf *mirror_conf,
3147 uint8_t rule_id, uint8_t on)
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3152 if (mirror_conf->rule_type == 0) {
3153 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3157 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3158 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3163 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3164 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3165 (mirror_conf->pool_mask == 0)) {
3166 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3170 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3171 mirror_conf->vlan.vlan_mask == 0) {
3172 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3176 dev = &rte_eth_devices[port_id];
3177 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3179 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3180 mirror_conf, rule_id, on));
3184 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3186 struct rte_eth_dev *dev;
3188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190 dev = &rte_eth_devices[port_id];
3191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3193 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3197 RTE_INIT(eth_dev_init_cb_lists)
3201 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3202 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3206 rte_eth_dev_callback_register(uint16_t port_id,
3207 enum rte_eth_event_type event,
3208 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3210 struct rte_eth_dev *dev;
3211 struct rte_eth_dev_callback *user_cb;
3212 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3218 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3219 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3223 if (port_id == RTE_ETH_ALL) {
3225 last_port = RTE_MAX_ETHPORTS - 1;
3227 next_port = last_port = port_id;
3230 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3233 dev = &rte_eth_devices[next_port];
3235 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3236 if (user_cb->cb_fn == cb_fn &&
3237 user_cb->cb_arg == cb_arg &&
3238 user_cb->event == event) {
3243 /* create a new callback. */
3244 if (user_cb == NULL) {
3245 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3246 sizeof(struct rte_eth_dev_callback), 0);
3247 if (user_cb != NULL) {
3248 user_cb->cb_fn = cb_fn;
3249 user_cb->cb_arg = cb_arg;
3250 user_cb->event = event;
3251 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3254 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3255 rte_eth_dev_callback_unregister(port_id, event,
3261 } while (++next_port <= last_port);
3263 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3268 rte_eth_dev_callback_unregister(uint16_t port_id,
3269 enum rte_eth_event_type event,
3270 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3273 struct rte_eth_dev *dev;
3274 struct rte_eth_dev_callback *cb, *next;
3275 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3281 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3282 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3286 if (port_id == RTE_ETH_ALL) {
3288 last_port = RTE_MAX_ETHPORTS - 1;
3290 next_port = last_port = port_id;
3293 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3296 dev = &rte_eth_devices[next_port];
3298 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3301 next = TAILQ_NEXT(cb, next);
3303 if (cb->cb_fn != cb_fn || cb->event != event ||
3304 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3308 * if this callback is not executing right now,
3311 if (cb->active == 0) {
3312 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3318 } while (++next_port <= last_port);
3320 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3325 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3326 enum rte_eth_event_type event, void *ret_param)
3328 struct rte_eth_dev_callback *cb_lst;
3329 struct rte_eth_dev_callback dev_cb;
3332 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3333 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3334 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3338 if (ret_param != NULL)
3339 dev_cb.ret_param = ret_param;
3341 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3342 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3343 dev_cb.cb_arg, dev_cb.ret_param);
3344 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3347 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3352 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3355 struct rte_eth_dev *dev;
3356 struct rte_intr_handle *intr_handle;
3360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3362 dev = &rte_eth_devices[port_id];
3364 if (!dev->intr_handle) {
3365 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3369 intr_handle = dev->intr_handle;
3370 if (!intr_handle->intr_vec) {
3371 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3375 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3376 vec = intr_handle->intr_vec[qid];
3377 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3378 if (rc && rc != -EEXIST) {
3379 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3380 " op %d epfd %d vec %u\n",
3381 port_id, qid, op, epfd, vec);
3388 const struct rte_memzone *
3389 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3390 uint16_t queue_id, size_t size, unsigned align,
3393 char z_name[RTE_MEMZONE_NAMESIZE];
3394 const struct rte_memzone *mz;
3396 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3397 dev->device->driver->name, ring_name,
3398 dev->data->port_id, queue_id);
3400 mz = rte_memzone_lookup(z_name);
3404 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3408 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3409 int epfd, int op, void *data)
3412 struct rte_eth_dev *dev;
3413 struct rte_intr_handle *intr_handle;
3416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3418 dev = &rte_eth_devices[port_id];
3419 if (queue_id >= dev->data->nb_rx_queues) {
3420 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3424 if (!dev->intr_handle) {
3425 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3429 intr_handle = dev->intr_handle;
3430 if (!intr_handle->intr_vec) {
3431 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3435 vec = intr_handle->intr_vec[queue_id];
3436 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3437 if (rc && rc != -EEXIST) {
3438 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3439 " op %d epfd %d vec %u\n",
3440 port_id, queue_id, op, epfd, vec);
3448 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3451 struct rte_eth_dev *dev;
3453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3455 dev = &rte_eth_devices[port_id];
3457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3458 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3463 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3466 struct rte_eth_dev *dev;
3468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3470 dev = &rte_eth_devices[port_id];
3472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3473 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3479 rte_eth_dev_filter_supported(uint16_t port_id,
3480 enum rte_filter_type filter_type)
3482 struct rte_eth_dev *dev;
3484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3486 dev = &rte_eth_devices[port_id];
3487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3488 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3489 RTE_ETH_FILTER_NOP, NULL);
3493 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3494 enum rte_filter_type filter_type,
3495 enum rte_filter_op filter_op, void *arg);
3498 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3499 enum rte_filter_type filter_type,
3500 enum rte_filter_op filter_op, void *arg)
3502 struct rte_eth_fdir_info_v22 {
3503 enum rte_fdir_mode mode;
3504 struct rte_eth_fdir_masks mask;
3505 struct rte_eth_fdir_flex_conf flex_conf;
3506 uint32_t guarant_spc;
3508 uint32_t flow_types_mask[1];
3509 uint32_t max_flexpayload;
3510 uint32_t flex_payload_unit;
3511 uint32_t max_flex_payload_segment_num;
3512 uint16_t flex_payload_limit;
3513 uint32_t flex_bitmask_unit;
3514 uint32_t max_flex_bitmask_num;
3517 struct rte_eth_hash_global_conf_v22 {
3518 enum rte_eth_hash_function hash_func;
3519 uint32_t sym_hash_enable_mask[1];
3520 uint32_t valid_bit_mask[1];
3523 struct rte_eth_hash_filter_info_v22 {
3524 enum rte_eth_hash_filter_info_type info_type;
3527 struct rte_eth_hash_global_conf_v22 global_conf;
3528 struct rte_eth_input_set_conf input_set_conf;
3532 struct rte_eth_dev *dev;
3534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3536 dev = &rte_eth_devices[port_id];
3537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3538 if (filter_op == RTE_ETH_FILTER_INFO) {
3540 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3541 struct rte_eth_fdir_info fdir_info;
3543 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3545 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3546 filter_op, (void *)&fdir_info);
3547 fdir_info_v22->mode = fdir_info.mode;
3548 fdir_info_v22->mask = fdir_info.mask;
3549 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3550 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3551 fdir_info_v22->best_spc = fdir_info.best_spc;
3552 fdir_info_v22->flow_types_mask[0] =
3553 (uint32_t)fdir_info.flow_types_mask[0];
3554 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3555 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3556 fdir_info_v22->max_flex_payload_segment_num =
3557 fdir_info.max_flex_payload_segment_num;
3558 fdir_info_v22->flex_payload_limit =
3559 fdir_info.flex_payload_limit;
3560 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3561 fdir_info_v22->max_flex_bitmask_num =
3562 fdir_info.max_flex_bitmask_num;
3564 } else if (filter_op == RTE_ETH_FILTER_GET) {
3566 struct rte_eth_hash_filter_info f_info;
3567 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3568 (struct rte_eth_hash_filter_info_v22 *)arg;
3570 f_info.info_type = f_info_v22->info_type;
3571 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3572 filter_op, (void *)&f_info);
3574 switch (f_info_v22->info_type) {
3575 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3576 f_info_v22->info.enable = f_info.info.enable;
3578 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3579 f_info_v22->info.global_conf.hash_func =
3580 f_info.info.global_conf.hash_func;
3581 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3583 f_info.info.global_conf.sym_hash_enable_mask[0];
3584 f_info_v22->info.global_conf.valid_bit_mask[0] =
3586 f_info.info.global_conf.valid_bit_mask[0];
3588 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3589 f_info_v22->info.input_set_conf =
3590 f_info.info.input_set_conf;
3596 } else if (filter_op == RTE_ETH_FILTER_SET) {
3597 struct rte_eth_hash_filter_info f_info;
3598 struct rte_eth_hash_filter_info_v22 *f_v22 =
3599 (struct rte_eth_hash_filter_info_v22 *)arg;
3601 f_info.info_type = f_v22->info_type;
3602 switch (f_v22->info_type) {
3603 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3604 f_info.info.enable = f_v22->info.enable;
3606 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3607 f_info.info.global_conf.hash_func =
3608 f_v22->info.global_conf.hash_func;
3609 f_info.info.global_conf.sym_hash_enable_mask[0] =
3611 f_v22->info.global_conf.sym_hash_enable_mask[0];
3612 f_info.info.global_conf.valid_bit_mask[0] =
3614 f_v22->info.global_conf.valid_bit_mask[0];
3616 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3617 f_info.info.input_set_conf =
3618 f_v22->info.input_set_conf;
3623 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3626 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3629 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3632 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3633 enum rte_filter_type filter_type,
3634 enum rte_filter_op filter_op, void *arg);
3637 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3638 enum rte_filter_type filter_type,
3639 enum rte_filter_op filter_op, void *arg)
3641 struct rte_eth_dev *dev;
3643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3645 dev = &rte_eth_devices[port_id];
3646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3647 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3650 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3651 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3652 enum rte_filter_type filter_type,
3653 enum rte_filter_op filter_op, void *arg),
3654 rte_eth_dev_filter_ctrl_v1802);
3657 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3658 rte_rx_callback_fn fn, void *user_param)
3660 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3661 rte_errno = ENOTSUP;
3664 /* check input parameters */
3665 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3666 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3670 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3678 cb->param = user_param;
3680 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3681 /* Add the callbacks in fifo order. */
3682 struct rte_eth_rxtx_callback *tail =
3683 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3686 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3693 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3699 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3700 rte_rx_callback_fn fn, void *user_param)
3702 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3703 rte_errno = ENOTSUP;
3706 /* check input parameters */
3707 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3708 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3713 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3721 cb->param = user_param;
3723 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3724 /* Add the callbacks at fisrt position*/
3725 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3727 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3728 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3734 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3735 rte_tx_callback_fn fn, void *user_param)
3737 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3738 rte_errno = ENOTSUP;
3741 /* check input parameters */
3742 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3743 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3748 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3756 cb->param = user_param;
3758 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3759 /* Add the callbacks in fifo order. */
3760 struct rte_eth_rxtx_callback *tail =
3761 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3764 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3771 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3777 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3778 struct rte_eth_rxtx_callback *user_cb)
3780 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3783 /* Check input parameters. */
3784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3785 if (user_cb == NULL ||
3786 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3789 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3790 struct rte_eth_rxtx_callback *cb;
3791 struct rte_eth_rxtx_callback **prev_cb;
3794 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3795 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3796 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3798 if (cb == user_cb) {
3799 /* Remove the user cb from the callback list. */
3800 *prev_cb = cb->next;
3805 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3811 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3812 struct rte_eth_rxtx_callback *user_cb)
3814 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3817 /* Check input parameters. */
3818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3819 if (user_cb == NULL ||
3820 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3823 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3825 struct rte_eth_rxtx_callback *cb;
3826 struct rte_eth_rxtx_callback **prev_cb;
3828 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3829 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3830 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3832 if (cb == user_cb) {
3833 /* Remove the user cb from the callback list. */
3834 *prev_cb = cb->next;
3839 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3845 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3846 struct rte_eth_rxq_info *qinfo)
3848 struct rte_eth_dev *dev;
3850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3855 dev = &rte_eth_devices[port_id];
3856 if (queue_id >= dev->data->nb_rx_queues) {
3857 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3863 memset(qinfo, 0, sizeof(*qinfo));
3864 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3869 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3870 struct rte_eth_txq_info *qinfo)
3872 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3879 dev = &rte_eth_devices[port_id];
3880 if (queue_id >= dev->data->nb_tx_queues) {
3881 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3887 memset(qinfo, 0, sizeof(*qinfo));
3888 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3893 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3894 struct ether_addr *mc_addr_set,
3895 uint32_t nb_mc_addr)
3897 struct rte_eth_dev *dev;
3899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3901 dev = &rte_eth_devices[port_id];
3902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3903 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3904 mc_addr_set, nb_mc_addr));
3908 rte_eth_timesync_enable(uint16_t port_id)
3910 struct rte_eth_dev *dev;
3912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3913 dev = &rte_eth_devices[port_id];
3915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3916 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3920 rte_eth_timesync_disable(uint16_t port_id)
3922 struct rte_eth_dev *dev;
3924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3925 dev = &rte_eth_devices[port_id];
3927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3928 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3932 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3935 struct rte_eth_dev *dev;
3937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3938 dev = &rte_eth_devices[port_id];
3940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3941 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3942 (dev, timestamp, flags));
3946 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3947 struct timespec *timestamp)
3949 struct rte_eth_dev *dev;
3951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3952 dev = &rte_eth_devices[port_id];
3954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3955 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3960 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3962 struct rte_eth_dev *dev;
3964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3965 dev = &rte_eth_devices[port_id];
3967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3968 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3973 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3975 struct rte_eth_dev *dev;
3977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3978 dev = &rte_eth_devices[port_id];
3980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3981 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3986 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3988 struct rte_eth_dev *dev;
3990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3991 dev = &rte_eth_devices[port_id];
3993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3994 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3999 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4001 struct rte_eth_dev *dev;
4003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4005 dev = &rte_eth_devices[port_id];
4006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4007 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4011 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4013 struct rte_eth_dev *dev;
4015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4017 dev = &rte_eth_devices[port_id];
4018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4019 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4023 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4025 struct rte_eth_dev *dev;
4027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4029 dev = &rte_eth_devices[port_id];
4030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4031 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4035 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4037 struct rte_eth_dev *dev;
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4041 dev = &rte_eth_devices[port_id];
4042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4043 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4047 rte_eth_dev_get_dcb_info(uint16_t port_id,
4048 struct rte_eth_dcb_info *dcb_info)
4050 struct rte_eth_dev *dev;
4052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4054 dev = &rte_eth_devices[port_id];
4055 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4058 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4062 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4063 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4065 struct rte_eth_dev *dev;
4067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4068 if (l2_tunnel == NULL) {
4069 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4073 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4074 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4078 dev = &rte_eth_devices[port_id];
4079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4081 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4086 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4087 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4091 struct rte_eth_dev *dev;
4093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4095 if (l2_tunnel == NULL) {
4096 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4100 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4101 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4106 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4110 dev = &rte_eth_devices[port_id];
4111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4113 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4114 l2_tunnel, mask, en));
4118 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4119 const struct rte_eth_desc_lim *desc_lim)
4121 if (desc_lim->nb_align != 0)
4122 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4124 if (desc_lim->nb_max != 0)
4125 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4127 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4131 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4132 uint16_t *nb_rx_desc,
4133 uint16_t *nb_tx_desc)
4135 struct rte_eth_dev *dev;
4136 struct rte_eth_dev_info dev_info;
4138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4140 dev = &rte_eth_devices[port_id];
4141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4143 rte_eth_dev_info_get(port_id, &dev_info);
4145 if (nb_rx_desc != NULL)
4146 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4148 if (nb_tx_desc != NULL)
4149 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4155 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4157 struct rte_eth_dev *dev;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4164 dev = &rte_eth_devices[port_id];
4166 if (*dev->dev_ops->pool_ops_supported == NULL)
4167 return 1; /* all pools are supported */
4169 return (*dev->dev_ops->pool_ops_supported)(dev, pool);