4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
182 strcmp(rte_eth_devices[i].data->name, name) == 0)
183 return &rte_eth_devices[i];
189 rte_eth_dev_find_free_port(void)
193 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
194 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
197 return RTE_MAX_ETHPORTS;
200 static struct rte_eth_dev *
201 eth_dev_get(uint8_t port_id)
203 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
205 eth_dev->data = &rte_eth_dev_data[port_id];
206 eth_dev->state = RTE_ETH_DEV_ATTACHED;
207 TAILQ_INIT(&(eth_dev->link_intr_cbs));
209 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
298 rte_eth_dev_socket_id(uint8_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_count(void)
311 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
318 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
322 /* shouldn't check 'rte_eth_devices[i].data',
323 * because it might be overwritten by VDEV PMD */
324 tmp = rte_eth_dev_data[port_id].name;
330 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
335 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
342 *port_id = RTE_MAX_ETHPORTS;
343 RTE_ETH_FOREACH_DEV(i) {
345 rte_eth_dev_data[i].name, strlen(name))) {
356 rte_eth_dev_is_detachable(uint8_t port_id)
360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
362 switch (rte_eth_devices[port_id].data->kdrv) {
363 case RTE_KDRV_IGB_UIO:
364 case RTE_KDRV_UIO_GENERIC:
365 case RTE_KDRV_NIC_UIO:
372 dev_flags = rte_eth_devices[port_id].data->dev_flags;
373 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
374 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
380 /* attach the new device, then store port_id of the device */
382 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
385 int current = rte_eth_dev_count();
389 if ((devargs == NULL) || (port_id == NULL)) {
394 /* parse devargs, then retrieve device name and args */
395 if (rte_eal_parse_devargs_str(devargs, &name, &args))
398 ret = rte_eal_dev_attach(name, args);
402 /* no point looking at the port count if no port exists */
403 if (!rte_eth_dev_count()) {
404 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
409 /* if nothing happened, there is a bug here, since some driver told us
410 * it did attach a device, but did not create a port.
412 if (current == rte_eth_dev_count()) {
417 *port_id = eth_dev_last_created_port;
426 /* detach the device, then store the name of the device */
428 rte_eth_dev_detach(uint8_t port_id, char *name)
437 /* FIXME: move this to eal, once device flags are relocated there */
438 if (rte_eth_dev_is_detachable(port_id))
441 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
442 "%s", rte_eth_devices[port_id].data->name);
443 ret = rte_eal_dev_detach(name);
454 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
456 uint16_t old_nb_queues = dev->data->nb_rx_queues;
460 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
461 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
462 sizeof(dev->data->rx_queues[0]) * nb_queues,
463 RTE_CACHE_LINE_SIZE);
464 if (dev->data->rx_queues == NULL) {
465 dev->data->nb_rx_queues = 0;
468 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
471 rxq = dev->data->rx_queues;
473 for (i = nb_queues; i < old_nb_queues; i++)
474 (*dev->dev_ops->rx_queue_release)(rxq[i]);
475 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
476 RTE_CACHE_LINE_SIZE);
479 if (nb_queues > old_nb_queues) {
480 uint16_t new_qs = nb_queues - old_nb_queues;
482 memset(rxq + old_nb_queues, 0,
483 sizeof(rxq[0]) * new_qs);
486 dev->data->rx_queues = rxq;
488 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
491 rxq = dev->data->rx_queues;
493 for (i = nb_queues; i < old_nb_queues; i++)
494 (*dev->dev_ops->rx_queue_release)(rxq[i]);
496 rte_free(dev->data->rx_queues);
497 dev->data->rx_queues = NULL;
499 dev->data->nb_rx_queues = nb_queues;
504 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
506 struct rte_eth_dev *dev;
508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
510 dev = &rte_eth_devices[port_id];
511 if (rx_queue_id >= dev->data->nb_rx_queues) {
512 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
518 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
519 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
520 " already started\n",
521 rx_queue_id, port_id);
525 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
530 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already stopped\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
556 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (tx_queue_id >= dev->data->nb_tx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
570 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already started\n",
573 tx_queue_id, port_id);
577 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
582 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already stopped\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
610 uint16_t old_nb_queues = dev->data->nb_tx_queues;
614 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
615 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
616 sizeof(dev->data->tx_queues[0]) * nb_queues,
617 RTE_CACHE_LINE_SIZE);
618 if (dev->data->tx_queues == NULL) {
619 dev->data->nb_tx_queues = 0;
622 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
625 txq = dev->data->tx_queues;
627 for (i = nb_queues; i < old_nb_queues; i++)
628 (*dev->dev_ops->tx_queue_release)(txq[i]);
629 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
633 if (nb_queues > old_nb_queues) {
634 uint16_t new_qs = nb_queues - old_nb_queues;
636 memset(txq + old_nb_queues, 0,
637 sizeof(txq[0]) * new_qs);
640 dev->data->tx_queues = txq;
642 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
645 txq = dev->data->tx_queues;
647 for (i = nb_queues; i < old_nb_queues; i++)
648 (*dev->dev_ops->tx_queue_release)(txq[i]);
650 rte_free(dev->data->tx_queues);
651 dev->data->tx_queues = NULL;
653 dev->data->nb_tx_queues = nb_queues;
658 rte_eth_speed_bitflag(uint32_t speed, int duplex)
661 case ETH_SPEED_NUM_10M:
662 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
663 case ETH_SPEED_NUM_100M:
664 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
665 case ETH_SPEED_NUM_1G:
666 return ETH_LINK_SPEED_1G;
667 case ETH_SPEED_NUM_2_5G:
668 return ETH_LINK_SPEED_2_5G;
669 case ETH_SPEED_NUM_5G:
670 return ETH_LINK_SPEED_5G;
671 case ETH_SPEED_NUM_10G:
672 return ETH_LINK_SPEED_10G;
673 case ETH_SPEED_NUM_20G:
674 return ETH_LINK_SPEED_20G;
675 case ETH_SPEED_NUM_25G:
676 return ETH_LINK_SPEED_25G;
677 case ETH_SPEED_NUM_40G:
678 return ETH_LINK_SPEED_40G;
679 case ETH_SPEED_NUM_50G:
680 return ETH_LINK_SPEED_50G;
681 case ETH_SPEED_NUM_56G:
682 return ETH_LINK_SPEED_56G;
683 case ETH_SPEED_NUM_100G:
684 return ETH_LINK_SPEED_100G;
691 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
692 const struct rte_eth_conf *dev_conf)
694 struct rte_eth_dev *dev;
695 struct rte_eth_dev_info dev_info;
698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
700 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
702 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
703 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
707 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
709 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
710 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
714 dev = &rte_eth_devices[port_id];
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
719 if (dev->data->dev_started) {
721 "port %d must be stopped to allow configuration\n", port_id);
725 /* Copy the dev_conf parameter into the dev structure */
726 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
729 * Check that the numbers of RX and TX queues are not greater
730 * than the maximum number of RX and TX queues supported by the
733 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
735 if (nb_rx_q == 0 && nb_tx_q == 0) {
736 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
740 if (nb_rx_q > dev_info.max_rx_queues) {
741 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
742 port_id, nb_rx_q, dev_info.max_rx_queues);
746 if (nb_tx_q > dev_info.max_tx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
748 port_id, nb_tx_q, dev_info.max_tx_queues);
753 * If link state interrupt is enabled, check that the
754 * device supports it.
756 if ((dev_conf->intr_conf.lsc == 1) &&
757 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
758 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
759 dev->data->drv_name);
764 * If jumbo frames are enabled, check that the maximum RX packet
765 * length is supported by the configured device.
767 if (dev_conf->rxmode.jumbo_frame == 1) {
768 if (dev_conf->rxmode.max_rx_pkt_len >
769 dev_info.max_rx_pktlen) {
770 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
771 " > max valid value %u\n",
773 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
774 (unsigned)dev_info.max_rx_pktlen);
776 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
777 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
778 " < min valid value %u\n",
780 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
781 (unsigned)ETHER_MIN_LEN);
785 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
786 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
787 /* Use default value */
788 dev->data->dev_conf.rxmode.max_rx_pkt_len =
793 * Setup new number of RX/TX queues and reconfigure device.
795 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
797 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
802 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
804 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
806 rte_eth_dev_rx_queue_config(dev, 0);
810 diag = (*dev->dev_ops->dev_configure)(dev);
812 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
814 rte_eth_dev_rx_queue_config(dev, 0);
815 rte_eth_dev_tx_queue_config(dev, 0);
823 _rte_eth_dev_reset(struct rte_eth_dev *dev)
825 if (dev->data->dev_started) {
827 "port %d must be stopped to allow reset\n",
832 rte_eth_dev_rx_queue_config(dev, 0);
833 rte_eth_dev_tx_queue_config(dev, 0);
835 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
839 rte_eth_dev_config_restore(uint8_t port_id)
841 struct rte_eth_dev *dev;
842 struct rte_eth_dev_info dev_info;
843 struct ether_addr *addr;
848 dev = &rte_eth_devices[port_id];
850 rte_eth_dev_info_get(port_id, &dev_info);
852 /* replay MAC address configuration including default MAC */
853 addr = &dev->data->mac_addrs[0];
854 if (*dev->dev_ops->mac_addr_set != NULL)
855 (*dev->dev_ops->mac_addr_set)(dev, addr);
856 else if (*dev->dev_ops->mac_addr_add != NULL)
857 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
859 if (*dev->dev_ops->mac_addr_add != NULL) {
860 for (i = 1; i < dev_info.max_mac_addrs; i++) {
861 addr = &dev->data->mac_addrs[i];
863 /* skip zero address */
864 if (is_zero_ether_addr(addr))
868 pool_mask = dev->data->mac_pool_sel[i];
871 if (pool_mask & 1ULL)
872 (*dev->dev_ops->mac_addr_add)(dev,
880 /* replay promiscuous configuration */
881 if (rte_eth_promiscuous_get(port_id) == 1)
882 rte_eth_promiscuous_enable(port_id);
883 else if (rte_eth_promiscuous_get(port_id) == 0)
884 rte_eth_promiscuous_disable(port_id);
886 /* replay all multicast configuration */
887 if (rte_eth_allmulticast_get(port_id) == 1)
888 rte_eth_allmulticast_enable(port_id);
889 else if (rte_eth_allmulticast_get(port_id) == 0)
890 rte_eth_allmulticast_disable(port_id);
894 rte_eth_dev_start(uint8_t port_id)
896 struct rte_eth_dev *dev;
899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
901 dev = &rte_eth_devices[port_id];
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
905 if (dev->data->dev_started != 0) {
906 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
907 " already started\n",
912 diag = (*dev->dev_ops->dev_start)(dev);
914 dev->data->dev_started = 1;
918 rte_eth_dev_config_restore(port_id);
920 if (dev->data->dev_conf.intr_conf.lsc == 0) {
921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
922 (*dev->dev_ops->link_update)(dev, 0);
928 rte_eth_dev_stop(uint8_t port_id)
930 struct rte_eth_dev *dev;
932 RTE_ETH_VALID_PORTID_OR_RET(port_id);
933 dev = &rte_eth_devices[port_id];
935 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
937 if (dev->data->dev_started == 0) {
938 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
939 " already stopped\n",
944 dev->data->dev_started = 0;
945 (*dev->dev_ops->dev_stop)(dev);
949 rte_eth_dev_set_link_up(uint8_t port_id)
951 struct rte_eth_dev *dev;
953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
955 dev = &rte_eth_devices[port_id];
957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
958 return (*dev->dev_ops->dev_set_link_up)(dev);
962 rte_eth_dev_set_link_down(uint8_t port_id)
964 struct rte_eth_dev *dev;
966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
968 dev = &rte_eth_devices[port_id];
970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
971 return (*dev->dev_ops->dev_set_link_down)(dev);
975 rte_eth_dev_close(uint8_t port_id)
977 struct rte_eth_dev *dev;
979 RTE_ETH_VALID_PORTID_OR_RET(port_id);
980 dev = &rte_eth_devices[port_id];
982 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
983 dev->data->dev_started = 0;
984 (*dev->dev_ops->dev_close)(dev);
986 rte_free(dev->data->rx_queues);
987 dev->data->rx_queues = NULL;
988 rte_free(dev->data->tx_queues);
989 dev->data->tx_queues = NULL;
993 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
994 uint16_t nb_rx_desc, unsigned int socket_id,
995 const struct rte_eth_rxconf *rx_conf,
996 struct rte_mempool *mp)
999 uint32_t mbp_buf_size;
1000 struct rte_eth_dev *dev;
1001 struct rte_eth_dev_info dev_info;
1004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1006 dev = &rte_eth_devices[port_id];
1007 if (rx_queue_id >= dev->data->nb_rx_queues) {
1008 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1012 if (dev->data->dev_started) {
1013 RTE_PMD_DEBUG_TRACE(
1014 "port %d must be stopped to allow configuration\n", port_id);
1018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1022 * Check the size of the mbuf data buffer.
1023 * This value must be provided in the private data of the memory pool.
1024 * First check that the memory pool has a valid private data.
1026 rte_eth_dev_info_get(port_id, &dev_info);
1027 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1028 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1029 mp->name, (int) mp->private_data_size,
1030 (int) sizeof(struct rte_pktmbuf_pool_private));
1033 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1035 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1036 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1037 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1041 (int)(RTE_PKTMBUF_HEADROOM +
1042 dev_info.min_rx_bufsize),
1043 (int)RTE_PKTMBUF_HEADROOM,
1044 (int)dev_info.min_rx_bufsize);
1048 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1049 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1050 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1052 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1053 "should be: <= %hu, = %hu, and a product of %hu\n",
1055 dev_info.rx_desc_lim.nb_max,
1056 dev_info.rx_desc_lim.nb_min,
1057 dev_info.rx_desc_lim.nb_align);
1061 rxq = dev->data->rx_queues;
1062 if (rxq[rx_queue_id]) {
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1065 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1066 rxq[rx_queue_id] = NULL;
1069 if (rx_conf == NULL)
1070 rx_conf = &dev_info.default_rxconf;
1072 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1073 socket_id, rx_conf, mp);
1075 if (!dev->data->min_rx_buf_size ||
1076 dev->data->min_rx_buf_size > mbp_buf_size)
1077 dev->data->min_rx_buf_size = mbp_buf_size;
1084 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1085 uint16_t nb_tx_desc, unsigned int socket_id,
1086 const struct rte_eth_txconf *tx_conf)
1088 struct rte_eth_dev *dev;
1089 struct rte_eth_dev_info dev_info;
1092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1094 dev = &rte_eth_devices[port_id];
1095 if (tx_queue_id >= dev->data->nb_tx_queues) {
1096 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1100 if (dev->data->dev_started) {
1101 RTE_PMD_DEBUG_TRACE(
1102 "port %d must be stopped to allow configuration\n", port_id);
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1109 rte_eth_dev_info_get(port_id, &dev_info);
1111 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1112 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1113 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1114 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1115 "should be: <= %hu, = %hu, and a product of %hu\n",
1117 dev_info.tx_desc_lim.nb_max,
1118 dev_info.tx_desc_lim.nb_min,
1119 dev_info.tx_desc_lim.nb_align);
1123 txq = dev->data->tx_queues;
1124 if (txq[tx_queue_id]) {
1125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1127 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1128 txq[tx_queue_id] = NULL;
1131 if (tx_conf == NULL)
1132 tx_conf = &dev_info.default_txconf;
1134 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1135 socket_id, tx_conf);
1139 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1140 void *userdata __rte_unused)
1144 for (i = 0; i < unsent; i++)
1145 rte_pktmbuf_free(pkts[i]);
1149 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1152 uint64_t *count = userdata;
1155 for (i = 0; i < unsent; i++)
1156 rte_pktmbuf_free(pkts[i]);
1162 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1163 buffer_tx_error_fn cbfn, void *userdata)
1165 buffer->error_callback = cbfn;
1166 buffer->error_userdata = userdata;
1171 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1178 buffer->size = size;
1179 if (buffer->error_callback == NULL) {
1180 ret = rte_eth_tx_buffer_set_err_callback(
1181 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1188 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1190 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1192 /* Validate Input Data. Bail if not valid or not supported. */
1193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1196 /* Call driver to free pending mbufs. */
1197 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1202 rte_eth_promiscuous_enable(uint8_t port_id)
1204 struct rte_eth_dev *dev;
1206 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1207 dev = &rte_eth_devices[port_id];
1209 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1210 (*dev->dev_ops->promiscuous_enable)(dev);
1211 dev->data->promiscuous = 1;
1215 rte_eth_promiscuous_disable(uint8_t port_id)
1217 struct rte_eth_dev *dev;
1219 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1220 dev = &rte_eth_devices[port_id];
1222 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1223 dev->data->promiscuous = 0;
1224 (*dev->dev_ops->promiscuous_disable)(dev);
1228 rte_eth_promiscuous_get(uint8_t port_id)
1230 struct rte_eth_dev *dev;
1232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1234 dev = &rte_eth_devices[port_id];
1235 return dev->data->promiscuous;
1239 rte_eth_allmulticast_enable(uint8_t port_id)
1241 struct rte_eth_dev *dev;
1243 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1244 dev = &rte_eth_devices[port_id];
1246 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1247 (*dev->dev_ops->allmulticast_enable)(dev);
1248 dev->data->all_multicast = 1;
1252 rte_eth_allmulticast_disable(uint8_t port_id)
1254 struct rte_eth_dev *dev;
1256 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1257 dev = &rte_eth_devices[port_id];
1259 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1260 dev->data->all_multicast = 0;
1261 (*dev->dev_ops->allmulticast_disable)(dev);
1265 rte_eth_allmulticast_get(uint8_t port_id)
1267 struct rte_eth_dev *dev;
1269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1271 dev = &rte_eth_devices[port_id];
1272 return dev->data->all_multicast;
1276 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1277 struct rte_eth_link *link)
1279 struct rte_eth_link *dst = link;
1280 struct rte_eth_link *src = &(dev->data->dev_link);
1282 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1283 *(uint64_t *)src) == 0)
1290 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1292 struct rte_eth_dev *dev;
1294 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1295 dev = &rte_eth_devices[port_id];
1297 if (dev->data->dev_conf.intr_conf.lsc != 0)
1298 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1300 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1301 (*dev->dev_ops->link_update)(dev, 1);
1302 *eth_link = dev->data->dev_link;
1307 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1309 struct rte_eth_dev *dev;
1311 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1312 dev = &rte_eth_devices[port_id];
1314 if (dev->data->dev_conf.intr_conf.lsc != 0)
1315 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1317 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1318 (*dev->dev_ops->link_update)(dev, 0);
1319 *eth_link = dev->data->dev_link;
1324 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1326 struct rte_eth_dev *dev;
1328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1330 dev = &rte_eth_devices[port_id];
1331 memset(stats, 0, sizeof(*stats));
1333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1334 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1335 (*dev->dev_ops->stats_get)(dev, stats);
1340 rte_eth_stats_reset(uint8_t port_id)
1342 struct rte_eth_dev *dev;
1344 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1345 dev = &rte_eth_devices[port_id];
1347 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1348 (*dev->dev_ops->stats_reset)(dev);
1349 dev->data->rx_mbuf_alloc_failed = 0;
1353 get_xstats_count(uint8_t port_id)
1355 struct rte_eth_dev *dev;
1358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1359 dev = &rte_eth_devices[port_id];
1360 if (dev->dev_ops->xstats_get_names != NULL) {
1361 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1366 count += RTE_NB_STATS;
1367 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1369 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1375 rte_eth_xstats_get_names(uint8_t port_id,
1376 struct rte_eth_xstat_name *xstats_names,
1379 struct rte_eth_dev *dev;
1380 int cnt_used_entries;
1381 int cnt_expected_entries;
1382 int cnt_driver_entries;
1383 uint32_t idx, id_queue;
1386 cnt_expected_entries = get_xstats_count(port_id);
1387 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1388 (int)size < cnt_expected_entries)
1389 return cnt_expected_entries;
1391 /* port_id checked in get_xstats_count() */
1392 dev = &rte_eth_devices[port_id];
1393 cnt_used_entries = 0;
1395 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1396 snprintf(xstats_names[cnt_used_entries].name,
1397 sizeof(xstats_names[0].name),
1398 "%s", rte_stats_strings[idx].name);
1401 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1402 for (id_queue = 0; id_queue < num_q; id_queue++) {
1403 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1404 snprintf(xstats_names[cnt_used_entries].name,
1405 sizeof(xstats_names[0].name),
1407 id_queue, rte_rxq_stats_strings[idx].name);
1412 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1413 for (id_queue = 0; id_queue < num_q; id_queue++) {
1414 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1415 snprintf(xstats_names[cnt_used_entries].name,
1416 sizeof(xstats_names[0].name),
1418 id_queue, rte_txq_stats_strings[idx].name);
1423 if (dev->dev_ops->xstats_get_names != NULL) {
1424 /* If there are any driver-specific xstats, append them
1427 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1429 xstats_names + cnt_used_entries,
1430 size - cnt_used_entries);
1431 if (cnt_driver_entries < 0)
1432 return cnt_driver_entries;
1433 cnt_used_entries += cnt_driver_entries;
1436 return cnt_used_entries;
1439 /* retrieve ethdev extended statistics */
1441 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1444 struct rte_eth_stats eth_stats;
1445 struct rte_eth_dev *dev;
1446 unsigned count = 0, i, q;
1448 uint64_t val, *stats_ptr;
1449 uint16_t nb_rxqs, nb_txqs;
1451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1453 dev = &rte_eth_devices[port_id];
1455 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1456 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1458 /* Return generic statistics */
1459 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1460 (nb_txqs * RTE_NB_TXQ_STATS);
1462 /* implemented by the driver */
1463 if (dev->dev_ops->xstats_get != NULL) {
1464 /* Retrieve the xstats from the driver at the end of the
1467 xcount = (*dev->dev_ops->xstats_get)(dev,
1468 xstats ? xstats + count : NULL,
1469 (n > count) ? n - count : 0);
1475 if (n < count + xcount || xstats == NULL)
1476 return count + xcount;
1478 /* now fill the xstats structure */
1480 rte_eth_stats_get(port_id, ð_stats);
1483 for (i = 0; i < RTE_NB_STATS; i++) {
1484 stats_ptr = RTE_PTR_ADD(ð_stats,
1485 rte_stats_strings[i].offset);
1487 xstats[count++].value = val;
1491 for (q = 0; q < nb_rxqs; q++) {
1492 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1493 stats_ptr = RTE_PTR_ADD(ð_stats,
1494 rte_rxq_stats_strings[i].offset +
1495 q * sizeof(uint64_t));
1497 xstats[count++].value = val;
1502 for (q = 0; q < nb_txqs; q++) {
1503 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1504 stats_ptr = RTE_PTR_ADD(ð_stats,
1505 rte_txq_stats_strings[i].offset +
1506 q * sizeof(uint64_t));
1508 xstats[count++].value = val;
1512 for (i = 0; i < count; i++)
1514 /* add an offset to driver-specific stats */
1515 for ( ; i < count + xcount; i++)
1516 xstats[i].id += count;
1518 return count + xcount;
1521 /* reset ethdev extended statistics */
1523 rte_eth_xstats_reset(uint8_t port_id)
1525 struct rte_eth_dev *dev;
1527 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1528 dev = &rte_eth_devices[port_id];
1530 /* implemented by the driver */
1531 if (dev->dev_ops->xstats_reset != NULL) {
1532 (*dev->dev_ops->xstats_reset)(dev);
1536 /* fallback to default */
1537 rte_eth_stats_reset(port_id);
1541 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1544 struct rte_eth_dev *dev;
1546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1548 dev = &rte_eth_devices[port_id];
1550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1551 return (*dev->dev_ops->queue_stats_mapping_set)
1552 (dev, queue_id, stat_idx, is_rx);
1557 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1560 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1566 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1569 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1574 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1576 struct rte_eth_dev *dev;
1578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1579 dev = &rte_eth_devices[port_id];
1581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1582 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1586 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1588 struct rte_eth_dev *dev;
1589 const struct rte_eth_desc_lim lim = {
1590 .nb_max = UINT16_MAX,
1595 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1596 dev = &rte_eth_devices[port_id];
1598 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1599 dev_info->rx_desc_lim = lim;
1600 dev_info->tx_desc_lim = lim;
1602 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1603 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1604 dev_info->driver_name = dev->data->drv_name;
1605 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1606 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1610 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1611 uint32_t *ptypes, int num)
1614 struct rte_eth_dev *dev;
1615 const uint32_t *all_ptypes;
1617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1618 dev = &rte_eth_devices[port_id];
1619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1620 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1625 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1626 if (all_ptypes[i] & ptype_mask) {
1628 ptypes[j] = all_ptypes[i];
1636 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1638 struct rte_eth_dev *dev;
1640 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1641 dev = &rte_eth_devices[port_id];
1642 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1647 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1649 struct rte_eth_dev *dev;
1651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1653 dev = &rte_eth_devices[port_id];
1654 *mtu = dev->data->mtu;
1659 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1662 struct rte_eth_dev *dev;
1664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1665 dev = &rte_eth_devices[port_id];
1666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1668 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1670 dev->data->mtu = mtu;
1676 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1678 struct rte_eth_dev *dev;
1680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1681 dev = &rte_eth_devices[port_id];
1682 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1683 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1687 if (vlan_id > 4095) {
1688 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1689 port_id, (unsigned) vlan_id);
1692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1694 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1698 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1700 struct rte_eth_dev *dev;
1702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1703 dev = &rte_eth_devices[port_id];
1704 if (rx_queue_id >= dev->data->nb_rx_queues) {
1705 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1710 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1716 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1717 enum rte_vlan_type vlan_type,
1720 struct rte_eth_dev *dev;
1722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1723 dev = &rte_eth_devices[port_id];
1724 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1726 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1730 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1732 struct rte_eth_dev *dev;
1737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1738 dev = &rte_eth_devices[port_id];
1740 /*check which option changed by application*/
1741 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1742 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1744 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1745 mask |= ETH_VLAN_STRIP_MASK;
1748 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1749 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1751 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1752 mask |= ETH_VLAN_FILTER_MASK;
1755 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1756 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1758 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1759 mask |= ETH_VLAN_EXTEND_MASK;
1766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1767 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1773 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1775 struct rte_eth_dev *dev;
1778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1779 dev = &rte_eth_devices[port_id];
1781 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1782 ret |= ETH_VLAN_STRIP_OFFLOAD;
1784 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1785 ret |= ETH_VLAN_FILTER_OFFLOAD;
1787 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1788 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1794 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1796 struct rte_eth_dev *dev;
1798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1799 dev = &rte_eth_devices[port_id];
1800 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1801 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1807 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1809 struct rte_eth_dev *dev;
1811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1812 dev = &rte_eth_devices[port_id];
1813 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1814 memset(fc_conf, 0, sizeof(*fc_conf));
1815 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1819 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1821 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1824 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1825 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1829 dev = &rte_eth_devices[port_id];
1830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1831 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1835 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1840 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1841 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1845 dev = &rte_eth_devices[port_id];
1846 /* High water, low water validation are device specific */
1847 if (*dev->dev_ops->priority_flow_ctrl_set)
1848 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1853 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1861 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
1862 for (i = 0; i < num; i++) {
1863 if (reta_conf[i].mask)
1871 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1875 uint16_t i, idx, shift;
1881 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1885 for (i = 0; i < reta_size; i++) {
1886 idx = i / RTE_RETA_GROUP_SIZE;
1887 shift = i % RTE_RETA_GROUP_SIZE;
1888 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1889 (reta_conf[idx].reta[shift] >= max_rxq)) {
1890 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1891 "the maximum rxq index: %u\n", idx, shift,
1892 reta_conf[idx].reta[shift], max_rxq);
1901 rte_eth_dev_rss_reta_update(uint8_t port_id,
1902 struct rte_eth_rss_reta_entry64 *reta_conf,
1905 struct rte_eth_dev *dev;
1908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1909 /* Check mask bits */
1910 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1914 dev = &rte_eth_devices[port_id];
1916 /* Check entry value */
1917 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1918 dev->data->nb_rx_queues);
1922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1923 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1927 rte_eth_dev_rss_reta_query(uint8_t port_id,
1928 struct rte_eth_rss_reta_entry64 *reta_conf,
1931 struct rte_eth_dev *dev;
1934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1936 /* Check mask bits */
1937 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1941 dev = &rte_eth_devices[port_id];
1942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1943 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1947 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1949 struct rte_eth_dev *dev;
1950 uint16_t rss_hash_protos;
1952 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1953 rss_hash_protos = rss_conf->rss_hf;
1954 if ((rss_hash_protos != 0) &&
1955 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1956 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1960 dev = &rte_eth_devices[port_id];
1961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1962 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1966 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1967 struct rte_eth_rss_conf *rss_conf)
1969 struct rte_eth_dev *dev;
1971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1972 dev = &rte_eth_devices[port_id];
1973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1974 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1978 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1979 struct rte_eth_udp_tunnel *udp_tunnel)
1981 struct rte_eth_dev *dev;
1983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1984 if (udp_tunnel == NULL) {
1985 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1989 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1990 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1994 dev = &rte_eth_devices[port_id];
1995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
1996 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2000 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2001 struct rte_eth_udp_tunnel *udp_tunnel)
2003 struct rte_eth_dev *dev;
2005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2006 dev = &rte_eth_devices[port_id];
2008 if (udp_tunnel == NULL) {
2009 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2013 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2014 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2019 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2023 rte_eth_led_on(uint8_t port_id)
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2028 dev = &rte_eth_devices[port_id];
2029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2030 return (*dev->dev_ops->dev_led_on)(dev);
2034 rte_eth_led_off(uint8_t port_id)
2036 struct rte_eth_dev *dev;
2038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2039 dev = &rte_eth_devices[port_id];
2040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2041 return (*dev->dev_ops->dev_led_off)(dev);
2045 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2049 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2051 struct rte_eth_dev_info dev_info;
2052 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2055 rte_eth_dev_info_get(port_id, &dev_info);
2057 for (i = 0; i < dev_info.max_mac_addrs; i++)
2058 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2064 static const struct ether_addr null_mac_addr;
2067 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2070 struct rte_eth_dev *dev;
2074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2075 dev = &rte_eth_devices[port_id];
2076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2078 if (is_zero_ether_addr(addr)) {
2079 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2083 if (pool >= ETH_64_POOLS) {
2084 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2088 index = get_mac_addr_index(port_id, addr);
2090 index = get_mac_addr_index(port_id, &null_mac_addr);
2092 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2097 pool_mask = dev->data->mac_pool_sel[index];
2099 /* Check if both MAC address and pool is already there, and do nothing */
2100 if (pool_mask & (1ULL << pool))
2105 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2107 /* Update address in NIC data structure */
2108 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2110 /* Update pool bitmap in NIC data structure */
2111 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2117 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2119 struct rte_eth_dev *dev;
2122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2123 dev = &rte_eth_devices[port_id];
2124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2126 index = get_mac_addr_index(port_id, addr);
2128 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2130 } else if (index < 0)
2131 return 0; /* Do nothing if address wasn't found */
2134 (*dev->dev_ops->mac_addr_remove)(dev, index);
2136 /* Update address in NIC data structure */
2137 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2139 /* reset pool bitmap */
2140 dev->data->mac_pool_sel[index] = 0;
2146 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2148 struct rte_eth_dev *dev;
2150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2152 if (!is_valid_assigned_ether_addr(addr))
2155 dev = &rte_eth_devices[port_id];
2156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2158 /* Update default address in NIC data structure */
2159 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2161 (*dev->dev_ops->mac_addr_set)(dev, addr);
2168 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2172 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2174 struct rte_eth_dev_info dev_info;
2175 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2178 rte_eth_dev_info_get(port_id, &dev_info);
2179 if (!dev->data->hash_mac_addrs)
2182 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2183 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2184 ETHER_ADDR_LEN) == 0)
2191 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2196 struct rte_eth_dev *dev;
2198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2200 dev = &rte_eth_devices[port_id];
2201 if (is_zero_ether_addr(addr)) {
2202 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2207 index = get_hash_mac_addr_index(port_id, addr);
2208 /* Check if it's already there, and do nothing */
2209 if ((index >= 0) && (on))
2214 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2215 "set in UTA\n", port_id);
2219 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2221 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2228 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2230 /* Update address in NIC data structure */
2232 ether_addr_copy(addr,
2233 &dev->data->hash_mac_addrs[index]);
2235 ether_addr_copy(&null_mac_addr,
2236 &dev->data->hash_mac_addrs[index]);
2243 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2245 struct rte_eth_dev *dev;
2247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2249 dev = &rte_eth_devices[port_id];
2251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2252 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2255 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2258 struct rte_eth_dev *dev;
2259 struct rte_eth_dev_info dev_info;
2260 struct rte_eth_link link;
2262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2264 dev = &rte_eth_devices[port_id];
2265 rte_eth_dev_info_get(port_id, &dev_info);
2266 link = dev->data->dev_link;
2268 if (queue_idx > dev_info.max_tx_queues) {
2269 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2270 "invalid queue id=%d\n", port_id, queue_idx);
2274 if (tx_rate > link.link_speed) {
2275 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2276 "bigger than link speed= %d\n",
2277 tx_rate, link.link_speed);
2281 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2282 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2286 rte_eth_mirror_rule_set(uint8_t port_id,
2287 struct rte_eth_mirror_conf *mirror_conf,
2288 uint8_t rule_id, uint8_t on)
2290 struct rte_eth_dev *dev;
2292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2293 if (mirror_conf->rule_type == 0) {
2294 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2298 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2299 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2304 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2305 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2306 (mirror_conf->pool_mask == 0)) {
2307 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2311 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2312 mirror_conf->vlan.vlan_mask == 0) {
2313 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2317 dev = &rte_eth_devices[port_id];
2318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2320 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2324 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2326 struct rte_eth_dev *dev;
2328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2330 dev = &rte_eth_devices[port_id];
2331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2333 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2337 rte_eth_dev_callback_register(uint8_t port_id,
2338 enum rte_eth_event_type event,
2339 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2341 struct rte_eth_dev *dev;
2342 struct rte_eth_dev_callback *user_cb;
2347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2349 dev = &rte_eth_devices[port_id];
2350 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2352 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2353 if (user_cb->cb_fn == cb_fn &&
2354 user_cb->cb_arg == cb_arg &&
2355 user_cb->event == event) {
2360 /* create a new callback. */
2361 if (user_cb == NULL) {
2362 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2363 sizeof(struct rte_eth_dev_callback), 0);
2364 if (user_cb != NULL) {
2365 user_cb->cb_fn = cb_fn;
2366 user_cb->cb_arg = cb_arg;
2367 user_cb->event = event;
2368 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2372 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2373 return (user_cb == NULL) ? -ENOMEM : 0;
2377 rte_eth_dev_callback_unregister(uint8_t port_id,
2378 enum rte_eth_event_type event,
2379 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2382 struct rte_eth_dev *dev;
2383 struct rte_eth_dev_callback *cb, *next;
2388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2390 dev = &rte_eth_devices[port_id];
2391 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2394 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2396 next = TAILQ_NEXT(cb, next);
2398 if (cb->cb_fn != cb_fn || cb->event != event ||
2399 (cb->cb_arg != (void *)-1 &&
2400 cb->cb_arg != cb_arg))
2404 * if this callback is not executing right now,
2407 if (cb->active == 0) {
2408 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2415 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2420 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2421 enum rte_eth_event_type event, void *cb_arg)
2423 struct rte_eth_dev_callback *cb_lst;
2424 struct rte_eth_dev_callback dev_cb;
2426 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2427 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2428 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2433 dev_cb.cb_arg = cb_arg;
2435 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2436 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2438 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2441 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2445 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2448 struct rte_eth_dev *dev;
2449 struct rte_intr_handle *intr_handle;
2453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2455 dev = &rte_eth_devices[port_id];
2457 if (!dev->intr_handle) {
2458 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2462 intr_handle = dev->intr_handle;
2463 if (!intr_handle->intr_vec) {
2464 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2468 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2469 vec = intr_handle->intr_vec[qid];
2470 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2471 if (rc && rc != -EEXIST) {
2472 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2473 " op %d epfd %d vec %u\n",
2474 port_id, qid, op, epfd, vec);
2481 const struct rte_memzone *
2482 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2483 uint16_t queue_id, size_t size, unsigned align,
2486 char z_name[RTE_MEMZONE_NAMESIZE];
2487 const struct rte_memzone *mz;
2489 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2490 dev->data->drv_name, ring_name,
2491 dev->data->port_id, queue_id);
2493 mz = rte_memzone_lookup(z_name);
2497 if (rte_xen_dom0_supported())
2498 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2499 0, align, RTE_PGSIZE_2M);
2501 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2506 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2507 int epfd, int op, void *data)
2510 struct rte_eth_dev *dev;
2511 struct rte_intr_handle *intr_handle;
2514 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2516 dev = &rte_eth_devices[port_id];
2517 if (queue_id >= dev->data->nb_rx_queues) {
2518 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2522 if (!dev->intr_handle) {
2523 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2527 intr_handle = dev->intr_handle;
2528 if (!intr_handle->intr_vec) {
2529 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2533 vec = intr_handle->intr_vec[queue_id];
2534 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2535 if (rc && rc != -EEXIST) {
2536 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2537 " op %d epfd %d vec %u\n",
2538 port_id, queue_id, op, epfd, vec);
2546 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2549 struct rte_eth_dev *dev;
2551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2553 dev = &rte_eth_devices[port_id];
2555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2556 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2560 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2563 struct rte_eth_dev *dev;
2565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2567 dev = &rte_eth_devices[port_id];
2569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2570 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2573 #ifdef RTE_NIC_BYPASS
2574 int rte_eth_dev_bypass_init(uint8_t port_id)
2576 struct rte_eth_dev *dev;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2580 dev = &rte_eth_devices[port_id];
2581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2582 (*dev->dev_ops->bypass_init)(dev);
2587 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2589 struct rte_eth_dev *dev;
2591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2593 dev = &rte_eth_devices[port_id];
2594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2595 (*dev->dev_ops->bypass_state_show)(dev, state);
2600 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2602 struct rte_eth_dev *dev;
2604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2606 dev = &rte_eth_devices[port_id];
2607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2608 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2613 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2615 struct rte_eth_dev *dev;
2617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2619 dev = &rte_eth_devices[port_id];
2620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2621 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2626 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2628 struct rte_eth_dev *dev;
2630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2632 dev = &rte_eth_devices[port_id];
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2635 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2640 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2642 struct rte_eth_dev *dev;
2644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2646 dev = &rte_eth_devices[port_id];
2648 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2649 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2654 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2656 struct rte_eth_dev *dev;
2658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2660 dev = &rte_eth_devices[port_id];
2662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2663 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2668 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2670 struct rte_eth_dev *dev;
2672 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2674 dev = &rte_eth_devices[port_id];
2676 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2677 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2682 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2684 struct rte_eth_dev *dev;
2686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2691 (*dev->dev_ops->bypass_wd_reset)(dev);
2697 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2699 struct rte_eth_dev *dev;
2701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2703 dev = &rte_eth_devices[port_id];
2704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2705 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2706 RTE_ETH_FILTER_NOP, NULL);
2710 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2711 enum rte_filter_op filter_op, void *arg)
2713 struct rte_eth_dev *dev;
2715 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2717 dev = &rte_eth_devices[port_id];
2718 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2719 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2723 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2724 rte_rx_callback_fn fn, void *user_param)
2726 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2727 rte_errno = ENOTSUP;
2730 /* check input parameters */
2731 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2732 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2736 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2744 cb->param = user_param;
2746 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2747 /* Add the callbacks in fifo order. */
2748 struct rte_eth_rxtx_callback *tail =
2749 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2752 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2759 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2765 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2766 rte_rx_callback_fn fn, void *user_param)
2768 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2769 rte_errno = ENOTSUP;
2772 /* check input parameters */
2773 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2774 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2779 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2787 cb->param = user_param;
2789 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2790 /* Add the callbacks at fisrt position*/
2791 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2793 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2794 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2800 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2801 rte_tx_callback_fn fn, void *user_param)
2803 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2804 rte_errno = ENOTSUP;
2807 /* check input parameters */
2808 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2809 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2814 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2822 cb->param = user_param;
2824 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2825 /* Add the callbacks in fifo order. */
2826 struct rte_eth_rxtx_callback *tail =
2827 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2830 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2837 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2843 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2844 struct rte_eth_rxtx_callback *user_cb)
2846 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2849 /* Check input parameters. */
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2851 if (user_cb == NULL ||
2852 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2855 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2856 struct rte_eth_rxtx_callback *cb;
2857 struct rte_eth_rxtx_callback **prev_cb;
2860 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2861 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2862 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2864 if (cb == user_cb) {
2865 /* Remove the user cb from the callback list. */
2866 *prev_cb = cb->next;
2871 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2877 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2878 struct rte_eth_rxtx_callback *user_cb)
2880 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2883 /* Check input parameters. */
2884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2885 if (user_cb == NULL ||
2886 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2889 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2891 struct rte_eth_rxtx_callback *cb;
2892 struct rte_eth_rxtx_callback **prev_cb;
2894 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2895 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2896 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2898 if (cb == user_cb) {
2899 /* Remove the user cb from the callback list. */
2900 *prev_cb = cb->next;
2905 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2911 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2912 struct rte_eth_rxq_info *qinfo)
2914 struct rte_eth_dev *dev;
2916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2921 dev = &rte_eth_devices[port_id];
2922 if (queue_id >= dev->data->nb_rx_queues) {
2923 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
2927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
2929 memset(qinfo, 0, sizeof(*qinfo));
2930 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
2935 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2936 struct rte_eth_txq_info *qinfo)
2938 struct rte_eth_dev *dev;
2940 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2945 dev = &rte_eth_devices[port_id];
2946 if (queue_id >= dev->data->nb_tx_queues) {
2947 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
2951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
2953 memset(qinfo, 0, sizeof(*qinfo));
2954 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
2959 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
2960 struct ether_addr *mc_addr_set,
2961 uint32_t nb_mc_addr)
2963 struct rte_eth_dev *dev;
2965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2967 dev = &rte_eth_devices[port_id];
2968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
2969 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
2973 rte_eth_timesync_enable(uint8_t port_id)
2975 struct rte_eth_dev *dev;
2977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2978 dev = &rte_eth_devices[port_id];
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
2981 return (*dev->dev_ops->timesync_enable)(dev);
2985 rte_eth_timesync_disable(uint8_t port_id)
2987 struct rte_eth_dev *dev;
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2990 dev = &rte_eth_devices[port_id];
2992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
2993 return (*dev->dev_ops->timesync_disable)(dev);
2997 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3000 struct rte_eth_dev *dev;
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3003 dev = &rte_eth_devices[port_id];
3005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3006 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3010 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3012 struct rte_eth_dev *dev;
3014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3015 dev = &rte_eth_devices[port_id];
3017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3018 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3022 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3024 struct rte_eth_dev *dev;
3026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3027 dev = &rte_eth_devices[port_id];
3029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3030 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3034 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3036 struct rte_eth_dev *dev;
3038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3039 dev = &rte_eth_devices[port_id];
3041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3042 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3046 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3048 struct rte_eth_dev *dev;
3050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3051 dev = &rte_eth_devices[port_id];
3053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3054 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3058 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3060 struct rte_eth_dev *dev;
3062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3064 dev = &rte_eth_devices[port_id];
3065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3066 return (*dev->dev_ops->get_reg)(dev, info);
3070 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3072 struct rte_eth_dev *dev;
3074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3076 dev = &rte_eth_devices[port_id];
3077 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3078 return (*dev->dev_ops->get_eeprom_length)(dev);
3082 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3084 struct rte_eth_dev *dev;
3086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3088 dev = &rte_eth_devices[port_id];
3089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3090 return (*dev->dev_ops->get_eeprom)(dev, info);
3094 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3096 struct rte_eth_dev *dev;
3098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 dev = &rte_eth_devices[port_id];
3101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3102 return (*dev->dev_ops->set_eeprom)(dev, info);
3106 rte_eth_dev_get_dcb_info(uint8_t port_id,
3107 struct rte_eth_dcb_info *dcb_info)
3109 struct rte_eth_dev *dev;
3111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3113 dev = &rte_eth_devices[port_id];
3114 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3117 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3121 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3122 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3124 struct rte_eth_dev *dev;
3126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3127 if (l2_tunnel == NULL) {
3128 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3132 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3133 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3137 dev = &rte_eth_devices[port_id];
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3140 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3144 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3145 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3153 if (l2_tunnel == NULL) {
3154 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3158 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3159 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3164 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3168 dev = &rte_eth_devices[port_id];
3169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3171 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);