4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
97 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
98 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
102 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
104 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
105 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
106 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
107 {"errors", offsetof(struct rte_eth_stats, q_errors)},
110 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
111 sizeof(rte_rxq_stats_strings[0]))
113 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
114 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
115 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
117 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
118 sizeof(rte_txq_stats_strings[0]))
122 * The user application callback description.
124 * It contains callback address to be registered by user application,
125 * the pointer to the parameters for callback, and the event type.
127 struct rte_eth_dev_callback {
128 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
129 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
130 void *cb_arg; /**< Parameter for callback */
131 void *ret_param; /**< Return parameter */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
182 rte_eth_devices[i].device) {
183 if (!strcmp(rte_eth_devices[i].device->name, name))
184 return &rte_eth_devices[i];
191 rte_eth_dev_find_free_port(void)
195 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
196 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
199 return RTE_MAX_ETHPORTS;
202 static struct rte_eth_dev *
203 eth_dev_get(uint8_t port_id)
205 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
207 eth_dev->data = &rte_eth_dev_data[port_id];
208 eth_dev->state = RTE_ETH_DEV_ATTACHED;
209 TAILQ_INIT(&(eth_dev->link_intr_cbs));
211 eth_dev_last_created_port = port_id;
217 rte_eth_dev_allocate(const char *name)
220 struct rte_eth_dev *eth_dev;
222 port_id = rte_eth_dev_find_free_port();
223 if (port_id == RTE_MAX_ETHPORTS) {
224 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
228 if (rte_eth_dev_data == NULL)
229 rte_eth_dev_data_alloc();
231 if (rte_eth_dev_allocated(name) != NULL) {
232 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
237 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
238 eth_dev = eth_dev_get(port_id);
239 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
240 eth_dev->data->port_id = port_id;
241 eth_dev->data->mtu = ETHER_MTU;
247 * Attach to a port already registered by the primary process, which
248 * makes sure that the same device would have the same port id both
249 * in the primary and secondary process.
252 rte_eth_dev_attach_secondary(const char *name)
255 struct rte_eth_dev *eth_dev;
257 if (rte_eth_dev_data == NULL)
258 rte_eth_dev_data_alloc();
260 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
261 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
264 if (i == RTE_MAX_ETHPORTS) {
266 "device %s is not driven by the primary process\n",
271 eth_dev = eth_dev_get(i);
272 RTE_ASSERT(eth_dev->data->port_id == i);
278 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
283 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
292 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
299 rte_eth_dev_socket_id(uint8_t port_id)
301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
302 return rte_eth_devices[port_id].data->numa_node;
306 rte_eth_dev_count(void)
313 RTE_ETH_FOREACH_DEV(p)
320 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
327 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
331 /* shouldn't check 'rte_eth_devices[i].data',
332 * because it might be overwritten by VDEV PMD */
333 tmp = rte_eth_devices[port_id].device->name;
339 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
345 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
349 RTE_ETH_FOREACH_DEV(i) {
350 if (!rte_eth_devices[i].device)
353 ret = strncmp(name, rte_eth_devices[i].device->name,
364 rte_eth_dev_is_detachable(uint8_t port_id)
368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
370 dev_flags = rte_eth_devices[port_id].data->dev_flags;
371 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
372 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
378 /* attach the new device, then store port_id of the device */
380 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
383 int current = rte_eth_dev_count();
387 if ((devargs == NULL) || (port_id == NULL)) {
392 /* parse devargs, then retrieve device name and args */
393 if (rte_eal_parse_devargs_str(devargs, &name, &args))
396 ret = rte_eal_dev_attach(name, args);
400 /* no point looking at the port count if no port exists */
401 if (!rte_eth_dev_count()) {
402 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
407 /* if nothing happened, there is a bug here, since some driver told us
408 * it did attach a device, but did not create a port.
410 if (current == rte_eth_dev_count()) {
415 *port_id = eth_dev_last_created_port;
424 /* detach the device, then store the name of the device */
426 rte_eth_dev_detach(uint8_t port_id, char *name)
435 /* FIXME: move this to eal, once device flags are relocated there */
436 if (rte_eth_dev_is_detachable(port_id))
439 snprintf(name, RTE_DEV_NAME_MAX_LEN, "%s",
440 rte_eth_devices[port_id].device->name);
442 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
446 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
454 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
456 uint16_t old_nb_queues = dev->data->nb_rx_queues;
460 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
461 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
462 sizeof(dev->data->rx_queues[0]) * nb_queues,
463 RTE_CACHE_LINE_SIZE);
464 if (dev->data->rx_queues == NULL) {
465 dev->data->nb_rx_queues = 0;
468 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
471 rxq = dev->data->rx_queues;
473 for (i = nb_queues; i < old_nb_queues; i++)
474 (*dev->dev_ops->rx_queue_release)(rxq[i]);
475 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
476 RTE_CACHE_LINE_SIZE);
479 if (nb_queues > old_nb_queues) {
480 uint16_t new_qs = nb_queues - old_nb_queues;
482 memset(rxq + old_nb_queues, 0,
483 sizeof(rxq[0]) * new_qs);
486 dev->data->rx_queues = rxq;
488 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
491 rxq = dev->data->rx_queues;
493 for (i = nb_queues; i < old_nb_queues; i++)
494 (*dev->dev_ops->rx_queue_release)(rxq[i]);
496 rte_free(dev->data->rx_queues);
497 dev->data->rx_queues = NULL;
499 dev->data->nb_rx_queues = nb_queues;
504 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
506 struct rte_eth_dev *dev;
508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
510 dev = &rte_eth_devices[port_id];
511 if (rx_queue_id >= dev->data->nb_rx_queues) {
512 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
518 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
519 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
520 " already started\n",
521 rx_queue_id, port_id);
525 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
530 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already stopped\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
556 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (tx_queue_id >= dev->data->nb_tx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
570 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already started\n",
573 tx_queue_id, port_id);
577 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
582 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already stopped\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
610 uint16_t old_nb_queues = dev->data->nb_tx_queues;
614 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
615 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
616 sizeof(dev->data->tx_queues[0]) * nb_queues,
617 RTE_CACHE_LINE_SIZE);
618 if (dev->data->tx_queues == NULL) {
619 dev->data->nb_tx_queues = 0;
622 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
625 txq = dev->data->tx_queues;
627 for (i = nb_queues; i < old_nb_queues; i++)
628 (*dev->dev_ops->tx_queue_release)(txq[i]);
629 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
633 if (nb_queues > old_nb_queues) {
634 uint16_t new_qs = nb_queues - old_nb_queues;
636 memset(txq + old_nb_queues, 0,
637 sizeof(txq[0]) * new_qs);
640 dev->data->tx_queues = txq;
642 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
645 txq = dev->data->tx_queues;
647 for (i = nb_queues; i < old_nb_queues; i++)
648 (*dev->dev_ops->tx_queue_release)(txq[i]);
650 rte_free(dev->data->tx_queues);
651 dev->data->tx_queues = NULL;
653 dev->data->nb_tx_queues = nb_queues;
658 rte_eth_speed_bitflag(uint32_t speed, int duplex)
661 case ETH_SPEED_NUM_10M:
662 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
663 case ETH_SPEED_NUM_100M:
664 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
665 case ETH_SPEED_NUM_1G:
666 return ETH_LINK_SPEED_1G;
667 case ETH_SPEED_NUM_2_5G:
668 return ETH_LINK_SPEED_2_5G;
669 case ETH_SPEED_NUM_5G:
670 return ETH_LINK_SPEED_5G;
671 case ETH_SPEED_NUM_10G:
672 return ETH_LINK_SPEED_10G;
673 case ETH_SPEED_NUM_20G:
674 return ETH_LINK_SPEED_20G;
675 case ETH_SPEED_NUM_25G:
676 return ETH_LINK_SPEED_25G;
677 case ETH_SPEED_NUM_40G:
678 return ETH_LINK_SPEED_40G;
679 case ETH_SPEED_NUM_50G:
680 return ETH_LINK_SPEED_50G;
681 case ETH_SPEED_NUM_56G:
682 return ETH_LINK_SPEED_56G;
683 case ETH_SPEED_NUM_100G:
684 return ETH_LINK_SPEED_100G;
691 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
692 const struct rte_eth_conf *dev_conf)
694 struct rte_eth_dev *dev;
695 struct rte_eth_dev_info dev_info;
698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
700 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
702 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
703 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
707 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
709 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
710 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
714 dev = &rte_eth_devices[port_id];
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
719 if (dev->data->dev_started) {
721 "port %d must be stopped to allow configuration\n", port_id);
725 /* Copy the dev_conf parameter into the dev structure */
726 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
729 * Check that the numbers of RX and TX queues are not greater
730 * than the maximum number of RX and TX queues supported by the
733 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
735 if (nb_rx_q == 0 && nb_tx_q == 0) {
736 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
740 if (nb_rx_q > dev_info.max_rx_queues) {
741 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
742 port_id, nb_rx_q, dev_info.max_rx_queues);
746 if (nb_tx_q > dev_info.max_tx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
748 port_id, nb_tx_q, dev_info.max_tx_queues);
752 /* Check that the device supports requested interrupts */
753 if ((dev_conf->intr_conf.lsc == 1) &&
754 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
755 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
756 dev->device->driver->name);
759 if ((dev_conf->intr_conf.rmv == 1) &&
760 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
761 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
762 dev->device->driver->name);
767 * If jumbo frames are enabled, check that the maximum RX packet
768 * length is supported by the configured device.
770 if (dev_conf->rxmode.jumbo_frame == 1) {
771 if (dev_conf->rxmode.max_rx_pkt_len >
772 dev_info.max_rx_pktlen) {
773 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
774 " > max valid value %u\n",
776 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
777 (unsigned)dev_info.max_rx_pktlen);
779 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
780 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
781 " < min valid value %u\n",
783 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
784 (unsigned)ETHER_MIN_LEN);
788 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
789 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
790 /* Use default value */
791 dev->data->dev_conf.rxmode.max_rx_pkt_len =
796 * Setup new number of RX/TX queues and reconfigure device.
798 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
800 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
805 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
807 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
809 rte_eth_dev_rx_queue_config(dev, 0);
813 diag = (*dev->dev_ops->dev_configure)(dev);
815 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
817 rte_eth_dev_rx_queue_config(dev, 0);
818 rte_eth_dev_tx_queue_config(dev, 0);
826 _rte_eth_dev_reset(struct rte_eth_dev *dev)
828 if (dev->data->dev_started) {
830 "port %d must be stopped to allow reset\n",
835 rte_eth_dev_rx_queue_config(dev, 0);
836 rte_eth_dev_tx_queue_config(dev, 0);
838 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
842 rte_eth_dev_config_restore(uint8_t port_id)
844 struct rte_eth_dev *dev;
845 struct rte_eth_dev_info dev_info;
846 struct ether_addr *addr;
851 dev = &rte_eth_devices[port_id];
853 rte_eth_dev_info_get(port_id, &dev_info);
855 /* replay MAC address configuration including default MAC */
856 addr = &dev->data->mac_addrs[0];
857 if (*dev->dev_ops->mac_addr_set != NULL)
858 (*dev->dev_ops->mac_addr_set)(dev, addr);
859 else if (*dev->dev_ops->mac_addr_add != NULL)
860 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
862 if (*dev->dev_ops->mac_addr_add != NULL) {
863 for (i = 1; i < dev_info.max_mac_addrs; i++) {
864 addr = &dev->data->mac_addrs[i];
866 /* skip zero address */
867 if (is_zero_ether_addr(addr))
871 pool_mask = dev->data->mac_pool_sel[i];
874 if (pool_mask & 1ULL)
875 (*dev->dev_ops->mac_addr_add)(dev,
883 /* replay promiscuous configuration */
884 if (rte_eth_promiscuous_get(port_id) == 1)
885 rte_eth_promiscuous_enable(port_id);
886 else if (rte_eth_promiscuous_get(port_id) == 0)
887 rte_eth_promiscuous_disable(port_id);
889 /* replay all multicast configuration */
890 if (rte_eth_allmulticast_get(port_id) == 1)
891 rte_eth_allmulticast_enable(port_id);
892 else if (rte_eth_allmulticast_get(port_id) == 0)
893 rte_eth_allmulticast_disable(port_id);
897 rte_eth_dev_start(uint8_t port_id)
899 struct rte_eth_dev *dev;
902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
904 dev = &rte_eth_devices[port_id];
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
908 if (dev->data->dev_started != 0) {
909 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
910 " already started\n",
915 diag = (*dev->dev_ops->dev_start)(dev);
917 dev->data->dev_started = 1;
921 rte_eth_dev_config_restore(port_id);
923 if (dev->data->dev_conf.intr_conf.lsc == 0) {
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
925 (*dev->dev_ops->link_update)(dev, 0);
931 rte_eth_dev_stop(uint8_t port_id)
933 struct rte_eth_dev *dev;
935 RTE_ETH_VALID_PORTID_OR_RET(port_id);
936 dev = &rte_eth_devices[port_id];
938 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
940 if (dev->data->dev_started == 0) {
941 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
942 " already stopped\n",
947 dev->data->dev_started = 0;
948 (*dev->dev_ops->dev_stop)(dev);
952 rte_eth_dev_set_link_up(uint8_t port_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
961 return (*dev->dev_ops->dev_set_link_up)(dev);
965 rte_eth_dev_set_link_down(uint8_t port_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
974 return (*dev->dev_ops->dev_set_link_down)(dev);
978 rte_eth_dev_close(uint8_t port_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_RET(port_id);
983 dev = &rte_eth_devices[port_id];
985 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
986 dev->data->dev_started = 0;
987 (*dev->dev_ops->dev_close)(dev);
989 dev->data->nb_rx_queues = 0;
990 rte_free(dev->data->rx_queues);
991 dev->data->rx_queues = NULL;
992 dev->data->nb_tx_queues = 0;
993 rte_free(dev->data->tx_queues);
994 dev->data->tx_queues = NULL;
998 rte_eth_dev_reset(uint8_t port_id)
1000 struct rte_eth_dev *dev;
1003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1004 dev = &rte_eth_devices[port_id];
1006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1008 rte_eth_dev_stop(port_id);
1009 ret = dev->dev_ops->dev_reset(dev);
1015 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1016 uint16_t nb_rx_desc, unsigned int socket_id,
1017 const struct rte_eth_rxconf *rx_conf,
1018 struct rte_mempool *mp)
1021 uint32_t mbp_buf_size;
1022 struct rte_eth_dev *dev;
1023 struct rte_eth_dev_info dev_info;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1028 dev = &rte_eth_devices[port_id];
1029 if (rx_queue_id >= dev->data->nb_rx_queues) {
1030 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1034 if (dev->data->dev_started) {
1035 RTE_PMD_DEBUG_TRACE(
1036 "port %d must be stopped to allow configuration\n", port_id);
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1044 * Check the size of the mbuf data buffer.
1045 * This value must be provided in the private data of the memory pool.
1046 * First check that the memory pool has a valid private data.
1048 rte_eth_dev_info_get(port_id, &dev_info);
1049 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1050 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1051 mp->name, (int) mp->private_data_size,
1052 (int) sizeof(struct rte_pktmbuf_pool_private));
1055 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1057 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1058 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1059 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1063 (int)(RTE_PKTMBUF_HEADROOM +
1064 dev_info.min_rx_bufsize),
1065 (int)RTE_PKTMBUF_HEADROOM,
1066 (int)dev_info.min_rx_bufsize);
1070 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1071 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1072 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1074 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1075 "should be: <= %hu, = %hu, and a product of %hu\n",
1077 dev_info.rx_desc_lim.nb_max,
1078 dev_info.rx_desc_lim.nb_min,
1079 dev_info.rx_desc_lim.nb_align);
1083 rxq = dev->data->rx_queues;
1084 if (rxq[rx_queue_id]) {
1085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1087 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1088 rxq[rx_queue_id] = NULL;
1091 if (rx_conf == NULL)
1092 rx_conf = &dev_info.default_rxconf;
1094 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1095 socket_id, rx_conf, mp);
1097 if (!dev->data->min_rx_buf_size ||
1098 dev->data->min_rx_buf_size > mbp_buf_size)
1099 dev->data->min_rx_buf_size = mbp_buf_size;
1106 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1107 uint16_t nb_tx_desc, unsigned int socket_id,
1108 const struct rte_eth_txconf *tx_conf)
1110 struct rte_eth_dev *dev;
1111 struct rte_eth_dev_info dev_info;
1114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1116 dev = &rte_eth_devices[port_id];
1117 if (tx_queue_id >= dev->data->nb_tx_queues) {
1118 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1122 if (dev->data->dev_started) {
1123 RTE_PMD_DEBUG_TRACE(
1124 "port %d must be stopped to allow configuration\n", port_id);
1128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1131 rte_eth_dev_info_get(port_id, &dev_info);
1133 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1134 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1135 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1136 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1137 "should be: <= %hu, = %hu, and a product of %hu\n",
1139 dev_info.tx_desc_lim.nb_max,
1140 dev_info.tx_desc_lim.nb_min,
1141 dev_info.tx_desc_lim.nb_align);
1145 txq = dev->data->tx_queues;
1146 if (txq[tx_queue_id]) {
1147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1149 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1150 txq[tx_queue_id] = NULL;
1153 if (tx_conf == NULL)
1154 tx_conf = &dev_info.default_txconf;
1156 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1157 socket_id, tx_conf);
1161 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1162 void *userdata __rte_unused)
1166 for (i = 0; i < unsent; i++)
1167 rte_pktmbuf_free(pkts[i]);
1171 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1174 uint64_t *count = userdata;
1177 for (i = 0; i < unsent; i++)
1178 rte_pktmbuf_free(pkts[i]);
1184 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1185 buffer_tx_error_fn cbfn, void *userdata)
1187 buffer->error_callback = cbfn;
1188 buffer->error_userdata = userdata;
1193 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1200 buffer->size = size;
1201 if (buffer->error_callback == NULL) {
1202 ret = rte_eth_tx_buffer_set_err_callback(
1203 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1210 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1212 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1214 /* Validate Input Data. Bail if not valid or not supported. */
1215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1216 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1218 /* Call driver to free pending mbufs. */
1219 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1224 rte_eth_promiscuous_enable(uint8_t port_id)
1226 struct rte_eth_dev *dev;
1228 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1229 dev = &rte_eth_devices[port_id];
1231 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1232 (*dev->dev_ops->promiscuous_enable)(dev);
1233 dev->data->promiscuous = 1;
1237 rte_eth_promiscuous_disable(uint8_t port_id)
1239 struct rte_eth_dev *dev;
1241 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1242 dev = &rte_eth_devices[port_id];
1244 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1245 dev->data->promiscuous = 0;
1246 (*dev->dev_ops->promiscuous_disable)(dev);
1250 rte_eth_promiscuous_get(uint8_t port_id)
1252 struct rte_eth_dev *dev;
1254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1256 dev = &rte_eth_devices[port_id];
1257 return dev->data->promiscuous;
1261 rte_eth_allmulticast_enable(uint8_t port_id)
1263 struct rte_eth_dev *dev;
1265 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1266 dev = &rte_eth_devices[port_id];
1268 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1269 (*dev->dev_ops->allmulticast_enable)(dev);
1270 dev->data->all_multicast = 1;
1274 rte_eth_allmulticast_disable(uint8_t port_id)
1276 struct rte_eth_dev *dev;
1278 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1279 dev = &rte_eth_devices[port_id];
1281 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1282 dev->data->all_multicast = 0;
1283 (*dev->dev_ops->allmulticast_disable)(dev);
1287 rte_eth_allmulticast_get(uint8_t port_id)
1289 struct rte_eth_dev *dev;
1291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1293 dev = &rte_eth_devices[port_id];
1294 return dev->data->all_multicast;
1298 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1299 struct rte_eth_link *link)
1301 struct rte_eth_link *dst = link;
1302 struct rte_eth_link *src = &(dev->data->dev_link);
1304 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1305 *(uint64_t *)src) == 0)
1312 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1314 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1317 dev = &rte_eth_devices[port_id];
1319 if (dev->data->dev_conf.intr_conf.lsc != 0)
1320 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1322 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1323 (*dev->dev_ops->link_update)(dev, 1);
1324 *eth_link = dev->data->dev_link;
1329 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1334 dev = &rte_eth_devices[port_id];
1336 if (dev->data->dev_conf.intr_conf.lsc != 0)
1337 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1339 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1340 (*dev->dev_ops->link_update)(dev, 0);
1341 *eth_link = dev->data->dev_link;
1346 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1352 dev = &rte_eth_devices[port_id];
1353 memset(stats, 0, sizeof(*stats));
1355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1356 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1357 (*dev->dev_ops->stats_get)(dev, stats);
1362 rte_eth_stats_reset(uint8_t port_id)
1364 struct rte_eth_dev *dev;
1366 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1367 dev = &rte_eth_devices[port_id];
1369 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1370 (*dev->dev_ops->stats_reset)(dev);
1371 dev->data->rx_mbuf_alloc_failed = 0;
1375 get_xstats_count(uint8_t port_id)
1377 struct rte_eth_dev *dev;
1380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1381 dev = &rte_eth_devices[port_id];
1382 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1383 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1388 if (dev->dev_ops->xstats_get_names != NULL) {
1389 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1395 count += RTE_NB_STATS;
1396 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1398 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1404 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1407 int cnt_xstats, idx_xstat;
1409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1412 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1417 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1422 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1423 if (cnt_xstats < 0) {
1424 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1428 /* Get id-name lookup table */
1429 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1431 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1432 port_id, xstats_names, cnt_xstats, NULL)) {
1433 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1437 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1438 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1448 rte_eth_xstats_get_names_by_id(uint8_t port_id,
1449 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1452 /* Get all xstats */
1454 struct rte_eth_dev *dev;
1455 int cnt_used_entries;
1456 int cnt_expected_entries;
1457 int cnt_driver_entries;
1458 uint32_t idx, id_queue;
1461 cnt_expected_entries = get_xstats_count(port_id);
1462 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1463 (int)size < cnt_expected_entries)
1464 return cnt_expected_entries;
1466 /* port_id checked in get_xstats_count() */
1467 dev = &rte_eth_devices[port_id];
1468 cnt_used_entries = 0;
1470 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1471 snprintf(xstats_names[cnt_used_entries].name,
1472 sizeof(xstats_names[0].name),
1473 "%s", rte_stats_strings[idx].name);
1476 num_q = RTE_MIN(dev->data->nb_rx_queues,
1477 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1478 for (id_queue = 0; id_queue < num_q; id_queue++) {
1479 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1480 snprintf(xstats_names[cnt_used_entries].name,
1481 sizeof(xstats_names[0].name),
1484 rte_rxq_stats_strings[idx].name);
1489 num_q = RTE_MIN(dev->data->nb_tx_queues,
1490 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1491 for (id_queue = 0; id_queue < num_q; id_queue++) {
1492 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1493 snprintf(xstats_names[cnt_used_entries].name,
1494 sizeof(xstats_names[0].name),
1497 rte_txq_stats_strings[idx].name);
1502 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1503 /* If there are any driver-specific xstats, append them
1506 cnt_driver_entries =
1507 (*dev->dev_ops->xstats_get_names_by_id)(
1509 xstats_names + cnt_used_entries,
1511 size - cnt_used_entries);
1512 if (cnt_driver_entries < 0)
1513 return cnt_driver_entries;
1514 cnt_used_entries += cnt_driver_entries;
1516 } else if (dev->dev_ops->xstats_get_names != NULL) {
1517 /* If there are any driver-specific xstats, append them
1520 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1522 xstats_names + cnt_used_entries,
1523 size - cnt_used_entries);
1524 if (cnt_driver_entries < 0)
1525 return cnt_driver_entries;
1526 cnt_used_entries += cnt_driver_entries;
1529 return cnt_used_entries;
1531 /* Get only xstats given by IDS */
1534 struct rte_eth_xstat_name *xstats_names_copy;
1536 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1539 malloc(sizeof(struct rte_eth_xstat_name) * len);
1540 if (!xstats_names_copy) {
1541 RTE_PMD_DEBUG_TRACE(
1542 "ERROR: can't allocate memory for values_copy\n");
1543 free(xstats_names_copy);
1547 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1550 for (i = 0; i < size; i++) {
1551 if (ids[i] >= len) {
1552 RTE_PMD_DEBUG_TRACE(
1553 "ERROR: id value isn't valid\n");
1556 strcpy(xstats_names[i].name,
1557 xstats_names_copy[ids[i]].name);
1559 free(xstats_names_copy);
1565 rte_eth_xstats_get_names(uint8_t port_id,
1566 struct rte_eth_xstat_name *xstats_names,
1569 struct rte_eth_dev *dev;
1570 int cnt_used_entries;
1571 int cnt_expected_entries;
1572 int cnt_driver_entries;
1573 uint32_t idx, id_queue;
1576 cnt_expected_entries = get_xstats_count(port_id);
1577 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1578 (int)size < cnt_expected_entries)
1579 return cnt_expected_entries;
1581 /* port_id checked in get_xstats_count() */
1582 dev = &rte_eth_devices[port_id];
1583 cnt_used_entries = 0;
1585 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1586 snprintf(xstats_names[cnt_used_entries].name,
1587 sizeof(xstats_names[0].name),
1588 "%s", rte_stats_strings[idx].name);
1591 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1592 for (id_queue = 0; id_queue < num_q; id_queue++) {
1593 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1594 snprintf(xstats_names[cnt_used_entries].name,
1595 sizeof(xstats_names[0].name),
1597 id_queue, rte_rxq_stats_strings[idx].name);
1602 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1603 for (id_queue = 0; id_queue < num_q; id_queue++) {
1604 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1605 snprintf(xstats_names[cnt_used_entries].name,
1606 sizeof(xstats_names[0].name),
1608 id_queue, rte_txq_stats_strings[idx].name);
1613 if (dev->dev_ops->xstats_get_names != NULL) {
1614 /* If there are any driver-specific xstats, append them
1617 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1619 xstats_names + cnt_used_entries,
1620 size - cnt_used_entries);
1621 if (cnt_driver_entries < 0)
1622 return cnt_driver_entries;
1623 cnt_used_entries += cnt_driver_entries;
1626 return cnt_used_entries;
1629 /* retrieve ethdev extended statistics */
1631 rte_eth_xstats_get_by_id(uint8_t port_id, const uint64_t *ids, uint64_t *values,
1634 /* If need all xstats */
1636 struct rte_eth_stats eth_stats;
1637 struct rte_eth_dev *dev;
1638 unsigned int count = 0, i, q;
1639 signed int xcount = 0;
1640 uint64_t val, *stats_ptr;
1641 uint16_t nb_rxqs, nb_txqs;
1643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1644 dev = &rte_eth_devices[port_id];
1646 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1647 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1648 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1649 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1651 /* Return generic statistics */
1652 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1653 (nb_txqs * RTE_NB_TXQ_STATS);
1656 /* implemented by the driver */
1657 if (dev->dev_ops->xstats_get_by_id != NULL) {
1658 /* Retrieve the xstats from the driver at the end of the
1659 * xstats struct. Retrieve all xstats.
1661 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1663 values ? values + count : NULL,
1664 (n > count) ? n - count : 0);
1668 /* implemented by the driver */
1669 } else if (dev->dev_ops->xstats_get != NULL) {
1670 /* Retrieve the xstats from the driver at the end of the
1671 * xstats struct. Retrieve all xstats.
1672 * Compatibility for PMD without xstats_get_by_ids
1674 unsigned int size = (n > count) ? n - count : 1;
1675 struct rte_eth_xstat xstats[size];
1677 xcount = (*dev->dev_ops->xstats_get)(dev,
1678 values ? xstats : NULL, size);
1684 for (i = 0 ; i < (unsigned int)xcount; i++)
1685 values[i + count] = xstats[i].value;
1688 if (n < count + xcount || values == NULL)
1689 return count + xcount;
1691 /* now fill the xstats structure */
1693 rte_eth_stats_get(port_id, ð_stats);
1696 for (i = 0; i < RTE_NB_STATS; i++) {
1697 stats_ptr = RTE_PTR_ADD(ð_stats,
1698 rte_stats_strings[i].offset);
1700 values[count++] = val;
1704 for (q = 0; q < nb_rxqs; q++) {
1705 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1706 stats_ptr = RTE_PTR_ADD(ð_stats,
1707 rte_rxq_stats_strings[i].offset +
1708 q * sizeof(uint64_t));
1710 values[count++] = val;
1715 for (q = 0; q < nb_txqs; q++) {
1716 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1717 stats_ptr = RTE_PTR_ADD(ð_stats,
1718 rte_txq_stats_strings[i].offset +
1719 q * sizeof(uint64_t));
1721 values[count++] = val;
1725 return count + xcount;
1727 /* Need only xstats given by IDS array */
1730 uint64_t *values_copy;
1732 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1734 values_copy = malloc(sizeof(*values_copy) * size);
1736 RTE_PMD_DEBUG_TRACE(
1737 "ERROR: can't allocate memory for values_copy\n");
1741 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1743 for (i = 0; i < n; i++) {
1744 if (ids[i] >= size) {
1745 RTE_PMD_DEBUG_TRACE(
1746 "ERROR: id value isn't valid\n");
1749 values[i] = values_copy[ids[i]];
1757 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1760 struct rte_eth_stats eth_stats;
1761 struct rte_eth_dev *dev;
1762 unsigned int count = 0, i, q;
1763 signed int xcount = 0;
1764 uint64_t val, *stats_ptr;
1765 uint16_t nb_rxqs, nb_txqs;
1767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1769 dev = &rte_eth_devices[port_id];
1771 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1772 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1774 /* Return generic statistics */
1775 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1776 (nb_txqs * RTE_NB_TXQ_STATS);
1778 /* implemented by the driver */
1779 if (dev->dev_ops->xstats_get != NULL) {
1780 /* Retrieve the xstats from the driver at the end of the
1783 xcount = (*dev->dev_ops->xstats_get)(dev,
1784 xstats ? xstats + count : NULL,
1785 (n > count) ? n - count : 0);
1791 if (n < count + xcount || xstats == NULL)
1792 return count + xcount;
1794 /* now fill the xstats structure */
1796 rte_eth_stats_get(port_id, ð_stats);
1799 for (i = 0; i < RTE_NB_STATS; i++) {
1800 stats_ptr = RTE_PTR_ADD(ð_stats,
1801 rte_stats_strings[i].offset);
1803 xstats[count++].value = val;
1807 for (q = 0; q < nb_rxqs; q++) {
1808 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1809 stats_ptr = RTE_PTR_ADD(ð_stats,
1810 rte_rxq_stats_strings[i].offset +
1811 q * sizeof(uint64_t));
1813 xstats[count++].value = val;
1818 for (q = 0; q < nb_txqs; q++) {
1819 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1820 stats_ptr = RTE_PTR_ADD(ð_stats,
1821 rte_txq_stats_strings[i].offset +
1822 q * sizeof(uint64_t));
1824 xstats[count++].value = val;
1828 for (i = 0; i < count; i++)
1830 /* add an offset to driver-specific stats */
1831 for ( ; i < count + xcount; i++)
1832 xstats[i].id += count;
1834 return count + xcount;
1837 /* reset ethdev extended statistics */
1839 rte_eth_xstats_reset(uint8_t port_id)
1841 struct rte_eth_dev *dev;
1843 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1844 dev = &rte_eth_devices[port_id];
1846 /* implemented by the driver */
1847 if (dev->dev_ops->xstats_reset != NULL) {
1848 (*dev->dev_ops->xstats_reset)(dev);
1852 /* fallback to default */
1853 rte_eth_stats_reset(port_id);
1857 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1860 struct rte_eth_dev *dev;
1862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1864 dev = &rte_eth_devices[port_id];
1866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1867 return (*dev->dev_ops->queue_stats_mapping_set)
1868 (dev, queue_id, stat_idx, is_rx);
1873 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1876 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1882 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1885 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1890 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1892 struct rte_eth_dev *dev;
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1895 dev = &rte_eth_devices[port_id];
1897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1898 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1902 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1904 struct rte_eth_dev *dev;
1905 const struct rte_eth_desc_lim lim = {
1906 .nb_max = UINT16_MAX,
1911 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1912 dev = &rte_eth_devices[port_id];
1914 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1915 dev_info->rx_desc_lim = lim;
1916 dev_info->tx_desc_lim = lim;
1918 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1919 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1920 dev_info->driver_name = dev->device->driver->name;
1921 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1922 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1926 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1927 uint32_t *ptypes, int num)
1930 struct rte_eth_dev *dev;
1931 const uint32_t *all_ptypes;
1933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1934 dev = &rte_eth_devices[port_id];
1935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1936 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1941 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1942 if (all_ptypes[i] & ptype_mask) {
1944 ptypes[j] = all_ptypes[i];
1952 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1954 struct rte_eth_dev *dev;
1956 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1957 dev = &rte_eth_devices[port_id];
1958 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1963 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1965 struct rte_eth_dev *dev;
1967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1969 dev = &rte_eth_devices[port_id];
1970 *mtu = dev->data->mtu;
1975 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1978 struct rte_eth_dev *dev;
1980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1981 dev = &rte_eth_devices[port_id];
1982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1984 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1986 dev->data->mtu = mtu;
1992 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1994 struct rte_eth_dev *dev;
1997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1998 dev = &rte_eth_devices[port_id];
1999 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
2000 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2004 if (vlan_id > 4095) {
2005 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2006 port_id, (unsigned) vlan_id);
2009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2011 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2013 struct rte_vlan_filter_conf *vfc;
2017 vfc = &dev->data->vlan_filter_conf;
2018 vidx = vlan_id / 64;
2019 vbit = vlan_id % 64;
2022 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2024 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2031 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
2033 struct rte_eth_dev *dev;
2035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2036 dev = &rte_eth_devices[port_id];
2037 if (rx_queue_id >= dev->data->nb_rx_queues) {
2038 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2043 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2049 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
2050 enum rte_vlan_type vlan_type,
2053 struct rte_eth_dev *dev;
2055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2056 dev = &rte_eth_devices[port_id];
2057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2059 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2063 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
2065 struct rte_eth_dev *dev;
2070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2071 dev = &rte_eth_devices[port_id];
2073 /*check which option changed by application*/
2074 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2075 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
2077 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
2078 mask |= ETH_VLAN_STRIP_MASK;
2081 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2082 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
2084 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
2085 mask |= ETH_VLAN_FILTER_MASK;
2088 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2089 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
2091 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
2092 mask |= ETH_VLAN_EXTEND_MASK;
2099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2100 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2106 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2108 struct rte_eth_dev *dev;
2111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2112 dev = &rte_eth_devices[port_id];
2114 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
2115 ret |= ETH_VLAN_STRIP_OFFLOAD;
2117 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
2118 ret |= ETH_VLAN_FILTER_OFFLOAD;
2120 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
2121 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2127 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2129 struct rte_eth_dev *dev;
2131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2132 dev = &rte_eth_devices[port_id];
2133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2134 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2140 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2142 struct rte_eth_dev *dev;
2144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2145 dev = &rte_eth_devices[port_id];
2146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2147 memset(fc_conf, 0, sizeof(*fc_conf));
2148 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2152 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2154 struct rte_eth_dev *dev;
2156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2157 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2158 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2162 dev = &rte_eth_devices[port_id];
2163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2164 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2168 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2170 struct rte_eth_dev *dev;
2172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2173 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2174 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2178 dev = &rte_eth_devices[port_id];
2179 /* High water, low water validation are device specific */
2180 if (*dev->dev_ops->priority_flow_ctrl_set)
2181 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2186 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2194 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2195 for (i = 0; i < num; i++) {
2196 if (reta_conf[i].mask)
2204 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2208 uint16_t i, idx, shift;
2214 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2218 for (i = 0; i < reta_size; i++) {
2219 idx = i / RTE_RETA_GROUP_SIZE;
2220 shift = i % RTE_RETA_GROUP_SIZE;
2221 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2222 (reta_conf[idx].reta[shift] >= max_rxq)) {
2223 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2224 "the maximum rxq index: %u\n", idx, shift,
2225 reta_conf[idx].reta[shift], max_rxq);
2234 rte_eth_dev_rss_reta_update(uint8_t port_id,
2235 struct rte_eth_rss_reta_entry64 *reta_conf,
2238 struct rte_eth_dev *dev;
2241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2242 /* Check mask bits */
2243 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2247 dev = &rte_eth_devices[port_id];
2249 /* Check entry value */
2250 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2251 dev->data->nb_rx_queues);
2255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2256 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2260 rte_eth_dev_rss_reta_query(uint8_t port_id,
2261 struct rte_eth_rss_reta_entry64 *reta_conf,
2264 struct rte_eth_dev *dev;
2267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2269 /* Check mask bits */
2270 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2274 dev = &rte_eth_devices[port_id];
2275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2276 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2280 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2282 struct rte_eth_dev *dev;
2283 uint16_t rss_hash_protos;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 rss_hash_protos = rss_conf->rss_hf;
2287 if ((rss_hash_protos != 0) &&
2288 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2289 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2293 dev = &rte_eth_devices[port_id];
2294 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2295 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2299 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2300 struct rte_eth_rss_conf *rss_conf)
2302 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2305 dev = &rte_eth_devices[port_id];
2306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2307 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2311 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2312 struct rte_eth_udp_tunnel *udp_tunnel)
2314 struct rte_eth_dev *dev;
2316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2317 if (udp_tunnel == NULL) {
2318 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2322 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2323 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2327 dev = &rte_eth_devices[port_id];
2328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2329 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2333 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2334 struct rte_eth_udp_tunnel *udp_tunnel)
2336 struct rte_eth_dev *dev;
2338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2339 dev = &rte_eth_devices[port_id];
2341 if (udp_tunnel == NULL) {
2342 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2346 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2347 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2352 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2356 rte_eth_led_on(uint8_t port_id)
2358 struct rte_eth_dev *dev;
2360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2361 dev = &rte_eth_devices[port_id];
2362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2363 return (*dev->dev_ops->dev_led_on)(dev);
2367 rte_eth_led_off(uint8_t port_id)
2369 struct rte_eth_dev *dev;
2371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2373 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2374 return (*dev->dev_ops->dev_led_off)(dev);
2378 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2382 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2384 struct rte_eth_dev_info dev_info;
2385 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2389 rte_eth_dev_info_get(port_id, &dev_info);
2391 for (i = 0; i < dev_info.max_mac_addrs; i++)
2392 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2398 static const struct ether_addr null_mac_addr;
2401 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2404 struct rte_eth_dev *dev;
2409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 dev = &rte_eth_devices[port_id];
2411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2413 if (is_zero_ether_addr(addr)) {
2414 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2418 if (pool >= ETH_64_POOLS) {
2419 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2423 index = get_mac_addr_index(port_id, addr);
2425 index = get_mac_addr_index(port_id, &null_mac_addr);
2427 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2432 pool_mask = dev->data->mac_pool_sel[index];
2434 /* Check if both MAC address and pool is already there, and do nothing */
2435 if (pool_mask & (1ULL << pool))
2440 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2443 /* Update address in NIC data structure */
2444 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2446 /* Update pool bitmap in NIC data structure */
2447 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2454 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2456 struct rte_eth_dev *dev;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2463 index = get_mac_addr_index(port_id, addr);
2465 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2467 } else if (index < 0)
2468 return 0; /* Do nothing if address wasn't found */
2471 (*dev->dev_ops->mac_addr_remove)(dev, index);
2473 /* Update address in NIC data structure */
2474 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2476 /* reset pool bitmap */
2477 dev->data->mac_pool_sel[index] = 0;
2483 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2485 struct rte_eth_dev *dev;
2487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2489 if (!is_valid_assigned_ether_addr(addr))
2492 dev = &rte_eth_devices[port_id];
2493 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2495 /* Update default address in NIC data structure */
2496 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2498 (*dev->dev_ops->mac_addr_set)(dev, addr);
2505 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2509 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2511 struct rte_eth_dev_info dev_info;
2512 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2515 rte_eth_dev_info_get(port_id, &dev_info);
2516 if (!dev->data->hash_mac_addrs)
2519 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2520 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2521 ETHER_ADDR_LEN) == 0)
2528 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2533 struct rte_eth_dev *dev;
2535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2537 dev = &rte_eth_devices[port_id];
2538 if (is_zero_ether_addr(addr)) {
2539 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2544 index = get_hash_mac_addr_index(port_id, addr);
2545 /* Check if it's already there, and do nothing */
2546 if ((index >= 0) && (on))
2551 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2552 "set in UTA\n", port_id);
2556 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2558 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2565 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2567 /* Update address in NIC data structure */
2569 ether_addr_copy(addr,
2570 &dev->data->hash_mac_addrs[index]);
2572 ether_addr_copy(&null_mac_addr,
2573 &dev->data->hash_mac_addrs[index]);
2580 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2582 struct rte_eth_dev *dev;
2584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2586 dev = &rte_eth_devices[port_id];
2588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2589 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2592 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2595 struct rte_eth_dev *dev;
2596 struct rte_eth_dev_info dev_info;
2597 struct rte_eth_link link;
2599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2601 dev = &rte_eth_devices[port_id];
2602 rte_eth_dev_info_get(port_id, &dev_info);
2603 link = dev->data->dev_link;
2605 if (queue_idx > dev_info.max_tx_queues) {
2606 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2607 "invalid queue id=%d\n", port_id, queue_idx);
2611 if (tx_rate > link.link_speed) {
2612 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2613 "bigger than link speed= %d\n",
2614 tx_rate, link.link_speed);
2618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2619 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2623 rte_eth_mirror_rule_set(uint8_t port_id,
2624 struct rte_eth_mirror_conf *mirror_conf,
2625 uint8_t rule_id, uint8_t on)
2627 struct rte_eth_dev *dev;
2629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 if (mirror_conf->rule_type == 0) {
2631 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2635 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2636 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2641 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2642 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2643 (mirror_conf->pool_mask == 0)) {
2644 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2648 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2649 mirror_conf->vlan.vlan_mask == 0) {
2650 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2654 dev = &rte_eth_devices[port_id];
2655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2657 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2661 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2663 struct rte_eth_dev *dev;
2665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2667 dev = &rte_eth_devices[port_id];
2668 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2670 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2674 rte_eth_dev_callback_register(uint8_t port_id,
2675 enum rte_eth_event_type event,
2676 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2678 struct rte_eth_dev *dev;
2679 struct rte_eth_dev_callback *user_cb;
2684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2686 dev = &rte_eth_devices[port_id];
2687 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2689 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2690 if (user_cb->cb_fn == cb_fn &&
2691 user_cb->cb_arg == cb_arg &&
2692 user_cb->event == event) {
2697 /* create a new callback. */
2698 if (user_cb == NULL) {
2699 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2700 sizeof(struct rte_eth_dev_callback), 0);
2701 if (user_cb != NULL) {
2702 user_cb->cb_fn = cb_fn;
2703 user_cb->cb_arg = cb_arg;
2704 user_cb->event = event;
2705 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2709 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2710 return (user_cb == NULL) ? -ENOMEM : 0;
2714 rte_eth_dev_callback_unregister(uint8_t port_id,
2715 enum rte_eth_event_type event,
2716 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2719 struct rte_eth_dev *dev;
2720 struct rte_eth_dev_callback *cb, *next;
2725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2727 dev = &rte_eth_devices[port_id];
2728 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2731 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2733 next = TAILQ_NEXT(cb, next);
2735 if (cb->cb_fn != cb_fn || cb->event != event ||
2736 (cb->cb_arg != (void *)-1 &&
2737 cb->cb_arg != cb_arg))
2741 * if this callback is not executing right now,
2744 if (cb->active == 0) {
2745 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2752 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2757 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2758 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2760 struct rte_eth_dev_callback *cb_lst;
2761 struct rte_eth_dev_callback dev_cb;
2764 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2765 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2766 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2771 dev_cb.cb_arg = cb_arg;
2772 if (ret_param != NULL)
2773 dev_cb.ret_param = ret_param;
2775 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2776 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2777 dev_cb.cb_arg, dev_cb.ret_param);
2778 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2781 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2786 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2789 struct rte_eth_dev *dev;
2790 struct rte_intr_handle *intr_handle;
2794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2796 dev = &rte_eth_devices[port_id];
2798 if (!dev->intr_handle) {
2799 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2803 intr_handle = dev->intr_handle;
2804 if (!intr_handle->intr_vec) {
2805 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2809 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2810 vec = intr_handle->intr_vec[qid];
2811 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2812 if (rc && rc != -EEXIST) {
2813 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2814 " op %d epfd %d vec %u\n",
2815 port_id, qid, op, epfd, vec);
2822 const struct rte_memzone *
2823 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2824 uint16_t queue_id, size_t size, unsigned align,
2827 char z_name[RTE_MEMZONE_NAMESIZE];
2828 const struct rte_memzone *mz;
2830 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2831 dev->device->driver->name, ring_name,
2832 dev->data->port_id, queue_id);
2834 mz = rte_memzone_lookup(z_name);
2838 if (rte_xen_dom0_supported())
2839 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2840 0, align, RTE_PGSIZE_2M);
2842 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2847 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2848 int epfd, int op, void *data)
2851 struct rte_eth_dev *dev;
2852 struct rte_intr_handle *intr_handle;
2855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2858 if (queue_id >= dev->data->nb_rx_queues) {
2859 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2863 if (!dev->intr_handle) {
2864 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2868 intr_handle = dev->intr_handle;
2869 if (!intr_handle->intr_vec) {
2870 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2874 vec = intr_handle->intr_vec[queue_id];
2875 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2876 if (rc && rc != -EEXIST) {
2877 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2878 " op %d epfd %d vec %u\n",
2879 port_id, queue_id, op, epfd, vec);
2887 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2890 struct rte_eth_dev *dev;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2894 dev = &rte_eth_devices[port_id];
2896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2897 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2901 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2904 struct rte_eth_dev *dev;
2906 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2908 dev = &rte_eth_devices[port_id];
2910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2911 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2916 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2918 struct rte_eth_dev *dev;
2920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2922 dev = &rte_eth_devices[port_id];
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2924 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2925 RTE_ETH_FILTER_NOP, NULL);
2929 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2930 enum rte_filter_op filter_op, void *arg)
2932 struct rte_eth_dev *dev;
2934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2936 dev = &rte_eth_devices[port_id];
2937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2938 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2942 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2943 rte_rx_callback_fn fn, void *user_param)
2945 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2946 rte_errno = ENOTSUP;
2949 /* check input parameters */
2950 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2951 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2955 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2963 cb->param = user_param;
2965 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2966 /* Add the callbacks in fifo order. */
2967 struct rte_eth_rxtx_callback *tail =
2968 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2971 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2978 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2984 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2985 rte_rx_callback_fn fn, void *user_param)
2987 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2988 rte_errno = ENOTSUP;
2991 /* check input parameters */
2992 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2993 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2998 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3006 cb->param = user_param;
3008 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3009 /* Add the callbacks at fisrt position*/
3010 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3012 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3013 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3019 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3020 rte_tx_callback_fn fn, void *user_param)
3022 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3023 rte_errno = ENOTSUP;
3026 /* check input parameters */
3027 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3028 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3033 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3041 cb->param = user_param;
3043 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3044 /* Add the callbacks in fifo order. */
3045 struct rte_eth_rxtx_callback *tail =
3046 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3049 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3056 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3062 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3063 struct rte_eth_rxtx_callback *user_cb)
3065 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3068 /* Check input parameters. */
3069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3070 if (user_cb == NULL ||
3071 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3074 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3075 struct rte_eth_rxtx_callback *cb;
3076 struct rte_eth_rxtx_callback **prev_cb;
3079 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3080 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3081 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3083 if (cb == user_cb) {
3084 /* Remove the user cb from the callback list. */
3085 *prev_cb = cb->next;
3090 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3096 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3097 struct rte_eth_rxtx_callback *user_cb)
3099 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3102 /* Check input parameters. */
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3104 if (user_cb == NULL ||
3105 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3108 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3110 struct rte_eth_rxtx_callback *cb;
3111 struct rte_eth_rxtx_callback **prev_cb;
3113 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3114 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3115 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3117 if (cb == user_cb) {
3118 /* Remove the user cb from the callback list. */
3119 *prev_cb = cb->next;
3124 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3130 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3131 struct rte_eth_rxq_info *qinfo)
3133 struct rte_eth_dev *dev;
3135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3140 dev = &rte_eth_devices[port_id];
3141 if (queue_id >= dev->data->nb_rx_queues) {
3142 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3148 memset(qinfo, 0, sizeof(*qinfo));
3149 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3154 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3155 struct rte_eth_txq_info *qinfo)
3157 struct rte_eth_dev *dev;
3159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3164 dev = &rte_eth_devices[port_id];
3165 if (queue_id >= dev->data->nb_tx_queues) {
3166 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3172 memset(qinfo, 0, sizeof(*qinfo));
3173 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3178 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3179 struct ether_addr *mc_addr_set,
3180 uint32_t nb_mc_addr)
3182 struct rte_eth_dev *dev;
3184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3186 dev = &rte_eth_devices[port_id];
3187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3188 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3192 rte_eth_timesync_enable(uint8_t port_id)
3194 struct rte_eth_dev *dev;
3196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3197 dev = &rte_eth_devices[port_id];
3199 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3200 return (*dev->dev_ops->timesync_enable)(dev);
3204 rte_eth_timesync_disable(uint8_t port_id)
3206 struct rte_eth_dev *dev;
3208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3209 dev = &rte_eth_devices[port_id];
3211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3212 return (*dev->dev_ops->timesync_disable)(dev);
3216 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3219 struct rte_eth_dev *dev;
3221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222 dev = &rte_eth_devices[port_id];
3224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3225 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3229 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3231 struct rte_eth_dev *dev;
3233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234 dev = &rte_eth_devices[port_id];
3236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3237 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3241 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3243 struct rte_eth_dev *dev;
3245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3246 dev = &rte_eth_devices[port_id];
3248 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3249 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3253 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3255 struct rte_eth_dev *dev;
3257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3258 dev = &rte_eth_devices[port_id];
3260 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3261 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3265 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3267 struct rte_eth_dev *dev;
3269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3270 dev = &rte_eth_devices[port_id];
3272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3273 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3277 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3279 struct rte_eth_dev *dev;
3281 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3283 dev = &rte_eth_devices[port_id];
3284 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3285 return (*dev->dev_ops->get_reg)(dev, info);
3289 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3291 struct rte_eth_dev *dev;
3293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3295 dev = &rte_eth_devices[port_id];
3296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3297 return (*dev->dev_ops->get_eeprom_length)(dev);
3301 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3303 struct rte_eth_dev *dev;
3305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3307 dev = &rte_eth_devices[port_id];
3308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3309 return (*dev->dev_ops->get_eeprom)(dev, info);
3313 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3315 struct rte_eth_dev *dev;
3317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3319 dev = &rte_eth_devices[port_id];
3320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3321 return (*dev->dev_ops->set_eeprom)(dev, info);
3325 rte_eth_dev_get_dcb_info(uint8_t port_id,
3326 struct rte_eth_dcb_info *dcb_info)
3328 struct rte_eth_dev *dev;
3330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3332 dev = &rte_eth_devices[port_id];
3333 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3335 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3336 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3340 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3341 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3343 struct rte_eth_dev *dev;
3345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3346 if (l2_tunnel == NULL) {
3347 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3351 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3352 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3356 dev = &rte_eth_devices[port_id];
3357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3359 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3363 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3364 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3368 struct rte_eth_dev *dev;
3370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3372 if (l2_tunnel == NULL) {
3373 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3377 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3378 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3383 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3387 dev = &rte_eth_devices[port_id];
3388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3390 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3394 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3395 const struct rte_eth_desc_lim *desc_lim)
3397 if (desc_lim->nb_align != 0)
3398 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3400 if (desc_lim->nb_max != 0)
3401 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3403 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3407 rte_eth_dev_adjust_nb_rx_tx_desc(uint8_t port_id,
3408 uint16_t *nb_rx_desc,
3409 uint16_t *nb_tx_desc)
3411 struct rte_eth_dev *dev;
3412 struct rte_eth_dev_info dev_info;
3414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3416 dev = &rte_eth_devices[port_id];
3417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3419 rte_eth_dev_info_get(port_id, &dev_info);
3421 if (nb_rx_desc != NULL)
3422 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3424 if (nb_tx_desc != NULL)
3425 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);