1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_profile.h"
42 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
43 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
44 static struct rte_eth_dev_data *rte_eth_dev_data;
45 static uint8_t eth_dev_last_created_port;
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* store statistics names and its offset in stats structure */
57 struct rte_eth_xstats_name_off {
58 char name[RTE_ETH_XSTATS_NAME_SIZE];
62 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
63 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
64 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
65 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
66 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
67 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
68 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
69 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
70 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
74 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
76 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
77 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
78 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
79 {"errors", offsetof(struct rte_eth_stats, q_errors)},
82 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
83 sizeof(rte_rxq_stats_strings[0]))
85 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
86 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
87 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
89 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
90 sizeof(rte_txq_stats_strings[0]))
94 * The user application callback description.
96 * It contains callback address to be registered by user application,
97 * the pointer to the parameters for callback, and the event type.
99 struct rte_eth_dev_callback {
100 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
101 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
102 void *cb_arg; /**< Parameter for callback */
103 void *ret_param; /**< Return parameter */
104 enum rte_eth_event_type event; /**< Interrupt event type */
105 uint32_t active; /**< Callback is executing */
114 rte_eth_find_next(uint16_t port_id)
116 while (port_id < RTE_MAX_ETHPORTS &&
117 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
120 if (port_id >= RTE_MAX_ETHPORTS)
121 return RTE_MAX_ETHPORTS;
127 rte_eth_dev_data_alloc(void)
129 const unsigned flags = 0;
130 const struct rte_memzone *mz;
132 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
133 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
134 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
135 rte_socket_id(), flags);
137 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
139 rte_panic("Cannot allocate memzone for ethernet port data\n");
141 rte_eth_dev_data = mz->addr;
142 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
143 memset(rte_eth_dev_data, 0,
144 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
148 rte_eth_dev_allocated(const char *name)
152 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
153 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
154 strcmp(rte_eth_devices[i].data->name, name) == 0)
155 return &rte_eth_devices[i];
161 rte_eth_dev_find_free_port(void)
165 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
166 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
169 return RTE_MAX_ETHPORTS;
172 static struct rte_eth_dev *
173 eth_dev_get(uint16_t port_id)
175 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
177 eth_dev->data = &rte_eth_dev_data[port_id];
178 eth_dev->state = RTE_ETH_DEV_ATTACHED;
180 eth_dev_last_created_port = port_id;
186 rte_eth_dev_allocate(const char *name)
189 struct rte_eth_dev *eth_dev;
191 port_id = rte_eth_dev_find_free_port();
192 if (port_id == RTE_MAX_ETHPORTS) {
193 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
197 if (rte_eth_dev_data == NULL)
198 rte_eth_dev_data_alloc();
200 if (rte_eth_dev_allocated(name) != NULL) {
201 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
206 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
207 eth_dev = eth_dev_get(port_id);
208 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
209 eth_dev->data->port_id = port_id;
210 eth_dev->data->mtu = ETHER_MTU;
212 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
218 * Attach to a port already registered by the primary process, which
219 * makes sure that the same device would have the same port id both
220 * in the primary and secondary process.
223 rte_eth_dev_attach_secondary(const char *name)
226 struct rte_eth_dev *eth_dev;
228 if (rte_eth_dev_data == NULL)
229 rte_eth_dev_data_alloc();
231 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
232 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
235 if (i == RTE_MAX_ETHPORTS) {
237 "device %s is not driven by the primary process\n",
242 eth_dev = eth_dev_get(i);
243 RTE_ASSERT(eth_dev->data->port_id == i);
249 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
254 eth_dev->state = RTE_ETH_DEV_UNUSED;
256 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
262 rte_eth_dev_is_valid_port(uint16_t port_id)
264 if (port_id >= RTE_MAX_ETHPORTS ||
265 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
266 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
273 rte_eth_dev_socket_id(uint16_t port_id)
275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
276 return rte_eth_devices[port_id].data->numa_node;
280 rte_eth_dev_get_sec_ctx(uint8_t port_id)
282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
283 return rte_eth_devices[port_id].security_ctx;
287 rte_eth_dev_count(void)
294 RTE_ETH_FOREACH_DEV(p)
301 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
308 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
312 /* shouldn't check 'rte_eth_devices[i].data',
313 * because it might be overwritten by VDEV PMD */
314 tmp = rte_eth_dev_data[port_id].name;
320 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
325 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
329 RTE_ETH_FOREACH_DEV(i) {
331 rte_eth_dev_data[i].name, strlen(name))) {
341 /* attach the new device, then store port_id of the device */
343 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
346 int current = rte_eth_dev_count();
350 if ((devargs == NULL) || (port_id == NULL)) {
355 /* parse devargs, then retrieve device name and args */
356 if (rte_eal_parse_devargs_str(devargs, &name, &args))
359 ret = rte_eal_dev_attach(name, args);
363 /* no point looking at the port count if no port exists */
364 if (!rte_eth_dev_count()) {
365 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
370 /* if nothing happened, there is a bug here, since some driver told us
371 * it did attach a device, but did not create a port.
373 if (current == rte_eth_dev_count()) {
378 *port_id = eth_dev_last_created_port;
387 /* detach the device, then store the name of the device */
389 rte_eth_dev_detach(uint16_t port_id, char *name)
394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
401 dev_flags = rte_eth_devices[port_id].data->dev_flags;
402 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
403 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
409 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
410 "%s", rte_eth_devices[port_id].data->name);
412 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
416 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
424 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
426 uint16_t old_nb_queues = dev->data->nb_rx_queues;
430 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
431 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
432 sizeof(dev->data->rx_queues[0]) * nb_queues,
433 RTE_CACHE_LINE_SIZE);
434 if (dev->data->rx_queues == NULL) {
435 dev->data->nb_rx_queues = 0;
438 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
441 rxq = dev->data->rx_queues;
443 for (i = nb_queues; i < old_nb_queues; i++)
444 (*dev->dev_ops->rx_queue_release)(rxq[i]);
445 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
446 RTE_CACHE_LINE_SIZE);
449 if (nb_queues > old_nb_queues) {
450 uint16_t new_qs = nb_queues - old_nb_queues;
452 memset(rxq + old_nb_queues, 0,
453 sizeof(rxq[0]) * new_qs);
456 dev->data->rx_queues = rxq;
458 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
461 rxq = dev->data->rx_queues;
463 for (i = nb_queues; i < old_nb_queues; i++)
464 (*dev->dev_ops->rx_queue_release)(rxq[i]);
466 rte_free(dev->data->rx_queues);
467 dev->data->rx_queues = NULL;
469 dev->data->nb_rx_queues = nb_queues;
474 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
476 struct rte_eth_dev *dev;
478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
480 dev = &rte_eth_devices[port_id];
481 if (rx_queue_id >= dev->data->nb_rx_queues) {
482 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
488 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
489 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
490 " already started\n",
491 rx_queue_id, port_id);
495 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
500 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
502 struct rte_eth_dev *dev;
504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
506 dev = &rte_eth_devices[port_id];
507 if (rx_queue_id >= dev->data->nb_rx_queues) {
508 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
514 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
515 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
516 " already stopped\n",
517 rx_queue_id, port_id);
521 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
526 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
528 struct rte_eth_dev *dev;
530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
532 dev = &rte_eth_devices[port_id];
533 if (tx_queue_id >= dev->data->nb_tx_queues) {
534 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
540 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
541 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
542 " already started\n",
543 tx_queue_id, port_id);
547 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
552 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
554 struct rte_eth_dev *dev;
556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
558 dev = &rte_eth_devices[port_id];
559 if (tx_queue_id >= dev->data->nb_tx_queues) {
560 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
566 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
567 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
568 " already stopped\n",
569 tx_queue_id, port_id);
573 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
578 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
580 uint16_t old_nb_queues = dev->data->nb_tx_queues;
584 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
585 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
586 sizeof(dev->data->tx_queues[0]) * nb_queues,
587 RTE_CACHE_LINE_SIZE);
588 if (dev->data->tx_queues == NULL) {
589 dev->data->nb_tx_queues = 0;
592 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
593 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
595 txq = dev->data->tx_queues;
597 for (i = nb_queues; i < old_nb_queues; i++)
598 (*dev->dev_ops->tx_queue_release)(txq[i]);
599 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
600 RTE_CACHE_LINE_SIZE);
603 if (nb_queues > old_nb_queues) {
604 uint16_t new_qs = nb_queues - old_nb_queues;
606 memset(txq + old_nb_queues, 0,
607 sizeof(txq[0]) * new_qs);
610 dev->data->tx_queues = txq;
612 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
615 txq = dev->data->tx_queues;
617 for (i = nb_queues; i < old_nb_queues; i++)
618 (*dev->dev_ops->tx_queue_release)(txq[i]);
620 rte_free(dev->data->tx_queues);
621 dev->data->tx_queues = NULL;
623 dev->data->nb_tx_queues = nb_queues;
628 rte_eth_speed_bitflag(uint32_t speed, int duplex)
631 case ETH_SPEED_NUM_10M:
632 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
633 case ETH_SPEED_NUM_100M:
634 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
635 case ETH_SPEED_NUM_1G:
636 return ETH_LINK_SPEED_1G;
637 case ETH_SPEED_NUM_2_5G:
638 return ETH_LINK_SPEED_2_5G;
639 case ETH_SPEED_NUM_5G:
640 return ETH_LINK_SPEED_5G;
641 case ETH_SPEED_NUM_10G:
642 return ETH_LINK_SPEED_10G;
643 case ETH_SPEED_NUM_20G:
644 return ETH_LINK_SPEED_20G;
645 case ETH_SPEED_NUM_25G:
646 return ETH_LINK_SPEED_25G;
647 case ETH_SPEED_NUM_40G:
648 return ETH_LINK_SPEED_40G;
649 case ETH_SPEED_NUM_50G:
650 return ETH_LINK_SPEED_50G;
651 case ETH_SPEED_NUM_56G:
652 return ETH_LINK_SPEED_56G;
653 case ETH_SPEED_NUM_100G:
654 return ETH_LINK_SPEED_100G;
661 * A conversion function from rxmode bitfield API.
664 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
665 uint64_t *rx_offloads)
667 uint64_t offloads = 0;
669 if (rxmode->header_split == 1)
670 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
671 if (rxmode->hw_ip_checksum == 1)
672 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
673 if (rxmode->hw_vlan_filter == 1)
674 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
675 if (rxmode->hw_vlan_strip == 1)
676 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
677 if (rxmode->hw_vlan_extend == 1)
678 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
679 if (rxmode->jumbo_frame == 1)
680 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
681 if (rxmode->hw_strip_crc == 1)
682 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
683 if (rxmode->enable_scatter == 1)
684 offloads |= DEV_RX_OFFLOAD_SCATTER;
685 if (rxmode->enable_lro == 1)
686 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
687 if (rxmode->hw_timestamp == 1)
688 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
689 if (rxmode->security == 1)
690 offloads |= DEV_RX_OFFLOAD_SECURITY;
692 *rx_offloads = offloads;
696 * A conversion function from rxmode offloads API.
699 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
700 struct rte_eth_rxmode *rxmode)
703 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
704 rxmode->header_split = 1;
706 rxmode->header_split = 0;
707 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
708 rxmode->hw_ip_checksum = 1;
710 rxmode->hw_ip_checksum = 0;
711 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
712 rxmode->hw_vlan_filter = 1;
714 rxmode->hw_vlan_filter = 0;
715 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
716 rxmode->hw_vlan_strip = 1;
718 rxmode->hw_vlan_strip = 0;
719 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
720 rxmode->hw_vlan_extend = 1;
722 rxmode->hw_vlan_extend = 0;
723 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
724 rxmode->jumbo_frame = 1;
726 rxmode->jumbo_frame = 0;
727 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
728 rxmode->hw_strip_crc = 1;
730 rxmode->hw_strip_crc = 0;
731 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
732 rxmode->enable_scatter = 1;
734 rxmode->enable_scatter = 0;
735 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
736 rxmode->enable_lro = 1;
738 rxmode->enable_lro = 0;
739 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
740 rxmode->hw_timestamp = 1;
742 rxmode->hw_timestamp = 0;
743 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
744 rxmode->security = 1;
746 rxmode->security = 0;
750 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
751 const struct rte_eth_conf *dev_conf)
753 struct rte_eth_dev *dev;
754 struct rte_eth_dev_info dev_info;
755 struct rte_eth_conf local_conf = *dev_conf;
758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
760 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
762 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
763 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
767 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
769 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
770 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
774 dev = &rte_eth_devices[port_id];
776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
779 if (dev->data->dev_started) {
781 "port %d must be stopped to allow configuration\n", port_id);
786 * Convert between the offloads API to enable PMDs to support
789 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
790 rte_eth_convert_rx_offload_bitfield(
791 &dev_conf->rxmode, &local_conf.rxmode.offloads);
793 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
797 /* Copy the dev_conf parameter into the dev structure */
798 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
801 * Check that the numbers of RX and TX queues are not greater
802 * than the maximum number of RX and TX queues supported by the
805 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
807 if (nb_rx_q == 0 && nb_tx_q == 0) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
812 if (nb_rx_q > dev_info.max_rx_queues) {
813 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
814 port_id, nb_rx_q, dev_info.max_rx_queues);
818 if (nb_tx_q > dev_info.max_tx_queues) {
819 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
820 port_id, nb_tx_q, dev_info.max_tx_queues);
824 /* Check that the device supports requested interrupts */
825 if ((dev_conf->intr_conf.lsc == 1) &&
826 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
827 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
828 dev->device->driver->name);
831 if ((dev_conf->intr_conf.rmv == 1) &&
832 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
833 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
834 dev->device->driver->name);
839 * If jumbo frames are enabled, check that the maximum RX packet
840 * length is supported by the configured device.
842 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
843 if (dev_conf->rxmode.max_rx_pkt_len >
844 dev_info.max_rx_pktlen) {
845 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
846 " > max valid value %u\n",
848 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
849 (unsigned)dev_info.max_rx_pktlen);
851 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
852 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
853 " < min valid value %u\n",
855 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
856 (unsigned)ETHER_MIN_LEN);
860 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
861 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
862 /* Use default value */
863 dev->data->dev_conf.rxmode.max_rx_pkt_len =
868 * Setup new number of RX/TX queues and reconfigure device.
870 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
872 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
877 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
879 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
881 rte_eth_dev_rx_queue_config(dev, 0);
885 diag = (*dev->dev_ops->dev_configure)(dev);
887 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
889 rte_eth_dev_rx_queue_config(dev, 0);
890 rte_eth_dev_tx_queue_config(dev, 0);
894 /* Initialize Rx profiling if enabled at compilation time. */
895 diag = __rte_eth_profile_rx_init(port_id, dev);
897 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
899 rte_eth_dev_rx_queue_config(dev, 0);
900 rte_eth_dev_tx_queue_config(dev, 0);
908 _rte_eth_dev_reset(struct rte_eth_dev *dev)
910 if (dev->data->dev_started) {
912 "port %d must be stopped to allow reset\n",
917 rte_eth_dev_rx_queue_config(dev, 0);
918 rte_eth_dev_tx_queue_config(dev, 0);
920 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
924 rte_eth_dev_config_restore(uint16_t port_id)
926 struct rte_eth_dev *dev;
927 struct rte_eth_dev_info dev_info;
928 struct ether_addr *addr;
933 dev = &rte_eth_devices[port_id];
935 rte_eth_dev_info_get(port_id, &dev_info);
937 /* replay MAC address configuration including default MAC */
938 addr = &dev->data->mac_addrs[0];
939 if (*dev->dev_ops->mac_addr_set != NULL)
940 (*dev->dev_ops->mac_addr_set)(dev, addr);
941 else if (*dev->dev_ops->mac_addr_add != NULL)
942 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
944 if (*dev->dev_ops->mac_addr_add != NULL) {
945 for (i = 1; i < dev_info.max_mac_addrs; i++) {
946 addr = &dev->data->mac_addrs[i];
948 /* skip zero address */
949 if (is_zero_ether_addr(addr))
953 pool_mask = dev->data->mac_pool_sel[i];
956 if (pool_mask & 1ULL)
957 (*dev->dev_ops->mac_addr_add)(dev,
965 /* replay promiscuous configuration */
966 if (rte_eth_promiscuous_get(port_id) == 1)
967 rte_eth_promiscuous_enable(port_id);
968 else if (rte_eth_promiscuous_get(port_id) == 0)
969 rte_eth_promiscuous_disable(port_id);
971 /* replay all multicast configuration */
972 if (rte_eth_allmulticast_get(port_id) == 1)
973 rte_eth_allmulticast_enable(port_id);
974 else if (rte_eth_allmulticast_get(port_id) == 0)
975 rte_eth_allmulticast_disable(port_id);
979 rte_eth_dev_start(uint16_t port_id)
981 struct rte_eth_dev *dev;
984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
986 dev = &rte_eth_devices[port_id];
988 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
990 if (dev->data->dev_started != 0) {
991 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
992 " already started\n",
997 diag = (*dev->dev_ops->dev_start)(dev);
999 dev->data->dev_started = 1;
1003 rte_eth_dev_config_restore(port_id);
1005 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1007 (*dev->dev_ops->link_update)(dev, 0);
1013 rte_eth_dev_stop(uint16_t port_id)
1015 struct rte_eth_dev *dev;
1017 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1018 dev = &rte_eth_devices[port_id];
1020 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1022 if (dev->data->dev_started == 0) {
1023 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1024 " already stopped\n",
1029 dev->data->dev_started = 0;
1030 (*dev->dev_ops->dev_stop)(dev);
1034 rte_eth_dev_set_link_up(uint16_t port_id)
1036 struct rte_eth_dev *dev;
1038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1040 dev = &rte_eth_devices[port_id];
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1043 return (*dev->dev_ops->dev_set_link_up)(dev);
1047 rte_eth_dev_set_link_down(uint16_t port_id)
1049 struct rte_eth_dev *dev;
1051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1053 dev = &rte_eth_devices[port_id];
1055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1056 return (*dev->dev_ops->dev_set_link_down)(dev);
1060 rte_eth_dev_close(uint16_t port_id)
1062 struct rte_eth_dev *dev;
1064 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1065 dev = &rte_eth_devices[port_id];
1067 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1068 dev->data->dev_started = 0;
1069 (*dev->dev_ops->dev_close)(dev);
1071 dev->data->nb_rx_queues = 0;
1072 rte_free(dev->data->rx_queues);
1073 dev->data->rx_queues = NULL;
1074 dev->data->nb_tx_queues = 0;
1075 rte_free(dev->data->tx_queues);
1076 dev->data->tx_queues = NULL;
1080 rte_eth_dev_reset(uint16_t port_id)
1082 struct rte_eth_dev *dev;
1085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1086 dev = &rte_eth_devices[port_id];
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1090 rte_eth_dev_stop(port_id);
1091 ret = dev->dev_ops->dev_reset(dev);
1097 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1098 uint16_t nb_rx_desc, unsigned int socket_id,
1099 const struct rte_eth_rxconf *rx_conf,
1100 struct rte_mempool *mp)
1103 uint32_t mbp_buf_size;
1104 struct rte_eth_dev *dev;
1105 struct rte_eth_dev_info dev_info;
1106 struct rte_eth_rxconf local_conf;
1109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1111 dev = &rte_eth_devices[port_id];
1112 if (rx_queue_id >= dev->data->nb_rx_queues) {
1113 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1117 if (dev->data->dev_started) {
1118 RTE_PMD_DEBUG_TRACE(
1119 "port %d must be stopped to allow configuration\n", port_id);
1123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1127 * Check the size of the mbuf data buffer.
1128 * This value must be provided in the private data of the memory pool.
1129 * First check that the memory pool has a valid private data.
1131 rte_eth_dev_info_get(port_id, &dev_info);
1132 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1133 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1134 mp->name, (int) mp->private_data_size,
1135 (int) sizeof(struct rte_pktmbuf_pool_private));
1138 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1140 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1141 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1142 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1146 (int)(RTE_PKTMBUF_HEADROOM +
1147 dev_info.min_rx_bufsize),
1148 (int)RTE_PKTMBUF_HEADROOM,
1149 (int)dev_info.min_rx_bufsize);
1153 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1154 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1155 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1157 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1158 "should be: <= %hu, = %hu, and a product of %hu\n",
1160 dev_info.rx_desc_lim.nb_max,
1161 dev_info.rx_desc_lim.nb_min,
1162 dev_info.rx_desc_lim.nb_align);
1166 rxq = dev->data->rx_queues;
1167 if (rxq[rx_queue_id]) {
1168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1170 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1171 rxq[rx_queue_id] = NULL;
1174 if (rx_conf == NULL)
1175 rx_conf = &dev_info.default_rxconf;
1177 local_conf = *rx_conf;
1178 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1180 * Reflect port offloads to queue offloads in order for
1181 * offloads to not be discarded.
1183 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1184 &local_conf.offloads);
1187 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1188 socket_id, &local_conf, mp);
1190 if (!dev->data->min_rx_buf_size ||
1191 dev->data->min_rx_buf_size > mbp_buf_size)
1192 dev->data->min_rx_buf_size = mbp_buf_size;
1199 * A conversion function from txq_flags API.
1202 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1204 uint64_t offloads = 0;
1206 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1207 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1208 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1209 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1210 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1211 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1212 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1213 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1214 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1215 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1216 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1217 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1218 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1220 *tx_offloads = offloads;
1224 * A conversion function from offloads API.
1227 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1231 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1232 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1233 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1234 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1235 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1236 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1237 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1238 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1239 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1240 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1241 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1242 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1248 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1249 uint16_t nb_tx_desc, unsigned int socket_id,
1250 const struct rte_eth_txconf *tx_conf)
1252 struct rte_eth_dev *dev;
1253 struct rte_eth_dev_info dev_info;
1254 struct rte_eth_txconf local_conf;
1257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1259 dev = &rte_eth_devices[port_id];
1260 if (tx_queue_id >= dev->data->nb_tx_queues) {
1261 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1265 if (dev->data->dev_started) {
1266 RTE_PMD_DEBUG_TRACE(
1267 "port %d must be stopped to allow configuration\n", port_id);
1271 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1274 rte_eth_dev_info_get(port_id, &dev_info);
1276 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1277 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1278 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1279 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1280 "should be: <= %hu, = %hu, and a product of %hu\n",
1282 dev_info.tx_desc_lim.nb_max,
1283 dev_info.tx_desc_lim.nb_min,
1284 dev_info.tx_desc_lim.nb_align);
1288 txq = dev->data->tx_queues;
1289 if (txq[tx_queue_id]) {
1290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1292 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1293 txq[tx_queue_id] = NULL;
1296 if (tx_conf == NULL)
1297 tx_conf = &dev_info.default_txconf;
1300 * Convert between the offloads API to enable PMDs to support
1303 local_conf = *tx_conf;
1304 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1305 rte_eth_convert_txq_offloads(tx_conf->offloads,
1306 &local_conf.txq_flags);
1307 /* Keep the ignore flag. */
1308 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1310 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1311 &local_conf.offloads);
1314 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1315 socket_id, &local_conf);
1319 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1320 void *userdata __rte_unused)
1324 for (i = 0; i < unsent; i++)
1325 rte_pktmbuf_free(pkts[i]);
1329 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1332 uint64_t *count = userdata;
1335 for (i = 0; i < unsent; i++)
1336 rte_pktmbuf_free(pkts[i]);
1342 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1343 buffer_tx_error_fn cbfn, void *userdata)
1345 buffer->error_callback = cbfn;
1346 buffer->error_userdata = userdata;
1351 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1358 buffer->size = size;
1359 if (buffer->error_callback == NULL) {
1360 ret = rte_eth_tx_buffer_set_err_callback(
1361 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1368 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1370 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1372 /* Validate Input Data. Bail if not valid or not supported. */
1373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1376 /* Call driver to free pending mbufs. */
1377 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1382 rte_eth_promiscuous_enable(uint16_t port_id)
1384 struct rte_eth_dev *dev;
1386 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1387 dev = &rte_eth_devices[port_id];
1389 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1390 (*dev->dev_ops->promiscuous_enable)(dev);
1391 dev->data->promiscuous = 1;
1395 rte_eth_promiscuous_disable(uint16_t port_id)
1397 struct rte_eth_dev *dev;
1399 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1400 dev = &rte_eth_devices[port_id];
1402 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1403 dev->data->promiscuous = 0;
1404 (*dev->dev_ops->promiscuous_disable)(dev);
1408 rte_eth_promiscuous_get(uint16_t port_id)
1410 struct rte_eth_dev *dev;
1412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1414 dev = &rte_eth_devices[port_id];
1415 return dev->data->promiscuous;
1419 rte_eth_allmulticast_enable(uint16_t port_id)
1421 struct rte_eth_dev *dev;
1423 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1424 dev = &rte_eth_devices[port_id];
1426 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1427 (*dev->dev_ops->allmulticast_enable)(dev);
1428 dev->data->all_multicast = 1;
1432 rte_eth_allmulticast_disable(uint16_t port_id)
1434 struct rte_eth_dev *dev;
1436 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1437 dev = &rte_eth_devices[port_id];
1439 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1440 dev->data->all_multicast = 0;
1441 (*dev->dev_ops->allmulticast_disable)(dev);
1445 rte_eth_allmulticast_get(uint16_t port_id)
1447 struct rte_eth_dev *dev;
1449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1451 dev = &rte_eth_devices[port_id];
1452 return dev->data->all_multicast;
1456 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1457 struct rte_eth_link *link)
1459 struct rte_eth_link *dst = link;
1460 struct rte_eth_link *src = &(dev->data->dev_link);
1462 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1463 *(uint64_t *)src) == 0)
1470 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1475 dev = &rte_eth_devices[port_id];
1477 if (dev->data->dev_conf.intr_conf.lsc != 0)
1478 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1480 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1481 (*dev->dev_ops->link_update)(dev, 1);
1482 *eth_link = dev->data->dev_link;
1487 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1489 struct rte_eth_dev *dev;
1491 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1492 dev = &rte_eth_devices[port_id];
1494 if (dev->data->dev_conf.intr_conf.lsc != 0)
1495 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1497 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1498 (*dev->dev_ops->link_update)(dev, 0);
1499 *eth_link = dev->data->dev_link;
1504 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1506 struct rte_eth_dev *dev;
1508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1510 dev = &rte_eth_devices[port_id];
1511 memset(stats, 0, sizeof(*stats));
1513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1514 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1515 return (*dev->dev_ops->stats_get)(dev, stats);
1519 rte_eth_stats_reset(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1524 dev = &rte_eth_devices[port_id];
1526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1527 (*dev->dev_ops->stats_reset)(dev);
1528 dev->data->rx_mbuf_alloc_failed = 0;
1534 get_xstats_basic_count(struct rte_eth_dev *dev)
1536 uint16_t nb_rxqs, nb_txqs;
1539 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1540 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1542 count = RTE_NB_STATS;
1543 count += nb_rxqs * RTE_NB_RXQ_STATS;
1544 count += nb_txqs * RTE_NB_TXQ_STATS;
1550 get_xstats_count(uint16_t port_id)
1552 struct rte_eth_dev *dev;
1555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1556 dev = &rte_eth_devices[port_id];
1557 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1558 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1563 if (dev->dev_ops->xstats_get_names != NULL) {
1564 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1571 count += get_xstats_basic_count(dev);
1577 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1580 int cnt_xstats, idx_xstat;
1582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1585 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1590 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1595 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1596 if (cnt_xstats < 0) {
1597 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1601 /* Get id-name lookup table */
1602 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1604 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1605 port_id, xstats_names, cnt_xstats, NULL)) {
1606 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1610 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1611 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1620 /* retrieve basic stats names */
1622 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1623 struct rte_eth_xstat_name *xstats_names)
1625 int cnt_used_entries = 0;
1626 uint32_t idx, id_queue;
1629 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1630 snprintf(xstats_names[cnt_used_entries].name,
1631 sizeof(xstats_names[0].name),
1632 "%s", rte_stats_strings[idx].name);
1635 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1636 for (id_queue = 0; id_queue < num_q; id_queue++) {
1637 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1638 snprintf(xstats_names[cnt_used_entries].name,
1639 sizeof(xstats_names[0].name),
1641 id_queue, rte_rxq_stats_strings[idx].name);
1646 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1647 for (id_queue = 0; id_queue < num_q; id_queue++) {
1648 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1649 snprintf(xstats_names[cnt_used_entries].name,
1650 sizeof(xstats_names[0].name),
1652 id_queue, rte_txq_stats_strings[idx].name);
1656 return cnt_used_entries;
1659 /* retrieve ethdev extended statistics names */
1661 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1662 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1665 struct rte_eth_xstat_name *xstats_names_copy;
1666 unsigned int no_basic_stat_requested = 1;
1667 unsigned int no_ext_stat_requested = 1;
1668 unsigned int expected_entries;
1669 unsigned int basic_count;
1670 struct rte_eth_dev *dev;
1674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1675 dev = &rte_eth_devices[port_id];
1677 basic_count = get_xstats_basic_count(dev);
1678 ret = get_xstats_count(port_id);
1681 expected_entries = (unsigned int)ret;
1683 /* Return max number of stats if no ids given */
1686 return expected_entries;
1687 else if (xstats_names && size < expected_entries)
1688 return expected_entries;
1691 if (ids && !xstats_names)
1694 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1695 uint64_t ids_copy[size];
1697 for (i = 0; i < size; i++) {
1698 if (ids[i] < basic_count) {
1699 no_basic_stat_requested = 0;
1704 * Convert ids to xstats ids that PMD knows.
1705 * ids known by user are basic + extended stats.
1707 ids_copy[i] = ids[i] - basic_count;
1710 if (no_basic_stat_requested)
1711 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1712 xstats_names, ids_copy, size);
1715 /* Retrieve all stats */
1717 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1719 if (num_stats < 0 || num_stats > (int)expected_entries)
1722 return expected_entries;
1725 xstats_names_copy = calloc(expected_entries,
1726 sizeof(struct rte_eth_xstat_name));
1728 if (!xstats_names_copy) {
1729 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1734 for (i = 0; i < size; i++) {
1735 if (ids[i] > basic_count) {
1736 no_ext_stat_requested = 0;
1742 /* Fill xstats_names_copy structure */
1743 if (ids && no_ext_stat_requested) {
1744 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1746 rte_eth_xstats_get_names(port_id, xstats_names_copy,
1751 for (i = 0; i < size; i++) {
1752 if (ids[i] >= expected_entries) {
1753 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1754 free(xstats_names_copy);
1757 xstats_names[i] = xstats_names_copy[ids[i]];
1760 free(xstats_names_copy);
1765 rte_eth_xstats_get_names(uint16_t port_id,
1766 struct rte_eth_xstat_name *xstats_names,
1769 struct rte_eth_dev *dev;
1770 int cnt_used_entries;
1771 int cnt_expected_entries;
1772 int cnt_driver_entries;
1774 cnt_expected_entries = get_xstats_count(port_id);
1775 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1776 (int)size < cnt_expected_entries)
1777 return cnt_expected_entries;
1779 /* port_id checked in get_xstats_count() */
1780 dev = &rte_eth_devices[port_id];
1782 cnt_used_entries = rte_eth_basic_stats_get_names(
1785 if (dev->dev_ops->xstats_get_names != NULL) {
1786 /* If there are any driver-specific xstats, append them
1789 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1791 xstats_names + cnt_used_entries,
1792 size - cnt_used_entries);
1793 if (cnt_driver_entries < 0)
1794 return cnt_driver_entries;
1795 cnt_used_entries += cnt_driver_entries;
1798 return cnt_used_entries;
1803 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1805 struct rte_eth_dev *dev;
1806 struct rte_eth_stats eth_stats;
1807 unsigned int count = 0, i, q;
1808 uint64_t val, *stats_ptr;
1809 uint16_t nb_rxqs, nb_txqs;
1811 rte_eth_stats_get(port_id, ð_stats);
1812 dev = &rte_eth_devices[port_id];
1814 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1815 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1818 for (i = 0; i < RTE_NB_STATS; i++) {
1819 stats_ptr = RTE_PTR_ADD(ð_stats,
1820 rte_stats_strings[i].offset);
1822 xstats[count++].value = val;
1826 for (q = 0; q < nb_rxqs; q++) {
1827 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1828 stats_ptr = RTE_PTR_ADD(ð_stats,
1829 rte_rxq_stats_strings[i].offset +
1830 q * sizeof(uint64_t));
1832 xstats[count++].value = val;
1837 for (q = 0; q < nb_txqs; q++) {
1838 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1839 stats_ptr = RTE_PTR_ADD(ð_stats,
1840 rte_txq_stats_strings[i].offset +
1841 q * sizeof(uint64_t));
1843 xstats[count++].value = val;
1849 /* retrieve ethdev extended statistics */
1851 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1852 uint64_t *values, unsigned int size)
1854 unsigned int no_basic_stat_requested = 1;
1855 unsigned int no_ext_stat_requested = 1;
1856 unsigned int num_xstats_filled;
1857 unsigned int basic_count;
1858 uint16_t expected_entries;
1859 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1864 expected_entries = get_xstats_count(port_id);
1865 struct rte_eth_xstat xstats[expected_entries];
1866 dev = &rte_eth_devices[port_id];
1867 basic_count = get_xstats_basic_count(dev);
1869 /* Return max number of stats if no ids given */
1872 return expected_entries;
1873 else if (values && size < expected_entries)
1874 return expected_entries;
1880 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1881 unsigned int basic_count = get_xstats_basic_count(dev);
1882 uint64_t ids_copy[size];
1884 for (i = 0; i < size; i++) {
1885 if (ids[i] < basic_count) {
1886 no_basic_stat_requested = 0;
1891 * Convert ids to xstats ids that PMD knows.
1892 * ids known by user are basic + extended stats.
1894 ids_copy[i] = ids[i] - basic_count;
1897 if (no_basic_stat_requested)
1898 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1903 for (i = 0; i < size; i++) {
1904 if (ids[i] > basic_count) {
1905 no_ext_stat_requested = 0;
1911 /* Fill the xstats structure */
1912 if (ids && no_ext_stat_requested)
1913 ret = rte_eth_basic_stats_get(port_id, xstats);
1915 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1919 num_xstats_filled = (unsigned int)ret;
1921 /* Return all stats */
1923 for (i = 0; i < num_xstats_filled; i++)
1924 values[i] = xstats[i].value;
1925 return expected_entries;
1929 for (i = 0; i < size; i++) {
1930 if (ids[i] >= expected_entries) {
1931 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1934 values[i] = xstats[ids[i]].value;
1940 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1943 struct rte_eth_dev *dev;
1944 unsigned int count = 0, i;
1945 signed int xcount = 0;
1946 uint16_t nb_rxqs, nb_txqs;
1948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1950 dev = &rte_eth_devices[port_id];
1952 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1953 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1955 /* Return generic statistics */
1956 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1957 (nb_txqs * RTE_NB_TXQ_STATS);
1959 /* implemented by the driver */
1960 if (dev->dev_ops->xstats_get != NULL) {
1961 /* Retrieve the xstats from the driver at the end of the
1964 xcount = (*dev->dev_ops->xstats_get)(dev,
1965 xstats ? xstats + count : NULL,
1966 (n > count) ? n - count : 0);
1972 if (n < count + xcount || xstats == NULL)
1973 return count + xcount;
1975 /* now fill the xstats structure */
1976 count = rte_eth_basic_stats_get(port_id, xstats);
1978 for (i = 0; i < count; i++)
1980 /* add an offset to driver-specific stats */
1981 for ( ; i < count + xcount; i++)
1982 xstats[i].id += count;
1984 return count + xcount;
1987 /* reset ethdev extended statistics */
1989 rte_eth_xstats_reset(uint16_t port_id)
1991 struct rte_eth_dev *dev;
1993 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1994 dev = &rte_eth_devices[port_id];
1996 /* implemented by the driver */
1997 if (dev->dev_ops->xstats_reset != NULL) {
1998 (*dev->dev_ops->xstats_reset)(dev);
2002 /* fallback to default */
2003 rte_eth_stats_reset(port_id);
2007 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2010 struct rte_eth_dev *dev;
2012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2014 dev = &rte_eth_devices[port_id];
2016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2017 return (*dev->dev_ops->queue_stats_mapping_set)
2018 (dev, queue_id, stat_idx, is_rx);
2023 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2026 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2032 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2035 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2040 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2042 struct rte_eth_dev *dev;
2044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2045 dev = &rte_eth_devices[port_id];
2047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2048 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2052 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2054 struct rte_eth_dev *dev;
2055 const struct rte_eth_desc_lim lim = {
2056 .nb_max = UINT16_MAX,
2061 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2062 dev = &rte_eth_devices[port_id];
2064 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2065 dev_info->rx_desc_lim = lim;
2066 dev_info->tx_desc_lim = lim;
2068 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2069 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2070 dev_info->driver_name = dev->device->driver->name;
2071 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2072 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2076 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2077 uint32_t *ptypes, int num)
2080 struct rte_eth_dev *dev;
2081 const uint32_t *all_ptypes;
2083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2084 dev = &rte_eth_devices[port_id];
2085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2086 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2091 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2092 if (all_ptypes[i] & ptype_mask) {
2094 ptypes[j] = all_ptypes[i];
2102 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2104 struct rte_eth_dev *dev;
2106 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2107 dev = &rte_eth_devices[port_id];
2108 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2113 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2115 struct rte_eth_dev *dev;
2117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2119 dev = &rte_eth_devices[port_id];
2120 *mtu = dev->data->mtu;
2125 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2128 struct rte_eth_dev *dev;
2130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2131 dev = &rte_eth_devices[port_id];
2132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2134 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2136 dev->data->mtu = mtu;
2142 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2144 struct rte_eth_dev *dev;
2147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2148 dev = &rte_eth_devices[port_id];
2149 if (!(dev->data->dev_conf.rxmode.offloads &
2150 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2151 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2155 if (vlan_id > 4095) {
2156 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2157 port_id, (unsigned) vlan_id);
2160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2162 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2164 struct rte_vlan_filter_conf *vfc;
2168 vfc = &dev->data->vlan_filter_conf;
2169 vidx = vlan_id / 64;
2170 vbit = vlan_id % 64;
2173 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2175 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2182 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2185 struct rte_eth_dev *dev;
2187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2188 dev = &rte_eth_devices[port_id];
2189 if (rx_queue_id >= dev->data->nb_rx_queues) {
2190 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2195 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2201 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2202 enum rte_vlan_type vlan_type,
2205 struct rte_eth_dev *dev;
2207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2208 dev = &rte_eth_devices[port_id];
2209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2211 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2215 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2217 struct rte_eth_dev *dev;
2221 uint64_t orig_offloads;
2223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2224 dev = &rte_eth_devices[port_id];
2226 /* save original values in case of failure */
2227 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2229 /*check which option changed by application*/
2230 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2231 org = !!(dev->data->dev_conf.rxmode.offloads &
2232 DEV_RX_OFFLOAD_VLAN_STRIP);
2235 dev->data->dev_conf.rxmode.offloads |=
2236 DEV_RX_OFFLOAD_VLAN_STRIP;
2238 dev->data->dev_conf.rxmode.offloads &=
2239 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2240 mask |= ETH_VLAN_STRIP_MASK;
2243 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2244 org = !!(dev->data->dev_conf.rxmode.offloads &
2245 DEV_RX_OFFLOAD_VLAN_FILTER);
2248 dev->data->dev_conf.rxmode.offloads |=
2249 DEV_RX_OFFLOAD_VLAN_FILTER;
2251 dev->data->dev_conf.rxmode.offloads &=
2252 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2253 mask |= ETH_VLAN_FILTER_MASK;
2256 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2257 org = !!(dev->data->dev_conf.rxmode.offloads &
2258 DEV_RX_OFFLOAD_VLAN_EXTEND);
2261 dev->data->dev_conf.rxmode.offloads |=
2262 DEV_RX_OFFLOAD_VLAN_EXTEND;
2264 dev->data->dev_conf.rxmode.offloads &=
2265 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2266 mask |= ETH_VLAN_EXTEND_MASK;
2273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2276 * Convert to the offload bitfield API just in case the underlying PMD
2277 * still supporting it.
2279 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2280 &dev->data->dev_conf.rxmode);
2281 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2283 /* hit an error restore original values */
2284 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2285 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2286 &dev->data->dev_conf.rxmode);
2293 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2295 struct rte_eth_dev *dev;
2298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2299 dev = &rte_eth_devices[port_id];
2301 if (dev->data->dev_conf.rxmode.offloads &
2302 DEV_RX_OFFLOAD_VLAN_STRIP)
2303 ret |= ETH_VLAN_STRIP_OFFLOAD;
2305 if (dev->data->dev_conf.rxmode.offloads &
2306 DEV_RX_OFFLOAD_VLAN_FILTER)
2307 ret |= ETH_VLAN_FILTER_OFFLOAD;
2309 if (dev->data->dev_conf.rxmode.offloads &
2310 DEV_RX_OFFLOAD_VLAN_EXTEND)
2311 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2317 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2319 struct rte_eth_dev *dev;
2321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2322 dev = &rte_eth_devices[port_id];
2323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2324 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2330 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2332 struct rte_eth_dev *dev;
2334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2335 dev = &rte_eth_devices[port_id];
2336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2337 memset(fc_conf, 0, sizeof(*fc_conf));
2338 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2342 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2344 struct rte_eth_dev *dev;
2346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2347 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2348 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2352 dev = &rte_eth_devices[port_id];
2353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2354 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2358 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2359 struct rte_eth_pfc_conf *pfc_conf)
2361 struct rte_eth_dev *dev;
2363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2364 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2365 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2369 dev = &rte_eth_devices[port_id];
2370 /* High water, low water validation are device specific */
2371 if (*dev->dev_ops->priority_flow_ctrl_set)
2372 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2377 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2385 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2386 for (i = 0; i < num; i++) {
2387 if (reta_conf[i].mask)
2395 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2399 uint16_t i, idx, shift;
2405 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2409 for (i = 0; i < reta_size; i++) {
2410 idx = i / RTE_RETA_GROUP_SIZE;
2411 shift = i % RTE_RETA_GROUP_SIZE;
2412 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2413 (reta_conf[idx].reta[shift] >= max_rxq)) {
2414 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2415 "the maximum rxq index: %u\n", idx, shift,
2416 reta_conf[idx].reta[shift], max_rxq);
2425 rte_eth_dev_rss_reta_update(uint16_t port_id,
2426 struct rte_eth_rss_reta_entry64 *reta_conf,
2429 struct rte_eth_dev *dev;
2432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 /* Check mask bits */
2434 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2438 dev = &rte_eth_devices[port_id];
2440 /* Check entry value */
2441 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2442 dev->data->nb_rx_queues);
2446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2447 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2451 rte_eth_dev_rss_reta_query(uint16_t port_id,
2452 struct rte_eth_rss_reta_entry64 *reta_conf,
2455 struct rte_eth_dev *dev;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 /* Check mask bits */
2461 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2465 dev = &rte_eth_devices[port_id];
2466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2467 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2471 rte_eth_dev_rss_hash_update(uint16_t port_id,
2472 struct rte_eth_rss_conf *rss_conf)
2474 struct rte_eth_dev *dev;
2476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2477 dev = &rte_eth_devices[port_id];
2478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2479 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2483 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2484 struct rte_eth_rss_conf *rss_conf)
2486 struct rte_eth_dev *dev;
2488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2489 dev = &rte_eth_devices[port_id];
2490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2491 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2495 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2496 struct rte_eth_udp_tunnel *udp_tunnel)
2498 struct rte_eth_dev *dev;
2500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2501 if (udp_tunnel == NULL) {
2502 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2506 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2507 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2511 dev = &rte_eth_devices[port_id];
2512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2513 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2517 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2518 struct rte_eth_udp_tunnel *udp_tunnel)
2520 struct rte_eth_dev *dev;
2522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2523 dev = &rte_eth_devices[port_id];
2525 if (udp_tunnel == NULL) {
2526 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2530 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2531 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2536 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2540 rte_eth_led_on(uint16_t port_id)
2542 struct rte_eth_dev *dev;
2544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2545 dev = &rte_eth_devices[port_id];
2546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2547 return (*dev->dev_ops->dev_led_on)(dev);
2551 rte_eth_led_off(uint16_t port_id)
2553 struct rte_eth_dev *dev;
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2556 dev = &rte_eth_devices[port_id];
2557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2558 return (*dev->dev_ops->dev_led_off)(dev);
2562 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2566 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2568 struct rte_eth_dev_info dev_info;
2569 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2573 rte_eth_dev_info_get(port_id, &dev_info);
2575 for (i = 0; i < dev_info.max_mac_addrs; i++)
2576 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2582 static const struct ether_addr null_mac_addr;
2585 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2588 struct rte_eth_dev *dev;
2593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2594 dev = &rte_eth_devices[port_id];
2595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2597 if (is_zero_ether_addr(addr)) {
2598 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2602 if (pool >= ETH_64_POOLS) {
2603 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2607 index = get_mac_addr_index(port_id, addr);
2609 index = get_mac_addr_index(port_id, &null_mac_addr);
2611 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2616 pool_mask = dev->data->mac_pool_sel[index];
2618 /* Check if both MAC address and pool is already there, and do nothing */
2619 if (pool_mask & (1ULL << pool))
2624 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2627 /* Update address in NIC data structure */
2628 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2630 /* Update pool bitmap in NIC data structure */
2631 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2638 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2640 struct rte_eth_dev *dev;
2643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2644 dev = &rte_eth_devices[port_id];
2645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2647 index = get_mac_addr_index(port_id, addr);
2649 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2651 } else if (index < 0)
2652 return 0; /* Do nothing if address wasn't found */
2655 (*dev->dev_ops->mac_addr_remove)(dev, index);
2657 /* Update address in NIC data structure */
2658 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2660 /* reset pool bitmap */
2661 dev->data->mac_pool_sel[index] = 0;
2667 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2669 struct rte_eth_dev *dev;
2671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2673 if (!is_valid_assigned_ether_addr(addr))
2676 dev = &rte_eth_devices[port_id];
2677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2679 /* Update default address in NIC data structure */
2680 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2682 (*dev->dev_ops->mac_addr_set)(dev, addr);
2689 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2693 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2695 struct rte_eth_dev_info dev_info;
2696 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2699 rte_eth_dev_info_get(port_id, &dev_info);
2700 if (!dev->data->hash_mac_addrs)
2703 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2704 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2705 ETHER_ADDR_LEN) == 0)
2712 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2717 struct rte_eth_dev *dev;
2719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 dev = &rte_eth_devices[port_id];
2722 if (is_zero_ether_addr(addr)) {
2723 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2728 index = get_hash_mac_addr_index(port_id, addr);
2729 /* Check if it's already there, and do nothing */
2730 if ((index >= 0) && on)
2735 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2736 "set in UTA\n", port_id);
2740 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2742 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2749 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2751 /* Update address in NIC data structure */
2753 ether_addr_copy(addr,
2754 &dev->data->hash_mac_addrs[index]);
2756 ether_addr_copy(&null_mac_addr,
2757 &dev->data->hash_mac_addrs[index]);
2764 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2766 struct rte_eth_dev *dev;
2768 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2770 dev = &rte_eth_devices[port_id];
2772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2773 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2776 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2779 struct rte_eth_dev *dev;
2780 struct rte_eth_dev_info dev_info;
2781 struct rte_eth_link link;
2783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2785 dev = &rte_eth_devices[port_id];
2786 rte_eth_dev_info_get(port_id, &dev_info);
2787 link = dev->data->dev_link;
2789 if (queue_idx > dev_info.max_tx_queues) {
2790 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2791 "invalid queue id=%d\n", port_id, queue_idx);
2795 if (tx_rate > link.link_speed) {
2796 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2797 "bigger than link speed= %d\n",
2798 tx_rate, link.link_speed);
2802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2803 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2807 rte_eth_mirror_rule_set(uint16_t port_id,
2808 struct rte_eth_mirror_conf *mirror_conf,
2809 uint8_t rule_id, uint8_t on)
2811 struct rte_eth_dev *dev;
2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2814 if (mirror_conf->rule_type == 0) {
2815 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2819 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2820 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2825 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2826 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2827 (mirror_conf->pool_mask == 0)) {
2828 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2832 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2833 mirror_conf->vlan.vlan_mask == 0) {
2834 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2838 dev = &rte_eth_devices[port_id];
2839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2841 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2845 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2847 struct rte_eth_dev *dev;
2849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2851 dev = &rte_eth_devices[port_id];
2852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2854 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2857 RTE_INIT(eth_dev_init_cb_lists)
2861 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
2862 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
2866 rte_eth_dev_callback_register(uint16_t port_id,
2867 enum rte_eth_event_type event,
2868 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2870 struct rte_eth_dev *dev;
2871 struct rte_eth_dev_callback *user_cb;
2872 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2878 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2879 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2883 if (port_id == RTE_ETH_ALL) {
2885 last_port = RTE_MAX_ETHPORTS - 1;
2887 next_port = last_port = port_id;
2890 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2893 dev = &rte_eth_devices[next_port];
2895 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2896 if (user_cb->cb_fn == cb_fn &&
2897 user_cb->cb_arg == cb_arg &&
2898 user_cb->event == event) {
2903 /* create a new callback. */
2904 if (user_cb == NULL) {
2905 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2906 sizeof(struct rte_eth_dev_callback), 0);
2907 if (user_cb != NULL) {
2908 user_cb->cb_fn = cb_fn;
2909 user_cb->cb_arg = cb_arg;
2910 user_cb->event = event;
2911 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
2914 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2915 rte_eth_dev_callback_unregister(port_id, event,
2921 } while (++next_port <= last_port);
2923 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2928 rte_eth_dev_callback_unregister(uint16_t port_id,
2929 enum rte_eth_event_type event,
2930 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2933 struct rte_eth_dev *dev;
2934 struct rte_eth_dev_callback *cb, *next;
2935 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2941 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2942 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2946 if (port_id == RTE_ETH_ALL) {
2948 last_port = RTE_MAX_ETHPORTS - 1;
2950 next_port = last_port = port_id;
2953 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2956 dev = &rte_eth_devices[next_port];
2958 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
2961 next = TAILQ_NEXT(cb, next);
2963 if (cb->cb_fn != cb_fn || cb->event != event ||
2964 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
2968 * if this callback is not executing right now,
2971 if (cb->active == 0) {
2972 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2978 } while (++next_port <= last_port);
2980 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2985 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2986 enum rte_eth_event_type event, void *ret_param)
2988 struct rte_eth_dev_callback *cb_lst;
2989 struct rte_eth_dev_callback dev_cb;
2992 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2993 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2994 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2998 if (ret_param != NULL)
2999 dev_cb.ret_param = ret_param;
3001 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3002 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3003 dev_cb.cb_arg, dev_cb.ret_param);
3004 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3007 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3012 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3015 struct rte_eth_dev *dev;
3016 struct rte_intr_handle *intr_handle;
3020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3022 dev = &rte_eth_devices[port_id];
3024 if (!dev->intr_handle) {
3025 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3029 intr_handle = dev->intr_handle;
3030 if (!intr_handle->intr_vec) {
3031 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3035 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3036 vec = intr_handle->intr_vec[qid];
3037 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3038 if (rc && rc != -EEXIST) {
3039 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3040 " op %d epfd %d vec %u\n",
3041 port_id, qid, op, epfd, vec);
3048 const struct rte_memzone *
3049 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3050 uint16_t queue_id, size_t size, unsigned align,
3053 char z_name[RTE_MEMZONE_NAMESIZE];
3054 const struct rte_memzone *mz;
3056 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3057 dev->device->driver->name, ring_name,
3058 dev->data->port_id, queue_id);
3060 mz = rte_memzone_lookup(z_name);
3064 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3068 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3069 int epfd, int op, void *data)
3072 struct rte_eth_dev *dev;
3073 struct rte_intr_handle *intr_handle;
3076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3078 dev = &rte_eth_devices[port_id];
3079 if (queue_id >= dev->data->nb_rx_queues) {
3080 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3084 if (!dev->intr_handle) {
3085 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3089 intr_handle = dev->intr_handle;
3090 if (!intr_handle->intr_vec) {
3091 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3095 vec = intr_handle->intr_vec[queue_id];
3096 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3097 if (rc && rc != -EEXIST) {
3098 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3099 " op %d epfd %d vec %u\n",
3100 port_id, queue_id, op, epfd, vec);
3108 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3111 struct rte_eth_dev *dev;
3113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3115 dev = &rte_eth_devices[port_id];
3117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3118 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3122 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3125 struct rte_eth_dev *dev;
3127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3129 dev = &rte_eth_devices[port_id];
3131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3132 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3137 rte_eth_dev_filter_supported(uint16_t port_id,
3138 enum rte_filter_type filter_type)
3140 struct rte_eth_dev *dev;
3142 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144 dev = &rte_eth_devices[port_id];
3145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3146 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3147 RTE_ETH_FILTER_NOP, NULL);
3151 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3152 enum rte_filter_op filter_op, void *arg)
3154 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3158 dev = &rte_eth_devices[port_id];
3159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3160 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3164 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3165 rte_rx_callback_fn fn, void *user_param)
3167 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3168 rte_errno = ENOTSUP;
3171 /* check input parameters */
3172 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3173 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3177 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3185 cb->param = user_param;
3187 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3188 /* Add the callbacks in fifo order. */
3189 struct rte_eth_rxtx_callback *tail =
3190 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3193 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3200 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3206 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3207 rte_rx_callback_fn fn, void *user_param)
3209 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3210 rte_errno = ENOTSUP;
3213 /* check input parameters */
3214 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3215 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3220 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3228 cb->param = user_param;
3230 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3231 /* Add the callbacks at fisrt position*/
3232 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3234 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3235 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3241 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3242 rte_tx_callback_fn fn, void *user_param)
3244 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3245 rte_errno = ENOTSUP;
3248 /* check input parameters */
3249 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3250 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3255 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3263 cb->param = user_param;
3265 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3266 /* Add the callbacks in fifo order. */
3267 struct rte_eth_rxtx_callback *tail =
3268 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3271 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3278 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3284 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3285 struct rte_eth_rxtx_callback *user_cb)
3287 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3290 /* Check input parameters. */
3291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3292 if (user_cb == NULL ||
3293 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3296 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3297 struct rte_eth_rxtx_callback *cb;
3298 struct rte_eth_rxtx_callback **prev_cb;
3301 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3302 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3303 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3305 if (cb == user_cb) {
3306 /* Remove the user cb from the callback list. */
3307 *prev_cb = cb->next;
3312 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3318 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3319 struct rte_eth_rxtx_callback *user_cb)
3321 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3324 /* Check input parameters. */
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3326 if (user_cb == NULL ||
3327 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3330 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3332 struct rte_eth_rxtx_callback *cb;
3333 struct rte_eth_rxtx_callback **prev_cb;
3335 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3336 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3337 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3339 if (cb == user_cb) {
3340 /* Remove the user cb from the callback list. */
3341 *prev_cb = cb->next;
3346 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3352 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3353 struct rte_eth_rxq_info *qinfo)
3355 struct rte_eth_dev *dev;
3357 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3362 dev = &rte_eth_devices[port_id];
3363 if (queue_id >= dev->data->nb_rx_queues) {
3364 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3370 memset(qinfo, 0, sizeof(*qinfo));
3371 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3376 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3377 struct rte_eth_txq_info *qinfo)
3379 struct rte_eth_dev *dev;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3386 dev = &rte_eth_devices[port_id];
3387 if (queue_id >= dev->data->nb_tx_queues) {
3388 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3394 memset(qinfo, 0, sizeof(*qinfo));
3395 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3400 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3401 struct ether_addr *mc_addr_set,
3402 uint32_t nb_mc_addr)
3404 struct rte_eth_dev *dev;
3406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3408 dev = &rte_eth_devices[port_id];
3409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3410 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3414 rte_eth_timesync_enable(uint16_t port_id)
3416 struct rte_eth_dev *dev;
3418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3419 dev = &rte_eth_devices[port_id];
3421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3422 return (*dev->dev_ops->timesync_enable)(dev);
3426 rte_eth_timesync_disable(uint16_t port_id)
3428 struct rte_eth_dev *dev;
3430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3431 dev = &rte_eth_devices[port_id];
3433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3434 return (*dev->dev_ops->timesync_disable)(dev);
3438 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3441 struct rte_eth_dev *dev;
3443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3444 dev = &rte_eth_devices[port_id];
3446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3447 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3451 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3452 struct timespec *timestamp)
3454 struct rte_eth_dev *dev;
3456 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3457 dev = &rte_eth_devices[port_id];
3459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3460 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3464 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3466 struct rte_eth_dev *dev;
3468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3469 dev = &rte_eth_devices[port_id];
3471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3472 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3476 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3478 struct rte_eth_dev *dev;
3480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3481 dev = &rte_eth_devices[port_id];
3483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3484 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3488 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3490 struct rte_eth_dev *dev;
3492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3493 dev = &rte_eth_devices[port_id];
3495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3496 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3500 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3502 struct rte_eth_dev *dev;
3504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3506 dev = &rte_eth_devices[port_id];
3507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3508 return (*dev->dev_ops->get_reg)(dev, info);
3512 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3514 struct rte_eth_dev *dev;
3516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3518 dev = &rte_eth_devices[port_id];
3519 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3520 return (*dev->dev_ops->get_eeprom_length)(dev);
3524 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3526 struct rte_eth_dev *dev;
3528 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3530 dev = &rte_eth_devices[port_id];
3531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3532 return (*dev->dev_ops->get_eeprom)(dev, info);
3536 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3538 struct rte_eth_dev *dev;
3540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3542 dev = &rte_eth_devices[port_id];
3543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3544 return (*dev->dev_ops->set_eeprom)(dev, info);
3548 rte_eth_dev_get_dcb_info(uint16_t port_id,
3549 struct rte_eth_dcb_info *dcb_info)
3551 struct rte_eth_dev *dev;
3553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3555 dev = &rte_eth_devices[port_id];
3556 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3559 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3563 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3564 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3566 struct rte_eth_dev *dev;
3568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3569 if (l2_tunnel == NULL) {
3570 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3574 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3575 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3579 dev = &rte_eth_devices[port_id];
3580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3582 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3586 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3587 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3591 struct rte_eth_dev *dev;
3593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3595 if (l2_tunnel == NULL) {
3596 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3600 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3601 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3606 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3610 dev = &rte_eth_devices[port_id];
3611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3613 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3617 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3618 const struct rte_eth_desc_lim *desc_lim)
3620 if (desc_lim->nb_align != 0)
3621 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3623 if (desc_lim->nb_max != 0)
3624 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3626 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3630 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3631 uint16_t *nb_rx_desc,
3632 uint16_t *nb_tx_desc)
3634 struct rte_eth_dev *dev;
3635 struct rte_eth_dev_info dev_info;
3637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3639 dev = &rte_eth_devices[port_id];
3640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3642 rte_eth_dev_info_get(port_id, &dev_info);
3644 if (nb_rx_desc != NULL)
3645 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3647 if (nb_tx_desc != NULL)
3648 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3654 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3656 struct rte_eth_dev *dev;
3658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3663 dev = &rte_eth_devices[port_id];
3665 if (*dev->dev_ops->pool_ops_supported == NULL)
3666 return 1; /* all pools are supported */
3668 return (*dev->dev_ops->pool_ops_supported)(dev, pool);