4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
97 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
98 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
102 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
104 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
105 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
106 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
107 {"errors", offsetof(struct rte_eth_stats, q_errors)},
110 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
111 sizeof(rte_rxq_stats_strings[0]))
113 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
114 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
115 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
117 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
118 sizeof(rte_txq_stats_strings[0]))
122 * The user application callback description.
124 * It contains callback address to be registered by user application,
125 * the pointer to the parameters for callback, and the event type.
127 struct rte_eth_dev_callback {
128 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
129 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
130 void *cb_arg; /**< Parameter for callback */
131 void *ret_param; /**< Return parameter */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
182 rte_eth_devices[i].device) {
183 if (!strcmp(rte_eth_devices[i].device->name, name))
184 return &rte_eth_devices[i];
191 rte_eth_dev_find_free_port(void)
195 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
196 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
199 return RTE_MAX_ETHPORTS;
202 static struct rte_eth_dev *
203 eth_dev_get(uint8_t port_id)
205 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
207 eth_dev->data = &rte_eth_dev_data[port_id];
208 eth_dev->state = RTE_ETH_DEV_ATTACHED;
209 TAILQ_INIT(&(eth_dev->link_intr_cbs));
211 eth_dev_last_created_port = port_id;
217 rte_eth_dev_allocate(const char *name)
220 struct rte_eth_dev *eth_dev;
222 port_id = rte_eth_dev_find_free_port();
223 if (port_id == RTE_MAX_ETHPORTS) {
224 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
228 if (rte_eth_dev_data == NULL)
229 rte_eth_dev_data_alloc();
231 if (rte_eth_dev_allocated(name) != NULL) {
232 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
237 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
238 eth_dev = eth_dev_get(port_id);
239 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
240 eth_dev->data->port_id = port_id;
241 eth_dev->data->mtu = ETHER_MTU;
247 * Attach to a port already registered by the primary process, which
248 * makes sure that the same device would have the same port id both
249 * in the primary and secondary process.
252 rte_eth_dev_attach_secondary(const char *name)
255 struct rte_eth_dev *eth_dev;
257 if (rte_eth_dev_data == NULL)
258 rte_eth_dev_data_alloc();
260 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
261 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
264 if (i == RTE_MAX_ETHPORTS) {
266 "device %s is not driven by the primary process\n",
271 eth_dev = eth_dev_get(i);
272 RTE_ASSERT(eth_dev->data->port_id == i);
278 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
283 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
292 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
299 rte_eth_dev_socket_id(uint8_t port_id)
301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
302 return rte_eth_devices[port_id].data->numa_node;
306 rte_eth_dev_count(void)
313 RTE_ETH_FOREACH_DEV(p)
320 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
327 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
331 /* shouldn't check 'rte_eth_devices[i].data',
332 * because it might be overwritten by VDEV PMD */
333 tmp = rte_eth_devices[port_id].device->name;
339 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
345 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
349 RTE_ETH_FOREACH_DEV(i) {
350 if (!rte_eth_devices[i].device)
353 ret = strncmp(name, rte_eth_devices[i].device->name,
364 rte_eth_dev_is_detachable(uint8_t port_id)
368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
370 switch (rte_eth_devices[port_id].data->kdrv) {
371 case RTE_KDRV_IGB_UIO:
372 case RTE_KDRV_UIO_GENERIC:
373 case RTE_KDRV_NIC_UIO:
380 dev_flags = rte_eth_devices[port_id].data->dev_flags;
381 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
382 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
388 /* attach the new device, then store port_id of the device */
390 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
393 int current = rte_eth_dev_count();
397 if ((devargs == NULL) || (port_id == NULL)) {
402 /* parse devargs, then retrieve device name and args */
403 if (rte_eal_parse_devargs_str(devargs, &name, &args))
406 ret = rte_eal_dev_attach(name, args);
410 /* no point looking at the port count if no port exists */
411 if (!rte_eth_dev_count()) {
412 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
417 /* if nothing happened, there is a bug here, since some driver told us
418 * it did attach a device, but did not create a port.
420 if (current == rte_eth_dev_count()) {
425 *port_id = eth_dev_last_created_port;
434 /* detach the device, then store the name of the device */
436 rte_eth_dev_detach(uint8_t port_id, char *name)
445 /* FIXME: move this to eal, once device flags are relocated there */
446 if (rte_eth_dev_is_detachable(port_id))
449 snprintf(name, sizeof(rte_eth_devices[port_id].device->name),
450 "%s", rte_eth_devices[port_id].device->name);
452 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
463 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
465 uint16_t old_nb_queues = dev->data->nb_rx_queues;
469 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
470 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
471 sizeof(dev->data->rx_queues[0]) * nb_queues,
472 RTE_CACHE_LINE_SIZE);
473 if (dev->data->rx_queues == NULL) {
474 dev->data->nb_rx_queues = 0;
477 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
480 rxq = dev->data->rx_queues;
482 for (i = nb_queues; i < old_nb_queues; i++)
483 (*dev->dev_ops->rx_queue_release)(rxq[i]);
484 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
485 RTE_CACHE_LINE_SIZE);
488 if (nb_queues > old_nb_queues) {
489 uint16_t new_qs = nb_queues - old_nb_queues;
491 memset(rxq + old_nb_queues, 0,
492 sizeof(rxq[0]) * new_qs);
495 dev->data->rx_queues = rxq;
497 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
500 rxq = dev->data->rx_queues;
502 for (i = nb_queues; i < old_nb_queues; i++)
503 (*dev->dev_ops->rx_queue_release)(rxq[i]);
505 rte_free(dev->data->rx_queues);
506 dev->data->rx_queues = NULL;
508 dev->data->nb_rx_queues = nb_queues;
513 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
515 struct rte_eth_dev *dev;
517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
519 dev = &rte_eth_devices[port_id];
520 if (rx_queue_id >= dev->data->nb_rx_queues) {
521 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
527 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
528 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
529 " already started\n",
530 rx_queue_id, port_id);
534 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
539 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
541 struct rte_eth_dev *dev;
543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
545 dev = &rte_eth_devices[port_id];
546 if (rx_queue_id >= dev->data->nb_rx_queues) {
547 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
553 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
554 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
555 " already stopped\n",
556 rx_queue_id, port_id);
560 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
565 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
567 struct rte_eth_dev *dev;
569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
571 dev = &rte_eth_devices[port_id];
572 if (tx_queue_id >= dev->data->nb_tx_queues) {
573 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
579 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
580 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
581 " already started\n",
582 tx_queue_id, port_id);
586 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
591 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
593 struct rte_eth_dev *dev;
595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
597 dev = &rte_eth_devices[port_id];
598 if (tx_queue_id >= dev->data->nb_tx_queues) {
599 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
605 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
606 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
607 " already stopped\n",
608 tx_queue_id, port_id);
612 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
617 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
619 uint16_t old_nb_queues = dev->data->nb_tx_queues;
623 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
624 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
625 sizeof(dev->data->tx_queues[0]) * nb_queues,
626 RTE_CACHE_LINE_SIZE);
627 if (dev->data->tx_queues == NULL) {
628 dev->data->nb_tx_queues = 0;
631 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
634 txq = dev->data->tx_queues;
636 for (i = nb_queues; i < old_nb_queues; i++)
637 (*dev->dev_ops->tx_queue_release)(txq[i]);
638 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
639 RTE_CACHE_LINE_SIZE);
642 if (nb_queues > old_nb_queues) {
643 uint16_t new_qs = nb_queues - old_nb_queues;
645 memset(txq + old_nb_queues, 0,
646 sizeof(txq[0]) * new_qs);
649 dev->data->tx_queues = txq;
651 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
654 txq = dev->data->tx_queues;
656 for (i = nb_queues; i < old_nb_queues; i++)
657 (*dev->dev_ops->tx_queue_release)(txq[i]);
659 rte_free(dev->data->tx_queues);
660 dev->data->tx_queues = NULL;
662 dev->data->nb_tx_queues = nb_queues;
667 rte_eth_speed_bitflag(uint32_t speed, int duplex)
670 case ETH_SPEED_NUM_10M:
671 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
672 case ETH_SPEED_NUM_100M:
673 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
674 case ETH_SPEED_NUM_1G:
675 return ETH_LINK_SPEED_1G;
676 case ETH_SPEED_NUM_2_5G:
677 return ETH_LINK_SPEED_2_5G;
678 case ETH_SPEED_NUM_5G:
679 return ETH_LINK_SPEED_5G;
680 case ETH_SPEED_NUM_10G:
681 return ETH_LINK_SPEED_10G;
682 case ETH_SPEED_NUM_20G:
683 return ETH_LINK_SPEED_20G;
684 case ETH_SPEED_NUM_25G:
685 return ETH_LINK_SPEED_25G;
686 case ETH_SPEED_NUM_40G:
687 return ETH_LINK_SPEED_40G;
688 case ETH_SPEED_NUM_50G:
689 return ETH_LINK_SPEED_50G;
690 case ETH_SPEED_NUM_56G:
691 return ETH_LINK_SPEED_56G;
692 case ETH_SPEED_NUM_100G:
693 return ETH_LINK_SPEED_100G;
700 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
701 const struct rte_eth_conf *dev_conf)
703 struct rte_eth_dev *dev;
704 struct rte_eth_dev_info dev_info;
707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
709 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
711 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
712 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
716 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
718 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
719 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
723 dev = &rte_eth_devices[port_id];
725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
726 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
728 if (dev->data->dev_started) {
730 "port %d must be stopped to allow configuration\n", port_id);
734 /* Copy the dev_conf parameter into the dev structure */
735 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
738 * Check that the numbers of RX and TX queues are not greater
739 * than the maximum number of RX and TX queues supported by the
742 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
744 if (nb_rx_q == 0 && nb_tx_q == 0) {
745 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
749 if (nb_rx_q > dev_info.max_rx_queues) {
750 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
751 port_id, nb_rx_q, dev_info.max_rx_queues);
755 if (nb_tx_q > dev_info.max_tx_queues) {
756 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
757 port_id, nb_tx_q, dev_info.max_tx_queues);
761 /* Check that the device supports requested interrupts */
762 if ((dev_conf->intr_conf.lsc == 1) &&
763 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
764 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
765 dev->device->driver->name);
768 if ((dev_conf->intr_conf.rmv == 1) &&
769 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
770 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
771 dev->device->driver->name);
776 * If jumbo frames are enabled, check that the maximum RX packet
777 * length is supported by the configured device.
779 if (dev_conf->rxmode.jumbo_frame == 1) {
780 if (dev_conf->rxmode.max_rx_pkt_len >
781 dev_info.max_rx_pktlen) {
782 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
783 " > max valid value %u\n",
785 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
786 (unsigned)dev_info.max_rx_pktlen);
788 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
789 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
790 " < min valid value %u\n",
792 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
793 (unsigned)ETHER_MIN_LEN);
797 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
798 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
799 /* Use default value */
800 dev->data->dev_conf.rxmode.max_rx_pkt_len =
805 * Setup new number of RX/TX queues and reconfigure device.
807 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
809 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
814 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
816 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
818 rte_eth_dev_rx_queue_config(dev, 0);
822 diag = (*dev->dev_ops->dev_configure)(dev);
824 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
826 rte_eth_dev_rx_queue_config(dev, 0);
827 rte_eth_dev_tx_queue_config(dev, 0);
835 _rte_eth_dev_reset(struct rte_eth_dev *dev)
837 if (dev->data->dev_started) {
839 "port %d must be stopped to allow reset\n",
844 rte_eth_dev_rx_queue_config(dev, 0);
845 rte_eth_dev_tx_queue_config(dev, 0);
847 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
851 rte_eth_dev_config_restore(uint8_t port_id)
853 struct rte_eth_dev *dev;
854 struct rte_eth_dev_info dev_info;
855 struct ether_addr *addr;
860 dev = &rte_eth_devices[port_id];
862 rte_eth_dev_info_get(port_id, &dev_info);
864 /* replay MAC address configuration including default MAC */
865 addr = &dev->data->mac_addrs[0];
866 if (*dev->dev_ops->mac_addr_set != NULL)
867 (*dev->dev_ops->mac_addr_set)(dev, addr);
868 else if (*dev->dev_ops->mac_addr_add != NULL)
869 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
871 if (*dev->dev_ops->mac_addr_add != NULL) {
872 for (i = 1; i < dev_info.max_mac_addrs; i++) {
873 addr = &dev->data->mac_addrs[i];
875 /* skip zero address */
876 if (is_zero_ether_addr(addr))
880 pool_mask = dev->data->mac_pool_sel[i];
883 if (pool_mask & 1ULL)
884 (*dev->dev_ops->mac_addr_add)(dev,
892 /* replay promiscuous configuration */
893 if (rte_eth_promiscuous_get(port_id) == 1)
894 rte_eth_promiscuous_enable(port_id);
895 else if (rte_eth_promiscuous_get(port_id) == 0)
896 rte_eth_promiscuous_disable(port_id);
898 /* replay all multicast configuration */
899 if (rte_eth_allmulticast_get(port_id) == 1)
900 rte_eth_allmulticast_enable(port_id);
901 else if (rte_eth_allmulticast_get(port_id) == 0)
902 rte_eth_allmulticast_disable(port_id);
906 rte_eth_dev_start(uint8_t port_id)
908 struct rte_eth_dev *dev;
911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
913 dev = &rte_eth_devices[port_id];
915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
917 if (dev->data->dev_started != 0) {
918 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
919 " already started\n",
924 diag = (*dev->dev_ops->dev_start)(dev);
926 dev->data->dev_started = 1;
930 rte_eth_dev_config_restore(port_id);
932 if (dev->data->dev_conf.intr_conf.lsc == 0) {
933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
934 (*dev->dev_ops->link_update)(dev, 0);
940 rte_eth_dev_stop(uint8_t port_id)
942 struct rte_eth_dev *dev;
944 RTE_ETH_VALID_PORTID_OR_RET(port_id);
945 dev = &rte_eth_devices[port_id];
947 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
949 if (dev->data->dev_started == 0) {
950 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
951 " already stopped\n",
956 dev->data->dev_started = 0;
957 (*dev->dev_ops->dev_stop)(dev);
961 rte_eth_dev_set_link_up(uint8_t port_id)
963 struct rte_eth_dev *dev;
965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
967 dev = &rte_eth_devices[port_id];
969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
970 return (*dev->dev_ops->dev_set_link_up)(dev);
974 rte_eth_dev_set_link_down(uint8_t port_id)
976 struct rte_eth_dev *dev;
978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
980 dev = &rte_eth_devices[port_id];
982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
983 return (*dev->dev_ops->dev_set_link_down)(dev);
987 rte_eth_dev_close(uint8_t port_id)
989 struct rte_eth_dev *dev;
991 RTE_ETH_VALID_PORTID_OR_RET(port_id);
992 dev = &rte_eth_devices[port_id];
994 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
995 dev->data->dev_started = 0;
996 (*dev->dev_ops->dev_close)(dev);
998 dev->data->nb_rx_queues = 0;
999 rte_free(dev->data->rx_queues);
1000 dev->data->rx_queues = NULL;
1001 dev->data->nb_tx_queues = 0;
1002 rte_free(dev->data->tx_queues);
1003 dev->data->tx_queues = NULL;
1007 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1008 uint16_t nb_rx_desc, unsigned int socket_id,
1009 const struct rte_eth_rxconf *rx_conf,
1010 struct rte_mempool *mp)
1013 uint32_t mbp_buf_size;
1014 struct rte_eth_dev *dev;
1015 struct rte_eth_dev_info dev_info;
1018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1020 dev = &rte_eth_devices[port_id];
1021 if (rx_queue_id >= dev->data->nb_rx_queues) {
1022 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1026 if (dev->data->dev_started) {
1027 RTE_PMD_DEBUG_TRACE(
1028 "port %d must be stopped to allow configuration\n", port_id);
1032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1033 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1036 * Check the size of the mbuf data buffer.
1037 * This value must be provided in the private data of the memory pool.
1038 * First check that the memory pool has a valid private data.
1040 rte_eth_dev_info_get(port_id, &dev_info);
1041 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1042 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1043 mp->name, (int) mp->private_data_size,
1044 (int) sizeof(struct rte_pktmbuf_pool_private));
1047 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1049 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1050 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1051 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1055 (int)(RTE_PKTMBUF_HEADROOM +
1056 dev_info.min_rx_bufsize),
1057 (int)RTE_PKTMBUF_HEADROOM,
1058 (int)dev_info.min_rx_bufsize);
1062 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1063 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1064 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1066 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1067 "should be: <= %hu, = %hu, and a product of %hu\n",
1069 dev_info.rx_desc_lim.nb_max,
1070 dev_info.rx_desc_lim.nb_min,
1071 dev_info.rx_desc_lim.nb_align);
1075 rxq = dev->data->rx_queues;
1076 if (rxq[rx_queue_id]) {
1077 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1079 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1080 rxq[rx_queue_id] = NULL;
1083 if (rx_conf == NULL)
1084 rx_conf = &dev_info.default_rxconf;
1086 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1087 socket_id, rx_conf, mp);
1089 if (!dev->data->min_rx_buf_size ||
1090 dev->data->min_rx_buf_size > mbp_buf_size)
1091 dev->data->min_rx_buf_size = mbp_buf_size;
1098 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1099 uint16_t nb_tx_desc, unsigned int socket_id,
1100 const struct rte_eth_txconf *tx_conf)
1102 struct rte_eth_dev *dev;
1103 struct rte_eth_dev_info dev_info;
1106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1108 dev = &rte_eth_devices[port_id];
1109 if (tx_queue_id >= dev->data->nb_tx_queues) {
1110 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1114 if (dev->data->dev_started) {
1115 RTE_PMD_DEBUG_TRACE(
1116 "port %d must be stopped to allow configuration\n", port_id);
1120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1123 rte_eth_dev_info_get(port_id, &dev_info);
1125 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1126 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1127 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1128 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1129 "should be: <= %hu, = %hu, and a product of %hu\n",
1131 dev_info.tx_desc_lim.nb_max,
1132 dev_info.tx_desc_lim.nb_min,
1133 dev_info.tx_desc_lim.nb_align);
1137 txq = dev->data->tx_queues;
1138 if (txq[tx_queue_id]) {
1139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1141 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1142 txq[tx_queue_id] = NULL;
1145 if (tx_conf == NULL)
1146 tx_conf = &dev_info.default_txconf;
1148 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1149 socket_id, tx_conf);
1153 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1154 void *userdata __rte_unused)
1158 for (i = 0; i < unsent; i++)
1159 rte_pktmbuf_free(pkts[i]);
1163 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1166 uint64_t *count = userdata;
1169 for (i = 0; i < unsent; i++)
1170 rte_pktmbuf_free(pkts[i]);
1176 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1177 buffer_tx_error_fn cbfn, void *userdata)
1179 buffer->error_callback = cbfn;
1180 buffer->error_userdata = userdata;
1185 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1192 buffer->size = size;
1193 if (buffer->error_callback == NULL) {
1194 ret = rte_eth_tx_buffer_set_err_callback(
1195 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1202 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1204 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1206 /* Validate Input Data. Bail if not valid or not supported. */
1207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1210 /* Call driver to free pending mbufs. */
1211 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1216 rte_eth_promiscuous_enable(uint8_t port_id)
1218 struct rte_eth_dev *dev;
1220 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1221 dev = &rte_eth_devices[port_id];
1223 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1224 (*dev->dev_ops->promiscuous_enable)(dev);
1225 dev->data->promiscuous = 1;
1229 rte_eth_promiscuous_disable(uint8_t port_id)
1231 struct rte_eth_dev *dev;
1233 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1234 dev = &rte_eth_devices[port_id];
1236 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1237 dev->data->promiscuous = 0;
1238 (*dev->dev_ops->promiscuous_disable)(dev);
1242 rte_eth_promiscuous_get(uint8_t port_id)
1244 struct rte_eth_dev *dev;
1246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1248 dev = &rte_eth_devices[port_id];
1249 return dev->data->promiscuous;
1253 rte_eth_allmulticast_enable(uint8_t port_id)
1255 struct rte_eth_dev *dev;
1257 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1258 dev = &rte_eth_devices[port_id];
1260 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1261 (*dev->dev_ops->allmulticast_enable)(dev);
1262 dev->data->all_multicast = 1;
1266 rte_eth_allmulticast_disable(uint8_t port_id)
1268 struct rte_eth_dev *dev;
1270 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1271 dev = &rte_eth_devices[port_id];
1273 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1274 dev->data->all_multicast = 0;
1275 (*dev->dev_ops->allmulticast_disable)(dev);
1279 rte_eth_allmulticast_get(uint8_t port_id)
1281 struct rte_eth_dev *dev;
1283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1285 dev = &rte_eth_devices[port_id];
1286 return dev->data->all_multicast;
1290 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1291 struct rte_eth_link *link)
1293 struct rte_eth_link *dst = link;
1294 struct rte_eth_link *src = &(dev->data->dev_link);
1296 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1297 *(uint64_t *)src) == 0)
1304 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1306 struct rte_eth_dev *dev;
1308 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1309 dev = &rte_eth_devices[port_id];
1311 if (dev->data->dev_conf.intr_conf.lsc != 0)
1312 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1314 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1315 (*dev->dev_ops->link_update)(dev, 1);
1316 *eth_link = dev->data->dev_link;
1321 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1323 struct rte_eth_dev *dev;
1325 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1326 dev = &rte_eth_devices[port_id];
1328 if (dev->data->dev_conf.intr_conf.lsc != 0)
1329 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1331 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1332 (*dev->dev_ops->link_update)(dev, 0);
1333 *eth_link = dev->data->dev_link;
1338 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1340 struct rte_eth_dev *dev;
1342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1344 dev = &rte_eth_devices[port_id];
1345 memset(stats, 0, sizeof(*stats));
1347 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1348 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1349 (*dev->dev_ops->stats_get)(dev, stats);
1354 rte_eth_stats_reset(uint8_t port_id)
1356 struct rte_eth_dev *dev;
1358 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1359 dev = &rte_eth_devices[port_id];
1361 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1362 (*dev->dev_ops->stats_reset)(dev);
1363 dev->data->rx_mbuf_alloc_failed = 0;
1367 get_xstats_count(uint8_t port_id)
1369 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1373 dev = &rte_eth_devices[port_id];
1374 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1375 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1380 if (dev->dev_ops->xstats_get_names != NULL) {
1381 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1387 count += RTE_NB_STATS;
1388 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1390 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1396 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1399 int cnt_xstats, idx_xstat;
1401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1404 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1409 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1414 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1415 if (cnt_xstats < 0) {
1416 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1420 /* Get id-name lookup table */
1421 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1423 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1424 port_id, xstats_names, cnt_xstats, NULL)) {
1425 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1429 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1430 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1440 rte_eth_xstats_get_names_by_id(uint8_t port_id,
1441 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1444 /* Get all xstats */
1446 struct rte_eth_dev *dev;
1447 int cnt_used_entries;
1448 int cnt_expected_entries;
1449 int cnt_driver_entries;
1450 uint32_t idx, id_queue;
1453 cnt_expected_entries = get_xstats_count(port_id);
1454 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1455 (int)size < cnt_expected_entries)
1456 return cnt_expected_entries;
1458 /* port_id checked in get_xstats_count() */
1459 dev = &rte_eth_devices[port_id];
1460 cnt_used_entries = 0;
1462 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1463 snprintf(xstats_names[cnt_used_entries].name,
1464 sizeof(xstats_names[0].name),
1465 "%s", rte_stats_strings[idx].name);
1468 num_q = RTE_MIN(dev->data->nb_rx_queues,
1469 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1470 for (id_queue = 0; id_queue < num_q; id_queue++) {
1471 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1472 snprintf(xstats_names[cnt_used_entries].name,
1473 sizeof(xstats_names[0].name),
1476 rte_rxq_stats_strings[idx].name);
1481 num_q = RTE_MIN(dev->data->nb_tx_queues,
1482 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1483 for (id_queue = 0; id_queue < num_q; id_queue++) {
1484 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1485 snprintf(xstats_names[cnt_used_entries].name,
1486 sizeof(xstats_names[0].name),
1489 rte_txq_stats_strings[idx].name);
1494 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1495 /* If there are any driver-specific xstats, append them
1498 cnt_driver_entries =
1499 (*dev->dev_ops->xstats_get_names_by_id)(
1501 xstats_names + cnt_used_entries,
1503 size - cnt_used_entries);
1504 if (cnt_driver_entries < 0)
1505 return cnt_driver_entries;
1506 cnt_used_entries += cnt_driver_entries;
1508 } else if (dev->dev_ops->xstats_get_names != NULL) {
1509 /* If there are any driver-specific xstats, append them
1512 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1514 xstats_names + cnt_used_entries,
1515 size - cnt_used_entries);
1516 if (cnt_driver_entries < 0)
1517 return cnt_driver_entries;
1518 cnt_used_entries += cnt_driver_entries;
1521 return cnt_used_entries;
1523 /* Get only xstats given by IDS */
1526 struct rte_eth_xstat_name *xstats_names_copy;
1528 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1531 malloc(sizeof(struct rte_eth_xstat_name) * len);
1532 if (!xstats_names_copy) {
1533 RTE_PMD_DEBUG_TRACE(
1534 "ERROR: can't allocate memory for values_copy\n");
1535 free(xstats_names_copy);
1539 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1542 for (i = 0; i < size; i++) {
1543 if (ids[i] >= len) {
1544 RTE_PMD_DEBUG_TRACE(
1545 "ERROR: id value isn't valid\n");
1548 strcpy(xstats_names[i].name,
1549 xstats_names_copy[ids[i]].name);
1551 free(xstats_names_copy);
1557 rte_eth_xstats_get_names(uint8_t port_id,
1558 struct rte_eth_xstat_name *xstats_names,
1561 struct rte_eth_dev *dev;
1562 int cnt_used_entries;
1563 int cnt_expected_entries;
1564 int cnt_driver_entries;
1565 uint32_t idx, id_queue;
1568 cnt_expected_entries = get_xstats_count(port_id);
1569 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1570 (int)size < cnt_expected_entries)
1571 return cnt_expected_entries;
1573 /* port_id checked in get_xstats_count() */
1574 dev = &rte_eth_devices[port_id];
1575 cnt_used_entries = 0;
1577 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1578 snprintf(xstats_names[cnt_used_entries].name,
1579 sizeof(xstats_names[0].name),
1580 "%s", rte_stats_strings[idx].name);
1583 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1584 for (id_queue = 0; id_queue < num_q; id_queue++) {
1585 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1586 snprintf(xstats_names[cnt_used_entries].name,
1587 sizeof(xstats_names[0].name),
1589 id_queue, rte_rxq_stats_strings[idx].name);
1594 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1595 for (id_queue = 0; id_queue < num_q; id_queue++) {
1596 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1597 snprintf(xstats_names[cnt_used_entries].name,
1598 sizeof(xstats_names[0].name),
1600 id_queue, rte_txq_stats_strings[idx].name);
1605 if (dev->dev_ops->xstats_get_names != NULL) {
1606 /* If there are any driver-specific xstats, append them
1609 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1611 xstats_names + cnt_used_entries,
1612 size - cnt_used_entries);
1613 if (cnt_driver_entries < 0)
1614 return cnt_driver_entries;
1615 cnt_used_entries += cnt_driver_entries;
1618 return cnt_used_entries;
1621 /* retrieve ethdev extended statistics */
1623 rte_eth_xstats_get_by_id(uint8_t port_id, const uint64_t *ids, uint64_t *values,
1626 /* If need all xstats */
1628 struct rte_eth_stats eth_stats;
1629 struct rte_eth_dev *dev;
1630 unsigned int count = 0, i, q;
1631 signed int xcount = 0;
1632 uint64_t val, *stats_ptr;
1633 uint16_t nb_rxqs, nb_txqs;
1635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1636 dev = &rte_eth_devices[port_id];
1638 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1639 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1640 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1641 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1643 /* Return generic statistics */
1644 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1645 (nb_txqs * RTE_NB_TXQ_STATS);
1648 /* implemented by the driver */
1649 if (dev->dev_ops->xstats_get_by_id != NULL) {
1650 /* Retrieve the xstats from the driver at the end of the
1651 * xstats struct. Retrieve all xstats.
1653 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1655 values ? values + count : NULL,
1656 (n > count) ? n - count : 0);
1660 /* implemented by the driver */
1661 } else if (dev->dev_ops->xstats_get != NULL) {
1662 /* Retrieve the xstats from the driver at the end of the
1663 * xstats struct. Retrieve all xstats.
1664 * Compatibility for PMD without xstats_get_by_ids
1666 unsigned int size = (n > count) ? n - count : 1;
1667 struct rte_eth_xstat xstats[size];
1669 xcount = (*dev->dev_ops->xstats_get)(dev,
1670 values ? xstats : NULL, size);
1676 for (i = 0 ; i < (unsigned int)xcount; i++)
1677 values[i + count] = xstats[i].value;
1680 if (n < count + xcount || values == NULL)
1681 return count + xcount;
1683 /* now fill the xstats structure */
1685 rte_eth_stats_get(port_id, ð_stats);
1688 for (i = 0; i < RTE_NB_STATS; i++) {
1689 stats_ptr = RTE_PTR_ADD(ð_stats,
1690 rte_stats_strings[i].offset);
1692 values[count++] = val;
1696 for (q = 0; q < nb_rxqs; q++) {
1697 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1698 stats_ptr = RTE_PTR_ADD(ð_stats,
1699 rte_rxq_stats_strings[i].offset +
1700 q * sizeof(uint64_t));
1702 values[count++] = val;
1707 for (q = 0; q < nb_txqs; q++) {
1708 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1709 stats_ptr = RTE_PTR_ADD(ð_stats,
1710 rte_txq_stats_strings[i].offset +
1711 q * sizeof(uint64_t));
1713 values[count++] = val;
1717 return count + xcount;
1719 /* Need only xstats given by IDS array */
1722 uint64_t *values_copy;
1724 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1726 values_copy = malloc(sizeof(*values_copy) * size);
1728 RTE_PMD_DEBUG_TRACE(
1729 "ERROR: can't allocate memory for values_copy\n");
1733 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1735 for (i = 0; i < n; i++) {
1736 if (ids[i] >= size) {
1737 RTE_PMD_DEBUG_TRACE(
1738 "ERROR: id value isn't valid\n");
1741 values[i] = values_copy[ids[i]];
1749 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1752 struct rte_eth_stats eth_stats;
1753 struct rte_eth_dev *dev;
1754 unsigned int count = 0, i, q;
1755 signed int xcount = 0;
1756 uint64_t val, *stats_ptr;
1757 uint16_t nb_rxqs, nb_txqs;
1759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1761 dev = &rte_eth_devices[port_id];
1763 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1764 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1766 /* Return generic statistics */
1767 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1768 (nb_txqs * RTE_NB_TXQ_STATS);
1770 /* implemented by the driver */
1771 if (dev->dev_ops->xstats_get != NULL) {
1772 /* Retrieve the xstats from the driver at the end of the
1775 xcount = (*dev->dev_ops->xstats_get)(dev,
1776 xstats ? xstats + count : NULL,
1777 (n > count) ? n - count : 0);
1783 if (n < count + xcount || xstats == NULL)
1784 return count + xcount;
1786 /* now fill the xstats structure */
1788 rte_eth_stats_get(port_id, ð_stats);
1791 for (i = 0; i < RTE_NB_STATS; i++) {
1792 stats_ptr = RTE_PTR_ADD(ð_stats,
1793 rte_stats_strings[i].offset);
1795 xstats[count++].value = val;
1799 for (q = 0; q < nb_rxqs; q++) {
1800 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1801 stats_ptr = RTE_PTR_ADD(ð_stats,
1802 rte_rxq_stats_strings[i].offset +
1803 q * sizeof(uint64_t));
1805 xstats[count++].value = val;
1810 for (q = 0; q < nb_txqs; q++) {
1811 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1812 stats_ptr = RTE_PTR_ADD(ð_stats,
1813 rte_txq_stats_strings[i].offset +
1814 q * sizeof(uint64_t));
1816 xstats[count++].value = val;
1820 for (i = 0; i < count; i++)
1822 /* add an offset to driver-specific stats */
1823 for ( ; i < count + xcount; i++)
1824 xstats[i].id += count;
1826 return count + xcount;
1829 /* reset ethdev extended statistics */
1831 rte_eth_xstats_reset(uint8_t port_id)
1833 struct rte_eth_dev *dev;
1835 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1836 dev = &rte_eth_devices[port_id];
1838 /* implemented by the driver */
1839 if (dev->dev_ops->xstats_reset != NULL) {
1840 (*dev->dev_ops->xstats_reset)(dev);
1844 /* fallback to default */
1845 rte_eth_stats_reset(port_id);
1849 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1852 struct rte_eth_dev *dev;
1854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1856 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1859 return (*dev->dev_ops->queue_stats_mapping_set)
1860 (dev, queue_id, stat_idx, is_rx);
1865 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1868 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1874 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1877 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1882 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1884 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1887 dev = &rte_eth_devices[port_id];
1889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1890 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1894 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1896 struct rte_eth_dev *dev;
1897 const struct rte_eth_desc_lim lim = {
1898 .nb_max = UINT16_MAX,
1903 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1904 dev = &rte_eth_devices[port_id];
1906 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1907 dev_info->rx_desc_lim = lim;
1908 dev_info->tx_desc_lim = lim;
1910 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1911 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1912 dev_info->driver_name = dev->device->driver->name;
1913 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1914 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1918 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1919 uint32_t *ptypes, int num)
1922 struct rte_eth_dev *dev;
1923 const uint32_t *all_ptypes;
1925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1926 dev = &rte_eth_devices[port_id];
1927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1928 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1933 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1934 if (all_ptypes[i] & ptype_mask) {
1936 ptypes[j] = all_ptypes[i];
1944 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1946 struct rte_eth_dev *dev;
1948 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1949 dev = &rte_eth_devices[port_id];
1950 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1955 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1957 struct rte_eth_dev *dev;
1959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1961 dev = &rte_eth_devices[port_id];
1962 *mtu = dev->data->mtu;
1967 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1970 struct rte_eth_dev *dev;
1972 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1973 dev = &rte_eth_devices[port_id];
1974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1976 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1978 dev->data->mtu = mtu;
1984 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1986 struct rte_eth_dev *dev;
1989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1990 dev = &rte_eth_devices[port_id];
1991 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1992 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1996 if (vlan_id > 4095) {
1997 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1998 port_id, (unsigned) vlan_id);
2001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2003 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2005 struct rte_vlan_filter_conf *vfc;
2009 vfc = &dev->data->vlan_filter_conf;
2010 vidx = vlan_id / 64;
2011 vbit = vlan_id % 64;
2014 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2016 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2023 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2028 dev = &rte_eth_devices[port_id];
2029 if (rx_queue_id >= dev->data->nb_rx_queues) {
2030 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2035 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2041 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
2042 enum rte_vlan_type vlan_type,
2045 struct rte_eth_dev *dev;
2047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2048 dev = &rte_eth_devices[port_id];
2049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2051 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2055 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
2057 struct rte_eth_dev *dev;
2062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2063 dev = &rte_eth_devices[port_id];
2065 /*check which option changed by application*/
2066 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2067 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
2069 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
2070 mask |= ETH_VLAN_STRIP_MASK;
2073 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2074 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
2076 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
2077 mask |= ETH_VLAN_FILTER_MASK;
2080 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2081 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
2083 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
2084 mask |= ETH_VLAN_EXTEND_MASK;
2091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2092 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2098 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2100 struct rte_eth_dev *dev;
2103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2104 dev = &rte_eth_devices[port_id];
2106 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
2107 ret |= ETH_VLAN_STRIP_OFFLOAD;
2109 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
2110 ret |= ETH_VLAN_FILTER_OFFLOAD;
2112 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
2113 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2119 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2121 struct rte_eth_dev *dev;
2123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2124 dev = &rte_eth_devices[port_id];
2125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2126 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2132 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2134 struct rte_eth_dev *dev;
2136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2137 dev = &rte_eth_devices[port_id];
2138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2139 memset(fc_conf, 0, sizeof(*fc_conf));
2140 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2144 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2146 struct rte_eth_dev *dev;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2149 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2150 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2154 dev = &rte_eth_devices[port_id];
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2156 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2160 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2162 struct rte_eth_dev *dev;
2164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2165 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2166 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2170 dev = &rte_eth_devices[port_id];
2171 /* High water, low water validation are device specific */
2172 if (*dev->dev_ops->priority_flow_ctrl_set)
2173 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2178 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2186 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2187 for (i = 0; i < num; i++) {
2188 if (reta_conf[i].mask)
2196 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2200 uint16_t i, idx, shift;
2206 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2210 for (i = 0; i < reta_size; i++) {
2211 idx = i / RTE_RETA_GROUP_SIZE;
2212 shift = i % RTE_RETA_GROUP_SIZE;
2213 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2214 (reta_conf[idx].reta[shift] >= max_rxq)) {
2215 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2216 "the maximum rxq index: %u\n", idx, shift,
2217 reta_conf[idx].reta[shift], max_rxq);
2226 rte_eth_dev_rss_reta_update(uint8_t port_id,
2227 struct rte_eth_rss_reta_entry64 *reta_conf,
2230 struct rte_eth_dev *dev;
2233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2234 /* Check mask bits */
2235 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2239 dev = &rte_eth_devices[port_id];
2241 /* Check entry value */
2242 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2243 dev->data->nb_rx_queues);
2247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2248 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2252 rte_eth_dev_rss_reta_query(uint8_t port_id,
2253 struct rte_eth_rss_reta_entry64 *reta_conf,
2256 struct rte_eth_dev *dev;
2259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2261 /* Check mask bits */
2262 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2266 dev = &rte_eth_devices[port_id];
2267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2268 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2272 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2274 struct rte_eth_dev *dev;
2275 uint16_t rss_hash_protos;
2277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2278 rss_hash_protos = rss_conf->rss_hf;
2279 if ((rss_hash_protos != 0) &&
2280 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2281 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2285 dev = &rte_eth_devices[port_id];
2286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2287 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2291 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2292 struct rte_eth_rss_conf *rss_conf)
2294 struct rte_eth_dev *dev;
2296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2297 dev = &rte_eth_devices[port_id];
2298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2299 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2303 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2304 struct rte_eth_udp_tunnel *udp_tunnel)
2306 struct rte_eth_dev *dev;
2308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2309 if (udp_tunnel == NULL) {
2310 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2314 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2315 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2319 dev = &rte_eth_devices[port_id];
2320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2321 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2325 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2326 struct rte_eth_udp_tunnel *udp_tunnel)
2328 struct rte_eth_dev *dev;
2330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2331 dev = &rte_eth_devices[port_id];
2333 if (udp_tunnel == NULL) {
2334 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2338 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2339 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2344 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2348 rte_eth_led_on(uint8_t port_id)
2350 struct rte_eth_dev *dev;
2352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2353 dev = &rte_eth_devices[port_id];
2354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2355 return (*dev->dev_ops->dev_led_on)(dev);
2359 rte_eth_led_off(uint8_t port_id)
2361 struct rte_eth_dev *dev;
2363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2364 dev = &rte_eth_devices[port_id];
2365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2366 return (*dev->dev_ops->dev_led_off)(dev);
2370 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2374 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2376 struct rte_eth_dev_info dev_info;
2377 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2381 rte_eth_dev_info_get(port_id, &dev_info);
2383 for (i = 0; i < dev_info.max_mac_addrs; i++)
2384 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2390 static const struct ether_addr null_mac_addr;
2393 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2396 struct rte_eth_dev *dev;
2401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2402 dev = &rte_eth_devices[port_id];
2403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2405 if (is_zero_ether_addr(addr)) {
2406 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2410 if (pool >= ETH_64_POOLS) {
2411 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2415 index = get_mac_addr_index(port_id, addr);
2417 index = get_mac_addr_index(port_id, &null_mac_addr);
2419 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2424 pool_mask = dev->data->mac_pool_sel[index];
2426 /* Check if both MAC address and pool is already there, and do nothing */
2427 if (pool_mask & (1ULL << pool))
2432 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2435 /* Update address in NIC data structure */
2436 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2438 /* Update pool bitmap in NIC data structure */
2439 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2446 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2448 struct rte_eth_dev *dev;
2451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2452 dev = &rte_eth_devices[port_id];
2453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2455 index = get_mac_addr_index(port_id, addr);
2457 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2459 } else if (index < 0)
2460 return 0; /* Do nothing if address wasn't found */
2463 (*dev->dev_ops->mac_addr_remove)(dev, index);
2465 /* Update address in NIC data structure */
2466 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2468 /* reset pool bitmap */
2469 dev->data->mac_pool_sel[index] = 0;
2475 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2477 struct rte_eth_dev *dev;
2479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2481 if (!is_valid_assigned_ether_addr(addr))
2484 dev = &rte_eth_devices[port_id];
2485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2487 /* Update default address in NIC data structure */
2488 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2490 (*dev->dev_ops->mac_addr_set)(dev, addr);
2497 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2501 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2503 struct rte_eth_dev_info dev_info;
2504 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2507 rte_eth_dev_info_get(port_id, &dev_info);
2508 if (!dev->data->hash_mac_addrs)
2511 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2512 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2513 ETHER_ADDR_LEN) == 0)
2520 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2525 struct rte_eth_dev *dev;
2527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2529 dev = &rte_eth_devices[port_id];
2530 if (is_zero_ether_addr(addr)) {
2531 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2536 index = get_hash_mac_addr_index(port_id, addr);
2537 /* Check if it's already there, and do nothing */
2538 if ((index >= 0) && (on))
2543 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2544 "set in UTA\n", port_id);
2548 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2550 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2557 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2559 /* Update address in NIC data structure */
2561 ether_addr_copy(addr,
2562 &dev->data->hash_mac_addrs[index]);
2564 ether_addr_copy(&null_mac_addr,
2565 &dev->data->hash_mac_addrs[index]);
2572 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2574 struct rte_eth_dev *dev;
2576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2578 dev = &rte_eth_devices[port_id];
2580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2581 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2584 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2587 struct rte_eth_dev *dev;
2588 struct rte_eth_dev_info dev_info;
2589 struct rte_eth_link link;
2591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2593 dev = &rte_eth_devices[port_id];
2594 rte_eth_dev_info_get(port_id, &dev_info);
2595 link = dev->data->dev_link;
2597 if (queue_idx > dev_info.max_tx_queues) {
2598 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2599 "invalid queue id=%d\n", port_id, queue_idx);
2603 if (tx_rate > link.link_speed) {
2604 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2605 "bigger than link speed= %d\n",
2606 tx_rate, link.link_speed);
2610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2611 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2615 rte_eth_mirror_rule_set(uint8_t port_id,
2616 struct rte_eth_mirror_conf *mirror_conf,
2617 uint8_t rule_id, uint8_t on)
2619 struct rte_eth_dev *dev;
2621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2622 if (mirror_conf->rule_type == 0) {
2623 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2627 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2628 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2633 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2634 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2635 (mirror_conf->pool_mask == 0)) {
2636 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2640 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2641 mirror_conf->vlan.vlan_mask == 0) {
2642 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2646 dev = &rte_eth_devices[port_id];
2647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2649 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2653 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2655 struct rte_eth_dev *dev;
2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2662 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2666 rte_eth_dev_callback_register(uint8_t port_id,
2667 enum rte_eth_event_type event,
2668 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2670 struct rte_eth_dev *dev;
2671 struct rte_eth_dev_callback *user_cb;
2676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2678 dev = &rte_eth_devices[port_id];
2679 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2681 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2682 if (user_cb->cb_fn == cb_fn &&
2683 user_cb->cb_arg == cb_arg &&
2684 user_cb->event == event) {
2689 /* create a new callback. */
2690 if (user_cb == NULL) {
2691 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2692 sizeof(struct rte_eth_dev_callback), 0);
2693 if (user_cb != NULL) {
2694 user_cb->cb_fn = cb_fn;
2695 user_cb->cb_arg = cb_arg;
2696 user_cb->event = event;
2697 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2701 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2702 return (user_cb == NULL) ? -ENOMEM : 0;
2706 rte_eth_dev_callback_unregister(uint8_t port_id,
2707 enum rte_eth_event_type event,
2708 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2711 struct rte_eth_dev *dev;
2712 struct rte_eth_dev_callback *cb, *next;
2717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2719 dev = &rte_eth_devices[port_id];
2720 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2723 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2725 next = TAILQ_NEXT(cb, next);
2727 if (cb->cb_fn != cb_fn || cb->event != event ||
2728 (cb->cb_arg != (void *)-1 &&
2729 cb->cb_arg != cb_arg))
2733 * if this callback is not executing right now,
2736 if (cb->active == 0) {
2737 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2744 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2749 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2750 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2752 struct rte_eth_dev_callback *cb_lst;
2753 struct rte_eth_dev_callback dev_cb;
2756 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2757 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2758 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2763 dev_cb.cb_arg = cb_arg;
2764 if (ret_param != NULL)
2765 dev_cb.ret_param = ret_param;
2767 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2768 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2769 dev_cb.cb_arg, dev_cb.ret_param);
2770 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2773 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2778 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2781 struct rte_eth_dev *dev;
2782 struct rte_intr_handle *intr_handle;
2786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2788 dev = &rte_eth_devices[port_id];
2790 if (!dev->intr_handle) {
2791 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2795 intr_handle = dev->intr_handle;
2796 if (!intr_handle->intr_vec) {
2797 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2801 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2802 vec = intr_handle->intr_vec[qid];
2803 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2804 if (rc && rc != -EEXIST) {
2805 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2806 " op %d epfd %d vec %u\n",
2807 port_id, qid, op, epfd, vec);
2814 const struct rte_memzone *
2815 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2816 uint16_t queue_id, size_t size, unsigned align,
2819 char z_name[RTE_MEMZONE_NAMESIZE];
2820 const struct rte_memzone *mz;
2822 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2823 dev->device->driver->name, ring_name,
2824 dev->data->port_id, queue_id);
2826 mz = rte_memzone_lookup(z_name);
2830 if (rte_xen_dom0_supported())
2831 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2832 0, align, RTE_PGSIZE_2M);
2834 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2839 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2840 int epfd, int op, void *data)
2843 struct rte_eth_dev *dev;
2844 struct rte_intr_handle *intr_handle;
2847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2849 dev = &rte_eth_devices[port_id];
2850 if (queue_id >= dev->data->nb_rx_queues) {
2851 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2855 if (!dev->intr_handle) {
2856 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2860 intr_handle = dev->intr_handle;
2861 if (!intr_handle->intr_vec) {
2862 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2866 vec = intr_handle->intr_vec[queue_id];
2867 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2868 if (rc && rc != -EEXIST) {
2869 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2870 " op %d epfd %d vec %u\n",
2871 port_id, queue_id, op, epfd, vec);
2879 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2882 struct rte_eth_dev *dev;
2884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2886 dev = &rte_eth_devices[port_id];
2888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2889 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2893 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2896 struct rte_eth_dev *dev;
2898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2900 dev = &rte_eth_devices[port_id];
2902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2903 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2908 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2910 struct rte_eth_dev *dev;
2912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914 dev = &rte_eth_devices[port_id];
2915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2916 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2917 RTE_ETH_FILTER_NOP, NULL);
2921 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2922 enum rte_filter_op filter_op, void *arg)
2924 struct rte_eth_dev *dev;
2926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2928 dev = &rte_eth_devices[port_id];
2929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2930 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2934 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2935 rte_rx_callback_fn fn, void *user_param)
2937 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2938 rte_errno = ENOTSUP;
2941 /* check input parameters */
2942 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2943 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2947 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2955 cb->param = user_param;
2957 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2958 /* Add the callbacks in fifo order. */
2959 struct rte_eth_rxtx_callback *tail =
2960 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2963 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2970 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2976 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2977 rte_rx_callback_fn fn, void *user_param)
2979 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2980 rte_errno = ENOTSUP;
2983 /* check input parameters */
2984 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2985 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2990 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2998 cb->param = user_param;
3000 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3001 /* Add the callbacks at fisrt position*/
3002 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3004 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3005 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3011 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3012 rte_tx_callback_fn fn, void *user_param)
3014 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3015 rte_errno = ENOTSUP;
3018 /* check input parameters */
3019 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3020 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3025 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3033 cb->param = user_param;
3035 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3036 /* Add the callbacks in fifo order. */
3037 struct rte_eth_rxtx_callback *tail =
3038 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3041 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3048 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3054 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3055 struct rte_eth_rxtx_callback *user_cb)
3057 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3060 /* Check input parameters. */
3061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3062 if (user_cb == NULL ||
3063 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3066 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3067 struct rte_eth_rxtx_callback *cb;
3068 struct rte_eth_rxtx_callback **prev_cb;
3071 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3072 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3073 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3075 if (cb == user_cb) {
3076 /* Remove the user cb from the callback list. */
3077 *prev_cb = cb->next;
3082 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3088 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3089 struct rte_eth_rxtx_callback *user_cb)
3091 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3094 /* Check input parameters. */
3095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3096 if (user_cb == NULL ||
3097 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3100 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3102 struct rte_eth_rxtx_callback *cb;
3103 struct rte_eth_rxtx_callback **prev_cb;
3105 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3106 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3107 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3109 if (cb == user_cb) {
3110 /* Remove the user cb from the callback list. */
3111 *prev_cb = cb->next;
3116 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3122 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3123 struct rte_eth_rxq_info *qinfo)
3125 struct rte_eth_dev *dev;
3127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 dev = &rte_eth_devices[port_id];
3133 if (queue_id >= dev->data->nb_rx_queues) {
3134 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3140 memset(qinfo, 0, sizeof(*qinfo));
3141 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3146 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3147 struct rte_eth_txq_info *qinfo)
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3157 if (queue_id >= dev->data->nb_tx_queues) {
3158 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3164 memset(qinfo, 0, sizeof(*qinfo));
3165 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3170 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3171 struct ether_addr *mc_addr_set,
3172 uint32_t nb_mc_addr)
3174 struct rte_eth_dev *dev;
3176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3178 dev = &rte_eth_devices[port_id];
3179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3180 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3184 rte_eth_timesync_enable(uint8_t port_id)
3186 struct rte_eth_dev *dev;
3188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3189 dev = &rte_eth_devices[port_id];
3191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3192 return (*dev->dev_ops->timesync_enable)(dev);
3196 rte_eth_timesync_disable(uint8_t port_id)
3198 struct rte_eth_dev *dev;
3200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3201 dev = &rte_eth_devices[port_id];
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3204 return (*dev->dev_ops->timesync_disable)(dev);
3208 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3211 struct rte_eth_dev *dev;
3213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3214 dev = &rte_eth_devices[port_id];
3216 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3217 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3221 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3223 struct rte_eth_dev *dev;
3225 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3226 dev = &rte_eth_devices[port_id];
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3229 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3233 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3235 struct rte_eth_dev *dev;
3237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3238 dev = &rte_eth_devices[port_id];
3240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3241 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3245 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3247 struct rte_eth_dev *dev;
3249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3250 dev = &rte_eth_devices[port_id];
3252 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3253 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3257 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3259 struct rte_eth_dev *dev;
3261 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3262 dev = &rte_eth_devices[port_id];
3264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3265 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3269 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3271 struct rte_eth_dev *dev;
3273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3275 dev = &rte_eth_devices[port_id];
3276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3277 return (*dev->dev_ops->get_reg)(dev, info);
3281 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3283 struct rte_eth_dev *dev;
3285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3287 dev = &rte_eth_devices[port_id];
3288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3289 return (*dev->dev_ops->get_eeprom_length)(dev);
3293 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3295 struct rte_eth_dev *dev;
3297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3299 dev = &rte_eth_devices[port_id];
3300 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3301 return (*dev->dev_ops->get_eeprom)(dev, info);
3305 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3307 struct rte_eth_dev *dev;
3309 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3311 dev = &rte_eth_devices[port_id];
3312 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3313 return (*dev->dev_ops->set_eeprom)(dev, info);
3317 rte_eth_dev_get_dcb_info(uint8_t port_id,
3318 struct rte_eth_dcb_info *dcb_info)
3320 struct rte_eth_dev *dev;
3322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3324 dev = &rte_eth_devices[port_id];
3325 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3328 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3332 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3333 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3335 struct rte_eth_dev *dev;
3337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3338 if (l2_tunnel == NULL) {
3339 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3343 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3344 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3348 dev = &rte_eth_devices[port_id];
3349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3351 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3355 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3356 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3360 struct rte_eth_dev *dev;
3362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3364 if (l2_tunnel == NULL) {
3365 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3369 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3370 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3375 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3379 dev = &rte_eth_devices[port_id];
3380 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3382 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3386 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3387 const struct rte_eth_desc_lim *desc_lim)
3389 if (desc_lim->nb_align != 0)
3390 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3392 if (desc_lim->nb_max != 0)
3393 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3395 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3399 rte_eth_dev_adjust_nb_rx_tx_desc(uint8_t port_id,
3400 uint16_t *nb_rx_desc,
3401 uint16_t *nb_tx_desc)
3403 struct rte_eth_dev *dev;
3404 struct rte_eth_dev_info dev_info;
3406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3408 dev = &rte_eth_devices[port_id];
3409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3411 rte_eth_dev_info_get(port_id, &dev_info);
3413 if (nb_rx_desc != NULL)
3414 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3416 if (nb_tx_desc != NULL)
3417 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);