4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
70 #include "ethdev_profile.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t eth_dev_last_created_port;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
183 strcmp(rte_eth_devices[i].data->name, name) == 0)
184 return &rte_eth_devices[i];
190 rte_eth_dev_find_free_port(void)
194 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
195 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
198 return RTE_MAX_ETHPORTS;
201 static struct rte_eth_dev *
202 eth_dev_get(uint16_t port_id)
204 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
206 eth_dev->data = &rte_eth_dev_data[port_id];
207 eth_dev->state = RTE_ETH_DEV_ATTACHED;
208 TAILQ_INIT(&(eth_dev->link_intr_cbs));
210 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
287 rte_eth_dev_is_valid_port(uint16_t port_id)
289 if (port_id >= RTE_MAX_ETHPORTS ||
290 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
298 rte_eth_dev_socket_id(uint16_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_get_sec_ctx(uint8_t port_id)
307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
308 return rte_eth_devices[port_id].security_ctx;
312 rte_eth_dev_count(void)
319 RTE_ETH_FOREACH_DEV(p)
326 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
333 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
337 /* shouldn't check 'rte_eth_devices[i].data',
338 * because it might be overwritten by VDEV PMD */
339 tmp = rte_eth_dev_data[port_id].name;
345 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
350 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
354 RTE_ETH_FOREACH_DEV(i) {
356 rte_eth_dev_data[i].name, strlen(name))) {
366 /* attach the new device, then store port_id of the device */
368 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
371 int current = rte_eth_dev_count();
375 if ((devargs == NULL) || (port_id == NULL)) {
380 /* parse devargs, then retrieve device name and args */
381 if (rte_eal_parse_devargs_str(devargs, &name, &args))
384 ret = rte_eal_dev_attach(name, args);
388 /* no point looking at the port count if no port exists */
389 if (!rte_eth_dev_count()) {
390 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
395 /* if nothing happened, there is a bug here, since some driver told us
396 * it did attach a device, but did not create a port.
398 if (current == rte_eth_dev_count()) {
403 *port_id = eth_dev_last_created_port;
412 /* detach the device, then store the name of the device */
414 rte_eth_dev_detach(uint16_t port_id, char *name)
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
426 dev_flags = rte_eth_devices[port_id].data->dev_flags;
427 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
428 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
434 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
435 "%s", rte_eth_devices[port_id].data->name);
437 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
441 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
449 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
451 uint16_t old_nb_queues = dev->data->nb_rx_queues;
455 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
456 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
457 sizeof(dev->data->rx_queues[0]) * nb_queues,
458 RTE_CACHE_LINE_SIZE);
459 if (dev->data->rx_queues == NULL) {
460 dev->data->nb_rx_queues = 0;
463 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
466 rxq = dev->data->rx_queues;
468 for (i = nb_queues; i < old_nb_queues; i++)
469 (*dev->dev_ops->rx_queue_release)(rxq[i]);
470 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
471 RTE_CACHE_LINE_SIZE);
474 if (nb_queues > old_nb_queues) {
475 uint16_t new_qs = nb_queues - old_nb_queues;
477 memset(rxq + old_nb_queues, 0,
478 sizeof(rxq[0]) * new_qs);
481 dev->data->rx_queues = rxq;
483 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
484 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
486 rxq = dev->data->rx_queues;
488 for (i = nb_queues; i < old_nb_queues; i++)
489 (*dev->dev_ops->rx_queue_release)(rxq[i]);
491 rte_free(dev->data->rx_queues);
492 dev->data->rx_queues = NULL;
494 dev->data->nb_rx_queues = nb_queues;
499 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
501 struct rte_eth_dev *dev;
503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
505 dev = &rte_eth_devices[port_id];
506 if (rx_queue_id >= dev->data->nb_rx_queues) {
507 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
513 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
514 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
515 " already started\n",
516 rx_queue_id, port_id);
520 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
525 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
527 struct rte_eth_dev *dev;
529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
531 dev = &rte_eth_devices[port_id];
532 if (rx_queue_id >= dev->data->nb_rx_queues) {
533 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
539 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
540 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
541 " already stopped\n",
542 rx_queue_id, port_id);
546 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
551 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
553 struct rte_eth_dev *dev;
555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
557 dev = &rte_eth_devices[port_id];
558 if (tx_queue_id >= dev->data->nb_tx_queues) {
559 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
565 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
566 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
567 " already started\n",
568 tx_queue_id, port_id);
572 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
577 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
579 struct rte_eth_dev *dev;
581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
583 dev = &rte_eth_devices[port_id];
584 if (tx_queue_id >= dev->data->nb_tx_queues) {
585 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
591 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
592 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
593 " already stopped\n",
594 tx_queue_id, port_id);
598 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
603 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
605 uint16_t old_nb_queues = dev->data->nb_tx_queues;
609 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
610 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
611 sizeof(dev->data->tx_queues[0]) * nb_queues,
612 RTE_CACHE_LINE_SIZE);
613 if (dev->data->tx_queues == NULL) {
614 dev->data->nb_tx_queues = 0;
617 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
620 txq = dev->data->tx_queues;
622 for (i = nb_queues; i < old_nb_queues; i++)
623 (*dev->dev_ops->tx_queue_release)(txq[i]);
624 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
625 RTE_CACHE_LINE_SIZE);
628 if (nb_queues > old_nb_queues) {
629 uint16_t new_qs = nb_queues - old_nb_queues;
631 memset(txq + old_nb_queues, 0,
632 sizeof(txq[0]) * new_qs);
635 dev->data->tx_queues = txq;
637 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
640 txq = dev->data->tx_queues;
642 for (i = nb_queues; i < old_nb_queues; i++)
643 (*dev->dev_ops->tx_queue_release)(txq[i]);
645 rte_free(dev->data->tx_queues);
646 dev->data->tx_queues = NULL;
648 dev->data->nb_tx_queues = nb_queues;
653 rte_eth_speed_bitflag(uint32_t speed, int duplex)
656 case ETH_SPEED_NUM_10M:
657 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
658 case ETH_SPEED_NUM_100M:
659 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
660 case ETH_SPEED_NUM_1G:
661 return ETH_LINK_SPEED_1G;
662 case ETH_SPEED_NUM_2_5G:
663 return ETH_LINK_SPEED_2_5G;
664 case ETH_SPEED_NUM_5G:
665 return ETH_LINK_SPEED_5G;
666 case ETH_SPEED_NUM_10G:
667 return ETH_LINK_SPEED_10G;
668 case ETH_SPEED_NUM_20G:
669 return ETH_LINK_SPEED_20G;
670 case ETH_SPEED_NUM_25G:
671 return ETH_LINK_SPEED_25G;
672 case ETH_SPEED_NUM_40G:
673 return ETH_LINK_SPEED_40G;
674 case ETH_SPEED_NUM_50G:
675 return ETH_LINK_SPEED_50G;
676 case ETH_SPEED_NUM_56G:
677 return ETH_LINK_SPEED_56G;
678 case ETH_SPEED_NUM_100G:
679 return ETH_LINK_SPEED_100G;
686 * A conversion function from rxmode bitfield API.
689 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
690 uint64_t *rx_offloads)
692 uint64_t offloads = 0;
694 if (rxmode->header_split == 1)
695 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
696 if (rxmode->hw_ip_checksum == 1)
697 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
698 if (rxmode->hw_vlan_filter == 1)
699 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
700 if (rxmode->hw_vlan_strip == 1)
701 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
702 if (rxmode->hw_vlan_extend == 1)
703 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
704 if (rxmode->jumbo_frame == 1)
705 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
706 if (rxmode->hw_strip_crc == 1)
707 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
708 if (rxmode->enable_scatter == 1)
709 offloads |= DEV_RX_OFFLOAD_SCATTER;
710 if (rxmode->enable_lro == 1)
711 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
712 if (rxmode->hw_timestamp == 1)
713 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
714 if (rxmode->security == 1)
715 offloads |= DEV_RX_OFFLOAD_SECURITY;
717 *rx_offloads = offloads;
721 * A conversion function from rxmode offloads API.
724 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
725 struct rte_eth_rxmode *rxmode)
728 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
729 rxmode->header_split = 1;
731 rxmode->header_split = 0;
732 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
733 rxmode->hw_ip_checksum = 1;
735 rxmode->hw_ip_checksum = 0;
736 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
737 rxmode->hw_vlan_filter = 1;
739 rxmode->hw_vlan_filter = 0;
740 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
741 rxmode->hw_vlan_strip = 1;
743 rxmode->hw_vlan_strip = 0;
744 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
745 rxmode->hw_vlan_extend = 1;
747 rxmode->hw_vlan_extend = 0;
748 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
749 rxmode->jumbo_frame = 1;
751 rxmode->jumbo_frame = 0;
752 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
753 rxmode->hw_strip_crc = 1;
755 rxmode->hw_strip_crc = 0;
756 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
757 rxmode->enable_scatter = 1;
759 rxmode->enable_scatter = 0;
760 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
761 rxmode->enable_lro = 1;
763 rxmode->enable_lro = 0;
764 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
765 rxmode->hw_timestamp = 1;
767 rxmode->hw_timestamp = 0;
768 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
769 rxmode->security = 1;
771 rxmode->security = 0;
775 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
776 const struct rte_eth_conf *dev_conf)
778 struct rte_eth_dev *dev;
779 struct rte_eth_dev_info dev_info;
780 struct rte_eth_conf local_conf = *dev_conf;
783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
785 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
787 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
788 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
792 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
794 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
795 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
799 dev = &rte_eth_devices[port_id];
801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
804 if (dev->data->dev_started) {
806 "port %d must be stopped to allow configuration\n", port_id);
811 * Convert between the offloads API to enable PMDs to support
814 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
815 rte_eth_convert_rx_offload_bitfield(
816 &dev_conf->rxmode, &local_conf.rxmode.offloads);
818 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
822 /* Copy the dev_conf parameter into the dev structure */
823 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
826 * Check that the numbers of RX and TX queues are not greater
827 * than the maximum number of RX and TX queues supported by the
830 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
832 if (nb_rx_q == 0 && nb_tx_q == 0) {
833 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
837 if (nb_rx_q > dev_info.max_rx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
839 port_id, nb_rx_q, dev_info.max_rx_queues);
843 if (nb_tx_q > dev_info.max_tx_queues) {
844 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
845 port_id, nb_tx_q, dev_info.max_tx_queues);
849 /* Check that the device supports requested interrupts */
850 if ((dev_conf->intr_conf.lsc == 1) &&
851 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
852 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
853 dev->device->driver->name);
856 if ((dev_conf->intr_conf.rmv == 1) &&
857 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
858 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
859 dev->device->driver->name);
864 * If jumbo frames are enabled, check that the maximum RX packet
865 * length is supported by the configured device.
867 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
868 if (dev_conf->rxmode.max_rx_pkt_len >
869 dev_info.max_rx_pktlen) {
870 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
871 " > max valid value %u\n",
873 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
874 (unsigned)dev_info.max_rx_pktlen);
876 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
877 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
878 " < min valid value %u\n",
880 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
881 (unsigned)ETHER_MIN_LEN);
885 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
886 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
887 /* Use default value */
888 dev->data->dev_conf.rxmode.max_rx_pkt_len =
893 * Setup new number of RX/TX queues and reconfigure device.
895 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
897 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
902 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
904 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
906 rte_eth_dev_rx_queue_config(dev, 0);
910 diag = (*dev->dev_ops->dev_configure)(dev);
912 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
914 rte_eth_dev_rx_queue_config(dev, 0);
915 rte_eth_dev_tx_queue_config(dev, 0);
919 /* Initialize Rx profiling if enabled at compilation time. */
920 diag = __rte_eth_profile_rx_init(port_id, dev);
922 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
924 rte_eth_dev_rx_queue_config(dev, 0);
925 rte_eth_dev_tx_queue_config(dev, 0);
933 _rte_eth_dev_reset(struct rte_eth_dev *dev)
935 if (dev->data->dev_started) {
937 "port %d must be stopped to allow reset\n",
942 rte_eth_dev_rx_queue_config(dev, 0);
943 rte_eth_dev_tx_queue_config(dev, 0);
945 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
949 rte_eth_dev_config_restore(uint16_t port_id)
951 struct rte_eth_dev *dev;
952 struct rte_eth_dev_info dev_info;
953 struct ether_addr *addr;
958 dev = &rte_eth_devices[port_id];
960 rte_eth_dev_info_get(port_id, &dev_info);
962 /* replay MAC address configuration including default MAC */
963 addr = &dev->data->mac_addrs[0];
964 if (*dev->dev_ops->mac_addr_set != NULL)
965 (*dev->dev_ops->mac_addr_set)(dev, addr);
966 else if (*dev->dev_ops->mac_addr_add != NULL)
967 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
969 if (*dev->dev_ops->mac_addr_add != NULL) {
970 for (i = 1; i < dev_info.max_mac_addrs; i++) {
971 addr = &dev->data->mac_addrs[i];
973 /* skip zero address */
974 if (is_zero_ether_addr(addr))
978 pool_mask = dev->data->mac_pool_sel[i];
981 if (pool_mask & 1ULL)
982 (*dev->dev_ops->mac_addr_add)(dev,
990 /* replay promiscuous configuration */
991 if (rte_eth_promiscuous_get(port_id) == 1)
992 rte_eth_promiscuous_enable(port_id);
993 else if (rte_eth_promiscuous_get(port_id) == 0)
994 rte_eth_promiscuous_disable(port_id);
996 /* replay all multicast configuration */
997 if (rte_eth_allmulticast_get(port_id) == 1)
998 rte_eth_allmulticast_enable(port_id);
999 else if (rte_eth_allmulticast_get(port_id) == 0)
1000 rte_eth_allmulticast_disable(port_id);
1004 rte_eth_dev_start(uint16_t port_id)
1006 struct rte_eth_dev *dev;
1009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1011 dev = &rte_eth_devices[port_id];
1013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1015 if (dev->data->dev_started != 0) {
1016 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1017 " already started\n",
1022 diag = (*dev->dev_ops->dev_start)(dev);
1024 dev->data->dev_started = 1;
1028 rte_eth_dev_config_restore(port_id);
1030 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1032 (*dev->dev_ops->link_update)(dev, 0);
1038 rte_eth_dev_stop(uint16_t port_id)
1040 struct rte_eth_dev *dev;
1042 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1043 dev = &rte_eth_devices[port_id];
1045 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1047 if (dev->data->dev_started == 0) {
1048 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1049 " already stopped\n",
1054 dev->data->dev_started = 0;
1055 (*dev->dev_ops->dev_stop)(dev);
1059 rte_eth_dev_set_link_up(uint16_t port_id)
1061 struct rte_eth_dev *dev;
1063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1065 dev = &rte_eth_devices[port_id];
1067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1068 return (*dev->dev_ops->dev_set_link_up)(dev);
1072 rte_eth_dev_set_link_down(uint16_t port_id)
1074 struct rte_eth_dev *dev;
1076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1078 dev = &rte_eth_devices[port_id];
1080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1081 return (*dev->dev_ops->dev_set_link_down)(dev);
1085 rte_eth_dev_close(uint16_t port_id)
1087 struct rte_eth_dev *dev;
1089 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1090 dev = &rte_eth_devices[port_id];
1092 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1093 dev->data->dev_started = 0;
1094 (*dev->dev_ops->dev_close)(dev);
1096 dev->data->nb_rx_queues = 0;
1097 rte_free(dev->data->rx_queues);
1098 dev->data->rx_queues = NULL;
1099 dev->data->nb_tx_queues = 0;
1100 rte_free(dev->data->tx_queues);
1101 dev->data->tx_queues = NULL;
1105 rte_eth_dev_reset(uint16_t port_id)
1107 struct rte_eth_dev *dev;
1110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1111 dev = &rte_eth_devices[port_id];
1113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1115 rte_eth_dev_stop(port_id);
1116 ret = dev->dev_ops->dev_reset(dev);
1122 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1123 uint16_t nb_rx_desc, unsigned int socket_id,
1124 const struct rte_eth_rxconf *rx_conf,
1125 struct rte_mempool *mp)
1128 uint32_t mbp_buf_size;
1129 struct rte_eth_dev *dev;
1130 struct rte_eth_dev_info dev_info;
1131 struct rte_eth_rxconf local_conf;
1134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1136 dev = &rte_eth_devices[port_id];
1137 if (rx_queue_id >= dev->data->nb_rx_queues) {
1138 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1142 if (dev->data->dev_started) {
1143 RTE_PMD_DEBUG_TRACE(
1144 "port %d must be stopped to allow configuration\n", port_id);
1148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1152 * Check the size of the mbuf data buffer.
1153 * This value must be provided in the private data of the memory pool.
1154 * First check that the memory pool has a valid private data.
1156 rte_eth_dev_info_get(port_id, &dev_info);
1157 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1158 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1159 mp->name, (int) mp->private_data_size,
1160 (int) sizeof(struct rte_pktmbuf_pool_private));
1163 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1165 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1166 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1167 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1171 (int)(RTE_PKTMBUF_HEADROOM +
1172 dev_info.min_rx_bufsize),
1173 (int)RTE_PKTMBUF_HEADROOM,
1174 (int)dev_info.min_rx_bufsize);
1178 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1179 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1180 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1182 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1183 "should be: <= %hu, = %hu, and a product of %hu\n",
1185 dev_info.rx_desc_lim.nb_max,
1186 dev_info.rx_desc_lim.nb_min,
1187 dev_info.rx_desc_lim.nb_align);
1191 rxq = dev->data->rx_queues;
1192 if (rxq[rx_queue_id]) {
1193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1195 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1196 rxq[rx_queue_id] = NULL;
1199 if (rx_conf == NULL)
1200 rx_conf = &dev_info.default_rxconf;
1202 local_conf = *rx_conf;
1203 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1205 * Reflect port offloads to queue offloads in order for
1206 * offloads to not be discarded.
1208 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1209 &local_conf.offloads);
1212 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1213 socket_id, &local_conf, mp);
1215 if (!dev->data->min_rx_buf_size ||
1216 dev->data->min_rx_buf_size > mbp_buf_size)
1217 dev->data->min_rx_buf_size = mbp_buf_size;
1224 * A conversion function from txq_flags API.
1227 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1229 uint64_t offloads = 0;
1231 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1232 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1233 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1234 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1235 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1236 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1237 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1238 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1239 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1240 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1241 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1242 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1243 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1245 *tx_offloads = offloads;
1249 * A conversion function from offloads API.
1252 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1256 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1257 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1258 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1259 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1260 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1261 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1262 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1263 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1264 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1265 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1266 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1267 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1273 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1274 uint16_t nb_tx_desc, unsigned int socket_id,
1275 const struct rte_eth_txconf *tx_conf)
1277 struct rte_eth_dev *dev;
1278 struct rte_eth_dev_info dev_info;
1279 struct rte_eth_txconf local_conf;
1282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1284 dev = &rte_eth_devices[port_id];
1285 if (tx_queue_id >= dev->data->nb_tx_queues) {
1286 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1290 if (dev->data->dev_started) {
1291 RTE_PMD_DEBUG_TRACE(
1292 "port %d must be stopped to allow configuration\n", port_id);
1296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1299 rte_eth_dev_info_get(port_id, &dev_info);
1301 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1302 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1303 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1304 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1305 "should be: <= %hu, = %hu, and a product of %hu\n",
1307 dev_info.tx_desc_lim.nb_max,
1308 dev_info.tx_desc_lim.nb_min,
1309 dev_info.tx_desc_lim.nb_align);
1313 txq = dev->data->tx_queues;
1314 if (txq[tx_queue_id]) {
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1317 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1318 txq[tx_queue_id] = NULL;
1321 if (tx_conf == NULL)
1322 tx_conf = &dev_info.default_txconf;
1325 * Convert between the offloads API to enable PMDs to support
1328 local_conf = *tx_conf;
1329 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1330 rte_eth_convert_txq_offloads(tx_conf->offloads,
1331 &local_conf.txq_flags);
1332 /* Keep the ignore flag. */
1333 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1335 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1336 &local_conf.offloads);
1339 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1340 socket_id, &local_conf);
1344 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1345 void *userdata __rte_unused)
1349 for (i = 0; i < unsent; i++)
1350 rte_pktmbuf_free(pkts[i]);
1354 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1357 uint64_t *count = userdata;
1360 for (i = 0; i < unsent; i++)
1361 rte_pktmbuf_free(pkts[i]);
1367 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1368 buffer_tx_error_fn cbfn, void *userdata)
1370 buffer->error_callback = cbfn;
1371 buffer->error_userdata = userdata;
1376 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1383 buffer->size = size;
1384 if (buffer->error_callback == NULL) {
1385 ret = rte_eth_tx_buffer_set_err_callback(
1386 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1393 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1395 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1397 /* Validate Input Data. Bail if not valid or not supported. */
1398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1399 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1401 /* Call driver to free pending mbufs. */
1402 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1407 rte_eth_promiscuous_enable(uint16_t port_id)
1409 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1412 dev = &rte_eth_devices[port_id];
1414 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1415 (*dev->dev_ops->promiscuous_enable)(dev);
1416 dev->data->promiscuous = 1;
1420 rte_eth_promiscuous_disable(uint16_t port_id)
1422 struct rte_eth_dev *dev;
1424 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1425 dev = &rte_eth_devices[port_id];
1427 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1428 dev->data->promiscuous = 0;
1429 (*dev->dev_ops->promiscuous_disable)(dev);
1433 rte_eth_promiscuous_get(uint16_t port_id)
1435 struct rte_eth_dev *dev;
1437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1439 dev = &rte_eth_devices[port_id];
1440 return dev->data->promiscuous;
1444 rte_eth_allmulticast_enable(uint16_t port_id)
1446 struct rte_eth_dev *dev;
1448 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1449 dev = &rte_eth_devices[port_id];
1451 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1452 (*dev->dev_ops->allmulticast_enable)(dev);
1453 dev->data->all_multicast = 1;
1457 rte_eth_allmulticast_disable(uint16_t port_id)
1459 struct rte_eth_dev *dev;
1461 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1462 dev = &rte_eth_devices[port_id];
1464 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1465 dev->data->all_multicast = 0;
1466 (*dev->dev_ops->allmulticast_disable)(dev);
1470 rte_eth_allmulticast_get(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1476 dev = &rte_eth_devices[port_id];
1477 return dev->data->all_multicast;
1481 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1482 struct rte_eth_link *link)
1484 struct rte_eth_link *dst = link;
1485 struct rte_eth_link *src = &(dev->data->dev_link);
1487 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1488 *(uint64_t *)src) == 0)
1495 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1497 struct rte_eth_dev *dev;
1499 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1500 dev = &rte_eth_devices[port_id];
1502 if (dev->data->dev_conf.intr_conf.lsc != 0)
1503 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1505 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1506 (*dev->dev_ops->link_update)(dev, 1);
1507 *eth_link = dev->data->dev_link;
1512 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1514 struct rte_eth_dev *dev;
1516 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1517 dev = &rte_eth_devices[port_id];
1519 if (dev->data->dev_conf.intr_conf.lsc != 0)
1520 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1522 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1523 (*dev->dev_ops->link_update)(dev, 0);
1524 *eth_link = dev->data->dev_link;
1529 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1531 struct rte_eth_dev *dev;
1533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1535 dev = &rte_eth_devices[port_id];
1536 memset(stats, 0, sizeof(*stats));
1538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1539 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1540 return (*dev->dev_ops->stats_get)(dev, stats);
1544 rte_eth_stats_reset(uint16_t port_id)
1546 struct rte_eth_dev *dev;
1548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1549 dev = &rte_eth_devices[port_id];
1551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1552 (*dev->dev_ops->stats_reset)(dev);
1553 dev->data->rx_mbuf_alloc_failed = 0;
1559 get_xstats_basic_count(struct rte_eth_dev *dev)
1561 uint16_t nb_rxqs, nb_txqs;
1564 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1565 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1567 count = RTE_NB_STATS;
1568 count += nb_rxqs * RTE_NB_RXQ_STATS;
1569 count += nb_txqs * RTE_NB_TXQ_STATS;
1575 get_xstats_count(uint16_t port_id)
1577 struct rte_eth_dev *dev;
1580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1581 dev = &rte_eth_devices[port_id];
1582 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1583 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1588 if (dev->dev_ops->xstats_get_names != NULL) {
1589 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1596 count += get_xstats_basic_count(dev);
1602 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1605 int cnt_xstats, idx_xstat;
1607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1610 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1615 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1620 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1621 if (cnt_xstats < 0) {
1622 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1626 /* Get id-name lookup table */
1627 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1629 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1630 port_id, xstats_names, cnt_xstats, NULL)) {
1631 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1635 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1636 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1645 /* retrieve ethdev extended statistics names */
1647 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1648 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1651 struct rte_eth_xstat_name *xstats_names_copy;
1652 unsigned int no_basic_stat_requested = 1;
1653 unsigned int expected_entries;
1654 struct rte_eth_dev *dev;
1658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1659 dev = &rte_eth_devices[port_id];
1661 ret = get_xstats_count(port_id);
1664 expected_entries = (unsigned int)ret;
1666 /* Return max number of stats if no ids given */
1669 return expected_entries;
1670 else if (xstats_names && size < expected_entries)
1671 return expected_entries;
1674 if (ids && !xstats_names)
1677 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1678 unsigned int basic_count = get_xstats_basic_count(dev);
1679 uint64_t ids_copy[size];
1681 for (i = 0; i < size; i++) {
1682 if (ids[i] < basic_count) {
1683 no_basic_stat_requested = 0;
1688 * Convert ids to xstats ids that PMD knows.
1689 * ids known by user are basic + extended stats.
1691 ids_copy[i] = ids[i] - basic_count;
1694 if (no_basic_stat_requested)
1695 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1696 xstats_names, ids_copy, size);
1699 /* Retrieve all stats */
1701 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1703 if (num_stats < 0 || num_stats > (int)expected_entries)
1706 return expected_entries;
1709 xstats_names_copy = calloc(expected_entries,
1710 sizeof(struct rte_eth_xstat_name));
1712 if (!xstats_names_copy) {
1713 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1717 /* Fill xstats_names_copy structure */
1718 rte_eth_xstats_get_names(port_id, xstats_names_copy, expected_entries);
1721 for (i = 0; i < size; i++) {
1722 if (ids[i] >= expected_entries) {
1723 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1724 free(xstats_names_copy);
1727 xstats_names[i] = xstats_names_copy[ids[i]];
1730 free(xstats_names_copy);
1735 rte_eth_xstats_get_names(uint16_t port_id,
1736 struct rte_eth_xstat_name *xstats_names,
1739 struct rte_eth_dev *dev;
1740 int cnt_used_entries;
1741 int cnt_expected_entries;
1742 int cnt_driver_entries;
1743 uint32_t idx, id_queue;
1746 cnt_expected_entries = get_xstats_count(port_id);
1747 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1748 (int)size < cnt_expected_entries)
1749 return cnt_expected_entries;
1751 /* port_id checked in get_xstats_count() */
1752 dev = &rte_eth_devices[port_id];
1753 cnt_used_entries = 0;
1755 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1756 snprintf(xstats_names[cnt_used_entries].name,
1757 sizeof(xstats_names[0].name),
1758 "%s", rte_stats_strings[idx].name);
1761 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1762 for (id_queue = 0; id_queue < num_q; id_queue++) {
1763 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1764 snprintf(xstats_names[cnt_used_entries].name,
1765 sizeof(xstats_names[0].name),
1767 id_queue, rte_rxq_stats_strings[idx].name);
1772 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1773 for (id_queue = 0; id_queue < num_q; id_queue++) {
1774 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1775 snprintf(xstats_names[cnt_used_entries].name,
1776 sizeof(xstats_names[0].name),
1778 id_queue, rte_txq_stats_strings[idx].name);
1783 if (dev->dev_ops->xstats_get_names != NULL) {
1784 /* If there are any driver-specific xstats, append them
1787 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1789 xstats_names + cnt_used_entries,
1790 size - cnt_used_entries);
1791 if (cnt_driver_entries < 0)
1792 return cnt_driver_entries;
1793 cnt_used_entries += cnt_driver_entries;
1796 return cnt_used_entries;
1799 /* retrieve ethdev extended statistics */
1801 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1802 uint64_t *values, unsigned int size)
1804 unsigned int no_basic_stat_requested = 1;
1805 unsigned int num_xstats_filled;
1806 uint16_t expected_entries;
1807 struct rte_eth_dev *dev;
1811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1812 expected_entries = get_xstats_count(port_id);
1813 struct rte_eth_xstat xstats[expected_entries];
1814 dev = &rte_eth_devices[port_id];
1816 /* Return max number of stats if no ids given */
1819 return expected_entries;
1820 else if (values && size < expected_entries)
1821 return expected_entries;
1827 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1828 unsigned int basic_count = get_xstats_basic_count(dev);
1829 uint64_t ids_copy[size];
1831 for (i = 0; i < size; i++) {
1832 if (ids[i] < basic_count) {
1833 no_basic_stat_requested = 0;
1838 * Convert ids to xstats ids that PMD knows.
1839 * ids known by user are basic + extended stats.
1841 ids_copy[i] = ids[i] - basic_count;
1844 if (no_basic_stat_requested)
1845 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1849 /* Fill the xstats structure */
1850 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1853 num_xstats_filled = (unsigned int)ret;
1855 /* Return all stats */
1857 for (i = 0; i < num_xstats_filled; i++)
1858 values[i] = xstats[i].value;
1859 return expected_entries;
1863 for (i = 0; i < size; i++) {
1864 if (ids[i] >= expected_entries) {
1865 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1868 values[i] = xstats[ids[i]].value;
1874 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1877 struct rte_eth_stats eth_stats;
1878 struct rte_eth_dev *dev;
1879 unsigned int count = 0, i, q;
1880 signed int xcount = 0;
1881 uint64_t val, *stats_ptr;
1882 uint16_t nb_rxqs, nb_txqs;
1884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1886 dev = &rte_eth_devices[port_id];
1888 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1889 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1891 /* Return generic statistics */
1892 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1893 (nb_txqs * RTE_NB_TXQ_STATS);
1895 /* implemented by the driver */
1896 if (dev->dev_ops->xstats_get != NULL) {
1897 /* Retrieve the xstats from the driver at the end of the
1900 xcount = (*dev->dev_ops->xstats_get)(dev,
1901 xstats ? xstats + count : NULL,
1902 (n > count) ? n - count : 0);
1908 if (n < count + xcount || xstats == NULL)
1909 return count + xcount;
1911 /* now fill the xstats structure */
1913 rte_eth_stats_get(port_id, ð_stats);
1916 for (i = 0; i < RTE_NB_STATS; i++) {
1917 stats_ptr = RTE_PTR_ADD(ð_stats,
1918 rte_stats_strings[i].offset);
1920 xstats[count++].value = val;
1924 for (q = 0; q < nb_rxqs; q++) {
1925 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1926 stats_ptr = RTE_PTR_ADD(ð_stats,
1927 rte_rxq_stats_strings[i].offset +
1928 q * sizeof(uint64_t));
1930 xstats[count++].value = val;
1935 for (q = 0; q < nb_txqs; q++) {
1936 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1937 stats_ptr = RTE_PTR_ADD(ð_stats,
1938 rte_txq_stats_strings[i].offset +
1939 q * sizeof(uint64_t));
1941 xstats[count++].value = val;
1945 for (i = 0; i < count; i++)
1947 /* add an offset to driver-specific stats */
1948 for ( ; i < count + xcount; i++)
1949 xstats[i].id += count;
1951 return count + xcount;
1954 /* reset ethdev extended statistics */
1956 rte_eth_xstats_reset(uint16_t port_id)
1958 struct rte_eth_dev *dev;
1960 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1961 dev = &rte_eth_devices[port_id];
1963 /* implemented by the driver */
1964 if (dev->dev_ops->xstats_reset != NULL) {
1965 (*dev->dev_ops->xstats_reset)(dev);
1969 /* fallback to default */
1970 rte_eth_stats_reset(port_id);
1974 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
1977 struct rte_eth_dev *dev;
1979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1981 dev = &rte_eth_devices[port_id];
1983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1984 return (*dev->dev_ops->queue_stats_mapping_set)
1985 (dev, queue_id, stat_idx, is_rx);
1990 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
1993 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1999 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2002 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2007 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2009 struct rte_eth_dev *dev;
2011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2012 dev = &rte_eth_devices[port_id];
2014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2015 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2019 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2021 struct rte_eth_dev *dev;
2022 const struct rte_eth_desc_lim lim = {
2023 .nb_max = UINT16_MAX,
2028 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2029 dev = &rte_eth_devices[port_id];
2031 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2032 dev_info->rx_desc_lim = lim;
2033 dev_info->tx_desc_lim = lim;
2035 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2036 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2037 dev_info->driver_name = dev->device->driver->name;
2038 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2039 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2043 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2044 uint32_t *ptypes, int num)
2047 struct rte_eth_dev *dev;
2048 const uint32_t *all_ptypes;
2050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051 dev = &rte_eth_devices[port_id];
2052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2053 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2058 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2059 if (all_ptypes[i] & ptype_mask) {
2061 ptypes[j] = all_ptypes[i];
2069 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2071 struct rte_eth_dev *dev;
2073 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2074 dev = &rte_eth_devices[port_id];
2075 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2080 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2082 struct rte_eth_dev *dev;
2084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2086 dev = &rte_eth_devices[port_id];
2087 *mtu = dev->data->mtu;
2092 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2095 struct rte_eth_dev *dev;
2097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2098 dev = &rte_eth_devices[port_id];
2099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2101 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2103 dev->data->mtu = mtu;
2109 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2111 struct rte_eth_dev *dev;
2114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2115 dev = &rte_eth_devices[port_id];
2116 if (!(dev->data->dev_conf.rxmode.offloads &
2117 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2118 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2122 if (vlan_id > 4095) {
2123 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2124 port_id, (unsigned) vlan_id);
2127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2129 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2131 struct rte_vlan_filter_conf *vfc;
2135 vfc = &dev->data->vlan_filter_conf;
2136 vidx = vlan_id / 64;
2137 vbit = vlan_id % 64;
2140 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2142 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2149 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2152 struct rte_eth_dev *dev;
2154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2155 dev = &rte_eth_devices[port_id];
2156 if (rx_queue_id >= dev->data->nb_rx_queues) {
2157 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2162 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2168 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2169 enum rte_vlan_type vlan_type,
2172 struct rte_eth_dev *dev;
2174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2175 dev = &rte_eth_devices[port_id];
2176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2178 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2182 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2184 struct rte_eth_dev *dev;
2188 uint64_t orig_offloads;
2190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2191 dev = &rte_eth_devices[port_id];
2193 /* save original values in case of failure */
2194 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2196 /*check which option changed by application*/
2197 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2198 org = !!(dev->data->dev_conf.rxmode.offloads &
2199 DEV_RX_OFFLOAD_VLAN_STRIP);
2202 dev->data->dev_conf.rxmode.offloads |=
2203 DEV_RX_OFFLOAD_VLAN_STRIP;
2205 dev->data->dev_conf.rxmode.offloads &=
2206 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2207 mask |= ETH_VLAN_STRIP_MASK;
2210 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2211 org = !!(dev->data->dev_conf.rxmode.offloads &
2212 DEV_RX_OFFLOAD_VLAN_FILTER);
2215 dev->data->dev_conf.rxmode.offloads |=
2216 DEV_RX_OFFLOAD_VLAN_FILTER;
2218 dev->data->dev_conf.rxmode.offloads &=
2219 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2220 mask |= ETH_VLAN_FILTER_MASK;
2223 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2224 org = !!(dev->data->dev_conf.rxmode.offloads &
2225 DEV_RX_OFFLOAD_VLAN_EXTEND);
2228 dev->data->dev_conf.rxmode.offloads |=
2229 DEV_RX_OFFLOAD_VLAN_EXTEND;
2231 dev->data->dev_conf.rxmode.offloads &=
2232 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2233 mask |= ETH_VLAN_EXTEND_MASK;
2240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2243 * Convert to the offload bitfield API just in case the underlying PMD
2244 * still supporting it.
2246 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2247 &dev->data->dev_conf.rxmode);
2248 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2250 /* hit an error restore original values */
2251 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2252 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2253 &dev->data->dev_conf.rxmode);
2260 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2262 struct rte_eth_dev *dev;
2265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2266 dev = &rte_eth_devices[port_id];
2268 if (dev->data->dev_conf.rxmode.offloads &
2269 DEV_RX_OFFLOAD_VLAN_STRIP)
2270 ret |= ETH_VLAN_STRIP_OFFLOAD;
2272 if (dev->data->dev_conf.rxmode.offloads &
2273 DEV_RX_OFFLOAD_VLAN_FILTER)
2274 ret |= ETH_VLAN_FILTER_OFFLOAD;
2276 if (dev->data->dev_conf.rxmode.offloads &
2277 DEV_RX_OFFLOAD_VLAN_EXTEND)
2278 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2284 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2286 struct rte_eth_dev *dev;
2288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2289 dev = &rte_eth_devices[port_id];
2290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2291 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2297 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2299 struct rte_eth_dev *dev;
2301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2304 memset(fc_conf, 0, sizeof(*fc_conf));
2305 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2309 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2311 struct rte_eth_dev *dev;
2313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2314 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2315 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2319 dev = &rte_eth_devices[port_id];
2320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2321 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2325 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2326 struct rte_eth_pfc_conf *pfc_conf)
2328 struct rte_eth_dev *dev;
2330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2331 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2332 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2336 dev = &rte_eth_devices[port_id];
2337 /* High water, low water validation are device specific */
2338 if (*dev->dev_ops->priority_flow_ctrl_set)
2339 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2344 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2352 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2353 for (i = 0; i < num; i++) {
2354 if (reta_conf[i].mask)
2362 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2366 uint16_t i, idx, shift;
2372 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2376 for (i = 0; i < reta_size; i++) {
2377 idx = i / RTE_RETA_GROUP_SIZE;
2378 shift = i % RTE_RETA_GROUP_SIZE;
2379 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2380 (reta_conf[idx].reta[shift] >= max_rxq)) {
2381 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2382 "the maximum rxq index: %u\n", idx, shift,
2383 reta_conf[idx].reta[shift], max_rxq);
2392 rte_eth_dev_rss_reta_update(uint16_t port_id,
2393 struct rte_eth_rss_reta_entry64 *reta_conf,
2396 struct rte_eth_dev *dev;
2399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2400 /* Check mask bits */
2401 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2405 dev = &rte_eth_devices[port_id];
2407 /* Check entry value */
2408 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2409 dev->data->nb_rx_queues);
2413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2414 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2418 rte_eth_dev_rss_reta_query(uint16_t port_id,
2419 struct rte_eth_rss_reta_entry64 *reta_conf,
2422 struct rte_eth_dev *dev;
2425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 /* Check mask bits */
2428 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2432 dev = &rte_eth_devices[port_id];
2433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2434 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2438 rte_eth_dev_rss_hash_update(uint16_t port_id,
2439 struct rte_eth_rss_conf *rss_conf)
2441 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2444 dev = &rte_eth_devices[port_id];
2445 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2446 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2450 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2451 struct rte_eth_rss_conf *rss_conf)
2453 struct rte_eth_dev *dev;
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2456 dev = &rte_eth_devices[port_id];
2457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2458 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2462 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2463 struct rte_eth_udp_tunnel *udp_tunnel)
2465 struct rte_eth_dev *dev;
2467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2468 if (udp_tunnel == NULL) {
2469 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2473 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2474 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2478 dev = &rte_eth_devices[port_id];
2479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2480 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2484 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2485 struct rte_eth_udp_tunnel *udp_tunnel)
2487 struct rte_eth_dev *dev;
2489 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2490 dev = &rte_eth_devices[port_id];
2492 if (udp_tunnel == NULL) {
2493 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2497 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2498 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2503 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2507 rte_eth_led_on(uint16_t port_id)
2509 struct rte_eth_dev *dev;
2511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2512 dev = &rte_eth_devices[port_id];
2513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2514 return (*dev->dev_ops->dev_led_on)(dev);
2518 rte_eth_led_off(uint16_t port_id)
2520 struct rte_eth_dev *dev;
2522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2523 dev = &rte_eth_devices[port_id];
2524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2525 return (*dev->dev_ops->dev_led_off)(dev);
2529 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2533 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2535 struct rte_eth_dev_info dev_info;
2536 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2540 rte_eth_dev_info_get(port_id, &dev_info);
2542 for (i = 0; i < dev_info.max_mac_addrs; i++)
2543 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2549 static const struct ether_addr null_mac_addr;
2552 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2555 struct rte_eth_dev *dev;
2560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2561 dev = &rte_eth_devices[port_id];
2562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2564 if (is_zero_ether_addr(addr)) {
2565 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2569 if (pool >= ETH_64_POOLS) {
2570 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2574 index = get_mac_addr_index(port_id, addr);
2576 index = get_mac_addr_index(port_id, &null_mac_addr);
2578 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2583 pool_mask = dev->data->mac_pool_sel[index];
2585 /* Check if both MAC address and pool is already there, and do nothing */
2586 if (pool_mask & (1ULL << pool))
2591 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2594 /* Update address in NIC data structure */
2595 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2597 /* Update pool bitmap in NIC data structure */
2598 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2605 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2607 struct rte_eth_dev *dev;
2610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2611 dev = &rte_eth_devices[port_id];
2612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2614 index = get_mac_addr_index(port_id, addr);
2616 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2618 } else if (index < 0)
2619 return 0; /* Do nothing if address wasn't found */
2622 (*dev->dev_ops->mac_addr_remove)(dev, index);
2624 /* Update address in NIC data structure */
2625 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2627 /* reset pool bitmap */
2628 dev->data->mac_pool_sel[index] = 0;
2634 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2636 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2640 if (!is_valid_assigned_ether_addr(addr))
2643 dev = &rte_eth_devices[port_id];
2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2646 /* Update default address in NIC data structure */
2647 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2649 (*dev->dev_ops->mac_addr_set)(dev, addr);
2656 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2660 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2662 struct rte_eth_dev_info dev_info;
2663 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2666 rte_eth_dev_info_get(port_id, &dev_info);
2667 if (!dev->data->hash_mac_addrs)
2670 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2671 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2672 ETHER_ADDR_LEN) == 0)
2679 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2684 struct rte_eth_dev *dev;
2686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2689 if (is_zero_ether_addr(addr)) {
2690 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2695 index = get_hash_mac_addr_index(port_id, addr);
2696 /* Check if it's already there, and do nothing */
2697 if ((index >= 0) && (on))
2702 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2703 "set in UTA\n", port_id);
2707 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2709 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2716 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2718 /* Update address in NIC data structure */
2720 ether_addr_copy(addr,
2721 &dev->data->hash_mac_addrs[index]);
2723 ether_addr_copy(&null_mac_addr,
2724 &dev->data->hash_mac_addrs[index]);
2731 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2733 struct rte_eth_dev *dev;
2735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2737 dev = &rte_eth_devices[port_id];
2739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2740 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2743 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2746 struct rte_eth_dev *dev;
2747 struct rte_eth_dev_info dev_info;
2748 struct rte_eth_link link;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2752 dev = &rte_eth_devices[port_id];
2753 rte_eth_dev_info_get(port_id, &dev_info);
2754 link = dev->data->dev_link;
2756 if (queue_idx > dev_info.max_tx_queues) {
2757 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2758 "invalid queue id=%d\n", port_id, queue_idx);
2762 if (tx_rate > link.link_speed) {
2763 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2764 "bigger than link speed= %d\n",
2765 tx_rate, link.link_speed);
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2770 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2774 rte_eth_mirror_rule_set(uint16_t port_id,
2775 struct rte_eth_mirror_conf *mirror_conf,
2776 uint8_t rule_id, uint8_t on)
2778 struct rte_eth_dev *dev;
2780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 if (mirror_conf->rule_type == 0) {
2782 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2786 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2787 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2792 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2793 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2794 (mirror_conf->pool_mask == 0)) {
2795 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2799 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2800 mirror_conf->vlan.vlan_mask == 0) {
2801 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2805 dev = &rte_eth_devices[port_id];
2806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2808 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2812 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2814 struct rte_eth_dev *dev;
2816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2818 dev = &rte_eth_devices[port_id];
2819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2821 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2825 rte_eth_dev_callback_register(uint16_t port_id,
2826 enum rte_eth_event_type event,
2827 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2829 struct rte_eth_dev *dev;
2830 struct rte_eth_dev_callback *user_cb;
2835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2837 dev = &rte_eth_devices[port_id];
2838 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2840 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2841 if (user_cb->cb_fn == cb_fn &&
2842 user_cb->cb_arg == cb_arg &&
2843 user_cb->event == event) {
2848 /* create a new callback. */
2849 if (user_cb == NULL) {
2850 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2851 sizeof(struct rte_eth_dev_callback), 0);
2852 if (user_cb != NULL) {
2853 user_cb->cb_fn = cb_fn;
2854 user_cb->cb_arg = cb_arg;
2855 user_cb->event = event;
2856 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2860 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2861 return (user_cb == NULL) ? -ENOMEM : 0;
2865 rte_eth_dev_callback_unregister(uint16_t port_id,
2866 enum rte_eth_event_type event,
2867 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2870 struct rte_eth_dev *dev;
2871 struct rte_eth_dev_callback *cb, *next;
2876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2878 dev = &rte_eth_devices[port_id];
2879 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2882 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2884 next = TAILQ_NEXT(cb, next);
2886 if (cb->cb_fn != cb_fn || cb->event != event ||
2887 (cb->cb_arg != (void *)-1 &&
2888 cb->cb_arg != cb_arg))
2892 * if this callback is not executing right now,
2895 if (cb->active == 0) {
2896 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2903 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2908 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2909 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2911 struct rte_eth_dev_callback *cb_lst;
2912 struct rte_eth_dev_callback dev_cb;
2915 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2916 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2917 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2922 dev_cb.cb_arg = cb_arg;
2923 if (ret_param != NULL)
2924 dev_cb.ret_param = ret_param;
2926 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2927 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2928 dev_cb.cb_arg, dev_cb.ret_param);
2929 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2932 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2937 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2940 struct rte_eth_dev *dev;
2941 struct rte_intr_handle *intr_handle;
2945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2947 dev = &rte_eth_devices[port_id];
2949 if (!dev->intr_handle) {
2950 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2954 intr_handle = dev->intr_handle;
2955 if (!intr_handle->intr_vec) {
2956 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2960 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2961 vec = intr_handle->intr_vec[qid];
2962 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2963 if (rc && rc != -EEXIST) {
2964 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2965 " op %d epfd %d vec %u\n",
2966 port_id, qid, op, epfd, vec);
2973 const struct rte_memzone *
2974 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2975 uint16_t queue_id, size_t size, unsigned align,
2978 char z_name[RTE_MEMZONE_NAMESIZE];
2979 const struct rte_memzone *mz;
2981 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2982 dev->device->driver->name, ring_name,
2983 dev->data->port_id, queue_id);
2985 mz = rte_memzone_lookup(z_name);
2989 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
2993 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
2994 int epfd, int op, void *data)
2997 struct rte_eth_dev *dev;
2998 struct rte_intr_handle *intr_handle;
3001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3003 dev = &rte_eth_devices[port_id];
3004 if (queue_id >= dev->data->nb_rx_queues) {
3005 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3009 if (!dev->intr_handle) {
3010 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3014 intr_handle = dev->intr_handle;
3015 if (!intr_handle->intr_vec) {
3016 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3020 vec = intr_handle->intr_vec[queue_id];
3021 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3022 if (rc && rc != -EEXIST) {
3023 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3024 " op %d epfd %d vec %u\n",
3025 port_id, queue_id, op, epfd, vec);
3033 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3036 struct rte_eth_dev *dev;
3038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3040 dev = &rte_eth_devices[port_id];
3042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3043 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3047 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3050 struct rte_eth_dev *dev;
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3054 dev = &rte_eth_devices[port_id];
3056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3057 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3062 rte_eth_dev_filter_supported(uint16_t port_id,
3063 enum rte_filter_type filter_type)
3065 struct rte_eth_dev *dev;
3067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3069 dev = &rte_eth_devices[port_id];
3070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3071 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3072 RTE_ETH_FILTER_NOP, NULL);
3076 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3077 enum rte_filter_op filter_op, void *arg)
3079 struct rte_eth_dev *dev;
3081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3083 dev = &rte_eth_devices[port_id];
3084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3085 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3089 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3090 rte_rx_callback_fn fn, void *user_param)
3092 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3093 rte_errno = ENOTSUP;
3096 /* check input parameters */
3097 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3098 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3102 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3110 cb->param = user_param;
3112 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3113 /* Add the callbacks in fifo order. */
3114 struct rte_eth_rxtx_callback *tail =
3115 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3118 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3125 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3131 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3132 rte_rx_callback_fn fn, void *user_param)
3134 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3135 rte_errno = ENOTSUP;
3138 /* check input parameters */
3139 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3140 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3145 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3153 cb->param = user_param;
3155 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3156 /* Add the callbacks at fisrt position*/
3157 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3159 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3160 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3166 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3167 rte_tx_callback_fn fn, void *user_param)
3169 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3170 rte_errno = ENOTSUP;
3173 /* check input parameters */
3174 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3175 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3180 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3188 cb->param = user_param;
3190 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3191 /* Add the callbacks in fifo order. */
3192 struct rte_eth_rxtx_callback *tail =
3193 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3196 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3203 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3209 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3210 struct rte_eth_rxtx_callback *user_cb)
3212 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3215 /* Check input parameters. */
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3217 if (user_cb == NULL ||
3218 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3221 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3222 struct rte_eth_rxtx_callback *cb;
3223 struct rte_eth_rxtx_callback **prev_cb;
3226 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3227 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3228 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3230 if (cb == user_cb) {
3231 /* Remove the user cb from the callback list. */
3232 *prev_cb = cb->next;
3237 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3243 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3244 struct rte_eth_rxtx_callback *user_cb)
3246 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3249 /* Check input parameters. */
3250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3251 if (user_cb == NULL ||
3252 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3255 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3257 struct rte_eth_rxtx_callback *cb;
3258 struct rte_eth_rxtx_callback **prev_cb;
3260 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3261 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3262 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3264 if (cb == user_cb) {
3265 /* Remove the user cb from the callback list. */
3266 *prev_cb = cb->next;
3271 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3277 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3278 struct rte_eth_rxq_info *qinfo)
3280 struct rte_eth_dev *dev;
3282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3287 dev = &rte_eth_devices[port_id];
3288 if (queue_id >= dev->data->nb_rx_queues) {
3289 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3293 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3295 memset(qinfo, 0, sizeof(*qinfo));
3296 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3301 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3302 struct rte_eth_txq_info *qinfo)
3304 struct rte_eth_dev *dev;
3306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3311 dev = &rte_eth_devices[port_id];
3312 if (queue_id >= dev->data->nb_tx_queues) {
3313 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3317 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3319 memset(qinfo, 0, sizeof(*qinfo));
3320 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3325 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3326 struct ether_addr *mc_addr_set,
3327 uint32_t nb_mc_addr)
3329 struct rte_eth_dev *dev;
3331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3333 dev = &rte_eth_devices[port_id];
3334 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3335 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3339 rte_eth_timesync_enable(uint16_t port_id)
3341 struct rte_eth_dev *dev;
3343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3344 dev = &rte_eth_devices[port_id];
3346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3347 return (*dev->dev_ops->timesync_enable)(dev);
3351 rte_eth_timesync_disable(uint16_t port_id)
3353 struct rte_eth_dev *dev;
3355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3356 dev = &rte_eth_devices[port_id];
3358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3359 return (*dev->dev_ops->timesync_disable)(dev);
3363 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3366 struct rte_eth_dev *dev;
3368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3369 dev = &rte_eth_devices[port_id];
3371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3372 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3376 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3377 struct timespec *timestamp)
3379 struct rte_eth_dev *dev;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3382 dev = &rte_eth_devices[port_id];
3384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3385 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3389 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3391 struct rte_eth_dev *dev;
3393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3394 dev = &rte_eth_devices[port_id];
3396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3397 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3401 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3403 struct rte_eth_dev *dev;
3405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3406 dev = &rte_eth_devices[port_id];
3408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3409 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3413 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3415 struct rte_eth_dev *dev;
3417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3418 dev = &rte_eth_devices[port_id];
3420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3421 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3425 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3427 struct rte_eth_dev *dev;
3429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3431 dev = &rte_eth_devices[port_id];
3432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3433 return (*dev->dev_ops->get_reg)(dev, info);
3437 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3439 struct rte_eth_dev *dev;
3441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3443 dev = &rte_eth_devices[port_id];
3444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3445 return (*dev->dev_ops->get_eeprom_length)(dev);
3449 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3451 struct rte_eth_dev *dev;
3453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3455 dev = &rte_eth_devices[port_id];
3456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3457 return (*dev->dev_ops->get_eeprom)(dev, info);
3461 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3463 struct rte_eth_dev *dev;
3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3467 dev = &rte_eth_devices[port_id];
3468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3469 return (*dev->dev_ops->set_eeprom)(dev, info);
3473 rte_eth_dev_get_dcb_info(uint16_t port_id,
3474 struct rte_eth_dcb_info *dcb_info)
3476 struct rte_eth_dev *dev;
3478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3480 dev = &rte_eth_devices[port_id];
3481 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3484 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3488 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3489 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3491 struct rte_eth_dev *dev;
3493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3494 if (l2_tunnel == NULL) {
3495 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3499 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3500 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3504 dev = &rte_eth_devices[port_id];
3505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3507 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3511 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3512 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3516 struct rte_eth_dev *dev;
3518 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3520 if (l2_tunnel == NULL) {
3521 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3525 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3526 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3531 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3535 dev = &rte_eth_devices[port_id];
3536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3538 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3542 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3543 const struct rte_eth_desc_lim *desc_lim)
3545 if (desc_lim->nb_align != 0)
3546 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3548 if (desc_lim->nb_max != 0)
3549 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3551 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3555 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3556 uint16_t *nb_rx_desc,
3557 uint16_t *nb_tx_desc)
3559 struct rte_eth_dev *dev;
3560 struct rte_eth_dev_info dev_info;
3562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564 dev = &rte_eth_devices[port_id];
3565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3567 rte_eth_dev_info_get(port_id, &dev_info);
3569 if (nb_rx_desc != NULL)
3570 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3572 if (nb_tx_desc != NULL)
3573 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3579 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3581 struct rte_eth_dev *dev;
3583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3588 dev = &rte_eth_devices[port_id];
3590 if (*dev->dev_ops->pool_ops_supported == NULL)
3591 return 1; /* all pools are supported */
3593 return (*dev->dev_ops->pool_ops_supported)(dev, pool);