4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
62 #include <rte_mempool.h>
63 #include <rte_malloc.h>
65 #include <rte_errno.h>
66 #include <rte_spinlock.h>
67 #include <rte_string_fns.h>
69 #include "rte_ether.h"
70 #include "rte_ethdev.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* store statistics names and its offset in stats structure */
81 struct rte_eth_xstats_name_off {
82 char name[RTE_ETH_XSTATS_NAME_SIZE];
86 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
87 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
88 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
89 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
90 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
91 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
92 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
93 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
97 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
102 {"errors", offsetof(struct rte_eth_stats, q_errors)},
105 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
106 sizeof(rte_rxq_stats_strings[0]))
108 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
109 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
110 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
112 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
113 sizeof(rte_txq_stats_strings[0]))
117 * The user application callback description.
119 * It contains callback address to be registered by user application,
120 * the pointer to the parameters for callback, and the event type.
122 struct rte_eth_dev_callback {
123 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
124 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
125 void *cb_arg; /**< Parameter for callback */
126 enum rte_eth_event_type event; /**< Interrupt event type */
127 uint32_t active; /**< Callback is executing */
141 rte_eth_dev_data_alloc(void)
143 const unsigned flags = 0;
144 const struct rte_memzone *mz;
146 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
147 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
148 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
149 rte_socket_id(), flags);
151 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
153 rte_panic("Cannot allocate memzone for ethernet port data\n");
155 rte_eth_dev_data = mz->addr;
156 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
157 memset(rte_eth_dev_data, 0,
158 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
162 rte_eth_dev_allocated(const char *name)
166 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
167 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
168 strcmp(rte_eth_devices[i].data->name, name) == 0)
169 return &rte_eth_devices[i];
175 rte_eth_dev_find_free_port(void)
179 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
180 if (rte_eth_devices[i].attached == DEV_DETACHED)
183 return RTE_MAX_ETHPORTS;
187 rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
190 struct rte_eth_dev *eth_dev;
192 port_id = rte_eth_dev_find_free_port();
193 if (port_id == RTE_MAX_ETHPORTS) {
194 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
198 if (rte_eth_dev_data == NULL)
199 rte_eth_dev_data_alloc();
201 if (rte_eth_dev_allocated(name) != NULL) {
202 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
207 eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
210 eth_dev->data->port_id = port_id;
211 eth_dev->attached = DEV_ATTACHED;
212 eth_dev->dev_type = type;
218 rte_eth_dev_create_unique_device_name(char *name, size_t size,
219 struct rte_pci_device *pci_dev)
223 ret = snprintf(name, size, "%d:%d.%d",
224 pci_dev->addr.bus, pci_dev->addr.devid,
225 pci_dev->addr.function);
232 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
237 eth_dev->attached = DEV_DETACHED;
243 rte_eth_dev_init(struct rte_pci_driver *pci_drv,
244 struct rte_pci_device *pci_dev)
246 struct eth_driver *eth_drv;
247 struct rte_eth_dev *eth_dev;
248 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
252 eth_drv = (struct eth_driver *)pci_drv;
254 /* Create unique Ethernet device name using PCI address */
255 rte_eth_dev_create_unique_device_name(ethdev_name,
256 sizeof(ethdev_name), pci_dev);
258 eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
262 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
263 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
264 eth_drv->dev_private_size,
265 RTE_CACHE_LINE_SIZE);
266 if (eth_dev->data->dev_private == NULL)
267 rte_panic("Cannot allocate memzone for private port data\n");
269 eth_dev->pci_dev = pci_dev;
270 eth_dev->driver = eth_drv;
271 eth_dev->data->rx_mbuf_alloc_failed = 0;
273 /* init user callbacks */
274 TAILQ_INIT(&(eth_dev->link_intr_cbs));
277 * Set the default MTU.
279 eth_dev->data->mtu = ETHER_MTU;
281 /* Invoke PMD device initialization function */
282 diag = (*eth_drv->eth_dev_init)(eth_dev);
286 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
288 (unsigned) pci_dev->id.vendor_id,
289 (unsigned) pci_dev->id.device_id);
290 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
291 rte_free(eth_dev->data->dev_private);
292 rte_eth_dev_release_port(eth_dev);
297 rte_eth_dev_uninit(struct rte_pci_device *pci_dev)
299 const struct eth_driver *eth_drv;
300 struct rte_eth_dev *eth_dev;
301 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
307 /* Create unique Ethernet device name using PCI address */
308 rte_eth_dev_create_unique_device_name(ethdev_name,
309 sizeof(ethdev_name), pci_dev);
311 eth_dev = rte_eth_dev_allocated(ethdev_name);
315 eth_drv = (const struct eth_driver *)pci_dev->driver;
317 /* Invoke PMD device uninit function */
318 if (*eth_drv->eth_dev_uninit) {
319 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
324 /* free ether device */
325 rte_eth_dev_release_port(eth_dev);
327 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
328 rte_free(eth_dev->data->dev_private);
330 eth_dev->pci_dev = NULL;
331 eth_dev->driver = NULL;
332 eth_dev->data = NULL;
338 * Register an Ethernet [Poll Mode] driver.
340 * Function invoked by the initialization function of an Ethernet driver
341 * to simultaneously register itself as a PCI driver and as an Ethernet
343 * Invokes the rte_eal_pci_register() function to register the *pci_drv*
344 * structure embedded in the *eth_drv* structure, after having stored the
345 * address of the rte_eth_dev_init() function in the *devinit* field of
346 * the *pci_drv* structure.
347 * During the PCI probing phase, the rte_eth_dev_init() function is
348 * invoked for each PCI [Ethernet device] matching the embedded PCI
349 * identifiers provided by the driver.
352 rte_eth_driver_register(struct eth_driver *eth_drv)
354 eth_drv->pci_drv.devinit = rte_eth_dev_init;
355 eth_drv->pci_drv.devuninit = rte_eth_dev_uninit;
356 rte_eal_pci_register(ð_drv->pci_drv);
360 rte_eth_dev_is_valid_port(uint8_t port_id)
362 if (port_id >= RTE_MAX_ETHPORTS ||
363 rte_eth_devices[port_id].attached != DEV_ATTACHED)
370 rte_eth_dev_socket_id(uint8_t port_id)
372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
373 return rte_eth_devices[port_id].data->numa_node;
377 rte_eth_dev_count(void)
382 static enum rte_eth_dev_type
383 rte_eth_dev_get_device_type(uint8_t port_id)
385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, RTE_ETH_DEV_UNKNOWN);
386 return rte_eth_devices[port_id].dev_type;
390 rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
395 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
399 *addr = rte_eth_devices[port_id].pci_dev->addr;
404 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
411 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
415 /* shouldn't check 'rte_eth_devices[i].data',
416 * because it might be overwritten by VDEV PMD */
417 tmp = rte_eth_dev_data[port_id].name;
423 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
428 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
432 *port_id = RTE_MAX_ETHPORTS;
434 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
437 rte_eth_dev_data[i].name, strlen(name))) {
448 rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
451 struct rte_pci_device *pci_dev = NULL;
454 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
458 *port_id = RTE_MAX_ETHPORTS;
460 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
462 pci_dev = rte_eth_devices[i].pci_dev;
465 !rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
476 rte_eth_dev_is_detachable(uint8_t port_id)
480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
482 switch (rte_eth_devices[port_id].data->kdrv) {
483 case RTE_KDRV_IGB_UIO:
484 case RTE_KDRV_UIO_GENERIC:
485 case RTE_KDRV_NIC_UIO:
492 dev_flags = rte_eth_devices[port_id].data->dev_flags;
493 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
494 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
500 /* attach the new physical device, then store port_id of the device */
502 rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
504 /* re-construct pci_device_list */
505 if (rte_eal_pci_scan())
507 /* Invoke probe func of the driver can handle the new device. */
508 if (rte_eal_pci_probe_one(addr))
511 if (rte_eth_dev_get_port_by_addr(addr, port_id))
519 /* detach the new physical device, then store pci_addr of the device */
521 rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
523 struct rte_pci_addr freed_addr;
524 struct rte_pci_addr vp;
526 /* get pci address by port id */
527 if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
530 /* Zeroed pci addr means the port comes from virtual device */
531 vp.domain = vp.bus = vp.devid = vp.function = 0;
532 if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
535 /* invoke devuninit func of the pci driver,
536 * also remove the device from pci_device_list */
537 if (rte_eal_pci_detach(&freed_addr))
546 /* attach the new virtual device, then store port_id of the device */
548 rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
550 char *name = NULL, *args = NULL;
553 /* parse vdevargs, then retrieve device name and args */
554 if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
557 /* walk around dev_driver_list to find the driver of the device,
558 * then invoke probe function of the driver.
559 * rte_eal_vdev_init() updates port_id allocated after
562 if (rte_eal_vdev_init(name, args))
565 if (rte_eth_dev_get_port_by_name(name, port_id))
576 /* detach the new virtual device, then store the name of the device */
578 rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
580 char name[RTE_ETH_NAME_MAX_LEN];
582 /* get device name by port id */
583 if (rte_eth_dev_get_name_by_port(port_id, name))
585 /* walk around dev_driver_list to find the driver of the device,
586 * then invoke uninit function of the driver */
587 if (rte_eal_vdev_uninit(name))
590 strncpy(vdevname, name, sizeof(name));
596 /* attach the new device, then store port_id of the device */
598 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
600 struct rte_pci_addr addr;
603 if ((devargs == NULL) || (port_id == NULL)) {
608 if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
609 ret = rte_eth_dev_attach_pdev(&addr, port_id);
613 ret = rte_eth_dev_attach_vdev(devargs, port_id);
620 RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
624 /* detach the device, then store the name of the device */
626 rte_eth_dev_detach(uint8_t port_id, char *name)
628 struct rte_pci_addr addr;
636 /* check whether the driver supports detach feature, or not */
637 if (rte_eth_dev_is_detachable(port_id))
640 if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
641 ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
645 ret = rte_eth_dev_detach_pdev(port_id, &addr);
649 snprintf(name, RTE_ETH_NAME_MAX_LEN,
651 addr.domain, addr.bus,
652 addr.devid, addr.function);
654 ret = rte_eth_dev_detach_vdev(port_id, name);
662 RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
667 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
669 uint16_t old_nb_queues = dev->data->nb_rx_queues;
673 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
674 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
675 sizeof(dev->data->rx_queues[0]) * nb_queues,
676 RTE_CACHE_LINE_SIZE);
677 if (dev->data->rx_queues == NULL) {
678 dev->data->nb_rx_queues = 0;
681 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
684 rxq = dev->data->rx_queues;
686 for (i = nb_queues; i < old_nb_queues; i++)
687 (*dev->dev_ops->rx_queue_release)(rxq[i]);
688 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
689 RTE_CACHE_LINE_SIZE);
692 if (nb_queues > old_nb_queues) {
693 uint16_t new_qs = nb_queues - old_nb_queues;
695 memset(rxq + old_nb_queues, 0,
696 sizeof(rxq[0]) * new_qs);
699 dev->data->rx_queues = rxq;
701 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
704 rxq = dev->data->rx_queues;
706 for (i = nb_queues; i < old_nb_queues; i++)
707 (*dev->dev_ops->rx_queue_release)(rxq[i]);
709 dev->data->nb_rx_queues = nb_queues;
714 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
716 struct rte_eth_dev *dev;
718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
720 dev = &rte_eth_devices[port_id];
721 if (rx_queue_id >= dev->data->nb_rx_queues) {
722 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
726 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
728 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
729 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
730 " already started\n",
731 rx_queue_id, port_id);
735 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
740 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
742 struct rte_eth_dev *dev;
744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
746 dev = &rte_eth_devices[port_id];
747 if (rx_queue_id >= dev->data->nb_rx_queues) {
748 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
754 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
755 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
756 " already stopped\n",
757 rx_queue_id, port_id);
761 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
766 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
768 struct rte_eth_dev *dev;
770 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
772 dev = &rte_eth_devices[port_id];
773 if (tx_queue_id >= dev->data->nb_tx_queues) {
774 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
780 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
781 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
782 " already started\n",
783 tx_queue_id, port_id);
787 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
792 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
794 struct rte_eth_dev *dev;
796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
798 dev = &rte_eth_devices[port_id];
799 if (tx_queue_id >= dev->data->nb_tx_queues) {
800 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
806 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
807 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
808 " already stopped\n",
809 tx_queue_id, port_id);
813 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
818 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
820 uint16_t old_nb_queues = dev->data->nb_tx_queues;
824 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
825 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
826 sizeof(dev->data->tx_queues[0]) * nb_queues,
827 RTE_CACHE_LINE_SIZE);
828 if (dev->data->tx_queues == NULL) {
829 dev->data->nb_tx_queues = 0;
832 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
835 txq = dev->data->tx_queues;
837 for (i = nb_queues; i < old_nb_queues; i++)
838 (*dev->dev_ops->tx_queue_release)(txq[i]);
839 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
840 RTE_CACHE_LINE_SIZE);
843 if (nb_queues > old_nb_queues) {
844 uint16_t new_qs = nb_queues - old_nb_queues;
846 memset(txq + old_nb_queues, 0,
847 sizeof(txq[0]) * new_qs);
850 dev->data->tx_queues = txq;
852 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
855 txq = dev->data->tx_queues;
857 for (i = nb_queues; i < old_nb_queues; i++)
858 (*dev->dev_ops->tx_queue_release)(txq[i]);
860 dev->data->nb_tx_queues = nb_queues;
865 rte_eth_speed_bitflag(uint32_t speed, int duplex)
868 case ETH_SPEED_NUM_10M:
869 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
870 case ETH_SPEED_NUM_100M:
871 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
872 case ETH_SPEED_NUM_1G:
873 return ETH_LINK_SPEED_1G;
874 case ETH_SPEED_NUM_2_5G:
875 return ETH_LINK_SPEED_2_5G;
876 case ETH_SPEED_NUM_5G:
877 return ETH_LINK_SPEED_5G;
878 case ETH_SPEED_NUM_10G:
879 return ETH_LINK_SPEED_10G;
880 case ETH_SPEED_NUM_20G:
881 return ETH_LINK_SPEED_20G;
882 case ETH_SPEED_NUM_25G:
883 return ETH_LINK_SPEED_25G;
884 case ETH_SPEED_NUM_40G:
885 return ETH_LINK_SPEED_40G;
886 case ETH_SPEED_NUM_50G:
887 return ETH_LINK_SPEED_50G;
888 case ETH_SPEED_NUM_56G:
889 return ETH_LINK_SPEED_56G;
890 case ETH_SPEED_NUM_100G:
891 return ETH_LINK_SPEED_100G;
898 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
899 const struct rte_eth_conf *dev_conf)
901 struct rte_eth_dev *dev;
902 struct rte_eth_dev_info dev_info;
905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
907 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
909 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
910 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
914 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
916 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
917 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
921 dev = &rte_eth_devices[port_id];
923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
926 if (dev->data->dev_started) {
928 "port %d must be stopped to allow configuration\n", port_id);
932 /* Copy the dev_conf parameter into the dev structure */
933 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
936 * Check that the numbers of RX and TX queues are not greater
937 * than the maximum number of RX and TX queues supported by the
940 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
942 if (nb_rx_q == 0 && nb_tx_q == 0) {
943 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
947 if (nb_rx_q > dev_info.max_rx_queues) {
948 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
949 port_id, nb_rx_q, dev_info.max_rx_queues);
953 if (nb_tx_q > dev_info.max_tx_queues) {
954 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
955 port_id, nb_tx_q, dev_info.max_tx_queues);
960 * If link state interrupt is enabled, check that the
961 * device supports it.
963 if ((dev_conf->intr_conf.lsc == 1) &&
964 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
965 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
966 dev->data->drv_name);
971 * If jumbo frames are enabled, check that the maximum RX packet
972 * length is supported by the configured device.
974 if (dev_conf->rxmode.jumbo_frame == 1) {
975 if (dev_conf->rxmode.max_rx_pkt_len >
976 dev_info.max_rx_pktlen) {
977 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
978 " > max valid value %u\n",
980 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
981 (unsigned)dev_info.max_rx_pktlen);
983 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
984 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
985 " < min valid value %u\n",
987 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
988 (unsigned)ETHER_MIN_LEN);
992 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
993 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
994 /* Use default value */
995 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1000 * Setup new number of RX/TX queues and reconfigure device.
1002 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1004 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1009 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1011 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1013 rte_eth_dev_rx_queue_config(dev, 0);
1017 diag = (*dev->dev_ops->dev_configure)(dev);
1019 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1021 rte_eth_dev_rx_queue_config(dev, 0);
1022 rte_eth_dev_tx_queue_config(dev, 0);
1030 rte_eth_dev_config_restore(uint8_t port_id)
1032 struct rte_eth_dev *dev;
1033 struct rte_eth_dev_info dev_info;
1034 struct ether_addr addr;
1038 dev = &rte_eth_devices[port_id];
1040 rte_eth_dev_info_get(port_id, &dev_info);
1042 if (RTE_ETH_DEV_SRIOV(dev).active)
1043 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1045 /* replay MAC address configuration */
1046 for (i = 0; i < dev_info.max_mac_addrs; i++) {
1047 addr = dev->data->mac_addrs[i];
1049 /* skip zero address */
1050 if (is_zero_ether_addr(&addr))
1053 /* add address to the hardware */
1054 if (*dev->dev_ops->mac_addr_add &&
1055 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
1056 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1058 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1060 /* exit the loop but not return an error */
1065 /* replay promiscuous configuration */
1066 if (rte_eth_promiscuous_get(port_id) == 1)
1067 rte_eth_promiscuous_enable(port_id);
1068 else if (rte_eth_promiscuous_get(port_id) == 0)
1069 rte_eth_promiscuous_disable(port_id);
1071 /* replay all multicast configuration */
1072 if (rte_eth_allmulticast_get(port_id) == 1)
1073 rte_eth_allmulticast_enable(port_id);
1074 else if (rte_eth_allmulticast_get(port_id) == 0)
1075 rte_eth_allmulticast_disable(port_id);
1079 rte_eth_dev_start(uint8_t port_id)
1081 struct rte_eth_dev *dev;
1084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1086 dev = &rte_eth_devices[port_id];
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1090 if (dev->data->dev_started != 0) {
1091 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1092 " already started\n",
1097 diag = (*dev->dev_ops->dev_start)(dev);
1099 dev->data->dev_started = 1;
1103 rte_eth_dev_config_restore(port_id);
1105 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1107 (*dev->dev_ops->link_update)(dev, 0);
1113 rte_eth_dev_stop(uint8_t port_id)
1115 struct rte_eth_dev *dev;
1117 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1118 dev = &rte_eth_devices[port_id];
1120 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1122 if (dev->data->dev_started == 0) {
1123 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1124 " already stopped\n",
1129 dev->data->dev_started = 0;
1130 (*dev->dev_ops->dev_stop)(dev);
1134 rte_eth_dev_set_link_up(uint8_t port_id)
1136 struct rte_eth_dev *dev;
1138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1140 dev = &rte_eth_devices[port_id];
1142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1143 return (*dev->dev_ops->dev_set_link_up)(dev);
1147 rte_eth_dev_set_link_down(uint8_t port_id)
1149 struct rte_eth_dev *dev;
1151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1153 dev = &rte_eth_devices[port_id];
1155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1156 return (*dev->dev_ops->dev_set_link_down)(dev);
1160 rte_eth_dev_close(uint8_t port_id)
1162 struct rte_eth_dev *dev;
1164 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1165 dev = &rte_eth_devices[port_id];
1167 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1168 dev->data->dev_started = 0;
1169 (*dev->dev_ops->dev_close)(dev);
1171 rte_free(dev->data->rx_queues);
1172 dev->data->rx_queues = NULL;
1173 rte_free(dev->data->tx_queues);
1174 dev->data->tx_queues = NULL;
1178 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1179 uint16_t nb_rx_desc, unsigned int socket_id,
1180 const struct rte_eth_rxconf *rx_conf,
1181 struct rte_mempool *mp)
1184 uint32_t mbp_buf_size;
1185 struct rte_eth_dev *dev;
1186 struct rte_eth_dev_info dev_info;
1188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1190 dev = &rte_eth_devices[port_id];
1191 if (rx_queue_id >= dev->data->nb_rx_queues) {
1192 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow configuration\n", port_id);
1202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1206 * Check the size of the mbuf data buffer.
1207 * This value must be provided in the private data of the memory pool.
1208 * First check that the memory pool has a valid private data.
1210 rte_eth_dev_info_get(port_id, &dev_info);
1211 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1212 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1213 mp->name, (int) mp->private_data_size,
1214 (int) sizeof(struct rte_pktmbuf_pool_private));
1217 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1219 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1220 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1221 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1225 (int)(RTE_PKTMBUF_HEADROOM +
1226 dev_info.min_rx_bufsize),
1227 (int)RTE_PKTMBUF_HEADROOM,
1228 (int)dev_info.min_rx_bufsize);
1232 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1233 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1234 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1236 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1237 "should be: <= %hu, = %hu, and a product of %hu\n",
1239 dev_info.rx_desc_lim.nb_max,
1240 dev_info.rx_desc_lim.nb_min,
1241 dev_info.rx_desc_lim.nb_align);
1245 if (rx_conf == NULL)
1246 rx_conf = &dev_info.default_rxconf;
1248 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1249 socket_id, rx_conf, mp);
1251 if (!dev->data->min_rx_buf_size ||
1252 dev->data->min_rx_buf_size > mbp_buf_size)
1253 dev->data->min_rx_buf_size = mbp_buf_size;
1260 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1261 uint16_t nb_tx_desc, unsigned int socket_id,
1262 const struct rte_eth_txconf *tx_conf)
1264 struct rte_eth_dev *dev;
1265 struct rte_eth_dev_info dev_info;
1267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1269 dev = &rte_eth_devices[port_id];
1270 if (tx_queue_id >= dev->data->nb_tx_queues) {
1271 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1275 if (dev->data->dev_started) {
1276 RTE_PMD_DEBUG_TRACE(
1277 "port %d must be stopped to allow configuration\n", port_id);
1281 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1284 rte_eth_dev_info_get(port_id, &dev_info);
1286 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1287 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1288 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1289 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1290 "should be: <= %hu, = %hu, and a product of %hu\n",
1292 dev_info.tx_desc_lim.nb_max,
1293 dev_info.tx_desc_lim.nb_min,
1294 dev_info.tx_desc_lim.nb_align);
1298 if (tx_conf == NULL)
1299 tx_conf = &dev_info.default_txconf;
1301 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1302 socket_id, tx_conf);
1306 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1307 void *userdata __rte_unused)
1311 for (i = 0; i < unsent; i++)
1312 rte_pktmbuf_free(pkts[i]);
1316 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1319 uint64_t *count = userdata;
1322 for (i = 0; i < unsent; i++)
1323 rte_pktmbuf_free(pkts[i]);
1329 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1330 buffer_tx_error_fn cbfn, void *userdata)
1332 buffer->error_callback = cbfn;
1333 buffer->error_userdata = userdata;
1338 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1345 buffer->size = size;
1346 if (buffer->error_callback == NULL) {
1347 ret = rte_eth_tx_buffer_set_err_callback(
1348 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1355 rte_eth_promiscuous_enable(uint8_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1360 dev = &rte_eth_devices[port_id];
1362 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1363 (*dev->dev_ops->promiscuous_enable)(dev);
1364 dev->data->promiscuous = 1;
1368 rte_eth_promiscuous_disable(uint8_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1376 dev->data->promiscuous = 0;
1377 (*dev->dev_ops->promiscuous_disable)(dev);
1381 rte_eth_promiscuous_get(uint8_t port_id)
1383 struct rte_eth_dev *dev;
1385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1387 dev = &rte_eth_devices[port_id];
1388 return dev->data->promiscuous;
1392 rte_eth_allmulticast_enable(uint8_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1400 (*dev->dev_ops->allmulticast_enable)(dev);
1401 dev->data->all_multicast = 1;
1405 rte_eth_allmulticast_disable(uint8_t port_id)
1407 struct rte_eth_dev *dev;
1409 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1410 dev = &rte_eth_devices[port_id];
1412 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1413 dev->data->all_multicast = 0;
1414 (*dev->dev_ops->allmulticast_disable)(dev);
1418 rte_eth_allmulticast_get(uint8_t port_id)
1420 struct rte_eth_dev *dev;
1422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1424 dev = &rte_eth_devices[port_id];
1425 return dev->data->all_multicast;
1429 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1430 struct rte_eth_link *link)
1432 struct rte_eth_link *dst = link;
1433 struct rte_eth_link *src = &(dev->data->dev_link);
1435 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1436 *(uint64_t *)src) == 0)
1443 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1445 struct rte_eth_dev *dev;
1447 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1448 dev = &rte_eth_devices[port_id];
1450 if (dev->data->dev_conf.intr_conf.lsc != 0)
1451 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1453 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1454 (*dev->dev_ops->link_update)(dev, 1);
1455 *eth_link = dev->data->dev_link;
1460 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1462 struct rte_eth_dev *dev;
1464 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1465 dev = &rte_eth_devices[port_id];
1467 if (dev->data->dev_conf.intr_conf.lsc != 0)
1468 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1470 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1471 (*dev->dev_ops->link_update)(dev, 0);
1472 *eth_link = dev->data->dev_link;
1477 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1479 struct rte_eth_dev *dev;
1481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1483 dev = &rte_eth_devices[port_id];
1484 memset(stats, 0, sizeof(*stats));
1486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1487 (*dev->dev_ops->stats_get)(dev, stats);
1488 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1493 rte_eth_stats_reset(uint8_t port_id)
1495 struct rte_eth_dev *dev;
1497 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1498 dev = &rte_eth_devices[port_id];
1500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1501 (*dev->dev_ops->stats_reset)(dev);
1502 dev->data->rx_mbuf_alloc_failed = 0;
1505 /* retrieve ethdev extended statistics */
1507 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstats *xstats,
1510 struct rte_eth_stats eth_stats;
1511 struct rte_eth_dev *dev;
1512 unsigned count = 0, i, q;
1514 uint64_t val, *stats_ptr;
1516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1518 dev = &rte_eth_devices[port_id];
1520 /* Return generic statistics */
1521 count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1522 (dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1524 /* implemented by the driver */
1525 if (dev->dev_ops->xstats_get != NULL) {
1526 /* Retrieve the xstats from the driver at the end of the
1529 xcount = (*dev->dev_ops->xstats_get)(dev,
1530 xstats ? xstats + count : NULL,
1531 (n > count) ? n - count : 0);
1537 if (n < count + xcount || xstats == NULL)
1538 return count + xcount;
1540 /* now fill the xstats structure */
1542 rte_eth_stats_get(port_id, ð_stats);
1545 for (i = 0; i < RTE_NB_STATS; i++) {
1546 stats_ptr = RTE_PTR_ADD(ð_stats,
1547 rte_stats_strings[i].offset);
1549 snprintf(xstats[count].name, sizeof(xstats[count].name),
1550 "%s", rte_stats_strings[i].name);
1551 xstats[count++].value = val;
1555 for (q = 0; q < dev->data->nb_rx_queues; q++) {
1556 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1557 stats_ptr = RTE_PTR_ADD(ð_stats,
1558 rte_rxq_stats_strings[i].offset +
1559 q * sizeof(uint64_t));
1561 snprintf(xstats[count].name, sizeof(xstats[count].name),
1563 rte_rxq_stats_strings[i].name);
1564 xstats[count++].value = val;
1569 for (q = 0; q < dev->data->nb_tx_queues; q++) {
1570 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1571 stats_ptr = RTE_PTR_ADD(ð_stats,
1572 rte_txq_stats_strings[i].offset +
1573 q * sizeof(uint64_t));
1575 snprintf(xstats[count].name, sizeof(xstats[count].name),
1577 rte_txq_stats_strings[i].name);
1578 xstats[count++].value = val;
1582 return count + xcount;
1585 /* reset ethdev extended statistics */
1587 rte_eth_xstats_reset(uint8_t port_id)
1589 struct rte_eth_dev *dev;
1591 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1592 dev = &rte_eth_devices[port_id];
1594 /* implemented by the driver */
1595 if (dev->dev_ops->xstats_reset != NULL) {
1596 (*dev->dev_ops->xstats_reset)(dev);
1600 /* fallback to default */
1601 rte_eth_stats_reset(port_id);
1605 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1608 struct rte_eth_dev *dev;
1610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1612 dev = &rte_eth_devices[port_id];
1614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1615 return (*dev->dev_ops->queue_stats_mapping_set)
1616 (dev, queue_id, stat_idx, is_rx);
1621 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1624 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1630 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1633 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1639 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1641 struct rte_eth_dev *dev;
1642 const struct rte_eth_desc_lim lim = {
1643 .nb_max = UINT16_MAX,
1648 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1649 dev = &rte_eth_devices[port_id];
1651 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1652 dev_info->rx_desc_lim = lim;
1653 dev_info->tx_desc_lim = lim;
1655 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1656 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1657 dev_info->pci_dev = dev->pci_dev;
1658 dev_info->driver_name = dev->data->drv_name;
1662 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1663 uint32_t *ptypes, int num)
1666 struct rte_eth_dev *dev;
1667 const uint32_t *all_ptypes;
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1670 dev = &rte_eth_devices[port_id];
1671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1672 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1677 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1678 if (all_ptypes[i] & ptype_mask) {
1680 ptypes[j] = all_ptypes[i];
1688 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1690 struct rte_eth_dev *dev;
1692 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1693 dev = &rte_eth_devices[port_id];
1694 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1699 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1701 struct rte_eth_dev *dev;
1703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1705 dev = &rte_eth_devices[port_id];
1706 *mtu = dev->data->mtu;
1711 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1714 struct rte_eth_dev *dev;
1716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1717 dev = &rte_eth_devices[port_id];
1718 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1720 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1722 dev->data->mtu = mtu;
1728 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1730 struct rte_eth_dev *dev;
1732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1733 dev = &rte_eth_devices[port_id];
1734 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1735 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1739 if (vlan_id > 4095) {
1740 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1741 port_id, (unsigned) vlan_id);
1744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1746 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1750 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1752 struct rte_eth_dev *dev;
1754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1755 dev = &rte_eth_devices[port_id];
1756 if (rx_queue_id >= dev->data->nb_rx_queues) {
1757 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1762 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1768 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1769 enum rte_vlan_type vlan_type,
1772 struct rte_eth_dev *dev;
1774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1775 dev = &rte_eth_devices[port_id];
1776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1778 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1782 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1784 struct rte_eth_dev *dev;
1789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1790 dev = &rte_eth_devices[port_id];
1792 /*check which option changed by application*/
1793 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1794 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1796 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1797 mask |= ETH_VLAN_STRIP_MASK;
1800 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1801 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1803 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1804 mask |= ETH_VLAN_FILTER_MASK;
1807 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1808 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1810 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1811 mask |= ETH_VLAN_EXTEND_MASK;
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1819 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1825 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1827 struct rte_eth_dev *dev;
1830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1831 dev = &rte_eth_devices[port_id];
1833 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1834 ret |= ETH_VLAN_STRIP_OFFLOAD;
1836 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1837 ret |= ETH_VLAN_FILTER_OFFLOAD;
1839 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1840 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1846 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1848 struct rte_eth_dev *dev;
1850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1851 dev = &rte_eth_devices[port_id];
1852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1853 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1859 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1864 dev = &rte_eth_devices[port_id];
1865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1866 memset(fc_conf, 0, sizeof(*fc_conf));
1867 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1871 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1873 struct rte_eth_dev *dev;
1875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1876 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1877 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1881 dev = &rte_eth_devices[port_id];
1882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1883 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1887 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1889 struct rte_eth_dev *dev;
1891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1892 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1893 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1897 dev = &rte_eth_devices[port_id];
1898 /* High water, low water validation are device specific */
1899 if (*dev->dev_ops->priority_flow_ctrl_set)
1900 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1905 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1913 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1914 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1915 RTE_RETA_GROUP_SIZE);
1919 num = reta_size / RTE_RETA_GROUP_SIZE;
1920 for (i = 0; i < num; i++) {
1921 if (reta_conf[i].mask)
1929 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1933 uint16_t i, idx, shift;
1939 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1943 for (i = 0; i < reta_size; i++) {
1944 idx = i / RTE_RETA_GROUP_SIZE;
1945 shift = i % RTE_RETA_GROUP_SIZE;
1946 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1947 (reta_conf[idx].reta[shift] >= max_rxq)) {
1948 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1949 "the maximum rxq index: %u\n", idx, shift,
1950 reta_conf[idx].reta[shift], max_rxq);
1959 rte_eth_dev_rss_reta_update(uint8_t port_id,
1960 struct rte_eth_rss_reta_entry64 *reta_conf,
1963 struct rte_eth_dev *dev;
1966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1967 /* Check mask bits */
1968 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1972 dev = &rte_eth_devices[port_id];
1974 /* Check entry value */
1975 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1976 dev->data->nb_rx_queues);
1980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1981 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1985 rte_eth_dev_rss_reta_query(uint8_t port_id,
1986 struct rte_eth_rss_reta_entry64 *reta_conf,
1989 struct rte_eth_dev *dev;
1992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1994 /* Check mask bits */
1995 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1999 dev = &rte_eth_devices[port_id];
2000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2001 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2005 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2007 struct rte_eth_dev *dev;
2008 uint16_t rss_hash_protos;
2010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2011 rss_hash_protos = rss_conf->rss_hf;
2012 if ((rss_hash_protos != 0) &&
2013 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2014 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2018 dev = &rte_eth_devices[port_id];
2019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2020 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2024 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2025 struct rte_eth_rss_conf *rss_conf)
2027 struct rte_eth_dev *dev;
2029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2030 dev = &rte_eth_devices[port_id];
2031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2032 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2036 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2037 struct rte_eth_udp_tunnel *udp_tunnel)
2039 struct rte_eth_dev *dev;
2041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2042 if (udp_tunnel == NULL) {
2043 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2047 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2048 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2052 dev = &rte_eth_devices[port_id];
2053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2054 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2058 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2059 struct rte_eth_udp_tunnel *udp_tunnel)
2061 struct rte_eth_dev *dev;
2063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2064 dev = &rte_eth_devices[port_id];
2066 if (udp_tunnel == NULL) {
2067 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2071 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2072 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2077 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2081 rte_eth_led_on(uint8_t port_id)
2083 struct rte_eth_dev *dev;
2085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2086 dev = &rte_eth_devices[port_id];
2087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2088 return (*dev->dev_ops->dev_led_on)(dev);
2092 rte_eth_led_off(uint8_t port_id)
2094 struct rte_eth_dev *dev;
2096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2097 dev = &rte_eth_devices[port_id];
2098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2099 return (*dev->dev_ops->dev_led_off)(dev);
2103 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2107 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2109 struct rte_eth_dev_info dev_info;
2110 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2113 rte_eth_dev_info_get(port_id, &dev_info);
2115 for (i = 0; i < dev_info.max_mac_addrs; i++)
2116 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2122 static const struct ether_addr null_mac_addr;
2125 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2128 struct rte_eth_dev *dev;
2132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2133 dev = &rte_eth_devices[port_id];
2134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2136 if (is_zero_ether_addr(addr)) {
2137 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2141 if (pool >= ETH_64_POOLS) {
2142 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2146 index = get_mac_addr_index(port_id, addr);
2148 index = get_mac_addr_index(port_id, &null_mac_addr);
2150 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2155 pool_mask = dev->data->mac_pool_sel[index];
2157 /* Check if both MAC address and pool is already there, and do nothing */
2158 if (pool_mask & (1ULL << pool))
2163 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2165 /* Update address in NIC data structure */
2166 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2168 /* Update pool bitmap in NIC data structure */
2169 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2175 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2177 struct rte_eth_dev *dev;
2180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2181 dev = &rte_eth_devices[port_id];
2182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2184 index = get_mac_addr_index(port_id, addr);
2186 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2188 } else if (index < 0)
2189 return 0; /* Do nothing if address wasn't found */
2192 (*dev->dev_ops->mac_addr_remove)(dev, index);
2194 /* Update address in NIC data structure */
2195 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2197 /* reset pool bitmap */
2198 dev->data->mac_pool_sel[index] = 0;
2204 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2206 struct rte_eth_dev *dev;
2208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2210 if (!is_valid_assigned_ether_addr(addr))
2213 dev = &rte_eth_devices[port_id];
2214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2216 /* Update default address in NIC data structure */
2217 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2219 (*dev->dev_ops->mac_addr_set)(dev, addr);
2225 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2226 uint16_t rx_mode, uint8_t on)
2229 struct rte_eth_dev *dev;
2230 struct rte_eth_dev_info dev_info;
2232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2234 dev = &rte_eth_devices[port_id];
2235 rte_eth_dev_info_get(port_id, &dev_info);
2237 num_vfs = dev_info.max_vfs;
2239 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2244 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2248 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2252 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2256 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2258 struct rte_eth_dev_info dev_info;
2259 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2262 rte_eth_dev_info_get(port_id, &dev_info);
2263 if (!dev->data->hash_mac_addrs)
2266 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2267 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2268 ETHER_ADDR_LEN) == 0)
2275 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2280 struct rte_eth_dev *dev;
2282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2284 dev = &rte_eth_devices[port_id];
2285 if (is_zero_ether_addr(addr)) {
2286 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2291 index = get_hash_mac_addr_index(port_id, addr);
2292 /* Check if it's already there, and do nothing */
2293 if ((index >= 0) && (on))
2298 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2299 "set in UTA\n", port_id);
2303 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2305 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2312 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2314 /* Update address in NIC data structure */
2316 ether_addr_copy(addr,
2317 &dev->data->hash_mac_addrs[index]);
2319 ether_addr_copy(&null_mac_addr,
2320 &dev->data->hash_mac_addrs[index]);
2327 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2329 struct rte_eth_dev *dev;
2331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2333 dev = &rte_eth_devices[port_id];
2335 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2336 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2340 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2343 struct rte_eth_dev *dev;
2344 struct rte_eth_dev_info dev_info;
2346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2348 dev = &rte_eth_devices[port_id];
2349 rte_eth_dev_info_get(port_id, &dev_info);
2351 num_vfs = dev_info.max_vfs;
2353 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2358 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2362 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2365 struct rte_eth_dev *dev;
2366 struct rte_eth_dev_info dev_info;
2368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2370 dev = &rte_eth_devices[port_id];
2371 rte_eth_dev_info_get(port_id, &dev_info);
2373 num_vfs = dev_info.max_vfs;
2375 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2380 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2384 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2385 uint64_t vf_mask, uint8_t vlan_on)
2387 struct rte_eth_dev *dev;
2389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2391 dev = &rte_eth_devices[port_id];
2393 if (vlan_id > ETHER_MAX_VLAN_ID) {
2394 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2400 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2405 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2409 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2412 struct rte_eth_dev *dev;
2413 struct rte_eth_dev_info dev_info;
2414 struct rte_eth_link link;
2416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2418 dev = &rte_eth_devices[port_id];
2419 rte_eth_dev_info_get(port_id, &dev_info);
2420 link = dev->data->dev_link;
2422 if (queue_idx > dev_info.max_tx_queues) {
2423 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2424 "invalid queue id=%d\n", port_id, queue_idx);
2428 if (tx_rate > link.link_speed) {
2429 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2430 "bigger than link speed= %d\n",
2431 tx_rate, link.link_speed);
2435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2436 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2439 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2442 struct rte_eth_dev *dev;
2443 struct rte_eth_dev_info dev_info;
2444 struct rte_eth_link link;
2449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2451 dev = &rte_eth_devices[port_id];
2452 rte_eth_dev_info_get(port_id, &dev_info);
2453 link = dev->data->dev_link;
2455 if (vf > dev_info.max_vfs) {
2456 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2457 "invalid vf id=%d\n", port_id, vf);
2461 if (tx_rate > link.link_speed) {
2462 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2463 "bigger than link speed= %d\n",
2464 tx_rate, link.link_speed);
2468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2469 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2473 rte_eth_mirror_rule_set(uint8_t port_id,
2474 struct rte_eth_mirror_conf *mirror_conf,
2475 uint8_t rule_id, uint8_t on)
2477 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2480 if (mirror_conf->rule_type == 0) {
2481 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2485 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2486 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2491 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2492 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2493 (mirror_conf->pool_mask == 0)) {
2494 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2498 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2499 mirror_conf->vlan.vlan_mask == 0) {
2500 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2504 dev = &rte_eth_devices[port_id];
2505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2507 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2511 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2513 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2517 dev = &rte_eth_devices[port_id];
2518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2520 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2524 rte_eth_dev_callback_register(uint8_t port_id,
2525 enum rte_eth_event_type event,
2526 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2528 struct rte_eth_dev *dev;
2529 struct rte_eth_dev_callback *user_cb;
2534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2536 dev = &rte_eth_devices[port_id];
2537 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2539 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2540 if (user_cb->cb_fn == cb_fn &&
2541 user_cb->cb_arg == cb_arg &&
2542 user_cb->event == event) {
2547 /* create a new callback. */
2548 if (user_cb == NULL)
2549 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2550 sizeof(struct rte_eth_dev_callback), 0);
2551 if (user_cb != NULL) {
2552 user_cb->cb_fn = cb_fn;
2553 user_cb->cb_arg = cb_arg;
2554 user_cb->event = event;
2555 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2558 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2559 return (user_cb == NULL) ? -ENOMEM : 0;
2563 rte_eth_dev_callback_unregister(uint8_t port_id,
2564 enum rte_eth_event_type event,
2565 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2568 struct rte_eth_dev *dev;
2569 struct rte_eth_dev_callback *cb, *next;
2574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2576 dev = &rte_eth_devices[port_id];
2577 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2580 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2582 next = TAILQ_NEXT(cb, next);
2584 if (cb->cb_fn != cb_fn || cb->event != event ||
2585 (cb->cb_arg != (void *)-1 &&
2586 cb->cb_arg != cb_arg))
2590 * if this callback is not executing right now,
2593 if (cb->active == 0) {
2594 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2601 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2606 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2607 enum rte_eth_event_type event)
2609 struct rte_eth_dev_callback *cb_lst;
2610 struct rte_eth_dev_callback dev_cb;
2612 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2613 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2614 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2618 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2619 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2621 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2624 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2628 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2631 struct rte_eth_dev *dev;
2632 struct rte_intr_handle *intr_handle;
2636 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2638 dev = &rte_eth_devices[port_id];
2639 intr_handle = &dev->pci_dev->intr_handle;
2640 if (!intr_handle->intr_vec) {
2641 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2645 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2646 vec = intr_handle->intr_vec[qid];
2647 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2648 if (rc && rc != -EEXIST) {
2649 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2650 " op %d epfd %d vec %u\n",
2651 port_id, qid, op, epfd, vec);
2658 const struct rte_memzone *
2659 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2660 uint16_t queue_id, size_t size, unsigned align,
2663 char z_name[RTE_MEMZONE_NAMESIZE];
2664 const struct rte_memzone *mz;
2666 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2667 dev->driver->pci_drv.name, ring_name,
2668 dev->data->port_id, queue_id);
2670 mz = rte_memzone_lookup(z_name);
2674 if (rte_xen_dom0_supported())
2675 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2676 0, align, RTE_PGSIZE_2M);
2678 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2683 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2684 int epfd, int op, void *data)
2687 struct rte_eth_dev *dev;
2688 struct rte_intr_handle *intr_handle;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 dev = &rte_eth_devices[port_id];
2694 if (queue_id >= dev->data->nb_rx_queues) {
2695 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2699 intr_handle = &dev->pci_dev->intr_handle;
2700 if (!intr_handle->intr_vec) {
2701 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2705 vec = intr_handle->intr_vec[queue_id];
2706 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2707 if (rc && rc != -EEXIST) {
2708 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2709 " op %d epfd %d vec %u\n",
2710 port_id, queue_id, op, epfd, vec);
2718 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2721 struct rte_eth_dev *dev;
2723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2725 dev = &rte_eth_devices[port_id];
2727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2728 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2732 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2735 struct rte_eth_dev *dev;
2737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2739 dev = &rte_eth_devices[port_id];
2741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2742 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2745 #ifdef RTE_NIC_BYPASS
2746 int rte_eth_dev_bypass_init(uint8_t port_id)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2752 dev = &rte_eth_devices[port_id];
2753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2754 (*dev->dev_ops->bypass_init)(dev);
2759 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2761 struct rte_eth_dev *dev;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2767 (*dev->dev_ops->bypass_state_show)(dev, state);
2772 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2774 struct rte_eth_dev *dev;
2776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2778 dev = &rte_eth_devices[port_id];
2779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2780 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2785 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2787 struct rte_eth_dev *dev;
2789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2791 dev = &rte_eth_devices[port_id];
2792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2793 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2798 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2800 struct rte_eth_dev *dev;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 dev = &rte_eth_devices[port_id];
2806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2807 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2812 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2814 struct rte_eth_dev *dev;
2816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2818 dev = &rte_eth_devices[port_id];
2820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2821 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2826 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2828 struct rte_eth_dev *dev;
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2835 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2840 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2846 dev = &rte_eth_devices[port_id];
2848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2849 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2854 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2856 struct rte_eth_dev *dev;
2858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2860 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2863 (*dev->dev_ops->bypass_wd_reset)(dev);
2869 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2871 struct rte_eth_dev *dev;
2873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 dev = &rte_eth_devices[port_id];
2876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2877 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2878 RTE_ETH_FILTER_NOP, NULL);
2882 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2883 enum rte_filter_op filter_op, void *arg)
2885 struct rte_eth_dev *dev;
2887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 dev = &rte_eth_devices[port_id];
2890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2891 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2895 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2896 rte_rx_callback_fn fn, void *user_param)
2898 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2899 rte_errno = ENOTSUP;
2902 /* check input parameters */
2903 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2904 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2909 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2917 cb->param = user_param;
2919 /* Add the callbacks in fifo order. */
2920 struct rte_eth_rxtx_callback *tail =
2921 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2924 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2936 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2937 rte_tx_callback_fn fn, void *user_param)
2939 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2940 rte_errno = ENOTSUP;
2943 /* check input parameters */
2944 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2945 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2950 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2958 cb->param = user_param;
2960 /* Add the callbacks in fifo order. */
2961 struct rte_eth_rxtx_callback *tail =
2962 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2965 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2977 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2978 struct rte_eth_rxtx_callback *user_cb)
2980 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2983 /* Check input parameters. */
2984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2985 if (user_cb == NULL ||
2986 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2989 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2990 struct rte_eth_rxtx_callback *cb = dev->post_rx_burst_cbs[queue_id];
2991 struct rte_eth_rxtx_callback *prev_cb;
2993 /* Reset head pointer and remove user cb if first in the list. */
2994 if (cb == user_cb) {
2995 dev->post_rx_burst_cbs[queue_id] = user_cb->next;
2999 /* Remove the user cb from the callback list. */
3004 if (cb == user_cb) {
3005 prev_cb->next = user_cb->next;
3009 } while (cb != NULL);
3011 /* Callback wasn't found. */
3016 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3017 struct rte_eth_rxtx_callback *user_cb)
3019 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3022 /* Check input parameters. */
3023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3024 if (user_cb == NULL ||
3025 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3028 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3029 struct rte_eth_rxtx_callback *cb = dev->pre_tx_burst_cbs[queue_id];
3030 struct rte_eth_rxtx_callback *prev_cb;
3032 /* Reset head pointer and remove user cb if first in the list. */
3033 if (cb == user_cb) {
3034 dev->pre_tx_burst_cbs[queue_id] = user_cb->next;
3038 /* Remove the user cb from the callback list. */
3043 if (cb == user_cb) {
3044 prev_cb->next = user_cb->next;
3048 } while (cb != NULL);
3050 /* Callback wasn't found. */
3055 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3056 struct rte_eth_rxq_info *qinfo)
3058 struct rte_eth_dev *dev;
3060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3065 dev = &rte_eth_devices[port_id];
3066 if (queue_id >= dev->data->nb_rx_queues) {
3067 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3073 memset(qinfo, 0, sizeof(*qinfo));
3074 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3079 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3080 struct rte_eth_txq_info *qinfo)
3082 struct rte_eth_dev *dev;
3084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3089 dev = &rte_eth_devices[port_id];
3090 if (queue_id >= dev->data->nb_tx_queues) {
3091 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3097 memset(qinfo, 0, sizeof(*qinfo));
3098 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3103 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3104 struct ether_addr *mc_addr_set,
3105 uint32_t nb_mc_addr)
3107 struct rte_eth_dev *dev;
3109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 dev = &rte_eth_devices[port_id];
3112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3113 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3117 rte_eth_timesync_enable(uint8_t port_id)
3119 struct rte_eth_dev *dev;
3121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3122 dev = &rte_eth_devices[port_id];
3124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3125 return (*dev->dev_ops->timesync_enable)(dev);
3129 rte_eth_timesync_disable(uint8_t port_id)
3131 struct rte_eth_dev *dev;
3133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 dev = &rte_eth_devices[port_id];
3136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3137 return (*dev->dev_ops->timesync_disable)(dev);
3141 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3144 struct rte_eth_dev *dev;
3146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3147 dev = &rte_eth_devices[port_id];
3149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3150 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3154 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3156 struct rte_eth_dev *dev;
3158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3159 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3162 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3166 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3168 struct rte_eth_dev *dev;
3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3171 dev = &rte_eth_devices[port_id];
3173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3174 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3178 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3180 struct rte_eth_dev *dev;
3182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3183 dev = &rte_eth_devices[port_id];
3185 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3186 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3190 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3192 struct rte_eth_dev *dev;
3194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3195 dev = &rte_eth_devices[port_id];
3197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3198 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3202 rte_eth_dev_get_reg_length(uint8_t port_id)
3204 struct rte_eth_dev *dev;
3206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3208 dev = &rte_eth_devices[port_id];
3209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg_length, -ENOTSUP);
3210 return (*dev->dev_ops->get_reg_length)(dev);
3214 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3216 struct rte_eth_dev *dev;
3218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3220 dev = &rte_eth_devices[port_id];
3221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3222 return (*dev->dev_ops->get_reg)(dev, info);
3226 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3228 struct rte_eth_dev *dev;
3230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 dev = &rte_eth_devices[port_id];
3233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3234 return (*dev->dev_ops->get_eeprom_length)(dev);
3238 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3240 struct rte_eth_dev *dev;
3242 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3244 dev = &rte_eth_devices[port_id];
3245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3246 return (*dev->dev_ops->get_eeprom)(dev, info);
3250 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3252 struct rte_eth_dev *dev;
3254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3256 dev = &rte_eth_devices[port_id];
3257 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3258 return (*dev->dev_ops->set_eeprom)(dev, info);
3262 rte_eth_dev_get_dcb_info(uint8_t port_id,
3263 struct rte_eth_dcb_info *dcb_info)
3265 struct rte_eth_dev *dev;
3267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 dev = &rte_eth_devices[port_id];
3270 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3273 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3277 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3279 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3280 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3285 eth_dev->data->dev_flags = 0;
3286 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3287 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3288 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3289 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3291 eth_dev->data->kdrv = pci_dev->kdrv;
3292 eth_dev->data->numa_node = pci_dev->numa_node;
3293 eth_dev->data->drv_name = pci_dev->driver->name;
3297 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3298 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3300 struct rte_eth_dev *dev;
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 if (l2_tunnel == NULL) {
3304 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3308 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3309 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3313 dev = &rte_eth_devices[port_id];
3314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3316 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3320 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3321 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3325 struct rte_eth_dev *dev;
3327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3329 if (l2_tunnel == NULL) {
3330 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3334 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3335 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3340 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3344 dev = &rte_eth_devices[port_id];
3345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3347 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);