1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
44 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 static uint8_t eth_dev_last_created_port;
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for shared data allocation */
57 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
59 /* store statistics names and its offset in stats structure */
60 struct rte_eth_xstats_name_off {
61 char name[RTE_ETH_XSTATS_NAME_SIZE];
65 /* Shared memory between primary and secondary processes. */
67 uint64_t next_owner_id;
68 rte_spinlock_t ownership_lock;
69 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
70 } *rte_eth_dev_shared_data;
72 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
73 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
74 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
75 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
76 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
77 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
78 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
79 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
80 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
84 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
86 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
89 {"errors", offsetof(struct rte_eth_stats, q_errors)},
92 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
93 sizeof(rte_rxq_stats_strings[0]))
95 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
96 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
97 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
99 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
100 sizeof(rte_txq_stats_strings[0]))
102 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
103 { DEV_RX_OFFLOAD_##_name, #_name }
105 static const struct {
108 } rte_rx_offload_names[] = {
109 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
110 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
111 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
114 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
118 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
120 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
121 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
123 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
124 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 #undef RTE_RX_OFFLOAD_BIT2STR
129 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
130 { DEV_TX_OFFLOAD_##_name, #_name }
132 static const struct {
135 } rte_tx_offload_names[] = {
136 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
137 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
138 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
139 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
140 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
141 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
142 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
143 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
146 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
151 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
152 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
153 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
156 #undef RTE_TX_OFFLOAD_BIT2STR
159 * The user application callback description.
161 * It contains callback address to be registered by user application,
162 * the pointer to the parameters for callback, and the event type.
164 struct rte_eth_dev_callback {
165 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
166 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
167 void *cb_arg; /**< Parameter for callback */
168 void *ret_param; /**< Return parameter */
169 enum rte_eth_event_type event; /**< Interrupt event type */
170 uint32_t active; /**< Callback is executing */
179 rte_eth_find_next(uint16_t port_id)
181 while (port_id < RTE_MAX_ETHPORTS &&
182 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
183 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
186 if (port_id >= RTE_MAX_ETHPORTS)
187 return RTE_MAX_ETHPORTS;
193 rte_eth_dev_shared_data_prepare(void)
195 const unsigned flags = 0;
196 const struct rte_memzone *mz;
198 rte_spinlock_lock(&rte_eth_shared_data_lock);
200 if (rte_eth_dev_shared_data == NULL) {
201 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
202 /* Allocate port data and ownership shared memory. */
203 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
204 sizeof(*rte_eth_dev_shared_data),
205 rte_socket_id(), flags);
207 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
209 rte_panic("Cannot allocate ethdev shared data\n");
211 rte_eth_dev_shared_data = mz->addr;
212 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
213 rte_eth_dev_shared_data->next_owner_id =
214 RTE_ETH_DEV_NO_OWNER + 1;
215 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
216 memset(rte_eth_dev_shared_data->data, 0,
217 sizeof(rte_eth_dev_shared_data->data));
221 rte_spinlock_unlock(&rte_eth_shared_data_lock);
225 rte_eth_dev_allocated(const char *name)
229 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
230 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
231 strcmp(rte_eth_devices[i].data->name, name) == 0)
232 return &rte_eth_devices[i];
238 rte_eth_dev_find_free_port(void)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 /* Using shared name field to find a free port. */
244 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
245 RTE_ASSERT(rte_eth_devices[i].state ==
250 return RTE_MAX_ETHPORTS;
253 static struct rte_eth_dev *
254 eth_dev_get(uint16_t port_id)
256 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
258 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
259 eth_dev->state = RTE_ETH_DEV_ATTACHED;
261 eth_dev_last_created_port = port_id;
267 rte_eth_dev_allocate(const char *name)
270 struct rte_eth_dev *eth_dev = NULL;
272 rte_eth_dev_shared_data_prepare();
274 /* Synchronize port creation between primary and secondary threads. */
275 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
277 port_id = rte_eth_dev_find_free_port();
278 if (port_id == RTE_MAX_ETHPORTS) {
279 RTE_LOG(ERR, EAL, "Reached maximum number of Ethernet ports\n");
283 if (rte_eth_dev_allocated(name) != NULL) {
284 RTE_LOG(ERR, EAL, "Ethernet Device with name %s already allocated!\n",
289 eth_dev = eth_dev_get(port_id);
290 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
291 eth_dev->data->port_id = port_id;
292 eth_dev->data->mtu = ETHER_MTU;
295 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
298 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
304 * Attach to a port already registered by the primary process, which
305 * makes sure that the same device would have the same port id both
306 * in the primary and secondary process.
309 rte_eth_dev_attach_secondary(const char *name)
312 struct rte_eth_dev *eth_dev = NULL;
314 rte_eth_dev_shared_data_prepare();
316 /* Synchronize port attachment to primary port creation and release. */
317 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
319 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
320 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
323 if (i == RTE_MAX_ETHPORTS) {
325 "device %s is not driven by the primary process\n",
328 eth_dev = eth_dev_get(i);
329 RTE_ASSERT(eth_dev->data->port_id == i);
332 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
337 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
342 rte_eth_dev_shared_data_prepare();
344 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
346 eth_dev->state = RTE_ETH_DEV_UNUSED;
348 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
350 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
352 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
358 rte_eth_dev_is_valid_port(uint16_t port_id)
360 if (port_id >= RTE_MAX_ETHPORTS ||
361 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
368 rte_eth_is_valid_owner_id(uint64_t owner_id)
370 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
371 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
372 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
378 uint64_t __rte_experimental
379 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
381 while (port_id < RTE_MAX_ETHPORTS &&
382 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
383 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
384 rte_eth_devices[port_id].data->owner.id != owner_id))
387 if (port_id >= RTE_MAX_ETHPORTS)
388 return RTE_MAX_ETHPORTS;
393 int __rte_experimental
394 rte_eth_dev_owner_new(uint64_t *owner_id)
396 rte_eth_dev_shared_data_prepare();
398 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
400 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
402 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
407 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
408 const struct rte_eth_dev_owner *new_owner)
410 struct rte_eth_dev_owner *port_owner;
413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
415 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
416 !rte_eth_is_valid_owner_id(old_owner_id))
419 port_owner = &rte_eth_devices[port_id].data->owner;
420 if (port_owner->id != old_owner_id) {
421 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
422 " by %s_%016lX.\n", port_id,
423 port_owner->name, port_owner->id);
427 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
429 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
430 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
433 port_owner->id = new_owner->id;
435 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
436 new_owner->name, new_owner->id);
441 int __rte_experimental
442 rte_eth_dev_owner_set(const uint16_t port_id,
443 const struct rte_eth_dev_owner *owner)
447 rte_eth_dev_shared_data_prepare();
449 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
451 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
453 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
457 int __rte_experimental
458 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
460 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
461 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
464 rte_eth_dev_shared_data_prepare();
466 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
468 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
474 void __rte_experimental
475 rte_eth_dev_owner_delete(const uint64_t owner_id)
479 rte_eth_dev_shared_data_prepare();
481 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
483 if (rte_eth_is_valid_owner_id(owner_id)) {
484 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
485 memset(&rte_eth_devices[port_id].data->owner, 0,
486 sizeof(struct rte_eth_dev_owner));
487 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
488 " have removed.\n", owner_id);
491 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
494 int __rte_experimental
495 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
499 rte_eth_dev_shared_data_prepare();
501 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
503 if (!rte_eth_dev_is_valid_port(port_id)) {
504 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
507 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
511 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
516 rte_eth_dev_socket_id(uint16_t port_id)
518 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
519 return rte_eth_devices[port_id].data->numa_node;
523 rte_eth_dev_get_sec_ctx(uint8_t port_id)
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
526 return rte_eth_devices[port_id].security_ctx;
530 rte_eth_dev_count(void)
537 RTE_ETH_FOREACH_DEV(p)
544 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
551 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
555 /* shouldn't check 'rte_eth_devices[i].data',
556 * because it might be overwritten by VDEV PMD */
557 tmp = rte_eth_dev_shared_data->data[port_id].name;
563 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
568 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
572 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
573 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
574 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
584 eth_err(uint16_t port_id, int ret)
588 if (rte_eth_dev_is_removed(port_id))
593 /* attach the new device, then store port_id of the device */
595 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
598 int current = rte_eth_dev_count();
602 if ((devargs == NULL) || (port_id == NULL)) {
607 /* parse devargs, then retrieve device name and args */
608 if (rte_eal_parse_devargs_str(devargs, &name, &args))
611 ret = rte_eal_dev_attach(name, args);
615 /* no point looking at the port count if no port exists */
616 if (!rte_eth_dev_count()) {
617 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
622 /* if nothing happened, there is a bug here, since some driver told us
623 * it did attach a device, but did not create a port.
625 if (current == rte_eth_dev_count()) {
630 *port_id = eth_dev_last_created_port;
639 /* detach the device, then store the name of the device */
641 rte_eth_dev_detach(uint16_t port_id, char *name)
646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
653 dev_flags = rte_eth_devices[port_id].data->dev_flags;
654 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
655 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
661 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
662 "%s", rte_eth_devices[port_id].data->name);
664 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
668 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
676 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
678 uint16_t old_nb_queues = dev->data->nb_rx_queues;
682 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
683 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
684 sizeof(dev->data->rx_queues[0]) * nb_queues,
685 RTE_CACHE_LINE_SIZE);
686 if (dev->data->rx_queues == NULL) {
687 dev->data->nb_rx_queues = 0;
690 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
693 rxq = dev->data->rx_queues;
695 for (i = nb_queues; i < old_nb_queues; i++)
696 (*dev->dev_ops->rx_queue_release)(rxq[i]);
697 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
698 RTE_CACHE_LINE_SIZE);
701 if (nb_queues > old_nb_queues) {
702 uint16_t new_qs = nb_queues - old_nb_queues;
704 memset(rxq + old_nb_queues, 0,
705 sizeof(rxq[0]) * new_qs);
708 dev->data->rx_queues = rxq;
710 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
713 rxq = dev->data->rx_queues;
715 for (i = nb_queues; i < old_nb_queues; i++)
716 (*dev->dev_ops->rx_queue_release)(rxq[i]);
718 rte_free(dev->data->rx_queues);
719 dev->data->rx_queues = NULL;
721 dev->data->nb_rx_queues = nb_queues;
726 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
728 struct rte_eth_dev *dev;
730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
732 dev = &rte_eth_devices[port_id];
733 if (rx_queue_id >= dev->data->nb_rx_queues) {
734 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
740 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
741 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
742 " already started\n",
743 rx_queue_id, port_id);
747 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
753 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
755 struct rte_eth_dev *dev;
757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
759 dev = &rte_eth_devices[port_id];
760 if (rx_queue_id >= dev->data->nb_rx_queues) {
761 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
767 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
768 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
769 " already stopped\n",
770 rx_queue_id, port_id);
774 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
779 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
781 struct rte_eth_dev *dev;
783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
785 dev = &rte_eth_devices[port_id];
786 if (tx_queue_id >= dev->data->nb_tx_queues) {
787 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
793 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
794 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
795 " already started\n",
796 tx_queue_id, port_id);
800 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
806 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
808 struct rte_eth_dev *dev;
810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
812 dev = &rte_eth_devices[port_id];
813 if (tx_queue_id >= dev->data->nb_tx_queues) {
814 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
820 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
821 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
822 " already stopped\n",
823 tx_queue_id, port_id);
827 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
832 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
834 uint16_t old_nb_queues = dev->data->nb_tx_queues;
838 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
839 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
840 sizeof(dev->data->tx_queues[0]) * nb_queues,
841 RTE_CACHE_LINE_SIZE);
842 if (dev->data->tx_queues == NULL) {
843 dev->data->nb_tx_queues = 0;
846 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
849 txq = dev->data->tx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->tx_queue_release)(txq[i]);
853 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
854 RTE_CACHE_LINE_SIZE);
857 if (nb_queues > old_nb_queues) {
858 uint16_t new_qs = nb_queues - old_nb_queues;
860 memset(txq + old_nb_queues, 0,
861 sizeof(txq[0]) * new_qs);
864 dev->data->tx_queues = txq;
866 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
869 txq = dev->data->tx_queues;
871 for (i = nb_queues; i < old_nb_queues; i++)
872 (*dev->dev_ops->tx_queue_release)(txq[i]);
874 rte_free(dev->data->tx_queues);
875 dev->data->tx_queues = NULL;
877 dev->data->nb_tx_queues = nb_queues;
882 rte_eth_speed_bitflag(uint32_t speed, int duplex)
885 case ETH_SPEED_NUM_10M:
886 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
887 case ETH_SPEED_NUM_100M:
888 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
889 case ETH_SPEED_NUM_1G:
890 return ETH_LINK_SPEED_1G;
891 case ETH_SPEED_NUM_2_5G:
892 return ETH_LINK_SPEED_2_5G;
893 case ETH_SPEED_NUM_5G:
894 return ETH_LINK_SPEED_5G;
895 case ETH_SPEED_NUM_10G:
896 return ETH_LINK_SPEED_10G;
897 case ETH_SPEED_NUM_20G:
898 return ETH_LINK_SPEED_20G;
899 case ETH_SPEED_NUM_25G:
900 return ETH_LINK_SPEED_25G;
901 case ETH_SPEED_NUM_40G:
902 return ETH_LINK_SPEED_40G;
903 case ETH_SPEED_NUM_50G:
904 return ETH_LINK_SPEED_50G;
905 case ETH_SPEED_NUM_56G:
906 return ETH_LINK_SPEED_56G;
907 case ETH_SPEED_NUM_100G:
908 return ETH_LINK_SPEED_100G;
915 * A conversion function from rxmode bitfield API.
918 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
919 uint64_t *rx_offloads)
921 uint64_t offloads = 0;
923 if (rxmode->header_split == 1)
924 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
925 if (rxmode->hw_ip_checksum == 1)
926 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
927 if (rxmode->hw_vlan_filter == 1)
928 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
929 if (rxmode->hw_vlan_strip == 1)
930 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
931 if (rxmode->hw_vlan_extend == 1)
932 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
933 if (rxmode->jumbo_frame == 1)
934 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
935 if (rxmode->hw_strip_crc == 1)
936 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
937 if (rxmode->enable_scatter == 1)
938 offloads |= DEV_RX_OFFLOAD_SCATTER;
939 if (rxmode->enable_lro == 1)
940 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
941 if (rxmode->hw_timestamp == 1)
942 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
943 if (rxmode->security == 1)
944 offloads |= DEV_RX_OFFLOAD_SECURITY;
946 *rx_offloads = offloads;
950 * A conversion function from rxmode offloads API.
953 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
954 struct rte_eth_rxmode *rxmode)
957 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
958 rxmode->header_split = 1;
960 rxmode->header_split = 0;
961 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
962 rxmode->hw_ip_checksum = 1;
964 rxmode->hw_ip_checksum = 0;
965 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
966 rxmode->hw_vlan_filter = 1;
968 rxmode->hw_vlan_filter = 0;
969 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
970 rxmode->hw_vlan_strip = 1;
972 rxmode->hw_vlan_strip = 0;
973 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
974 rxmode->hw_vlan_extend = 1;
976 rxmode->hw_vlan_extend = 0;
977 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
978 rxmode->jumbo_frame = 1;
980 rxmode->jumbo_frame = 0;
981 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
982 rxmode->hw_strip_crc = 1;
984 rxmode->hw_strip_crc = 0;
985 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
986 rxmode->enable_scatter = 1;
988 rxmode->enable_scatter = 0;
989 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
990 rxmode->enable_lro = 1;
992 rxmode->enable_lro = 0;
993 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
994 rxmode->hw_timestamp = 1;
996 rxmode->hw_timestamp = 0;
997 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
998 rxmode->security = 1;
1000 rxmode->security = 0;
1003 const char * __rte_experimental
1004 rte_eth_dev_rx_offload_name(uint64_t offload)
1006 const char *name = "UNKNOWN";
1009 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1010 if (offload == rte_rx_offload_names[i].offload) {
1011 name = rte_rx_offload_names[i].name;
1019 const char * __rte_experimental
1020 rte_eth_dev_tx_offload_name(uint64_t offload)
1022 const char *name = "UNKNOWN";
1025 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1026 if (offload == rte_tx_offload_names[i].offload) {
1027 name = rte_tx_offload_names[i].name;
1036 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1037 const struct rte_eth_conf *dev_conf)
1039 struct rte_eth_dev *dev;
1040 struct rte_eth_dev_info dev_info;
1041 struct rte_eth_conf local_conf = *dev_conf;
1044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1046 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1047 RTE_PMD_DEBUG_TRACE(
1048 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1049 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1053 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1054 RTE_PMD_DEBUG_TRACE(
1055 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1056 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1060 dev = &rte_eth_devices[port_id];
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1065 if (dev->data->dev_started) {
1066 RTE_PMD_DEBUG_TRACE(
1067 "port %d must be stopped to allow configuration\n", port_id);
1072 * Convert between the offloads API to enable PMDs to support
1075 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1076 rte_eth_convert_rx_offload_bitfield(
1077 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1079 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1080 &local_conf.rxmode);
1083 /* Copy the dev_conf parameter into the dev structure */
1084 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1087 * Check that the numbers of RX and TX queues are not greater
1088 * than the maximum number of RX and TX queues supported by the
1089 * configured device.
1091 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1093 if (nb_rx_q == 0 && nb_tx_q == 0) {
1094 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
1098 if (nb_rx_q > dev_info.max_rx_queues) {
1099 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1100 port_id, nb_rx_q, dev_info.max_rx_queues);
1104 if (nb_tx_q > dev_info.max_tx_queues) {
1105 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1106 port_id, nb_tx_q, dev_info.max_tx_queues);
1110 /* Check that the device supports requested interrupts */
1111 if ((dev_conf->intr_conf.lsc == 1) &&
1112 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1113 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1114 dev->device->driver->name);
1117 if ((dev_conf->intr_conf.rmv == 1) &&
1118 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1119 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1120 dev->device->driver->name);
1125 * If jumbo frames are enabled, check that the maximum RX packet
1126 * length is supported by the configured device.
1128 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1129 if (dev_conf->rxmode.max_rx_pkt_len >
1130 dev_info.max_rx_pktlen) {
1131 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1132 " > max valid value %u\n",
1134 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1135 (unsigned)dev_info.max_rx_pktlen);
1137 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1138 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1139 " < min valid value %u\n",
1141 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1142 (unsigned)ETHER_MIN_LEN);
1146 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1147 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1148 /* Use default value */
1149 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1154 * Setup new number of RX/TX queues and reconfigure device.
1156 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1158 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1163 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1165 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1167 rte_eth_dev_rx_queue_config(dev, 0);
1171 diag = (*dev->dev_ops->dev_configure)(dev);
1173 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1175 rte_eth_dev_rx_queue_config(dev, 0);
1176 rte_eth_dev_tx_queue_config(dev, 0);
1177 return eth_err(port_id, diag);
1180 /* Initialize Rx profiling if enabled at compilation time. */
1181 diag = __rte_eth_profile_rx_init(port_id, dev);
1183 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1186 rte_eth_dev_tx_queue_config(dev, 0);
1187 return eth_err(port_id, diag);
1194 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow reset\n",
1199 dev->data->port_id);
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1206 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1210 rte_eth_dev_config_restore(uint16_t port_id)
1212 struct rte_eth_dev *dev;
1213 struct rte_eth_dev_info dev_info;
1214 struct ether_addr *addr;
1219 dev = &rte_eth_devices[port_id];
1221 rte_eth_dev_info_get(port_id, &dev_info);
1223 /* replay MAC address configuration including default MAC */
1224 addr = &dev->data->mac_addrs[0];
1225 if (*dev->dev_ops->mac_addr_set != NULL)
1226 (*dev->dev_ops->mac_addr_set)(dev, addr);
1227 else if (*dev->dev_ops->mac_addr_add != NULL)
1228 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1230 if (*dev->dev_ops->mac_addr_add != NULL) {
1231 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1232 addr = &dev->data->mac_addrs[i];
1234 /* skip zero address */
1235 if (is_zero_ether_addr(addr))
1239 pool_mask = dev->data->mac_pool_sel[i];
1242 if (pool_mask & 1ULL)
1243 (*dev->dev_ops->mac_addr_add)(dev,
1247 } while (pool_mask);
1251 /* replay promiscuous configuration */
1252 if (rte_eth_promiscuous_get(port_id) == 1)
1253 rte_eth_promiscuous_enable(port_id);
1254 else if (rte_eth_promiscuous_get(port_id) == 0)
1255 rte_eth_promiscuous_disable(port_id);
1257 /* replay all multicast configuration */
1258 if (rte_eth_allmulticast_get(port_id) == 1)
1259 rte_eth_allmulticast_enable(port_id);
1260 else if (rte_eth_allmulticast_get(port_id) == 0)
1261 rte_eth_allmulticast_disable(port_id);
1265 rte_eth_dev_start(uint16_t port_id)
1267 struct rte_eth_dev *dev;
1270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1272 dev = &rte_eth_devices[port_id];
1274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1276 if (dev->data->dev_started != 0) {
1277 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1278 " already started\n",
1283 diag = (*dev->dev_ops->dev_start)(dev);
1285 dev->data->dev_started = 1;
1287 return eth_err(port_id, diag);
1289 rte_eth_dev_config_restore(port_id);
1291 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1293 (*dev->dev_ops->link_update)(dev, 0);
1299 rte_eth_dev_stop(uint16_t port_id)
1301 struct rte_eth_dev *dev;
1303 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1304 dev = &rte_eth_devices[port_id];
1306 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1308 if (dev->data->dev_started == 0) {
1309 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1310 " already stopped\n",
1315 dev->data->dev_started = 0;
1316 (*dev->dev_ops->dev_stop)(dev);
1320 rte_eth_dev_set_link_up(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1326 dev = &rte_eth_devices[port_id];
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1329 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1333 rte_eth_dev_set_link_down(uint16_t port_id)
1335 struct rte_eth_dev *dev;
1337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1342 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1346 rte_eth_dev_close(uint16_t port_id)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1354 dev->data->dev_started = 0;
1355 (*dev->dev_ops->dev_close)(dev);
1357 dev->data->nb_rx_queues = 0;
1358 rte_free(dev->data->rx_queues);
1359 dev->data->rx_queues = NULL;
1360 dev->data->nb_tx_queues = 0;
1361 rte_free(dev->data->tx_queues);
1362 dev->data->tx_queues = NULL;
1366 rte_eth_dev_reset(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1376 rte_eth_dev_stop(port_id);
1377 ret = dev->dev_ops->dev_reset(dev);
1379 return eth_err(port_id, ret);
1382 int __rte_experimental
1383 rte_eth_dev_is_removed(uint16_t port_id)
1385 struct rte_eth_dev *dev;
1388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1390 dev = &rte_eth_devices[port_id];
1392 if (dev->state == RTE_ETH_DEV_REMOVED)
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1397 ret = dev->dev_ops->is_removed(dev);
1399 /* Device is physically removed. */
1400 dev->state = RTE_ETH_DEV_REMOVED;
1406 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1407 uint16_t nb_rx_desc, unsigned int socket_id,
1408 const struct rte_eth_rxconf *rx_conf,
1409 struct rte_mempool *mp)
1412 uint32_t mbp_buf_size;
1413 struct rte_eth_dev *dev;
1414 struct rte_eth_dev_info dev_info;
1415 struct rte_eth_rxconf local_conf;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1420 dev = &rte_eth_devices[port_id];
1421 if (rx_queue_id >= dev->data->nb_rx_queues) {
1422 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1426 if (dev->data->dev_started) {
1427 RTE_PMD_DEBUG_TRACE(
1428 "port %d must be stopped to allow configuration\n", port_id);
1432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1436 * Check the size of the mbuf data buffer.
1437 * This value must be provided in the private data of the memory pool.
1438 * First check that the memory pool has a valid private data.
1440 rte_eth_dev_info_get(port_id, &dev_info);
1441 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1442 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1443 mp->name, (int) mp->private_data_size,
1444 (int) sizeof(struct rte_pktmbuf_pool_private));
1447 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1449 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1450 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1451 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1455 (int)(RTE_PKTMBUF_HEADROOM +
1456 dev_info.min_rx_bufsize),
1457 (int)RTE_PKTMBUF_HEADROOM,
1458 (int)dev_info.min_rx_bufsize);
1462 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1463 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1464 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1466 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1467 "should be: <= %hu, = %hu, and a product of %hu\n",
1469 dev_info.rx_desc_lim.nb_max,
1470 dev_info.rx_desc_lim.nb_min,
1471 dev_info.rx_desc_lim.nb_align);
1475 rxq = dev->data->rx_queues;
1476 if (rxq[rx_queue_id]) {
1477 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1479 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1480 rxq[rx_queue_id] = NULL;
1483 if (rx_conf == NULL)
1484 rx_conf = &dev_info.default_rxconf;
1486 local_conf = *rx_conf;
1487 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1489 * Reflect port offloads to queue offloads in order for
1490 * offloads to not be discarded.
1492 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1493 &local_conf.offloads);
1496 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1497 socket_id, &local_conf, mp);
1499 if (!dev->data->min_rx_buf_size ||
1500 dev->data->min_rx_buf_size > mbp_buf_size)
1501 dev->data->min_rx_buf_size = mbp_buf_size;
1504 return eth_err(port_id, ret);
1508 * A conversion function from txq_flags API.
1511 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1513 uint64_t offloads = 0;
1515 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1516 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1517 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1518 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1519 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1520 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1521 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1522 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1523 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1524 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1525 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1526 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1527 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1529 *tx_offloads = offloads;
1533 * A conversion function from offloads API.
1536 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1540 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1541 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1542 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1543 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1544 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1545 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1546 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1547 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1548 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1549 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1550 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1551 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1557 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1558 uint16_t nb_tx_desc, unsigned int socket_id,
1559 const struct rte_eth_txconf *tx_conf)
1561 struct rte_eth_dev *dev;
1562 struct rte_eth_dev_info dev_info;
1563 struct rte_eth_txconf local_conf;
1566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1568 dev = &rte_eth_devices[port_id];
1569 if (tx_queue_id >= dev->data->nb_tx_queues) {
1570 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1574 if (dev->data->dev_started) {
1575 RTE_PMD_DEBUG_TRACE(
1576 "port %d must be stopped to allow configuration\n", port_id);
1580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1583 rte_eth_dev_info_get(port_id, &dev_info);
1585 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1586 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1587 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1588 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1589 "should be: <= %hu, = %hu, and a product of %hu\n",
1591 dev_info.tx_desc_lim.nb_max,
1592 dev_info.tx_desc_lim.nb_min,
1593 dev_info.tx_desc_lim.nb_align);
1597 txq = dev->data->tx_queues;
1598 if (txq[tx_queue_id]) {
1599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1601 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1602 txq[tx_queue_id] = NULL;
1605 if (tx_conf == NULL)
1606 tx_conf = &dev_info.default_txconf;
1609 * Convert between the offloads API to enable PMDs to support
1612 local_conf = *tx_conf;
1613 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1614 rte_eth_convert_txq_offloads(tx_conf->offloads,
1615 &local_conf.txq_flags);
1616 /* Keep the ignore flag. */
1617 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1619 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1620 &local_conf.offloads);
1623 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1624 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1628 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1629 void *userdata __rte_unused)
1633 for (i = 0; i < unsent; i++)
1634 rte_pktmbuf_free(pkts[i]);
1638 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1641 uint64_t *count = userdata;
1644 for (i = 0; i < unsent; i++)
1645 rte_pktmbuf_free(pkts[i]);
1651 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1652 buffer_tx_error_fn cbfn, void *userdata)
1654 buffer->error_callback = cbfn;
1655 buffer->error_userdata = userdata;
1660 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1667 buffer->size = size;
1668 if (buffer->error_callback == NULL) {
1669 ret = rte_eth_tx_buffer_set_err_callback(
1670 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1677 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1679 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1682 /* Validate Input Data. Bail if not valid or not supported. */
1683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1686 /* Call driver to free pending mbufs. */
1687 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1689 return eth_err(port_id, ret);
1693 rte_eth_promiscuous_enable(uint16_t port_id)
1695 struct rte_eth_dev *dev;
1697 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1698 dev = &rte_eth_devices[port_id];
1700 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1701 (*dev->dev_ops->promiscuous_enable)(dev);
1702 dev->data->promiscuous = 1;
1706 rte_eth_promiscuous_disable(uint16_t port_id)
1708 struct rte_eth_dev *dev;
1710 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1711 dev = &rte_eth_devices[port_id];
1713 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1714 dev->data->promiscuous = 0;
1715 (*dev->dev_ops->promiscuous_disable)(dev);
1719 rte_eth_promiscuous_get(uint16_t port_id)
1721 struct rte_eth_dev *dev;
1723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1725 dev = &rte_eth_devices[port_id];
1726 return dev->data->promiscuous;
1730 rte_eth_allmulticast_enable(uint16_t port_id)
1732 struct rte_eth_dev *dev;
1734 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1735 dev = &rte_eth_devices[port_id];
1737 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1738 (*dev->dev_ops->allmulticast_enable)(dev);
1739 dev->data->all_multicast = 1;
1743 rte_eth_allmulticast_disable(uint16_t port_id)
1745 struct rte_eth_dev *dev;
1747 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1748 dev = &rte_eth_devices[port_id];
1750 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1751 dev->data->all_multicast = 0;
1752 (*dev->dev_ops->allmulticast_disable)(dev);
1756 rte_eth_allmulticast_get(uint16_t port_id)
1758 struct rte_eth_dev *dev;
1760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1762 dev = &rte_eth_devices[port_id];
1763 return dev->data->all_multicast;
1767 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1769 struct rte_eth_dev *dev;
1771 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1772 dev = &rte_eth_devices[port_id];
1774 if (dev->data->dev_conf.intr_conf.lsc)
1775 rte_eth_linkstatus_get(dev, eth_link);
1777 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1778 (*dev->dev_ops->link_update)(dev, 1);
1779 *eth_link = dev->data->dev_link;
1784 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1786 struct rte_eth_dev *dev;
1788 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1789 dev = &rte_eth_devices[port_id];
1791 if (dev->data->dev_conf.intr_conf.lsc)
1792 rte_eth_linkstatus_get(dev, eth_link);
1794 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1795 (*dev->dev_ops->link_update)(dev, 0);
1796 *eth_link = dev->data->dev_link;
1801 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1803 struct rte_eth_dev *dev;
1805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1807 dev = &rte_eth_devices[port_id];
1808 memset(stats, 0, sizeof(*stats));
1810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1811 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1812 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1816 rte_eth_stats_reset(uint16_t port_id)
1818 struct rte_eth_dev *dev;
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1821 dev = &rte_eth_devices[port_id];
1823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1824 (*dev->dev_ops->stats_reset)(dev);
1825 dev->data->rx_mbuf_alloc_failed = 0;
1831 get_xstats_basic_count(struct rte_eth_dev *dev)
1833 uint16_t nb_rxqs, nb_txqs;
1836 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1837 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1839 count = RTE_NB_STATS;
1840 count += nb_rxqs * RTE_NB_RXQ_STATS;
1841 count += nb_txqs * RTE_NB_TXQ_STATS;
1847 get_xstats_count(uint16_t port_id)
1849 struct rte_eth_dev *dev;
1852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1853 dev = &rte_eth_devices[port_id];
1854 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1855 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1858 return eth_err(port_id, count);
1860 if (dev->dev_ops->xstats_get_names != NULL) {
1861 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1863 return eth_err(port_id, count);
1868 count += get_xstats_basic_count(dev);
1874 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1877 int cnt_xstats, idx_xstat;
1879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1882 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1887 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1892 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1893 if (cnt_xstats < 0) {
1894 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1898 /* Get id-name lookup table */
1899 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1901 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1902 port_id, xstats_names, cnt_xstats, NULL)) {
1903 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1907 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1908 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1917 /* retrieve basic stats names */
1919 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1920 struct rte_eth_xstat_name *xstats_names)
1922 int cnt_used_entries = 0;
1923 uint32_t idx, id_queue;
1926 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1927 snprintf(xstats_names[cnt_used_entries].name,
1928 sizeof(xstats_names[0].name),
1929 "%s", rte_stats_strings[idx].name);
1932 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1933 for (id_queue = 0; id_queue < num_q; id_queue++) {
1934 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1935 snprintf(xstats_names[cnt_used_entries].name,
1936 sizeof(xstats_names[0].name),
1938 id_queue, rte_rxq_stats_strings[idx].name);
1943 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1944 for (id_queue = 0; id_queue < num_q; id_queue++) {
1945 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1946 snprintf(xstats_names[cnt_used_entries].name,
1947 sizeof(xstats_names[0].name),
1949 id_queue, rte_txq_stats_strings[idx].name);
1953 return cnt_used_entries;
1956 /* retrieve ethdev extended statistics names */
1958 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1959 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1962 struct rte_eth_xstat_name *xstats_names_copy;
1963 unsigned int no_basic_stat_requested = 1;
1964 unsigned int no_ext_stat_requested = 1;
1965 unsigned int expected_entries;
1966 unsigned int basic_count;
1967 struct rte_eth_dev *dev;
1971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1972 dev = &rte_eth_devices[port_id];
1974 basic_count = get_xstats_basic_count(dev);
1975 ret = get_xstats_count(port_id);
1978 expected_entries = (unsigned int)ret;
1980 /* Return max number of stats if no ids given */
1983 return expected_entries;
1984 else if (xstats_names && size < expected_entries)
1985 return expected_entries;
1988 if (ids && !xstats_names)
1991 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1992 uint64_t ids_copy[size];
1994 for (i = 0; i < size; i++) {
1995 if (ids[i] < basic_count) {
1996 no_basic_stat_requested = 0;
2001 * Convert ids to xstats ids that PMD knows.
2002 * ids known by user are basic + extended stats.
2004 ids_copy[i] = ids[i] - basic_count;
2007 if (no_basic_stat_requested)
2008 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2009 xstats_names, ids_copy, size);
2012 /* Retrieve all stats */
2014 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2016 if (num_stats < 0 || num_stats > (int)expected_entries)
2019 return expected_entries;
2022 xstats_names_copy = calloc(expected_entries,
2023 sizeof(struct rte_eth_xstat_name));
2025 if (!xstats_names_copy) {
2026 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2031 for (i = 0; i < size; i++) {
2032 if (ids[i] >= basic_count) {
2033 no_ext_stat_requested = 0;
2039 /* Fill xstats_names_copy structure */
2040 if (ids && no_ext_stat_requested) {
2041 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2043 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2046 free(xstats_names_copy);
2052 for (i = 0; i < size; i++) {
2053 if (ids[i] >= expected_entries) {
2054 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2055 free(xstats_names_copy);
2058 xstats_names[i] = xstats_names_copy[ids[i]];
2061 free(xstats_names_copy);
2066 rte_eth_xstats_get_names(uint16_t port_id,
2067 struct rte_eth_xstat_name *xstats_names,
2070 struct rte_eth_dev *dev;
2071 int cnt_used_entries;
2072 int cnt_expected_entries;
2073 int cnt_driver_entries;
2075 cnt_expected_entries = get_xstats_count(port_id);
2076 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2077 (int)size < cnt_expected_entries)
2078 return cnt_expected_entries;
2080 /* port_id checked in get_xstats_count() */
2081 dev = &rte_eth_devices[port_id];
2083 cnt_used_entries = rte_eth_basic_stats_get_names(
2086 if (dev->dev_ops->xstats_get_names != NULL) {
2087 /* If there are any driver-specific xstats, append them
2090 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2092 xstats_names + cnt_used_entries,
2093 size - cnt_used_entries);
2094 if (cnt_driver_entries < 0)
2095 return eth_err(port_id, cnt_driver_entries);
2096 cnt_used_entries += cnt_driver_entries;
2099 return cnt_used_entries;
2104 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2106 struct rte_eth_dev *dev;
2107 struct rte_eth_stats eth_stats;
2108 unsigned int count = 0, i, q;
2109 uint64_t val, *stats_ptr;
2110 uint16_t nb_rxqs, nb_txqs;
2113 ret = rte_eth_stats_get(port_id, ð_stats);
2117 dev = &rte_eth_devices[port_id];
2119 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2120 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2123 for (i = 0; i < RTE_NB_STATS; i++) {
2124 stats_ptr = RTE_PTR_ADD(ð_stats,
2125 rte_stats_strings[i].offset);
2127 xstats[count++].value = val;
2131 for (q = 0; q < nb_rxqs; q++) {
2132 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2133 stats_ptr = RTE_PTR_ADD(ð_stats,
2134 rte_rxq_stats_strings[i].offset +
2135 q * sizeof(uint64_t));
2137 xstats[count++].value = val;
2142 for (q = 0; q < nb_txqs; q++) {
2143 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2144 stats_ptr = RTE_PTR_ADD(ð_stats,
2145 rte_txq_stats_strings[i].offset +
2146 q * sizeof(uint64_t));
2148 xstats[count++].value = val;
2154 /* retrieve ethdev extended statistics */
2156 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2157 uint64_t *values, unsigned int size)
2159 unsigned int no_basic_stat_requested = 1;
2160 unsigned int no_ext_stat_requested = 1;
2161 unsigned int num_xstats_filled;
2162 unsigned int basic_count;
2163 uint16_t expected_entries;
2164 struct rte_eth_dev *dev;
2168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2169 ret = get_xstats_count(port_id);
2172 expected_entries = (uint16_t)ret;
2173 struct rte_eth_xstat xstats[expected_entries];
2174 dev = &rte_eth_devices[port_id];
2175 basic_count = get_xstats_basic_count(dev);
2177 /* Return max number of stats if no ids given */
2180 return expected_entries;
2181 else if (values && size < expected_entries)
2182 return expected_entries;
2188 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2189 unsigned int basic_count = get_xstats_basic_count(dev);
2190 uint64_t ids_copy[size];
2192 for (i = 0; i < size; i++) {
2193 if (ids[i] < basic_count) {
2194 no_basic_stat_requested = 0;
2199 * Convert ids to xstats ids that PMD knows.
2200 * ids known by user are basic + extended stats.
2202 ids_copy[i] = ids[i] - basic_count;
2205 if (no_basic_stat_requested)
2206 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2211 for (i = 0; i < size; i++) {
2212 if (ids[i] >= basic_count) {
2213 no_ext_stat_requested = 0;
2219 /* Fill the xstats structure */
2220 if (ids && no_ext_stat_requested)
2221 ret = rte_eth_basic_stats_get(port_id, xstats);
2223 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2227 num_xstats_filled = (unsigned int)ret;
2229 /* Return all stats */
2231 for (i = 0; i < num_xstats_filled; i++)
2232 values[i] = xstats[i].value;
2233 return expected_entries;
2237 for (i = 0; i < size; i++) {
2238 if (ids[i] >= expected_entries) {
2239 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2242 values[i] = xstats[ids[i]].value;
2248 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2251 struct rte_eth_dev *dev;
2252 unsigned int count = 0, i;
2253 signed int xcount = 0;
2254 uint16_t nb_rxqs, nb_txqs;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2259 dev = &rte_eth_devices[port_id];
2261 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2262 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2264 /* Return generic statistics */
2265 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2266 (nb_txqs * RTE_NB_TXQ_STATS);
2268 /* implemented by the driver */
2269 if (dev->dev_ops->xstats_get != NULL) {
2270 /* Retrieve the xstats from the driver at the end of the
2273 xcount = (*dev->dev_ops->xstats_get)(dev,
2274 xstats ? xstats + count : NULL,
2275 (n > count) ? n - count : 0);
2278 return eth_err(port_id, xcount);
2281 if (n < count + xcount || xstats == NULL)
2282 return count + xcount;
2284 /* now fill the xstats structure */
2285 ret = rte_eth_basic_stats_get(port_id, xstats);
2290 for (i = 0; i < count; i++)
2292 /* add an offset to driver-specific stats */
2293 for ( ; i < count + xcount; i++)
2294 xstats[i].id += count;
2296 return count + xcount;
2299 /* reset ethdev extended statistics */
2301 rte_eth_xstats_reset(uint16_t port_id)
2303 struct rte_eth_dev *dev;
2305 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2306 dev = &rte_eth_devices[port_id];
2308 /* implemented by the driver */
2309 if (dev->dev_ops->xstats_reset != NULL) {
2310 (*dev->dev_ops->xstats_reset)(dev);
2314 /* fallback to default */
2315 rte_eth_stats_reset(port_id);
2319 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2322 struct rte_eth_dev *dev;
2324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2326 dev = &rte_eth_devices[port_id];
2328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2329 return (*dev->dev_ops->queue_stats_mapping_set)
2330 (dev, queue_id, stat_idx, is_rx);
2335 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2338 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2339 stat_idx, STAT_QMAP_TX));
2344 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2347 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2348 stat_idx, STAT_QMAP_RX));
2352 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2354 struct rte_eth_dev *dev;
2356 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2357 dev = &rte_eth_devices[port_id];
2359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2360 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2361 fw_version, fw_size));
2365 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2367 struct rte_eth_dev *dev;
2368 const struct rte_eth_desc_lim lim = {
2369 .nb_max = UINT16_MAX,
2374 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2375 dev = &rte_eth_devices[port_id];
2377 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2378 dev_info->rx_desc_lim = lim;
2379 dev_info->tx_desc_lim = lim;
2381 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2382 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2383 dev_info->driver_name = dev->device->driver->name;
2384 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2385 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2389 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2390 uint32_t *ptypes, int num)
2393 struct rte_eth_dev *dev;
2394 const uint32_t *all_ptypes;
2396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2397 dev = &rte_eth_devices[port_id];
2398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2399 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2404 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2405 if (all_ptypes[i] & ptype_mask) {
2407 ptypes[j] = all_ptypes[i];
2415 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2417 struct rte_eth_dev *dev;
2419 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2420 dev = &rte_eth_devices[port_id];
2421 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2426 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2428 struct rte_eth_dev *dev;
2430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2432 dev = &rte_eth_devices[port_id];
2433 *mtu = dev->data->mtu;
2438 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2441 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2444 dev = &rte_eth_devices[port_id];
2445 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2447 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2449 dev->data->mtu = mtu;
2451 return eth_err(port_id, ret);
2455 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2457 struct rte_eth_dev *dev;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2461 dev = &rte_eth_devices[port_id];
2462 if (!(dev->data->dev_conf.rxmode.offloads &
2463 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2464 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2468 if (vlan_id > 4095) {
2469 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2470 port_id, (unsigned) vlan_id);
2473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2475 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2477 struct rte_vlan_filter_conf *vfc;
2481 vfc = &dev->data->vlan_filter_conf;
2482 vidx = vlan_id / 64;
2483 vbit = vlan_id % 64;
2486 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2488 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2491 return eth_err(port_id, ret);
2495 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2498 struct rte_eth_dev *dev;
2500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2501 dev = &rte_eth_devices[port_id];
2502 if (rx_queue_id >= dev->data->nb_rx_queues) {
2503 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2508 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2514 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2515 enum rte_vlan_type vlan_type,
2518 struct rte_eth_dev *dev;
2520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2521 dev = &rte_eth_devices[port_id];
2522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2524 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2529 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2531 struct rte_eth_dev *dev;
2535 uint64_t orig_offloads;
2537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2538 dev = &rte_eth_devices[port_id];
2540 /* save original values in case of failure */
2541 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2543 /*check which option changed by application*/
2544 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2545 org = !!(dev->data->dev_conf.rxmode.offloads &
2546 DEV_RX_OFFLOAD_VLAN_STRIP);
2549 dev->data->dev_conf.rxmode.offloads |=
2550 DEV_RX_OFFLOAD_VLAN_STRIP;
2552 dev->data->dev_conf.rxmode.offloads &=
2553 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2554 mask |= ETH_VLAN_STRIP_MASK;
2557 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2558 org = !!(dev->data->dev_conf.rxmode.offloads &
2559 DEV_RX_OFFLOAD_VLAN_FILTER);
2562 dev->data->dev_conf.rxmode.offloads |=
2563 DEV_RX_OFFLOAD_VLAN_FILTER;
2565 dev->data->dev_conf.rxmode.offloads &=
2566 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2567 mask |= ETH_VLAN_FILTER_MASK;
2570 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2571 org = !!(dev->data->dev_conf.rxmode.offloads &
2572 DEV_RX_OFFLOAD_VLAN_EXTEND);
2575 dev->data->dev_conf.rxmode.offloads |=
2576 DEV_RX_OFFLOAD_VLAN_EXTEND;
2578 dev->data->dev_conf.rxmode.offloads &=
2579 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2580 mask |= ETH_VLAN_EXTEND_MASK;
2587 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2590 * Convert to the offload bitfield API just in case the underlying PMD
2591 * still supporting it.
2593 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2594 &dev->data->dev_conf.rxmode);
2595 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2597 /* hit an error restore original values */
2598 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2599 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2600 &dev->data->dev_conf.rxmode);
2603 return eth_err(port_id, ret);
2607 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2609 struct rte_eth_dev *dev;
2612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2615 if (dev->data->dev_conf.rxmode.offloads &
2616 DEV_RX_OFFLOAD_VLAN_STRIP)
2617 ret |= ETH_VLAN_STRIP_OFFLOAD;
2619 if (dev->data->dev_conf.rxmode.offloads &
2620 DEV_RX_OFFLOAD_VLAN_FILTER)
2621 ret |= ETH_VLAN_FILTER_OFFLOAD;
2623 if (dev->data->dev_conf.rxmode.offloads &
2624 DEV_RX_OFFLOAD_VLAN_EXTEND)
2625 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2631 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2633 struct rte_eth_dev *dev;
2635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2636 dev = &rte_eth_devices[port_id];
2637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2639 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2643 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2645 struct rte_eth_dev *dev;
2647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2648 dev = &rte_eth_devices[port_id];
2649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2650 memset(fc_conf, 0, sizeof(*fc_conf));
2651 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2655 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2657 struct rte_eth_dev *dev;
2659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2660 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2661 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2665 dev = &rte_eth_devices[port_id];
2666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2667 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2671 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2672 struct rte_eth_pfc_conf *pfc_conf)
2674 struct rte_eth_dev *dev;
2676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2677 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2678 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2682 dev = &rte_eth_devices[port_id];
2683 /* High water, low water validation are device specific */
2684 if (*dev->dev_ops->priority_flow_ctrl_set)
2685 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2691 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2699 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2700 for (i = 0; i < num; i++) {
2701 if (reta_conf[i].mask)
2709 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2713 uint16_t i, idx, shift;
2719 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2723 for (i = 0; i < reta_size; i++) {
2724 idx = i / RTE_RETA_GROUP_SIZE;
2725 shift = i % RTE_RETA_GROUP_SIZE;
2726 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2727 (reta_conf[idx].reta[shift] >= max_rxq)) {
2728 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2729 "the maximum rxq index: %u\n", idx, shift,
2730 reta_conf[idx].reta[shift], max_rxq);
2739 rte_eth_dev_rss_reta_update(uint16_t port_id,
2740 struct rte_eth_rss_reta_entry64 *reta_conf,
2743 struct rte_eth_dev *dev;
2746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2747 /* Check mask bits */
2748 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2752 dev = &rte_eth_devices[port_id];
2754 /* Check entry value */
2755 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2756 dev->data->nb_rx_queues);
2760 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2761 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2766 rte_eth_dev_rss_reta_query(uint16_t port_id,
2767 struct rte_eth_rss_reta_entry64 *reta_conf,
2770 struct rte_eth_dev *dev;
2773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 /* Check mask bits */
2776 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2780 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2782 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2787 rte_eth_dev_rss_hash_update(uint16_t port_id,
2788 struct rte_eth_rss_conf *rss_conf)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2793 dev = &rte_eth_devices[port_id];
2794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2795 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2800 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2801 struct rte_eth_rss_conf *rss_conf)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2806 dev = &rte_eth_devices[port_id];
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2808 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2813 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2814 struct rte_eth_udp_tunnel *udp_tunnel)
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2819 if (udp_tunnel == NULL) {
2820 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2824 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2825 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2829 dev = &rte_eth_devices[port_id];
2830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2831 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2836 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2837 struct rte_eth_udp_tunnel *udp_tunnel)
2839 struct rte_eth_dev *dev;
2841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2842 dev = &rte_eth_devices[port_id];
2844 if (udp_tunnel == NULL) {
2845 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2849 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2850 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2855 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2860 rte_eth_led_on(uint16_t port_id)
2862 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2867 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2871 rte_eth_led_off(uint16_t port_id)
2873 struct rte_eth_dev *dev;
2875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2878 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2882 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2886 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2888 struct rte_eth_dev_info dev_info;
2889 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 rte_eth_dev_info_get(port_id, &dev_info);
2895 for (i = 0; i < dev_info.max_mac_addrs; i++)
2896 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2902 static const struct ether_addr null_mac_addr;
2905 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2908 struct rte_eth_dev *dev;
2913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914 dev = &rte_eth_devices[port_id];
2915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2917 if (is_zero_ether_addr(addr)) {
2918 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2922 if (pool >= ETH_64_POOLS) {
2923 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2927 index = get_mac_addr_index(port_id, addr);
2929 index = get_mac_addr_index(port_id, &null_mac_addr);
2931 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2936 pool_mask = dev->data->mac_pool_sel[index];
2938 /* Check if both MAC address and pool is already there, and do nothing */
2939 if (pool_mask & (1ULL << pool))
2944 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2947 /* Update address in NIC data structure */
2948 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2950 /* Update pool bitmap in NIC data structure */
2951 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2954 return eth_err(port_id, ret);
2958 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2960 struct rte_eth_dev *dev;
2963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2964 dev = &rte_eth_devices[port_id];
2965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2967 index = get_mac_addr_index(port_id, addr);
2969 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2971 } else if (index < 0)
2972 return 0; /* Do nothing if address wasn't found */
2975 (*dev->dev_ops->mac_addr_remove)(dev, index);
2977 /* Update address in NIC data structure */
2978 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2980 /* reset pool bitmap */
2981 dev->data->mac_pool_sel[index] = 0;
2987 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2989 struct rte_eth_dev *dev;
2991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2993 if (!is_valid_assigned_ether_addr(addr))
2996 dev = &rte_eth_devices[port_id];
2997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2999 /* Update default address in NIC data structure */
3000 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3002 (*dev->dev_ops->mac_addr_set)(dev, addr);
3009 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3013 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3015 struct rte_eth_dev_info dev_info;
3016 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3019 rte_eth_dev_info_get(port_id, &dev_info);
3020 if (!dev->data->hash_mac_addrs)
3023 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3024 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3025 ETHER_ADDR_LEN) == 0)
3032 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3037 struct rte_eth_dev *dev;
3039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3041 dev = &rte_eth_devices[port_id];
3042 if (is_zero_ether_addr(addr)) {
3043 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3048 index = get_hash_mac_addr_index(port_id, addr);
3049 /* Check if it's already there, and do nothing */
3050 if ((index >= 0) && on)
3055 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3056 "set in UTA\n", port_id);
3060 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3062 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3069 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3071 /* Update address in NIC data structure */
3073 ether_addr_copy(addr,
3074 &dev->data->hash_mac_addrs[index]);
3076 ether_addr_copy(&null_mac_addr,
3077 &dev->data->hash_mac_addrs[index]);
3080 return eth_err(port_id, ret);
3084 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3086 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3093 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3097 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3100 struct rte_eth_dev *dev;
3101 struct rte_eth_dev_info dev_info;
3102 struct rte_eth_link link;
3104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3106 dev = &rte_eth_devices[port_id];
3107 rte_eth_dev_info_get(port_id, &dev_info);
3108 link = dev->data->dev_link;
3110 if (queue_idx > dev_info.max_tx_queues) {
3111 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3112 "invalid queue id=%d\n", port_id, queue_idx);
3116 if (tx_rate > link.link_speed) {
3117 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3118 "bigger than link speed= %d\n",
3119 tx_rate, link.link_speed);
3123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3124 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3125 queue_idx, tx_rate));
3129 rte_eth_mirror_rule_set(uint16_t port_id,
3130 struct rte_eth_mirror_conf *mirror_conf,
3131 uint8_t rule_id, uint8_t on)
3133 struct rte_eth_dev *dev;
3135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3136 if (mirror_conf->rule_type == 0) {
3137 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3141 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3142 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3147 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3148 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3149 (mirror_conf->pool_mask == 0)) {
3150 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3154 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3155 mirror_conf->vlan.vlan_mask == 0) {
3156 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3160 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3163 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3164 mirror_conf, rule_id, on));
3168 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3170 struct rte_eth_dev *dev;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3177 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3181 RTE_INIT(eth_dev_init_cb_lists)
3185 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3186 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3190 rte_eth_dev_callback_register(uint16_t port_id,
3191 enum rte_eth_event_type event,
3192 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3194 struct rte_eth_dev *dev;
3195 struct rte_eth_dev_callback *user_cb;
3196 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3202 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3203 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3207 if (port_id == RTE_ETH_ALL) {
3209 last_port = RTE_MAX_ETHPORTS - 1;
3211 next_port = last_port = port_id;
3214 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3217 dev = &rte_eth_devices[next_port];
3219 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3220 if (user_cb->cb_fn == cb_fn &&
3221 user_cb->cb_arg == cb_arg &&
3222 user_cb->event == event) {
3227 /* create a new callback. */
3228 if (user_cb == NULL) {
3229 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3230 sizeof(struct rte_eth_dev_callback), 0);
3231 if (user_cb != NULL) {
3232 user_cb->cb_fn = cb_fn;
3233 user_cb->cb_arg = cb_arg;
3234 user_cb->event = event;
3235 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3238 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3239 rte_eth_dev_callback_unregister(port_id, event,
3245 } while (++next_port <= last_port);
3247 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3252 rte_eth_dev_callback_unregister(uint16_t port_id,
3253 enum rte_eth_event_type event,
3254 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3257 struct rte_eth_dev *dev;
3258 struct rte_eth_dev_callback *cb, *next;
3259 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3265 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3266 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3270 if (port_id == RTE_ETH_ALL) {
3272 last_port = RTE_MAX_ETHPORTS - 1;
3274 next_port = last_port = port_id;
3277 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3280 dev = &rte_eth_devices[next_port];
3282 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3285 next = TAILQ_NEXT(cb, next);
3287 if (cb->cb_fn != cb_fn || cb->event != event ||
3288 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3292 * if this callback is not executing right now,
3295 if (cb->active == 0) {
3296 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3302 } while (++next_port <= last_port);
3304 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3309 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3310 enum rte_eth_event_type event, void *ret_param)
3312 struct rte_eth_dev_callback *cb_lst;
3313 struct rte_eth_dev_callback dev_cb;
3316 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3317 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3318 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3322 if (ret_param != NULL)
3323 dev_cb.ret_param = ret_param;
3325 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3326 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3327 dev_cb.cb_arg, dev_cb.ret_param);
3328 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3331 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3336 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3339 struct rte_eth_dev *dev;
3340 struct rte_intr_handle *intr_handle;
3344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3346 dev = &rte_eth_devices[port_id];
3348 if (!dev->intr_handle) {
3349 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3353 intr_handle = dev->intr_handle;
3354 if (!intr_handle->intr_vec) {
3355 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3359 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3360 vec = intr_handle->intr_vec[qid];
3361 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3362 if (rc && rc != -EEXIST) {
3363 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3364 " op %d epfd %d vec %u\n",
3365 port_id, qid, op, epfd, vec);
3372 const struct rte_memzone *
3373 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3374 uint16_t queue_id, size_t size, unsigned align,
3377 char z_name[RTE_MEMZONE_NAMESIZE];
3378 const struct rte_memzone *mz;
3380 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3381 dev->device->driver->name, ring_name,
3382 dev->data->port_id, queue_id);
3384 mz = rte_memzone_lookup(z_name);
3388 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3392 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3393 int epfd, int op, void *data)
3396 struct rte_eth_dev *dev;
3397 struct rte_intr_handle *intr_handle;
3400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 dev = &rte_eth_devices[port_id];
3403 if (queue_id >= dev->data->nb_rx_queues) {
3404 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3408 if (!dev->intr_handle) {
3409 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3413 intr_handle = dev->intr_handle;
3414 if (!intr_handle->intr_vec) {
3415 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3419 vec = intr_handle->intr_vec[queue_id];
3420 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3421 if (rc && rc != -EEXIST) {
3422 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3423 " op %d epfd %d vec %u\n",
3424 port_id, queue_id, op, epfd, vec);
3432 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3435 struct rte_eth_dev *dev;
3437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3439 dev = &rte_eth_devices[port_id];
3441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3442 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3447 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3450 struct rte_eth_dev *dev;
3452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3454 dev = &rte_eth_devices[port_id];
3456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3457 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3463 rte_eth_dev_filter_supported(uint16_t port_id,
3464 enum rte_filter_type filter_type)
3466 struct rte_eth_dev *dev;
3468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3470 dev = &rte_eth_devices[port_id];
3471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3472 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3473 RTE_ETH_FILTER_NOP, NULL);
3477 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3478 enum rte_filter_op filter_op, void *arg)
3480 struct rte_eth_dev *dev;
3482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3484 dev = &rte_eth_devices[port_id];
3485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3486 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3491 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3492 rte_rx_callback_fn fn, void *user_param)
3494 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3495 rte_errno = ENOTSUP;
3498 /* check input parameters */
3499 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3500 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3504 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3512 cb->param = user_param;
3514 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3515 /* Add the callbacks in fifo order. */
3516 struct rte_eth_rxtx_callback *tail =
3517 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3520 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3527 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3533 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3534 rte_rx_callback_fn fn, void *user_param)
3536 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3537 rte_errno = ENOTSUP;
3540 /* check input parameters */
3541 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3542 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3547 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3555 cb->param = user_param;
3557 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3558 /* Add the callbacks at fisrt position*/
3559 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3561 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3562 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3568 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3569 rte_tx_callback_fn fn, void *user_param)
3571 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3572 rte_errno = ENOTSUP;
3575 /* check input parameters */
3576 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3577 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3582 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3590 cb->param = user_param;
3592 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3593 /* Add the callbacks in fifo order. */
3594 struct rte_eth_rxtx_callback *tail =
3595 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3598 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3605 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3611 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3612 struct rte_eth_rxtx_callback *user_cb)
3614 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3617 /* Check input parameters. */
3618 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3619 if (user_cb == NULL ||
3620 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3623 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3624 struct rte_eth_rxtx_callback *cb;
3625 struct rte_eth_rxtx_callback **prev_cb;
3628 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3629 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3630 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3632 if (cb == user_cb) {
3633 /* Remove the user cb from the callback list. */
3634 *prev_cb = cb->next;
3639 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3645 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3646 struct rte_eth_rxtx_callback *user_cb)
3648 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3651 /* Check input parameters. */
3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3653 if (user_cb == NULL ||
3654 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3657 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3659 struct rte_eth_rxtx_callback *cb;
3660 struct rte_eth_rxtx_callback **prev_cb;
3662 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3663 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3664 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3666 if (cb == user_cb) {
3667 /* Remove the user cb from the callback list. */
3668 *prev_cb = cb->next;
3673 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3679 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3680 struct rte_eth_rxq_info *qinfo)
3682 struct rte_eth_dev *dev;
3684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3689 dev = &rte_eth_devices[port_id];
3690 if (queue_id >= dev->data->nb_rx_queues) {
3691 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3697 memset(qinfo, 0, sizeof(*qinfo));
3698 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3703 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3704 struct rte_eth_txq_info *qinfo)
3706 struct rte_eth_dev *dev;
3708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3713 dev = &rte_eth_devices[port_id];
3714 if (queue_id >= dev->data->nb_tx_queues) {
3715 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3721 memset(qinfo, 0, sizeof(*qinfo));
3722 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3727 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3728 struct ether_addr *mc_addr_set,
3729 uint32_t nb_mc_addr)
3731 struct rte_eth_dev *dev;
3733 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3735 dev = &rte_eth_devices[port_id];
3736 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3737 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3738 mc_addr_set, nb_mc_addr));
3742 rte_eth_timesync_enable(uint16_t port_id)
3744 struct rte_eth_dev *dev;
3746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3747 dev = &rte_eth_devices[port_id];
3749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3750 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3754 rte_eth_timesync_disable(uint16_t port_id)
3756 struct rte_eth_dev *dev;
3758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3759 dev = &rte_eth_devices[port_id];
3761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3762 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3766 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3769 struct rte_eth_dev *dev;
3771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3772 dev = &rte_eth_devices[port_id];
3774 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3775 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3776 (dev, timestamp, flags));
3780 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3781 struct timespec *timestamp)
3783 struct rte_eth_dev *dev;
3785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3786 dev = &rte_eth_devices[port_id];
3788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3789 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3794 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3796 struct rte_eth_dev *dev;
3798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3799 dev = &rte_eth_devices[port_id];
3801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3802 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3807 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3809 struct rte_eth_dev *dev;
3811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3812 dev = &rte_eth_devices[port_id];
3814 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3815 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3820 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3822 struct rte_eth_dev *dev;
3824 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3825 dev = &rte_eth_devices[port_id];
3827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3828 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3833 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3835 struct rte_eth_dev *dev;
3837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3839 dev = &rte_eth_devices[port_id];
3840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3841 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3845 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3847 struct rte_eth_dev *dev;
3849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3851 dev = &rte_eth_devices[port_id];
3852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3853 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3857 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3859 struct rte_eth_dev *dev;
3861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3863 dev = &rte_eth_devices[port_id];
3864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3865 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3869 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3871 struct rte_eth_dev *dev;
3873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3875 dev = &rte_eth_devices[port_id];
3876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3877 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3881 rte_eth_dev_get_dcb_info(uint16_t port_id,
3882 struct rte_eth_dcb_info *dcb_info)
3884 struct rte_eth_dev *dev;
3886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3888 dev = &rte_eth_devices[port_id];
3889 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3892 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3896 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3897 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3899 struct rte_eth_dev *dev;
3901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3902 if (l2_tunnel == NULL) {
3903 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3907 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3908 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3912 dev = &rte_eth_devices[port_id];
3913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3915 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3920 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3921 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3925 struct rte_eth_dev *dev;
3927 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3929 if (l2_tunnel == NULL) {
3930 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3934 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3935 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3940 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3944 dev = &rte_eth_devices[port_id];
3945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3947 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3948 l2_tunnel, mask, en));
3952 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3953 const struct rte_eth_desc_lim *desc_lim)
3955 if (desc_lim->nb_align != 0)
3956 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3958 if (desc_lim->nb_max != 0)
3959 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3961 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3965 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3966 uint16_t *nb_rx_desc,
3967 uint16_t *nb_tx_desc)
3969 struct rte_eth_dev *dev;
3970 struct rte_eth_dev_info dev_info;
3972 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3974 dev = &rte_eth_devices[port_id];
3975 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3977 rte_eth_dev_info_get(port_id, &dev_info);
3979 if (nb_rx_desc != NULL)
3980 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3982 if (nb_tx_desc != NULL)
3983 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3989 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3991 struct rte_eth_dev *dev;
3993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 dev = &rte_eth_devices[port_id];
4000 if (*dev->dev_ops->pool_ops_supported == NULL)
4001 return 1; /* all pools are supported */
4003 return (*dev->dev_ops->pool_ops_supported)(dev, pool);