1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static int ethdev_logtype;
45 #define ethdev_log(level, fmt, ...) \
46 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
50 static uint8_t eth_dev_last_created_port;
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 rte_eth_dev_allocated(const char *name)
234 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
235 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
236 strcmp(rte_eth_devices[i].data->name, name) == 0)
237 return &rte_eth_devices[i];
243 rte_eth_dev_find_free_port(void)
247 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
248 /* Using shared name field to find a free port. */
249 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
250 RTE_ASSERT(rte_eth_devices[i].state ==
255 return RTE_MAX_ETHPORTS;
258 static struct rte_eth_dev *
259 eth_dev_get(uint16_t port_id)
261 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
263 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
264 eth_dev->state = RTE_ETH_DEV_ATTACHED;
266 eth_dev_last_created_port = port_id;
272 rte_eth_dev_allocate(const char *name)
275 struct rte_eth_dev *eth_dev = NULL;
277 rte_eth_dev_shared_data_prepare();
279 /* Synchronize port creation between primary and secondary threads. */
280 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
282 port_id = rte_eth_dev_find_free_port();
283 if (port_id == RTE_MAX_ETHPORTS) {
284 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
288 if (rte_eth_dev_allocated(name) != NULL) {
290 "Ethernet Device with name %s already allocated!",
295 eth_dev = eth_dev_get(port_id);
296 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
297 eth_dev->data->port_id = port_id;
298 eth_dev->data->mtu = ETHER_MTU;
301 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
304 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
310 * Attach to a port already registered by the primary process, which
311 * makes sure that the same device would have the same port id both
312 * in the primary and secondary process.
315 rte_eth_dev_attach_secondary(const char *name)
318 struct rte_eth_dev *eth_dev = NULL;
320 rte_eth_dev_shared_data_prepare();
322 /* Synchronize port attachment to primary port creation and release. */
323 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
325 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
326 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
329 if (i == RTE_MAX_ETHPORTS) {
331 "device %s is not driven by the primary process\n",
334 eth_dev = eth_dev_get(i);
335 RTE_ASSERT(eth_dev->data->port_id == i);
338 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
343 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
348 rte_eth_dev_shared_data_prepare();
350 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
352 eth_dev->state = RTE_ETH_DEV_UNUSED;
354 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
358 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
364 rte_eth_dev_is_valid_port(uint16_t port_id)
366 if (port_id >= RTE_MAX_ETHPORTS ||
367 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
374 rte_eth_is_valid_owner_id(uint64_t owner_id)
376 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
377 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
378 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
384 uint64_t __rte_experimental
385 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
387 while (port_id < RTE_MAX_ETHPORTS &&
388 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
389 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
390 rte_eth_devices[port_id].data->owner.id != owner_id))
393 if (port_id >= RTE_MAX_ETHPORTS)
394 return RTE_MAX_ETHPORTS;
399 int __rte_experimental
400 rte_eth_dev_owner_new(uint64_t *owner_id)
402 rte_eth_dev_shared_data_prepare();
404 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
406 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
408 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
413 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
414 const struct rte_eth_dev_owner *new_owner)
416 struct rte_eth_dev_owner *port_owner;
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
421 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
422 !rte_eth_is_valid_owner_id(old_owner_id))
425 port_owner = &rte_eth_devices[port_id].data->owner;
426 if (port_owner->id != old_owner_id) {
427 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
428 " by %s_%016lX.\n", port_id,
429 port_owner->name, port_owner->id);
433 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
435 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
436 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
439 port_owner->id = new_owner->id;
441 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
442 new_owner->name, new_owner->id);
447 int __rte_experimental
448 rte_eth_dev_owner_set(const uint16_t port_id,
449 const struct rte_eth_dev_owner *owner)
453 rte_eth_dev_shared_data_prepare();
455 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
457 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
459 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
463 int __rte_experimental
464 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
466 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
467 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
470 rte_eth_dev_shared_data_prepare();
472 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
474 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
476 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
480 void __rte_experimental
481 rte_eth_dev_owner_delete(const uint64_t owner_id)
485 rte_eth_dev_shared_data_prepare();
487 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
489 if (rte_eth_is_valid_owner_id(owner_id)) {
490 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
491 memset(&rte_eth_devices[port_id].data->owner, 0,
492 sizeof(struct rte_eth_dev_owner));
493 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
494 " have removed.\n", owner_id);
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
505 rte_eth_dev_shared_data_prepare();
507 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
509 if (!rte_eth_dev_is_valid_port(port_id)) {
510 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
513 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
517 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 rte_eth_dev_socket_id(uint16_t port_id)
524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
525 return rte_eth_devices[port_id].data->numa_node;
529 rte_eth_dev_get_sec_ctx(uint16_t port_id)
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
532 return rte_eth_devices[port_id].security_ctx;
536 rte_eth_dev_count(void)
543 RTE_ETH_FOREACH_DEV(p)
550 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
557 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
561 /* shouldn't check 'rte_eth_devices[i].data',
562 * because it might be overwritten by VDEV PMD */
563 tmp = rte_eth_dev_shared_data->data[port_id].name;
569 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
574 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
578 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
579 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
580 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
590 eth_err(uint16_t port_id, int ret)
594 if (rte_eth_dev_is_removed(port_id))
599 /* attach the new device, then store port_id of the device */
601 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
604 int current = rte_eth_dev_count();
608 if ((devargs == NULL) || (port_id == NULL)) {
613 /* parse devargs, then retrieve device name and args */
614 if (rte_eal_parse_devargs_str(devargs, &name, &args))
617 ret = rte_eal_dev_attach(name, args);
621 /* no point looking at the port count if no port exists */
622 if (!rte_eth_dev_count()) {
623 ethdev_log(ERR, "No port found for device (%s)", name);
628 /* if nothing happened, there is a bug here, since some driver told us
629 * it did attach a device, but did not create a port.
631 if (current == rte_eth_dev_count()) {
636 *port_id = eth_dev_last_created_port;
645 /* detach the device, then store the name of the device */
647 rte_eth_dev_detach(uint16_t port_id, char *name)
652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
659 dev_flags = rte_eth_devices[port_id].data->dev_flags;
660 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
662 "Port %" PRIu16 " is bonded, cannot detach", port_id);
667 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
668 "%s", rte_eth_devices[port_id].data->name);
670 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
674 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
682 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
684 uint16_t old_nb_queues = dev->data->nb_rx_queues;
688 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
689 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
690 sizeof(dev->data->rx_queues[0]) * nb_queues,
691 RTE_CACHE_LINE_SIZE);
692 if (dev->data->rx_queues == NULL) {
693 dev->data->nb_rx_queues = 0;
696 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
699 rxq = dev->data->rx_queues;
701 for (i = nb_queues; i < old_nb_queues; i++)
702 (*dev->dev_ops->rx_queue_release)(rxq[i]);
703 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
704 RTE_CACHE_LINE_SIZE);
707 if (nb_queues > old_nb_queues) {
708 uint16_t new_qs = nb_queues - old_nb_queues;
710 memset(rxq + old_nb_queues, 0,
711 sizeof(rxq[0]) * new_qs);
714 dev->data->rx_queues = rxq;
716 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
719 rxq = dev->data->rx_queues;
721 for (i = nb_queues; i < old_nb_queues; i++)
722 (*dev->dev_ops->rx_queue_release)(rxq[i]);
724 rte_free(dev->data->rx_queues);
725 dev->data->rx_queues = NULL;
727 dev->data->nb_rx_queues = nb_queues;
732 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
734 struct rte_eth_dev *dev;
736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
738 dev = &rte_eth_devices[port_id];
739 if (!dev->data->dev_started) {
741 "port %d must be started before start any queue\n", port_id);
745 if (rx_queue_id >= dev->data->nb_rx_queues) {
746 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
752 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
753 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
754 " already started\n",
755 rx_queue_id, port_id);
759 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
765 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
767 struct rte_eth_dev *dev;
769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
771 dev = &rte_eth_devices[port_id];
772 if (rx_queue_id >= dev->data->nb_rx_queues) {
773 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
779 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
780 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
781 " already stopped\n",
782 rx_queue_id, port_id);
786 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
791 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
793 struct rte_eth_dev *dev;
795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
797 dev = &rte_eth_devices[port_id];
798 if (!dev->data->dev_started) {
800 "port %d must be started before start any queue\n", port_id);
804 if (tx_queue_id >= dev->data->nb_tx_queues) {
805 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
811 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
812 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
813 " already started\n",
814 tx_queue_id, port_id);
818 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
824 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
826 struct rte_eth_dev *dev;
828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
830 dev = &rte_eth_devices[port_id];
831 if (tx_queue_id >= dev->data->nb_tx_queues) {
832 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
838 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
839 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
840 " already stopped\n",
841 tx_queue_id, port_id);
845 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
850 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
852 uint16_t old_nb_queues = dev->data->nb_tx_queues;
856 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
857 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
858 sizeof(dev->data->tx_queues[0]) * nb_queues,
859 RTE_CACHE_LINE_SIZE);
860 if (dev->data->tx_queues == NULL) {
861 dev->data->nb_tx_queues = 0;
864 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
867 txq = dev->data->tx_queues;
869 for (i = nb_queues; i < old_nb_queues; i++)
870 (*dev->dev_ops->tx_queue_release)(txq[i]);
871 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
872 RTE_CACHE_LINE_SIZE);
875 if (nb_queues > old_nb_queues) {
876 uint16_t new_qs = nb_queues - old_nb_queues;
878 memset(txq + old_nb_queues, 0,
879 sizeof(txq[0]) * new_qs);
882 dev->data->tx_queues = txq;
884 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
887 txq = dev->data->tx_queues;
889 for (i = nb_queues; i < old_nb_queues; i++)
890 (*dev->dev_ops->tx_queue_release)(txq[i]);
892 rte_free(dev->data->tx_queues);
893 dev->data->tx_queues = NULL;
895 dev->data->nb_tx_queues = nb_queues;
900 rte_eth_speed_bitflag(uint32_t speed, int duplex)
903 case ETH_SPEED_NUM_10M:
904 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
905 case ETH_SPEED_NUM_100M:
906 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
907 case ETH_SPEED_NUM_1G:
908 return ETH_LINK_SPEED_1G;
909 case ETH_SPEED_NUM_2_5G:
910 return ETH_LINK_SPEED_2_5G;
911 case ETH_SPEED_NUM_5G:
912 return ETH_LINK_SPEED_5G;
913 case ETH_SPEED_NUM_10G:
914 return ETH_LINK_SPEED_10G;
915 case ETH_SPEED_NUM_20G:
916 return ETH_LINK_SPEED_20G;
917 case ETH_SPEED_NUM_25G:
918 return ETH_LINK_SPEED_25G;
919 case ETH_SPEED_NUM_40G:
920 return ETH_LINK_SPEED_40G;
921 case ETH_SPEED_NUM_50G:
922 return ETH_LINK_SPEED_50G;
923 case ETH_SPEED_NUM_56G:
924 return ETH_LINK_SPEED_56G;
925 case ETH_SPEED_NUM_100G:
926 return ETH_LINK_SPEED_100G;
933 * A conversion function from rxmode bitfield API.
936 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
937 uint64_t *rx_offloads)
939 uint64_t offloads = 0;
941 if (rxmode->header_split == 1)
942 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
943 if (rxmode->hw_ip_checksum == 1)
944 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
945 if (rxmode->hw_vlan_filter == 1)
946 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
947 if (rxmode->hw_vlan_strip == 1)
948 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
949 if (rxmode->hw_vlan_extend == 1)
950 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
951 if (rxmode->jumbo_frame == 1)
952 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
953 if (rxmode->hw_strip_crc == 1)
954 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
955 if (rxmode->enable_scatter == 1)
956 offloads |= DEV_RX_OFFLOAD_SCATTER;
957 if (rxmode->enable_lro == 1)
958 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
959 if (rxmode->hw_timestamp == 1)
960 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
961 if (rxmode->security == 1)
962 offloads |= DEV_RX_OFFLOAD_SECURITY;
964 *rx_offloads = offloads;
968 * A conversion function from rxmode offloads API.
971 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
972 struct rte_eth_rxmode *rxmode)
975 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
976 rxmode->header_split = 1;
978 rxmode->header_split = 0;
979 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
980 rxmode->hw_ip_checksum = 1;
982 rxmode->hw_ip_checksum = 0;
983 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
984 rxmode->hw_vlan_filter = 1;
986 rxmode->hw_vlan_filter = 0;
987 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
988 rxmode->hw_vlan_strip = 1;
990 rxmode->hw_vlan_strip = 0;
991 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
992 rxmode->hw_vlan_extend = 1;
994 rxmode->hw_vlan_extend = 0;
995 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
996 rxmode->jumbo_frame = 1;
998 rxmode->jumbo_frame = 0;
999 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
1000 rxmode->hw_strip_crc = 1;
1002 rxmode->hw_strip_crc = 0;
1003 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
1004 rxmode->enable_scatter = 1;
1006 rxmode->enable_scatter = 0;
1007 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
1008 rxmode->enable_lro = 1;
1010 rxmode->enable_lro = 0;
1011 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
1012 rxmode->hw_timestamp = 1;
1014 rxmode->hw_timestamp = 0;
1015 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
1016 rxmode->security = 1;
1018 rxmode->security = 0;
1021 const char * __rte_experimental
1022 rte_eth_dev_rx_offload_name(uint64_t offload)
1024 const char *name = "UNKNOWN";
1027 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1028 if (offload == rte_rx_offload_names[i].offload) {
1029 name = rte_rx_offload_names[i].name;
1037 const char * __rte_experimental
1038 rte_eth_dev_tx_offload_name(uint64_t offload)
1040 const char *name = "UNKNOWN";
1043 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1044 if (offload == rte_tx_offload_names[i].offload) {
1045 name = rte_tx_offload_names[i].name;
1054 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1055 const struct rte_eth_conf *dev_conf)
1057 struct rte_eth_dev *dev;
1058 struct rte_eth_dev_info dev_info;
1059 struct rte_eth_conf local_conf = *dev_conf;
1062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1064 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1065 RTE_PMD_DEBUG_TRACE(
1066 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1067 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1071 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1072 RTE_PMD_DEBUG_TRACE(
1073 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1074 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1078 dev = &rte_eth_devices[port_id];
1080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1083 if (dev->data->dev_started) {
1084 RTE_PMD_DEBUG_TRACE(
1085 "port %d must be stopped to allow configuration\n", port_id);
1090 * Convert between the offloads API to enable PMDs to support
1093 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1094 rte_eth_convert_rx_offload_bitfield(
1095 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1097 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1098 &local_conf.rxmode);
1101 /* Copy the dev_conf parameter into the dev structure */
1102 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1105 * Check that the numbers of RX and TX queues are not greater
1106 * than the maximum number of RX and TX queues supported by the
1107 * configured device.
1109 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1111 if (nb_rx_q == 0 && nb_tx_q == 0) {
1112 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
1116 if (nb_rx_q > dev_info.max_rx_queues) {
1117 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1118 port_id, nb_rx_q, dev_info.max_rx_queues);
1122 if (nb_tx_q > dev_info.max_tx_queues) {
1123 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1124 port_id, nb_tx_q, dev_info.max_tx_queues);
1128 /* Check that the device supports requested interrupts */
1129 if ((dev_conf->intr_conf.lsc == 1) &&
1130 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1131 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1132 dev->device->driver->name);
1135 if ((dev_conf->intr_conf.rmv == 1) &&
1136 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1137 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1138 dev->device->driver->name);
1143 * If jumbo frames are enabled, check that the maximum RX packet
1144 * length is supported by the configured device.
1146 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1147 if (dev_conf->rxmode.max_rx_pkt_len >
1148 dev_info.max_rx_pktlen) {
1149 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1150 " > max valid value %u\n",
1152 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1153 (unsigned)dev_info.max_rx_pktlen);
1155 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1156 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1157 " < min valid value %u\n",
1159 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1160 (unsigned)ETHER_MIN_LEN);
1164 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1165 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1166 /* Use default value */
1167 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1172 * Setup new number of RX/TX queues and reconfigure device.
1174 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1176 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1181 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1183 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1189 diag = (*dev->dev_ops->dev_configure)(dev);
1191 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1193 rte_eth_dev_rx_queue_config(dev, 0);
1194 rte_eth_dev_tx_queue_config(dev, 0);
1195 return eth_err(port_id, diag);
1198 /* Initialize Rx profiling if enabled at compilation time. */
1199 diag = __rte_eth_profile_rx_init(port_id, dev);
1201 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1205 return eth_err(port_id, diag);
1212 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1214 if (dev->data->dev_started) {
1215 RTE_PMD_DEBUG_TRACE(
1216 "port %d must be stopped to allow reset\n",
1217 dev->data->port_id);
1221 rte_eth_dev_rx_queue_config(dev, 0);
1222 rte_eth_dev_tx_queue_config(dev, 0);
1224 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1228 rte_eth_dev_config_restore(uint16_t port_id)
1230 struct rte_eth_dev *dev;
1231 struct rte_eth_dev_info dev_info;
1232 struct ether_addr *addr;
1237 dev = &rte_eth_devices[port_id];
1239 rte_eth_dev_info_get(port_id, &dev_info);
1241 /* replay MAC address configuration including default MAC */
1242 addr = &dev->data->mac_addrs[0];
1243 if (*dev->dev_ops->mac_addr_set != NULL)
1244 (*dev->dev_ops->mac_addr_set)(dev, addr);
1245 else if (*dev->dev_ops->mac_addr_add != NULL)
1246 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1248 if (*dev->dev_ops->mac_addr_add != NULL) {
1249 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1250 addr = &dev->data->mac_addrs[i];
1252 /* skip zero address */
1253 if (is_zero_ether_addr(addr))
1257 pool_mask = dev->data->mac_pool_sel[i];
1260 if (pool_mask & 1ULL)
1261 (*dev->dev_ops->mac_addr_add)(dev,
1265 } while (pool_mask);
1269 /* replay promiscuous configuration */
1270 if (rte_eth_promiscuous_get(port_id) == 1)
1271 rte_eth_promiscuous_enable(port_id);
1272 else if (rte_eth_promiscuous_get(port_id) == 0)
1273 rte_eth_promiscuous_disable(port_id);
1275 /* replay all multicast configuration */
1276 if (rte_eth_allmulticast_get(port_id) == 1)
1277 rte_eth_allmulticast_enable(port_id);
1278 else if (rte_eth_allmulticast_get(port_id) == 0)
1279 rte_eth_allmulticast_disable(port_id);
1283 rte_eth_dev_start(uint16_t port_id)
1285 struct rte_eth_dev *dev;
1288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1290 dev = &rte_eth_devices[port_id];
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1294 if (dev->data->dev_started != 0) {
1295 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1296 " already started\n",
1301 diag = (*dev->dev_ops->dev_start)(dev);
1303 dev->data->dev_started = 1;
1305 return eth_err(port_id, diag);
1307 rte_eth_dev_config_restore(port_id);
1309 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1311 (*dev->dev_ops->link_update)(dev, 0);
1317 rte_eth_dev_stop(uint16_t port_id)
1319 struct rte_eth_dev *dev;
1321 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1322 dev = &rte_eth_devices[port_id];
1324 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1326 if (dev->data->dev_started == 0) {
1327 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1328 " already stopped\n",
1333 dev->data->dev_started = 0;
1334 (*dev->dev_ops->dev_stop)(dev);
1338 rte_eth_dev_set_link_up(uint16_t port_id)
1340 struct rte_eth_dev *dev;
1342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1344 dev = &rte_eth_devices[port_id];
1346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1347 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1351 rte_eth_dev_set_link_down(uint16_t port_id)
1353 struct rte_eth_dev *dev;
1355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1357 dev = &rte_eth_devices[port_id];
1359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1360 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1364 rte_eth_dev_close(uint16_t port_id)
1366 struct rte_eth_dev *dev;
1368 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1369 dev = &rte_eth_devices[port_id];
1371 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1372 dev->data->dev_started = 0;
1373 (*dev->dev_ops->dev_close)(dev);
1375 dev->data->nb_rx_queues = 0;
1376 rte_free(dev->data->rx_queues);
1377 dev->data->rx_queues = NULL;
1378 dev->data->nb_tx_queues = 0;
1379 rte_free(dev->data->tx_queues);
1380 dev->data->tx_queues = NULL;
1384 rte_eth_dev_reset(uint16_t port_id)
1386 struct rte_eth_dev *dev;
1389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1390 dev = &rte_eth_devices[port_id];
1392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1394 rte_eth_dev_stop(port_id);
1395 ret = dev->dev_ops->dev_reset(dev);
1397 return eth_err(port_id, ret);
1400 int __rte_experimental
1401 rte_eth_dev_is_removed(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1408 dev = &rte_eth_devices[port_id];
1410 if (dev->state == RTE_ETH_DEV_REMOVED)
1413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1415 ret = dev->dev_ops->is_removed(dev);
1417 /* Device is physically removed. */
1418 dev->state = RTE_ETH_DEV_REMOVED;
1424 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1425 uint16_t nb_rx_desc, unsigned int socket_id,
1426 const struct rte_eth_rxconf *rx_conf,
1427 struct rte_mempool *mp)
1430 uint32_t mbp_buf_size;
1431 struct rte_eth_dev *dev;
1432 struct rte_eth_dev_info dev_info;
1433 struct rte_eth_rxconf local_conf;
1436 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1438 dev = &rte_eth_devices[port_id];
1439 if (rx_queue_id >= dev->data->nb_rx_queues) {
1440 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1444 if (dev->data->dev_started) {
1445 RTE_PMD_DEBUG_TRACE(
1446 "port %d must be stopped to allow configuration\n", port_id);
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1454 * Check the size of the mbuf data buffer.
1455 * This value must be provided in the private data of the memory pool.
1456 * First check that the memory pool has a valid private data.
1458 rte_eth_dev_info_get(port_id, &dev_info);
1459 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1460 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1461 mp->name, (int) mp->private_data_size,
1462 (int) sizeof(struct rte_pktmbuf_pool_private));
1465 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1467 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1468 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1469 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1473 (int)(RTE_PKTMBUF_HEADROOM +
1474 dev_info.min_rx_bufsize),
1475 (int)RTE_PKTMBUF_HEADROOM,
1476 (int)dev_info.min_rx_bufsize);
1480 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1481 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1482 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1484 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1485 "should be: <= %hu, = %hu, and a product of %hu\n",
1487 dev_info.rx_desc_lim.nb_max,
1488 dev_info.rx_desc_lim.nb_min,
1489 dev_info.rx_desc_lim.nb_align);
1493 rxq = dev->data->rx_queues;
1494 if (rxq[rx_queue_id]) {
1495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1497 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1498 rxq[rx_queue_id] = NULL;
1501 if (rx_conf == NULL)
1502 rx_conf = &dev_info.default_rxconf;
1504 local_conf = *rx_conf;
1505 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1507 * Reflect port offloads to queue offloads in order for
1508 * offloads to not be discarded.
1510 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1511 &local_conf.offloads);
1514 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1515 socket_id, &local_conf, mp);
1517 if (!dev->data->min_rx_buf_size ||
1518 dev->data->min_rx_buf_size > mbp_buf_size)
1519 dev->data->min_rx_buf_size = mbp_buf_size;
1522 return eth_err(port_id, ret);
1526 * A conversion function from txq_flags API.
1529 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1531 uint64_t offloads = 0;
1533 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1534 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1535 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1536 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1537 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1538 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1539 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1540 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1541 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1542 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1543 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1544 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1545 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1547 *tx_offloads = offloads;
1551 * A conversion function from offloads API.
1554 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1558 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1559 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1560 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1561 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1562 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1563 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1564 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1565 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1566 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1567 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1568 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1569 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1575 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1576 uint16_t nb_tx_desc, unsigned int socket_id,
1577 const struct rte_eth_txconf *tx_conf)
1579 struct rte_eth_dev *dev;
1580 struct rte_eth_dev_info dev_info;
1581 struct rte_eth_txconf local_conf;
1584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1586 dev = &rte_eth_devices[port_id];
1587 if (tx_queue_id >= dev->data->nb_tx_queues) {
1588 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1592 if (dev->data->dev_started) {
1593 RTE_PMD_DEBUG_TRACE(
1594 "port %d must be stopped to allow configuration\n", port_id);
1598 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1601 rte_eth_dev_info_get(port_id, &dev_info);
1603 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1604 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1605 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1606 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1607 "should be: <= %hu, = %hu, and a product of %hu\n",
1609 dev_info.tx_desc_lim.nb_max,
1610 dev_info.tx_desc_lim.nb_min,
1611 dev_info.tx_desc_lim.nb_align);
1615 txq = dev->data->tx_queues;
1616 if (txq[tx_queue_id]) {
1617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1619 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1620 txq[tx_queue_id] = NULL;
1623 if (tx_conf == NULL)
1624 tx_conf = &dev_info.default_txconf;
1627 * Convert between the offloads API to enable PMDs to support
1630 local_conf = *tx_conf;
1631 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1632 rte_eth_convert_txq_offloads(tx_conf->offloads,
1633 &local_conf.txq_flags);
1634 /* Keep the ignore flag. */
1635 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1637 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1638 &local_conf.offloads);
1641 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1642 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1646 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1647 void *userdata __rte_unused)
1651 for (i = 0; i < unsent; i++)
1652 rte_pktmbuf_free(pkts[i]);
1656 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1659 uint64_t *count = userdata;
1662 for (i = 0; i < unsent; i++)
1663 rte_pktmbuf_free(pkts[i]);
1669 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1670 buffer_tx_error_fn cbfn, void *userdata)
1672 buffer->error_callback = cbfn;
1673 buffer->error_userdata = userdata;
1678 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1685 buffer->size = size;
1686 if (buffer->error_callback == NULL) {
1687 ret = rte_eth_tx_buffer_set_err_callback(
1688 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1695 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1697 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1700 /* Validate Input Data. Bail if not valid or not supported. */
1701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1704 /* Call driver to free pending mbufs. */
1705 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1707 return eth_err(port_id, ret);
1711 rte_eth_promiscuous_enable(uint16_t port_id)
1713 struct rte_eth_dev *dev;
1715 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1716 dev = &rte_eth_devices[port_id];
1718 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1719 (*dev->dev_ops->promiscuous_enable)(dev);
1720 dev->data->promiscuous = 1;
1724 rte_eth_promiscuous_disable(uint16_t port_id)
1726 struct rte_eth_dev *dev;
1728 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1729 dev = &rte_eth_devices[port_id];
1731 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1732 dev->data->promiscuous = 0;
1733 (*dev->dev_ops->promiscuous_disable)(dev);
1737 rte_eth_promiscuous_get(uint16_t port_id)
1739 struct rte_eth_dev *dev;
1741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1743 dev = &rte_eth_devices[port_id];
1744 return dev->data->promiscuous;
1748 rte_eth_allmulticast_enable(uint16_t port_id)
1750 struct rte_eth_dev *dev;
1752 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1753 dev = &rte_eth_devices[port_id];
1755 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1756 (*dev->dev_ops->allmulticast_enable)(dev);
1757 dev->data->all_multicast = 1;
1761 rte_eth_allmulticast_disable(uint16_t port_id)
1763 struct rte_eth_dev *dev;
1765 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1766 dev = &rte_eth_devices[port_id];
1768 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1769 dev->data->all_multicast = 0;
1770 (*dev->dev_ops->allmulticast_disable)(dev);
1774 rte_eth_allmulticast_get(uint16_t port_id)
1776 struct rte_eth_dev *dev;
1778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1780 dev = &rte_eth_devices[port_id];
1781 return dev->data->all_multicast;
1785 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1787 struct rte_eth_dev *dev;
1789 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1790 dev = &rte_eth_devices[port_id];
1792 if (dev->data->dev_conf.intr_conf.lsc &&
1793 dev->data->dev_started)
1794 rte_eth_linkstatus_get(dev, eth_link);
1796 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1797 (*dev->dev_ops->link_update)(dev, 1);
1798 *eth_link = dev->data->dev_link;
1803 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1808 dev = &rte_eth_devices[port_id];
1810 if (dev->data->dev_conf.intr_conf.lsc &&
1811 dev->data->dev_started)
1812 rte_eth_linkstatus_get(dev, eth_link);
1814 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1815 (*dev->dev_ops->link_update)(dev, 0);
1816 *eth_link = dev->data->dev_link;
1821 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1823 struct rte_eth_dev *dev;
1825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1827 dev = &rte_eth_devices[port_id];
1828 memset(stats, 0, sizeof(*stats));
1830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1831 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1832 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1836 rte_eth_stats_reset(uint16_t port_id)
1838 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1841 dev = &rte_eth_devices[port_id];
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1844 (*dev->dev_ops->stats_reset)(dev);
1845 dev->data->rx_mbuf_alloc_failed = 0;
1851 get_xstats_basic_count(struct rte_eth_dev *dev)
1853 uint16_t nb_rxqs, nb_txqs;
1856 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1857 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1859 count = RTE_NB_STATS;
1860 count += nb_rxqs * RTE_NB_RXQ_STATS;
1861 count += nb_txqs * RTE_NB_TXQ_STATS;
1867 get_xstats_count(uint16_t port_id)
1869 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1873 dev = &rte_eth_devices[port_id];
1874 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1875 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1878 return eth_err(port_id, count);
1880 if (dev->dev_ops->xstats_get_names != NULL) {
1881 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1883 return eth_err(port_id, count);
1888 count += get_xstats_basic_count(dev);
1894 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1897 int cnt_xstats, idx_xstat;
1899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1902 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1907 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1912 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1913 if (cnt_xstats < 0) {
1914 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1918 /* Get id-name lookup table */
1919 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1921 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1922 port_id, xstats_names, cnt_xstats, NULL)) {
1923 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1927 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1928 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1937 /* retrieve basic stats names */
1939 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1940 struct rte_eth_xstat_name *xstats_names)
1942 int cnt_used_entries = 0;
1943 uint32_t idx, id_queue;
1946 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1947 snprintf(xstats_names[cnt_used_entries].name,
1948 sizeof(xstats_names[0].name),
1949 "%s", rte_stats_strings[idx].name);
1952 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1953 for (id_queue = 0; id_queue < num_q; id_queue++) {
1954 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1955 snprintf(xstats_names[cnt_used_entries].name,
1956 sizeof(xstats_names[0].name),
1958 id_queue, rte_rxq_stats_strings[idx].name);
1963 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1964 for (id_queue = 0; id_queue < num_q; id_queue++) {
1965 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1966 snprintf(xstats_names[cnt_used_entries].name,
1967 sizeof(xstats_names[0].name),
1969 id_queue, rte_txq_stats_strings[idx].name);
1973 return cnt_used_entries;
1976 /* retrieve ethdev extended statistics names */
1978 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1979 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1982 struct rte_eth_xstat_name *xstats_names_copy;
1983 unsigned int no_basic_stat_requested = 1;
1984 unsigned int no_ext_stat_requested = 1;
1985 unsigned int expected_entries;
1986 unsigned int basic_count;
1987 struct rte_eth_dev *dev;
1991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1992 dev = &rte_eth_devices[port_id];
1994 basic_count = get_xstats_basic_count(dev);
1995 ret = get_xstats_count(port_id);
1998 expected_entries = (unsigned int)ret;
2000 /* Return max number of stats if no ids given */
2003 return expected_entries;
2004 else if (xstats_names && size < expected_entries)
2005 return expected_entries;
2008 if (ids && !xstats_names)
2011 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2012 uint64_t ids_copy[size];
2014 for (i = 0; i < size; i++) {
2015 if (ids[i] < basic_count) {
2016 no_basic_stat_requested = 0;
2021 * Convert ids to xstats ids that PMD knows.
2022 * ids known by user are basic + extended stats.
2024 ids_copy[i] = ids[i] - basic_count;
2027 if (no_basic_stat_requested)
2028 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2029 xstats_names, ids_copy, size);
2032 /* Retrieve all stats */
2034 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2036 if (num_stats < 0 || num_stats > (int)expected_entries)
2039 return expected_entries;
2042 xstats_names_copy = calloc(expected_entries,
2043 sizeof(struct rte_eth_xstat_name));
2045 if (!xstats_names_copy) {
2046 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2051 for (i = 0; i < size; i++) {
2052 if (ids[i] >= basic_count) {
2053 no_ext_stat_requested = 0;
2059 /* Fill xstats_names_copy structure */
2060 if (ids && no_ext_stat_requested) {
2061 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2063 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2066 free(xstats_names_copy);
2072 for (i = 0; i < size; i++) {
2073 if (ids[i] >= expected_entries) {
2074 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2075 free(xstats_names_copy);
2078 xstats_names[i] = xstats_names_copy[ids[i]];
2081 free(xstats_names_copy);
2086 rte_eth_xstats_get_names(uint16_t port_id,
2087 struct rte_eth_xstat_name *xstats_names,
2090 struct rte_eth_dev *dev;
2091 int cnt_used_entries;
2092 int cnt_expected_entries;
2093 int cnt_driver_entries;
2095 cnt_expected_entries = get_xstats_count(port_id);
2096 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2097 (int)size < cnt_expected_entries)
2098 return cnt_expected_entries;
2100 /* port_id checked in get_xstats_count() */
2101 dev = &rte_eth_devices[port_id];
2103 cnt_used_entries = rte_eth_basic_stats_get_names(
2106 if (dev->dev_ops->xstats_get_names != NULL) {
2107 /* If there are any driver-specific xstats, append them
2110 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2112 xstats_names + cnt_used_entries,
2113 size - cnt_used_entries);
2114 if (cnt_driver_entries < 0)
2115 return eth_err(port_id, cnt_driver_entries);
2116 cnt_used_entries += cnt_driver_entries;
2119 return cnt_used_entries;
2124 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2126 struct rte_eth_dev *dev;
2127 struct rte_eth_stats eth_stats;
2128 unsigned int count = 0, i, q;
2129 uint64_t val, *stats_ptr;
2130 uint16_t nb_rxqs, nb_txqs;
2133 ret = rte_eth_stats_get(port_id, ð_stats);
2137 dev = &rte_eth_devices[port_id];
2139 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2140 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2143 for (i = 0; i < RTE_NB_STATS; i++) {
2144 stats_ptr = RTE_PTR_ADD(ð_stats,
2145 rte_stats_strings[i].offset);
2147 xstats[count++].value = val;
2151 for (q = 0; q < nb_rxqs; q++) {
2152 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2153 stats_ptr = RTE_PTR_ADD(ð_stats,
2154 rte_rxq_stats_strings[i].offset +
2155 q * sizeof(uint64_t));
2157 xstats[count++].value = val;
2162 for (q = 0; q < nb_txqs; q++) {
2163 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2164 stats_ptr = RTE_PTR_ADD(ð_stats,
2165 rte_txq_stats_strings[i].offset +
2166 q * sizeof(uint64_t));
2168 xstats[count++].value = val;
2174 /* retrieve ethdev extended statistics */
2176 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2177 uint64_t *values, unsigned int size)
2179 unsigned int no_basic_stat_requested = 1;
2180 unsigned int no_ext_stat_requested = 1;
2181 unsigned int num_xstats_filled;
2182 unsigned int basic_count;
2183 uint16_t expected_entries;
2184 struct rte_eth_dev *dev;
2188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2189 ret = get_xstats_count(port_id);
2192 expected_entries = (uint16_t)ret;
2193 struct rte_eth_xstat xstats[expected_entries];
2194 dev = &rte_eth_devices[port_id];
2195 basic_count = get_xstats_basic_count(dev);
2197 /* Return max number of stats if no ids given */
2200 return expected_entries;
2201 else if (values && size < expected_entries)
2202 return expected_entries;
2208 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2209 unsigned int basic_count = get_xstats_basic_count(dev);
2210 uint64_t ids_copy[size];
2212 for (i = 0; i < size; i++) {
2213 if (ids[i] < basic_count) {
2214 no_basic_stat_requested = 0;
2219 * Convert ids to xstats ids that PMD knows.
2220 * ids known by user are basic + extended stats.
2222 ids_copy[i] = ids[i] - basic_count;
2225 if (no_basic_stat_requested)
2226 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2231 for (i = 0; i < size; i++) {
2232 if (ids[i] >= basic_count) {
2233 no_ext_stat_requested = 0;
2239 /* Fill the xstats structure */
2240 if (ids && no_ext_stat_requested)
2241 ret = rte_eth_basic_stats_get(port_id, xstats);
2243 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2247 num_xstats_filled = (unsigned int)ret;
2249 /* Return all stats */
2251 for (i = 0; i < num_xstats_filled; i++)
2252 values[i] = xstats[i].value;
2253 return expected_entries;
2257 for (i = 0; i < size; i++) {
2258 if (ids[i] >= expected_entries) {
2259 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2262 values[i] = xstats[ids[i]].value;
2268 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2271 struct rte_eth_dev *dev;
2272 unsigned int count = 0, i;
2273 signed int xcount = 0;
2274 uint16_t nb_rxqs, nb_txqs;
2277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2279 dev = &rte_eth_devices[port_id];
2281 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2282 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2284 /* Return generic statistics */
2285 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2286 (nb_txqs * RTE_NB_TXQ_STATS);
2288 /* implemented by the driver */
2289 if (dev->dev_ops->xstats_get != NULL) {
2290 /* Retrieve the xstats from the driver at the end of the
2293 xcount = (*dev->dev_ops->xstats_get)(dev,
2294 xstats ? xstats + count : NULL,
2295 (n > count) ? n - count : 0);
2298 return eth_err(port_id, xcount);
2301 if (n < count + xcount || xstats == NULL)
2302 return count + xcount;
2304 /* now fill the xstats structure */
2305 ret = rte_eth_basic_stats_get(port_id, xstats);
2310 for (i = 0; i < count; i++)
2312 /* add an offset to driver-specific stats */
2313 for ( ; i < count + xcount; i++)
2314 xstats[i].id += count;
2316 return count + xcount;
2319 /* reset ethdev extended statistics */
2321 rte_eth_xstats_reset(uint16_t port_id)
2323 struct rte_eth_dev *dev;
2325 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2326 dev = &rte_eth_devices[port_id];
2328 /* implemented by the driver */
2329 if (dev->dev_ops->xstats_reset != NULL) {
2330 (*dev->dev_ops->xstats_reset)(dev);
2334 /* fallback to default */
2335 rte_eth_stats_reset(port_id);
2339 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2342 struct rte_eth_dev *dev;
2344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2346 dev = &rte_eth_devices[port_id];
2348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2349 return (*dev->dev_ops->queue_stats_mapping_set)
2350 (dev, queue_id, stat_idx, is_rx);
2355 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2358 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2359 stat_idx, STAT_QMAP_TX));
2364 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2367 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2368 stat_idx, STAT_QMAP_RX));
2372 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2374 struct rte_eth_dev *dev;
2376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2377 dev = &rte_eth_devices[port_id];
2379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2380 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2381 fw_version, fw_size));
2385 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2387 struct rte_eth_dev *dev;
2388 const struct rte_eth_desc_lim lim = {
2389 .nb_max = UINT16_MAX,
2394 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2395 dev = &rte_eth_devices[port_id];
2397 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2398 dev_info->rx_desc_lim = lim;
2399 dev_info->tx_desc_lim = lim;
2400 dev_info->device = dev->device;
2402 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2403 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2404 dev_info->driver_name = dev->device->driver->name;
2405 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2406 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2410 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2411 uint32_t *ptypes, int num)
2414 struct rte_eth_dev *dev;
2415 const uint32_t *all_ptypes;
2417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2418 dev = &rte_eth_devices[port_id];
2419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2420 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2425 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2426 if (all_ptypes[i] & ptype_mask) {
2428 ptypes[j] = all_ptypes[i];
2436 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2438 struct rte_eth_dev *dev;
2440 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2441 dev = &rte_eth_devices[port_id];
2442 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2447 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2449 struct rte_eth_dev *dev;
2451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453 dev = &rte_eth_devices[port_id];
2454 *mtu = dev->data->mtu;
2459 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2462 struct rte_eth_dev *dev;
2464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2465 dev = &rte_eth_devices[port_id];
2466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2468 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2470 dev->data->mtu = mtu;
2472 return eth_err(port_id, ret);
2476 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2478 struct rte_eth_dev *dev;
2481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2482 dev = &rte_eth_devices[port_id];
2483 if (!(dev->data->dev_conf.rxmode.offloads &
2484 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2485 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2489 if (vlan_id > 4095) {
2490 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2491 port_id, (unsigned) vlan_id);
2494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2496 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2498 struct rte_vlan_filter_conf *vfc;
2502 vfc = &dev->data->vlan_filter_conf;
2503 vidx = vlan_id / 64;
2504 vbit = vlan_id % 64;
2507 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2509 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2512 return eth_err(port_id, ret);
2516 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2519 struct rte_eth_dev *dev;
2521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2522 dev = &rte_eth_devices[port_id];
2523 if (rx_queue_id >= dev->data->nb_rx_queues) {
2524 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2528 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2529 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2535 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2536 enum rte_vlan_type vlan_type,
2539 struct rte_eth_dev *dev;
2541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2542 dev = &rte_eth_devices[port_id];
2543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2545 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2550 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2552 struct rte_eth_dev *dev;
2556 uint64_t orig_offloads;
2558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2559 dev = &rte_eth_devices[port_id];
2561 /* save original values in case of failure */
2562 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2564 /*check which option changed by application*/
2565 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2566 org = !!(dev->data->dev_conf.rxmode.offloads &
2567 DEV_RX_OFFLOAD_VLAN_STRIP);
2570 dev->data->dev_conf.rxmode.offloads |=
2571 DEV_RX_OFFLOAD_VLAN_STRIP;
2573 dev->data->dev_conf.rxmode.offloads &=
2574 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2575 mask |= ETH_VLAN_STRIP_MASK;
2578 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2579 org = !!(dev->data->dev_conf.rxmode.offloads &
2580 DEV_RX_OFFLOAD_VLAN_FILTER);
2583 dev->data->dev_conf.rxmode.offloads |=
2584 DEV_RX_OFFLOAD_VLAN_FILTER;
2586 dev->data->dev_conf.rxmode.offloads &=
2587 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2588 mask |= ETH_VLAN_FILTER_MASK;
2591 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2592 org = !!(dev->data->dev_conf.rxmode.offloads &
2593 DEV_RX_OFFLOAD_VLAN_EXTEND);
2596 dev->data->dev_conf.rxmode.offloads |=
2597 DEV_RX_OFFLOAD_VLAN_EXTEND;
2599 dev->data->dev_conf.rxmode.offloads &=
2600 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2601 mask |= ETH_VLAN_EXTEND_MASK;
2608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2611 * Convert to the offload bitfield API just in case the underlying PMD
2612 * still supporting it.
2614 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2615 &dev->data->dev_conf.rxmode);
2616 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2618 /* hit an error restore original values */
2619 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2620 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2621 &dev->data->dev_conf.rxmode);
2624 return eth_err(port_id, ret);
2628 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2630 struct rte_eth_dev *dev;
2633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2634 dev = &rte_eth_devices[port_id];
2636 if (dev->data->dev_conf.rxmode.offloads &
2637 DEV_RX_OFFLOAD_VLAN_STRIP)
2638 ret |= ETH_VLAN_STRIP_OFFLOAD;
2640 if (dev->data->dev_conf.rxmode.offloads &
2641 DEV_RX_OFFLOAD_VLAN_FILTER)
2642 ret |= ETH_VLAN_FILTER_OFFLOAD;
2644 if (dev->data->dev_conf.rxmode.offloads &
2645 DEV_RX_OFFLOAD_VLAN_EXTEND)
2646 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2652 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 dev = &rte_eth_devices[port_id];
2658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2660 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2664 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2666 struct rte_eth_dev *dev;
2668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2669 dev = &rte_eth_devices[port_id];
2670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2671 memset(fc_conf, 0, sizeof(*fc_conf));
2672 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2676 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2678 struct rte_eth_dev *dev;
2680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2681 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2682 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2686 dev = &rte_eth_devices[port_id];
2687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2688 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2692 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2693 struct rte_eth_pfc_conf *pfc_conf)
2695 struct rte_eth_dev *dev;
2697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2698 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2699 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2703 dev = &rte_eth_devices[port_id];
2704 /* High water, low water validation are device specific */
2705 if (*dev->dev_ops->priority_flow_ctrl_set)
2706 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2712 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2720 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2721 for (i = 0; i < num; i++) {
2722 if (reta_conf[i].mask)
2730 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2734 uint16_t i, idx, shift;
2740 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2744 for (i = 0; i < reta_size; i++) {
2745 idx = i / RTE_RETA_GROUP_SIZE;
2746 shift = i % RTE_RETA_GROUP_SIZE;
2747 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2748 (reta_conf[idx].reta[shift] >= max_rxq)) {
2749 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2750 "the maximum rxq index: %u\n", idx, shift,
2751 reta_conf[idx].reta[shift], max_rxq);
2760 rte_eth_dev_rss_reta_update(uint16_t port_id,
2761 struct rte_eth_rss_reta_entry64 *reta_conf,
2764 struct rte_eth_dev *dev;
2767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2768 /* Check mask bits */
2769 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2773 dev = &rte_eth_devices[port_id];
2775 /* Check entry value */
2776 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2777 dev->data->nb_rx_queues);
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2782 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2787 rte_eth_dev_rss_reta_query(uint16_t port_id,
2788 struct rte_eth_rss_reta_entry64 *reta_conf,
2791 struct rte_eth_dev *dev;
2794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2796 /* Check mask bits */
2797 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2801 dev = &rte_eth_devices[port_id];
2802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2803 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2808 rte_eth_dev_rss_hash_update(uint16_t port_id,
2809 struct rte_eth_rss_conf *rss_conf)
2811 struct rte_eth_dev *dev;
2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2814 dev = &rte_eth_devices[port_id];
2815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2816 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2821 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2822 struct rte_eth_rss_conf *rss_conf)
2824 struct rte_eth_dev *dev;
2826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2827 dev = &rte_eth_devices[port_id];
2828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2829 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2834 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2835 struct rte_eth_udp_tunnel *udp_tunnel)
2837 struct rte_eth_dev *dev;
2839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2840 if (udp_tunnel == NULL) {
2841 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2845 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2846 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2850 dev = &rte_eth_devices[port_id];
2851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2852 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2857 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2858 struct rte_eth_udp_tunnel *udp_tunnel)
2860 struct rte_eth_dev *dev;
2862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2863 dev = &rte_eth_devices[port_id];
2865 if (udp_tunnel == NULL) {
2866 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2870 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2871 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2876 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2881 rte_eth_led_on(uint16_t port_id)
2883 struct rte_eth_dev *dev;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2886 dev = &rte_eth_devices[port_id];
2887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2888 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2892 rte_eth_led_off(uint16_t port_id)
2894 struct rte_eth_dev *dev;
2896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2897 dev = &rte_eth_devices[port_id];
2898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2899 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2903 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2907 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2909 struct rte_eth_dev_info dev_info;
2910 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914 rte_eth_dev_info_get(port_id, &dev_info);
2916 for (i = 0; i < dev_info.max_mac_addrs; i++)
2917 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2923 static const struct ether_addr null_mac_addr;
2926 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2929 struct rte_eth_dev *dev;
2934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2935 dev = &rte_eth_devices[port_id];
2936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2938 if (is_zero_ether_addr(addr)) {
2939 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2943 if (pool >= ETH_64_POOLS) {
2944 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2948 index = get_mac_addr_index(port_id, addr);
2950 index = get_mac_addr_index(port_id, &null_mac_addr);
2952 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2957 pool_mask = dev->data->mac_pool_sel[index];
2959 /* Check if both MAC address and pool is already there, and do nothing */
2960 if (pool_mask & (1ULL << pool))
2965 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2968 /* Update address in NIC data structure */
2969 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2971 /* Update pool bitmap in NIC data structure */
2972 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2975 return eth_err(port_id, ret);
2979 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2981 struct rte_eth_dev *dev;
2984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2985 dev = &rte_eth_devices[port_id];
2986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2988 index = get_mac_addr_index(port_id, addr);
2990 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2992 } else if (index < 0)
2993 return 0; /* Do nothing if address wasn't found */
2996 (*dev->dev_ops->mac_addr_remove)(dev, index);
2998 /* Update address in NIC data structure */
2999 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3001 /* reset pool bitmap */
3002 dev->data->mac_pool_sel[index] = 0;
3008 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3010 struct rte_eth_dev *dev;
3012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3014 if (!is_valid_assigned_ether_addr(addr))
3017 dev = &rte_eth_devices[port_id];
3018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3020 /* Update default address in NIC data structure */
3021 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3023 (*dev->dev_ops->mac_addr_set)(dev, addr);
3030 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3034 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3036 struct rte_eth_dev_info dev_info;
3037 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3040 rte_eth_dev_info_get(port_id, &dev_info);
3041 if (!dev->data->hash_mac_addrs)
3044 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3045 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3046 ETHER_ADDR_LEN) == 0)
3053 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3058 struct rte_eth_dev *dev;
3060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 dev = &rte_eth_devices[port_id];
3063 if (is_zero_ether_addr(addr)) {
3064 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3069 index = get_hash_mac_addr_index(port_id, addr);
3070 /* Check if it's already there, and do nothing */
3071 if ((index >= 0) && on)
3076 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3077 "set in UTA\n", port_id);
3081 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3083 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3090 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3092 /* Update address in NIC data structure */
3094 ether_addr_copy(addr,
3095 &dev->data->hash_mac_addrs[index]);
3097 ether_addr_copy(&null_mac_addr,
3098 &dev->data->hash_mac_addrs[index]);
3101 return eth_err(port_id, ret);
3105 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3107 struct rte_eth_dev *dev;
3109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 dev = &rte_eth_devices[port_id];
3113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3114 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3118 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3121 struct rte_eth_dev *dev;
3122 struct rte_eth_dev_info dev_info;
3123 struct rte_eth_link link;
3125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3127 dev = &rte_eth_devices[port_id];
3128 rte_eth_dev_info_get(port_id, &dev_info);
3129 link = dev->data->dev_link;
3131 if (queue_idx > dev_info.max_tx_queues) {
3132 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3133 "invalid queue id=%d\n", port_id, queue_idx);
3137 if (tx_rate > link.link_speed) {
3138 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3139 "bigger than link speed= %d\n",
3140 tx_rate, link.link_speed);
3144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3145 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3146 queue_idx, tx_rate));
3150 rte_eth_mirror_rule_set(uint16_t port_id,
3151 struct rte_eth_mirror_conf *mirror_conf,
3152 uint8_t rule_id, uint8_t on)
3154 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 if (mirror_conf->rule_type == 0) {
3158 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3162 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3163 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3168 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3169 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3170 (mirror_conf->pool_mask == 0)) {
3171 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3175 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3176 mirror_conf->vlan.vlan_mask == 0) {
3177 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3181 dev = &rte_eth_devices[port_id];
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3184 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3185 mirror_conf, rule_id, on));
3189 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3191 struct rte_eth_dev *dev;
3193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3195 dev = &rte_eth_devices[port_id];
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3198 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3202 RTE_INIT(eth_dev_init_cb_lists)
3206 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3207 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3211 rte_eth_dev_callback_register(uint16_t port_id,
3212 enum rte_eth_event_type event,
3213 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3215 struct rte_eth_dev *dev;
3216 struct rte_eth_dev_callback *user_cb;
3217 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3223 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3224 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3228 if (port_id == RTE_ETH_ALL) {
3230 last_port = RTE_MAX_ETHPORTS - 1;
3232 next_port = last_port = port_id;
3235 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3238 dev = &rte_eth_devices[next_port];
3240 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3241 if (user_cb->cb_fn == cb_fn &&
3242 user_cb->cb_arg == cb_arg &&
3243 user_cb->event == event) {
3248 /* create a new callback. */
3249 if (user_cb == NULL) {
3250 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3251 sizeof(struct rte_eth_dev_callback), 0);
3252 if (user_cb != NULL) {
3253 user_cb->cb_fn = cb_fn;
3254 user_cb->cb_arg = cb_arg;
3255 user_cb->event = event;
3256 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3259 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3260 rte_eth_dev_callback_unregister(port_id, event,
3266 } while (++next_port <= last_port);
3268 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3273 rte_eth_dev_callback_unregister(uint16_t port_id,
3274 enum rte_eth_event_type event,
3275 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3278 struct rte_eth_dev *dev;
3279 struct rte_eth_dev_callback *cb, *next;
3280 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3286 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3287 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3291 if (port_id == RTE_ETH_ALL) {
3293 last_port = RTE_MAX_ETHPORTS - 1;
3295 next_port = last_port = port_id;
3298 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3301 dev = &rte_eth_devices[next_port];
3303 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3306 next = TAILQ_NEXT(cb, next);
3308 if (cb->cb_fn != cb_fn || cb->event != event ||
3309 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3313 * if this callback is not executing right now,
3316 if (cb->active == 0) {
3317 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3323 } while (++next_port <= last_port);
3325 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3330 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3331 enum rte_eth_event_type event, void *ret_param)
3333 struct rte_eth_dev_callback *cb_lst;
3334 struct rte_eth_dev_callback dev_cb;
3337 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3338 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3339 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3343 if (ret_param != NULL)
3344 dev_cb.ret_param = ret_param;
3346 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3347 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3348 dev_cb.cb_arg, dev_cb.ret_param);
3349 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3352 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3357 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3360 struct rte_eth_dev *dev;
3361 struct rte_intr_handle *intr_handle;
3365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3367 dev = &rte_eth_devices[port_id];
3369 if (!dev->intr_handle) {
3370 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3374 intr_handle = dev->intr_handle;
3375 if (!intr_handle->intr_vec) {
3376 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3380 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3381 vec = intr_handle->intr_vec[qid];
3382 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3383 if (rc && rc != -EEXIST) {
3384 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3385 " op %d epfd %d vec %u\n",
3386 port_id, qid, op, epfd, vec);
3393 const struct rte_memzone *
3394 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3395 uint16_t queue_id, size_t size, unsigned align,
3398 char z_name[RTE_MEMZONE_NAMESIZE];
3399 const struct rte_memzone *mz;
3401 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3402 dev->device->driver->name, ring_name,
3403 dev->data->port_id, queue_id);
3405 mz = rte_memzone_lookup(z_name);
3409 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3410 RTE_MEMZONE_IOVA_CONTIG, align);
3414 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3415 int epfd, int op, void *data)
3418 struct rte_eth_dev *dev;
3419 struct rte_intr_handle *intr_handle;
3422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3424 dev = &rte_eth_devices[port_id];
3425 if (queue_id >= dev->data->nb_rx_queues) {
3426 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3430 if (!dev->intr_handle) {
3431 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3435 intr_handle = dev->intr_handle;
3436 if (!intr_handle->intr_vec) {
3437 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3441 vec = intr_handle->intr_vec[queue_id];
3442 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3443 if (rc && rc != -EEXIST) {
3444 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3445 " op %d epfd %d vec %u\n",
3446 port_id, queue_id, op, epfd, vec);
3454 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3457 struct rte_eth_dev *dev;
3459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3461 dev = &rte_eth_devices[port_id];
3463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3464 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3469 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3472 struct rte_eth_dev *dev;
3474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3476 dev = &rte_eth_devices[port_id];
3478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3479 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3485 rte_eth_dev_filter_supported(uint16_t port_id,
3486 enum rte_filter_type filter_type)
3488 struct rte_eth_dev *dev;
3490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3492 dev = &rte_eth_devices[port_id];
3493 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3494 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3495 RTE_ETH_FILTER_NOP, NULL);
3499 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3500 enum rte_filter_op filter_op, void *arg)
3502 struct rte_eth_dev *dev;
3504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3506 dev = &rte_eth_devices[port_id];
3507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3508 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3512 const struct rte_eth_rxtx_callback *
3513 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3514 rte_rx_callback_fn fn, void *user_param)
3516 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3517 rte_errno = ENOTSUP;
3520 /* check input parameters */
3521 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3522 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3526 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3534 cb->param = user_param;
3536 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3537 /* Add the callbacks in fifo order. */
3538 struct rte_eth_rxtx_callback *tail =
3539 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3542 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3549 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3554 const struct rte_eth_rxtx_callback *
3555 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3556 rte_rx_callback_fn fn, void *user_param)
3558 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3559 rte_errno = ENOTSUP;
3562 /* check input parameters */
3563 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3564 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3569 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3577 cb->param = user_param;
3579 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3580 /* Add the callbacks at fisrt position*/
3581 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3583 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3584 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3589 const struct rte_eth_rxtx_callback *
3590 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3591 rte_tx_callback_fn fn, void *user_param)
3593 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3594 rte_errno = ENOTSUP;
3597 /* check input parameters */
3598 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3599 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3604 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3612 cb->param = user_param;
3614 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3615 /* Add the callbacks in fifo order. */
3616 struct rte_eth_rxtx_callback *tail =
3617 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3620 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3627 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3633 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3634 const struct rte_eth_rxtx_callback *user_cb)
3636 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3639 /* Check input parameters. */
3640 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3641 if (user_cb == NULL ||
3642 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3645 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3646 struct rte_eth_rxtx_callback *cb;
3647 struct rte_eth_rxtx_callback **prev_cb;
3650 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3651 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3652 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3654 if (cb == user_cb) {
3655 /* Remove the user cb from the callback list. */
3656 *prev_cb = cb->next;
3661 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3667 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3668 const struct rte_eth_rxtx_callback *user_cb)
3670 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3673 /* Check input parameters. */
3674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3675 if (user_cb == NULL ||
3676 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3679 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3681 struct rte_eth_rxtx_callback *cb;
3682 struct rte_eth_rxtx_callback **prev_cb;
3684 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3685 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3686 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3688 if (cb == user_cb) {
3689 /* Remove the user cb from the callback list. */
3690 *prev_cb = cb->next;
3695 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3701 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3702 struct rte_eth_rxq_info *qinfo)
3704 struct rte_eth_dev *dev;
3706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3711 dev = &rte_eth_devices[port_id];
3712 if (queue_id >= dev->data->nb_rx_queues) {
3713 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3719 memset(qinfo, 0, sizeof(*qinfo));
3720 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3725 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3726 struct rte_eth_txq_info *qinfo)
3728 struct rte_eth_dev *dev;
3730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3735 dev = &rte_eth_devices[port_id];
3736 if (queue_id >= dev->data->nb_tx_queues) {
3737 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3743 memset(qinfo, 0, sizeof(*qinfo));
3744 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3749 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3750 struct ether_addr *mc_addr_set,
3751 uint32_t nb_mc_addr)
3753 struct rte_eth_dev *dev;
3755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3757 dev = &rte_eth_devices[port_id];
3758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3759 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3760 mc_addr_set, nb_mc_addr));
3764 rte_eth_timesync_enable(uint16_t port_id)
3766 struct rte_eth_dev *dev;
3768 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3769 dev = &rte_eth_devices[port_id];
3771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3772 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3776 rte_eth_timesync_disable(uint16_t port_id)
3778 struct rte_eth_dev *dev;
3780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3781 dev = &rte_eth_devices[port_id];
3783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3784 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3788 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3791 struct rte_eth_dev *dev;
3793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3794 dev = &rte_eth_devices[port_id];
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3797 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3798 (dev, timestamp, flags));
3802 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3803 struct timespec *timestamp)
3805 struct rte_eth_dev *dev;
3807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3808 dev = &rte_eth_devices[port_id];
3810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3811 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3816 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3818 struct rte_eth_dev *dev;
3820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3821 dev = &rte_eth_devices[port_id];
3823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3824 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3829 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3831 struct rte_eth_dev *dev;
3833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3834 dev = &rte_eth_devices[port_id];
3836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3837 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3842 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3844 struct rte_eth_dev *dev;
3846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847 dev = &rte_eth_devices[port_id];
3849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3850 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3855 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3857 struct rte_eth_dev *dev;
3859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3861 dev = &rte_eth_devices[port_id];
3862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3863 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3867 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3869 struct rte_eth_dev *dev;
3871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3873 dev = &rte_eth_devices[port_id];
3874 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3875 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3879 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3881 struct rte_eth_dev *dev;
3883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3885 dev = &rte_eth_devices[port_id];
3886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3887 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3891 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3893 struct rte_eth_dev *dev;
3895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3897 dev = &rte_eth_devices[port_id];
3898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3899 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3903 rte_eth_dev_get_dcb_info(uint16_t port_id,
3904 struct rte_eth_dcb_info *dcb_info)
3906 struct rte_eth_dev *dev;
3908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3910 dev = &rte_eth_devices[port_id];
3911 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3914 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3918 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3919 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3921 struct rte_eth_dev *dev;
3923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3924 if (l2_tunnel == NULL) {
3925 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3929 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3930 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3934 dev = &rte_eth_devices[port_id];
3935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3937 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3942 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3943 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3947 struct rte_eth_dev *dev;
3949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3951 if (l2_tunnel == NULL) {
3952 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3956 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3957 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3962 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3966 dev = &rte_eth_devices[port_id];
3967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3969 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3970 l2_tunnel, mask, en));
3974 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3975 const struct rte_eth_desc_lim *desc_lim)
3977 if (desc_lim->nb_align != 0)
3978 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3980 if (desc_lim->nb_max != 0)
3981 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3983 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3987 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3988 uint16_t *nb_rx_desc,
3989 uint16_t *nb_tx_desc)
3991 struct rte_eth_dev *dev;
3992 struct rte_eth_dev_info dev_info;
3994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3996 dev = &rte_eth_devices[port_id];
3997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3999 rte_eth_dev_info_get(port_id, &dev_info);
4001 if (nb_rx_desc != NULL)
4002 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4004 if (nb_tx_desc != NULL)
4005 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4011 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4013 struct rte_eth_dev *dev;
4015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4020 dev = &rte_eth_devices[port_id];
4022 if (*dev->dev_ops->pool_ops_supported == NULL)
4023 return 1; /* all pools are supported */
4025 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4028 RTE_INIT(ethdev_init_log);
4030 ethdev_init_log(void)
4032 ethdev_logtype = rte_log_register("lib.ethdev");
4033 if (ethdev_logtype >= 0)
4034 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);