4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
182 strcmp(rte_eth_devices[i].data->name, name) == 0)
183 return &rte_eth_devices[i];
189 rte_eth_dev_find_free_port(void)
193 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
194 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
197 return RTE_MAX_ETHPORTS;
200 static struct rte_eth_dev *
201 eth_dev_get(uint8_t port_id)
203 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
205 eth_dev->data = &rte_eth_dev_data[port_id];
206 eth_dev->state = RTE_ETH_DEV_ATTACHED;
207 TAILQ_INIT(&(eth_dev->link_intr_cbs));
209 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
298 rte_eth_dev_socket_id(uint8_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_count(void)
311 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
318 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
322 /* shouldn't check 'rte_eth_devices[i].data',
323 * because it might be overwritten by VDEV PMD */
324 tmp = rte_eth_dev_data[port_id].name;
330 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
335 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
342 *port_id = RTE_MAX_ETHPORTS;
343 RTE_ETH_FOREACH_DEV(i) {
345 rte_eth_dev_data[i].name, strlen(name))) {
356 rte_eth_dev_is_detachable(uint8_t port_id)
360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
362 switch (rte_eth_devices[port_id].data->kdrv) {
363 case RTE_KDRV_IGB_UIO:
364 case RTE_KDRV_UIO_GENERIC:
365 case RTE_KDRV_NIC_UIO:
372 dev_flags = rte_eth_devices[port_id].data->dev_flags;
373 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
374 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
380 /* attach the new device, then store port_id of the device */
382 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
385 int current = rte_eth_dev_count();
389 if ((devargs == NULL) || (port_id == NULL)) {
394 /* parse devargs, then retrieve device name and args */
395 if (rte_eal_parse_devargs_str(devargs, &name, &args))
398 ret = rte_eal_dev_attach(name, args);
402 /* no point looking at the port count if no port exists */
403 if (!rte_eth_dev_count()) {
404 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
409 /* if nothing happened, there is a bug here, since some driver told us
410 * it did attach a device, but did not create a port.
412 if (current == rte_eth_dev_count()) {
417 *port_id = eth_dev_last_created_port;
426 /* detach the device, then store the name of the device */
428 rte_eth_dev_detach(uint8_t port_id, char *name)
437 /* FIXME: move this to eal, once device flags are relocated there */
438 if (rte_eth_dev_is_detachable(port_id))
441 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
442 "%s", rte_eth_devices[port_id].data->name);
443 ret = rte_eal_dev_detach(name);
454 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
456 uint16_t old_nb_queues = dev->data->nb_rx_queues;
460 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
461 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
462 sizeof(dev->data->rx_queues[0]) * nb_queues,
463 RTE_CACHE_LINE_SIZE);
464 if (dev->data->rx_queues == NULL) {
465 dev->data->nb_rx_queues = 0;
468 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
471 rxq = dev->data->rx_queues;
473 for (i = nb_queues; i < old_nb_queues; i++)
474 (*dev->dev_ops->rx_queue_release)(rxq[i]);
475 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
476 RTE_CACHE_LINE_SIZE);
479 if (nb_queues > old_nb_queues) {
480 uint16_t new_qs = nb_queues - old_nb_queues;
482 memset(rxq + old_nb_queues, 0,
483 sizeof(rxq[0]) * new_qs);
486 dev->data->rx_queues = rxq;
488 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
491 rxq = dev->data->rx_queues;
493 for (i = nb_queues; i < old_nb_queues; i++)
494 (*dev->dev_ops->rx_queue_release)(rxq[i]);
496 rte_free(dev->data->rx_queues);
497 dev->data->rx_queues = NULL;
499 dev->data->nb_rx_queues = nb_queues;
504 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
506 struct rte_eth_dev *dev;
508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
510 dev = &rte_eth_devices[port_id];
511 if (rx_queue_id >= dev->data->nb_rx_queues) {
512 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
518 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
519 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
520 " already started\n",
521 rx_queue_id, port_id);
525 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
530 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already stopped\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
556 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (tx_queue_id >= dev->data->nb_tx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
570 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already started\n",
573 tx_queue_id, port_id);
577 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
582 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already stopped\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
610 uint16_t old_nb_queues = dev->data->nb_tx_queues;
614 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
615 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
616 sizeof(dev->data->tx_queues[0]) * nb_queues,
617 RTE_CACHE_LINE_SIZE);
618 if (dev->data->tx_queues == NULL) {
619 dev->data->nb_tx_queues = 0;
622 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
625 txq = dev->data->tx_queues;
627 for (i = nb_queues; i < old_nb_queues; i++)
628 (*dev->dev_ops->tx_queue_release)(txq[i]);
629 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
633 if (nb_queues > old_nb_queues) {
634 uint16_t new_qs = nb_queues - old_nb_queues;
636 memset(txq + old_nb_queues, 0,
637 sizeof(txq[0]) * new_qs);
640 dev->data->tx_queues = txq;
642 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
645 txq = dev->data->tx_queues;
647 for (i = nb_queues; i < old_nb_queues; i++)
648 (*dev->dev_ops->tx_queue_release)(txq[i]);
650 rte_free(dev->data->tx_queues);
651 dev->data->tx_queues = NULL;
653 dev->data->nb_tx_queues = nb_queues;
658 rte_eth_speed_bitflag(uint32_t speed, int duplex)
661 case ETH_SPEED_NUM_10M:
662 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
663 case ETH_SPEED_NUM_100M:
664 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
665 case ETH_SPEED_NUM_1G:
666 return ETH_LINK_SPEED_1G;
667 case ETH_SPEED_NUM_2_5G:
668 return ETH_LINK_SPEED_2_5G;
669 case ETH_SPEED_NUM_5G:
670 return ETH_LINK_SPEED_5G;
671 case ETH_SPEED_NUM_10G:
672 return ETH_LINK_SPEED_10G;
673 case ETH_SPEED_NUM_20G:
674 return ETH_LINK_SPEED_20G;
675 case ETH_SPEED_NUM_25G:
676 return ETH_LINK_SPEED_25G;
677 case ETH_SPEED_NUM_40G:
678 return ETH_LINK_SPEED_40G;
679 case ETH_SPEED_NUM_50G:
680 return ETH_LINK_SPEED_50G;
681 case ETH_SPEED_NUM_56G:
682 return ETH_LINK_SPEED_56G;
683 case ETH_SPEED_NUM_100G:
684 return ETH_LINK_SPEED_100G;
691 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
692 const struct rte_eth_conf *dev_conf)
694 struct rte_eth_dev *dev;
695 struct rte_eth_dev_info dev_info;
698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
700 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
702 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
703 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
707 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
709 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
710 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
714 dev = &rte_eth_devices[port_id];
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
719 if (dev->data->dev_started) {
721 "port %d must be stopped to allow configuration\n", port_id);
725 /* Copy the dev_conf parameter into the dev structure */
726 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
729 * Check that the numbers of RX and TX queues are not greater
730 * than the maximum number of RX and TX queues supported by the
733 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
735 if (nb_rx_q == 0 && nb_tx_q == 0) {
736 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
740 if (nb_rx_q > dev_info.max_rx_queues) {
741 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
742 port_id, nb_rx_q, dev_info.max_rx_queues);
746 if (nb_tx_q > dev_info.max_tx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
748 port_id, nb_tx_q, dev_info.max_tx_queues);
752 /* Check that the device supports requested interrupts */
753 if ((dev_conf->intr_conf.lsc == 1) &&
754 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
755 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
756 dev->data->drv_name);
759 if ((dev_conf->intr_conf.rmv == 1) &&
760 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
761 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
762 dev->data->drv_name);
767 * If jumbo frames are enabled, check that the maximum RX packet
768 * length is supported by the configured device.
770 if (dev_conf->rxmode.jumbo_frame == 1) {
771 if (dev_conf->rxmode.max_rx_pkt_len >
772 dev_info.max_rx_pktlen) {
773 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
774 " > max valid value %u\n",
776 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
777 (unsigned)dev_info.max_rx_pktlen);
779 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
780 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
781 " < min valid value %u\n",
783 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
784 (unsigned)ETHER_MIN_LEN);
788 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
789 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
790 /* Use default value */
791 dev->data->dev_conf.rxmode.max_rx_pkt_len =
796 * Setup new number of RX/TX queues and reconfigure device.
798 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
800 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
805 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
807 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
809 rte_eth_dev_rx_queue_config(dev, 0);
813 diag = (*dev->dev_ops->dev_configure)(dev);
815 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
817 rte_eth_dev_rx_queue_config(dev, 0);
818 rte_eth_dev_tx_queue_config(dev, 0);
826 _rte_eth_dev_reset(struct rte_eth_dev *dev)
828 if (dev->data->dev_started) {
830 "port %d must be stopped to allow reset\n",
835 rte_eth_dev_rx_queue_config(dev, 0);
836 rte_eth_dev_tx_queue_config(dev, 0);
838 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
842 rte_eth_dev_config_restore(uint8_t port_id)
844 struct rte_eth_dev *dev;
845 struct rte_eth_dev_info dev_info;
846 struct ether_addr *addr;
851 dev = &rte_eth_devices[port_id];
853 rte_eth_dev_info_get(port_id, &dev_info);
855 /* replay MAC address configuration including default MAC */
856 addr = &dev->data->mac_addrs[0];
857 if (*dev->dev_ops->mac_addr_set != NULL)
858 (*dev->dev_ops->mac_addr_set)(dev, addr);
859 else if (*dev->dev_ops->mac_addr_add != NULL)
860 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
862 if (*dev->dev_ops->mac_addr_add != NULL) {
863 for (i = 1; i < dev_info.max_mac_addrs; i++) {
864 addr = &dev->data->mac_addrs[i];
866 /* skip zero address */
867 if (is_zero_ether_addr(addr))
871 pool_mask = dev->data->mac_pool_sel[i];
874 if (pool_mask & 1ULL)
875 (*dev->dev_ops->mac_addr_add)(dev,
883 /* replay promiscuous configuration */
884 if (rte_eth_promiscuous_get(port_id) == 1)
885 rte_eth_promiscuous_enable(port_id);
886 else if (rte_eth_promiscuous_get(port_id) == 0)
887 rte_eth_promiscuous_disable(port_id);
889 /* replay all multicast configuration */
890 if (rte_eth_allmulticast_get(port_id) == 1)
891 rte_eth_allmulticast_enable(port_id);
892 else if (rte_eth_allmulticast_get(port_id) == 0)
893 rte_eth_allmulticast_disable(port_id);
897 rte_eth_dev_start(uint8_t port_id)
899 struct rte_eth_dev *dev;
902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
904 dev = &rte_eth_devices[port_id];
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
908 if (dev->data->dev_started != 0) {
909 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
910 " already started\n",
915 diag = (*dev->dev_ops->dev_start)(dev);
917 dev->data->dev_started = 1;
921 rte_eth_dev_config_restore(port_id);
923 if (dev->data->dev_conf.intr_conf.lsc == 0) {
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
925 (*dev->dev_ops->link_update)(dev, 0);
931 rte_eth_dev_stop(uint8_t port_id)
933 struct rte_eth_dev *dev;
935 RTE_ETH_VALID_PORTID_OR_RET(port_id);
936 dev = &rte_eth_devices[port_id];
938 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
940 if (dev->data->dev_started == 0) {
941 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
942 " already stopped\n",
947 dev->data->dev_started = 0;
948 (*dev->dev_ops->dev_stop)(dev);
952 rte_eth_dev_set_link_up(uint8_t port_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
961 return (*dev->dev_ops->dev_set_link_up)(dev);
965 rte_eth_dev_set_link_down(uint8_t port_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
974 return (*dev->dev_ops->dev_set_link_down)(dev);
978 rte_eth_dev_close(uint8_t port_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_RET(port_id);
983 dev = &rte_eth_devices[port_id];
985 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
986 dev->data->dev_started = 0;
987 (*dev->dev_ops->dev_close)(dev);
989 dev->data->nb_rx_queues = 0;
990 rte_free(dev->data->rx_queues);
991 dev->data->rx_queues = NULL;
992 dev->data->nb_tx_queues = 0;
993 rte_free(dev->data->tx_queues);
994 dev->data->tx_queues = NULL;
998 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
999 uint16_t nb_rx_desc, unsigned int socket_id,
1000 const struct rte_eth_rxconf *rx_conf,
1001 struct rte_mempool *mp)
1004 uint32_t mbp_buf_size;
1005 struct rte_eth_dev *dev;
1006 struct rte_eth_dev_info dev_info;
1009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1011 dev = &rte_eth_devices[port_id];
1012 if (rx_queue_id >= dev->data->nb_rx_queues) {
1013 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1017 if (dev->data->dev_started) {
1018 RTE_PMD_DEBUG_TRACE(
1019 "port %d must be stopped to allow configuration\n", port_id);
1023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1027 * Check the size of the mbuf data buffer.
1028 * This value must be provided in the private data of the memory pool.
1029 * First check that the memory pool has a valid private data.
1031 rte_eth_dev_info_get(port_id, &dev_info);
1032 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1033 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1034 mp->name, (int) mp->private_data_size,
1035 (int) sizeof(struct rte_pktmbuf_pool_private));
1038 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1040 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1041 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1042 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1046 (int)(RTE_PKTMBUF_HEADROOM +
1047 dev_info.min_rx_bufsize),
1048 (int)RTE_PKTMBUF_HEADROOM,
1049 (int)dev_info.min_rx_bufsize);
1053 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1054 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1055 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1057 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1058 "should be: <= %hu, = %hu, and a product of %hu\n",
1060 dev_info.rx_desc_lim.nb_max,
1061 dev_info.rx_desc_lim.nb_min,
1062 dev_info.rx_desc_lim.nb_align);
1066 rxq = dev->data->rx_queues;
1067 if (rxq[rx_queue_id]) {
1068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1070 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1071 rxq[rx_queue_id] = NULL;
1074 if (rx_conf == NULL)
1075 rx_conf = &dev_info.default_rxconf;
1077 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1078 socket_id, rx_conf, mp);
1080 if (!dev->data->min_rx_buf_size ||
1081 dev->data->min_rx_buf_size > mbp_buf_size)
1082 dev->data->min_rx_buf_size = mbp_buf_size;
1089 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1090 uint16_t nb_tx_desc, unsigned int socket_id,
1091 const struct rte_eth_txconf *tx_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1099 dev = &rte_eth_devices[port_id];
1100 if (tx_queue_id >= dev->data->nb_tx_queues) {
1101 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1105 if (dev->data->dev_started) {
1106 RTE_PMD_DEBUG_TRACE(
1107 "port %d must be stopped to allow configuration\n", port_id);
1111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1114 rte_eth_dev_info_get(port_id, &dev_info);
1116 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1117 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1118 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1119 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1120 "should be: <= %hu, = %hu, and a product of %hu\n",
1122 dev_info.tx_desc_lim.nb_max,
1123 dev_info.tx_desc_lim.nb_min,
1124 dev_info.tx_desc_lim.nb_align);
1128 txq = dev->data->tx_queues;
1129 if (txq[tx_queue_id]) {
1130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1132 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1133 txq[tx_queue_id] = NULL;
1136 if (tx_conf == NULL)
1137 tx_conf = &dev_info.default_txconf;
1139 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1140 socket_id, tx_conf);
1144 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1145 void *userdata __rte_unused)
1149 for (i = 0; i < unsent; i++)
1150 rte_pktmbuf_free(pkts[i]);
1154 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1157 uint64_t *count = userdata;
1160 for (i = 0; i < unsent; i++)
1161 rte_pktmbuf_free(pkts[i]);
1167 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1168 buffer_tx_error_fn cbfn, void *userdata)
1170 buffer->error_callback = cbfn;
1171 buffer->error_userdata = userdata;
1176 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1183 buffer->size = size;
1184 if (buffer->error_callback == NULL) {
1185 ret = rte_eth_tx_buffer_set_err_callback(
1186 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1193 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1195 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1197 /* Validate Input Data. Bail if not valid or not supported. */
1198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1199 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1201 /* Call driver to free pending mbufs. */
1202 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1207 rte_eth_promiscuous_enable(uint8_t port_id)
1209 struct rte_eth_dev *dev;
1211 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1212 dev = &rte_eth_devices[port_id];
1214 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1215 (*dev->dev_ops->promiscuous_enable)(dev);
1216 dev->data->promiscuous = 1;
1220 rte_eth_promiscuous_disable(uint8_t port_id)
1222 struct rte_eth_dev *dev;
1224 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1225 dev = &rte_eth_devices[port_id];
1227 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1228 dev->data->promiscuous = 0;
1229 (*dev->dev_ops->promiscuous_disable)(dev);
1233 rte_eth_promiscuous_get(uint8_t port_id)
1235 struct rte_eth_dev *dev;
1237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1239 dev = &rte_eth_devices[port_id];
1240 return dev->data->promiscuous;
1244 rte_eth_allmulticast_enable(uint8_t port_id)
1246 struct rte_eth_dev *dev;
1248 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1249 dev = &rte_eth_devices[port_id];
1251 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1252 (*dev->dev_ops->allmulticast_enable)(dev);
1253 dev->data->all_multicast = 1;
1257 rte_eth_allmulticast_disable(uint8_t port_id)
1259 struct rte_eth_dev *dev;
1261 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1262 dev = &rte_eth_devices[port_id];
1264 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1265 dev->data->all_multicast = 0;
1266 (*dev->dev_ops->allmulticast_disable)(dev);
1270 rte_eth_allmulticast_get(uint8_t port_id)
1272 struct rte_eth_dev *dev;
1274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1276 dev = &rte_eth_devices[port_id];
1277 return dev->data->all_multicast;
1281 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1282 struct rte_eth_link *link)
1284 struct rte_eth_link *dst = link;
1285 struct rte_eth_link *src = &(dev->data->dev_link);
1287 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1288 *(uint64_t *)src) == 0)
1295 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1297 struct rte_eth_dev *dev;
1299 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1300 dev = &rte_eth_devices[port_id];
1302 if (dev->data->dev_conf.intr_conf.lsc != 0)
1303 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1305 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1306 (*dev->dev_ops->link_update)(dev, 1);
1307 *eth_link = dev->data->dev_link;
1312 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1314 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1317 dev = &rte_eth_devices[port_id];
1319 if (dev->data->dev_conf.intr_conf.lsc != 0)
1320 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1322 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1323 (*dev->dev_ops->link_update)(dev, 0);
1324 *eth_link = dev->data->dev_link;
1329 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1335 dev = &rte_eth_devices[port_id];
1336 memset(stats, 0, sizeof(*stats));
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1339 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1340 (*dev->dev_ops->stats_get)(dev, stats);
1345 rte_eth_stats_reset(uint8_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1353 (*dev->dev_ops->stats_reset)(dev);
1354 dev->data->rx_mbuf_alloc_failed = 0;
1358 get_xstats_count(uint8_t port_id)
1360 struct rte_eth_dev *dev;
1363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1364 dev = &rte_eth_devices[port_id];
1365 if (dev->dev_ops->xstats_get_names != NULL) {
1366 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1371 count += RTE_NB_STATS;
1372 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1374 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1380 rte_eth_xstats_get_names(uint8_t port_id,
1381 struct rte_eth_xstat_name *xstats_names,
1384 struct rte_eth_dev *dev;
1385 int cnt_used_entries;
1386 int cnt_expected_entries;
1387 int cnt_driver_entries;
1388 uint32_t idx, id_queue;
1391 cnt_expected_entries = get_xstats_count(port_id);
1392 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1393 (int)size < cnt_expected_entries)
1394 return cnt_expected_entries;
1396 /* port_id checked in get_xstats_count() */
1397 dev = &rte_eth_devices[port_id];
1398 cnt_used_entries = 0;
1400 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1401 snprintf(xstats_names[cnt_used_entries].name,
1402 sizeof(xstats_names[0].name),
1403 "%s", rte_stats_strings[idx].name);
1406 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1407 for (id_queue = 0; id_queue < num_q; id_queue++) {
1408 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1409 snprintf(xstats_names[cnt_used_entries].name,
1410 sizeof(xstats_names[0].name),
1412 id_queue, rte_rxq_stats_strings[idx].name);
1417 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1418 for (id_queue = 0; id_queue < num_q; id_queue++) {
1419 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1420 snprintf(xstats_names[cnt_used_entries].name,
1421 sizeof(xstats_names[0].name),
1423 id_queue, rte_txq_stats_strings[idx].name);
1428 if (dev->dev_ops->xstats_get_names != NULL) {
1429 /* If there are any driver-specific xstats, append them
1432 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1434 xstats_names + cnt_used_entries,
1435 size - cnt_used_entries);
1436 if (cnt_driver_entries < 0)
1437 return cnt_driver_entries;
1438 cnt_used_entries += cnt_driver_entries;
1441 return cnt_used_entries;
1444 /* retrieve ethdev extended statistics */
1446 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1449 struct rte_eth_stats eth_stats;
1450 struct rte_eth_dev *dev;
1451 unsigned int count = 0, i, q;
1452 signed int xcount = 0;
1453 uint64_t val, *stats_ptr;
1454 uint16_t nb_rxqs, nb_txqs;
1456 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1458 dev = &rte_eth_devices[port_id];
1460 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1461 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1463 /* Return generic statistics */
1464 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1465 (nb_txqs * RTE_NB_TXQ_STATS);
1467 /* implemented by the driver */
1468 if (dev->dev_ops->xstats_get != NULL) {
1469 /* Retrieve the xstats from the driver at the end of the
1472 xcount = (*dev->dev_ops->xstats_get)(dev,
1473 xstats ? xstats + count : NULL,
1474 (n > count) ? n - count : 0);
1480 if (n < count + xcount || xstats == NULL)
1481 return count + xcount;
1483 /* now fill the xstats structure */
1485 rte_eth_stats_get(port_id, ð_stats);
1488 for (i = 0; i < RTE_NB_STATS; i++) {
1489 stats_ptr = RTE_PTR_ADD(ð_stats,
1490 rte_stats_strings[i].offset);
1492 xstats[count++].value = val;
1496 for (q = 0; q < nb_rxqs; q++) {
1497 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1498 stats_ptr = RTE_PTR_ADD(ð_stats,
1499 rte_rxq_stats_strings[i].offset +
1500 q * sizeof(uint64_t));
1502 xstats[count++].value = val;
1507 for (q = 0; q < nb_txqs; q++) {
1508 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1509 stats_ptr = RTE_PTR_ADD(ð_stats,
1510 rte_txq_stats_strings[i].offset +
1511 q * sizeof(uint64_t));
1513 xstats[count++].value = val;
1517 for (i = 0; i < count; i++)
1519 /* add an offset to driver-specific stats */
1520 for ( ; i < count + xcount; i++)
1521 xstats[i].id += count;
1523 return count + xcount;
1526 /* reset ethdev extended statistics */
1528 rte_eth_xstats_reset(uint8_t port_id)
1530 struct rte_eth_dev *dev;
1532 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1533 dev = &rte_eth_devices[port_id];
1535 /* implemented by the driver */
1536 if (dev->dev_ops->xstats_reset != NULL) {
1537 (*dev->dev_ops->xstats_reset)(dev);
1541 /* fallback to default */
1542 rte_eth_stats_reset(port_id);
1546 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1549 struct rte_eth_dev *dev;
1551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1553 dev = &rte_eth_devices[port_id];
1555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1556 return (*dev->dev_ops->queue_stats_mapping_set)
1557 (dev, queue_id, stat_idx, is_rx);
1562 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1565 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1571 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1574 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1579 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1581 struct rte_eth_dev *dev;
1583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1584 dev = &rte_eth_devices[port_id];
1586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1587 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1591 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1593 struct rte_eth_dev *dev;
1594 const struct rte_eth_desc_lim lim = {
1595 .nb_max = UINT16_MAX,
1600 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1601 dev = &rte_eth_devices[port_id];
1603 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1604 dev_info->rx_desc_lim = lim;
1605 dev_info->tx_desc_lim = lim;
1607 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1608 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1609 dev_info->driver_name = dev->data->drv_name;
1610 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1611 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1615 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1616 uint32_t *ptypes, int num)
1619 struct rte_eth_dev *dev;
1620 const uint32_t *all_ptypes;
1622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1623 dev = &rte_eth_devices[port_id];
1624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1625 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1630 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1631 if (all_ptypes[i] & ptype_mask) {
1633 ptypes[j] = all_ptypes[i];
1641 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1643 struct rte_eth_dev *dev;
1645 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1646 dev = &rte_eth_devices[port_id];
1647 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1652 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1654 struct rte_eth_dev *dev;
1656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1658 dev = &rte_eth_devices[port_id];
1659 *mtu = dev->data->mtu;
1664 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1667 struct rte_eth_dev *dev;
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1670 dev = &rte_eth_devices[port_id];
1671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1673 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1675 dev->data->mtu = mtu;
1681 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1683 struct rte_eth_dev *dev;
1685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1686 dev = &rte_eth_devices[port_id];
1687 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1688 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1692 if (vlan_id > 4095) {
1693 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1694 port_id, (unsigned) vlan_id);
1697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1699 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1703 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1705 struct rte_eth_dev *dev;
1707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1708 dev = &rte_eth_devices[port_id];
1709 if (rx_queue_id >= dev->data->nb_rx_queues) {
1710 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1715 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1721 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1722 enum rte_vlan_type vlan_type,
1725 struct rte_eth_dev *dev;
1727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1728 dev = &rte_eth_devices[port_id];
1729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1731 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1735 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1737 struct rte_eth_dev *dev;
1742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1743 dev = &rte_eth_devices[port_id];
1745 /*check which option changed by application*/
1746 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1747 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1749 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1750 mask |= ETH_VLAN_STRIP_MASK;
1753 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1754 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1756 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1757 mask |= ETH_VLAN_FILTER_MASK;
1760 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1761 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1763 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1764 mask |= ETH_VLAN_EXTEND_MASK;
1771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1772 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1778 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1780 struct rte_eth_dev *dev;
1783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1784 dev = &rte_eth_devices[port_id];
1786 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1787 ret |= ETH_VLAN_STRIP_OFFLOAD;
1789 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1790 ret |= ETH_VLAN_FILTER_OFFLOAD;
1792 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1793 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1799 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1801 struct rte_eth_dev *dev;
1803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1804 dev = &rte_eth_devices[port_id];
1805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1806 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1812 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1814 struct rte_eth_dev *dev;
1816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1817 dev = &rte_eth_devices[port_id];
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1819 memset(fc_conf, 0, sizeof(*fc_conf));
1820 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1824 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1826 struct rte_eth_dev *dev;
1828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1829 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1830 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1834 dev = &rte_eth_devices[port_id];
1835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1836 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1840 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1842 struct rte_eth_dev *dev;
1844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1845 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1846 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1850 dev = &rte_eth_devices[port_id];
1851 /* High water, low water validation are device specific */
1852 if (*dev->dev_ops->priority_flow_ctrl_set)
1853 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1858 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1866 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
1867 for (i = 0; i < num; i++) {
1868 if (reta_conf[i].mask)
1876 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1880 uint16_t i, idx, shift;
1886 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1890 for (i = 0; i < reta_size; i++) {
1891 idx = i / RTE_RETA_GROUP_SIZE;
1892 shift = i % RTE_RETA_GROUP_SIZE;
1893 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1894 (reta_conf[idx].reta[shift] >= max_rxq)) {
1895 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1896 "the maximum rxq index: %u\n", idx, shift,
1897 reta_conf[idx].reta[shift], max_rxq);
1906 rte_eth_dev_rss_reta_update(uint8_t port_id,
1907 struct rte_eth_rss_reta_entry64 *reta_conf,
1910 struct rte_eth_dev *dev;
1913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1914 /* Check mask bits */
1915 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1919 dev = &rte_eth_devices[port_id];
1921 /* Check entry value */
1922 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1923 dev->data->nb_rx_queues);
1927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1928 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1932 rte_eth_dev_rss_reta_query(uint8_t port_id,
1933 struct rte_eth_rss_reta_entry64 *reta_conf,
1936 struct rte_eth_dev *dev;
1939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1941 /* Check mask bits */
1942 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1946 dev = &rte_eth_devices[port_id];
1947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1948 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1952 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1954 struct rte_eth_dev *dev;
1955 uint16_t rss_hash_protos;
1957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1958 rss_hash_protos = rss_conf->rss_hf;
1959 if ((rss_hash_protos != 0) &&
1960 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1961 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1965 dev = &rte_eth_devices[port_id];
1966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1967 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1971 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1972 struct rte_eth_rss_conf *rss_conf)
1974 struct rte_eth_dev *dev;
1976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1977 dev = &rte_eth_devices[port_id];
1978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1979 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1983 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1984 struct rte_eth_udp_tunnel *udp_tunnel)
1986 struct rte_eth_dev *dev;
1988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1989 if (udp_tunnel == NULL) {
1990 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1994 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1995 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1999 dev = &rte_eth_devices[port_id];
2000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2001 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2005 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2006 struct rte_eth_udp_tunnel *udp_tunnel)
2008 struct rte_eth_dev *dev;
2010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2011 dev = &rte_eth_devices[port_id];
2013 if (udp_tunnel == NULL) {
2014 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2018 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2019 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2024 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2028 rte_eth_led_on(uint8_t port_id)
2030 struct rte_eth_dev *dev;
2032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2033 dev = &rte_eth_devices[port_id];
2034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2035 return (*dev->dev_ops->dev_led_on)(dev);
2039 rte_eth_led_off(uint8_t port_id)
2041 struct rte_eth_dev *dev;
2043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2044 dev = &rte_eth_devices[port_id];
2045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2046 return (*dev->dev_ops->dev_led_off)(dev);
2050 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2054 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2056 struct rte_eth_dev_info dev_info;
2057 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2060 rte_eth_dev_info_get(port_id, &dev_info);
2062 for (i = 0; i < dev_info.max_mac_addrs; i++)
2063 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2069 static const struct ether_addr null_mac_addr;
2072 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2075 struct rte_eth_dev *dev;
2079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2080 dev = &rte_eth_devices[port_id];
2081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2083 if (is_zero_ether_addr(addr)) {
2084 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2088 if (pool >= ETH_64_POOLS) {
2089 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2093 index = get_mac_addr_index(port_id, addr);
2095 index = get_mac_addr_index(port_id, &null_mac_addr);
2097 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2102 pool_mask = dev->data->mac_pool_sel[index];
2104 /* Check if both MAC address and pool is already there, and do nothing */
2105 if (pool_mask & (1ULL << pool))
2110 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2112 /* Update address in NIC data structure */
2113 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2115 /* Update pool bitmap in NIC data structure */
2116 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2122 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2124 struct rte_eth_dev *dev;
2127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2128 dev = &rte_eth_devices[port_id];
2129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2131 index = get_mac_addr_index(port_id, addr);
2133 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2135 } else if (index < 0)
2136 return 0; /* Do nothing if address wasn't found */
2139 (*dev->dev_ops->mac_addr_remove)(dev, index);
2141 /* Update address in NIC data structure */
2142 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2144 /* reset pool bitmap */
2145 dev->data->mac_pool_sel[index] = 0;
2151 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2153 struct rte_eth_dev *dev;
2155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2157 if (!is_valid_assigned_ether_addr(addr))
2160 dev = &rte_eth_devices[port_id];
2161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2163 /* Update default address in NIC data structure */
2164 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2166 (*dev->dev_ops->mac_addr_set)(dev, addr);
2173 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2177 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2179 struct rte_eth_dev_info dev_info;
2180 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2183 rte_eth_dev_info_get(port_id, &dev_info);
2184 if (!dev->data->hash_mac_addrs)
2187 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2188 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2189 ETHER_ADDR_LEN) == 0)
2196 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2201 struct rte_eth_dev *dev;
2203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2205 dev = &rte_eth_devices[port_id];
2206 if (is_zero_ether_addr(addr)) {
2207 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2212 index = get_hash_mac_addr_index(port_id, addr);
2213 /* Check if it's already there, and do nothing */
2214 if ((index >= 0) && (on))
2219 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2220 "set in UTA\n", port_id);
2224 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2226 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2232 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2233 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2235 /* Update address in NIC data structure */
2237 ether_addr_copy(addr,
2238 &dev->data->hash_mac_addrs[index]);
2240 ether_addr_copy(&null_mac_addr,
2241 &dev->data->hash_mac_addrs[index]);
2248 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2250 struct rte_eth_dev *dev;
2252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2254 dev = &rte_eth_devices[port_id];
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2257 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2260 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2263 struct rte_eth_dev *dev;
2264 struct rte_eth_dev_info dev_info;
2265 struct rte_eth_link link;
2267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2269 dev = &rte_eth_devices[port_id];
2270 rte_eth_dev_info_get(port_id, &dev_info);
2271 link = dev->data->dev_link;
2273 if (queue_idx > dev_info.max_tx_queues) {
2274 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2275 "invalid queue id=%d\n", port_id, queue_idx);
2279 if (tx_rate > link.link_speed) {
2280 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2281 "bigger than link speed= %d\n",
2282 tx_rate, link.link_speed);
2286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2287 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2291 rte_eth_mirror_rule_set(uint8_t port_id,
2292 struct rte_eth_mirror_conf *mirror_conf,
2293 uint8_t rule_id, uint8_t on)
2295 struct rte_eth_dev *dev;
2297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2298 if (mirror_conf->rule_type == 0) {
2299 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2303 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2304 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2309 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2310 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2311 (mirror_conf->pool_mask == 0)) {
2312 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2316 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2317 mirror_conf->vlan.vlan_mask == 0) {
2318 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2322 dev = &rte_eth_devices[port_id];
2323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2325 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2329 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2331 struct rte_eth_dev *dev;
2333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2335 dev = &rte_eth_devices[port_id];
2336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2338 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2342 rte_eth_dev_callback_register(uint8_t port_id,
2343 enum rte_eth_event_type event,
2344 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2346 struct rte_eth_dev *dev;
2347 struct rte_eth_dev_callback *user_cb;
2352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2354 dev = &rte_eth_devices[port_id];
2355 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2357 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2358 if (user_cb->cb_fn == cb_fn &&
2359 user_cb->cb_arg == cb_arg &&
2360 user_cb->event == event) {
2365 /* create a new callback. */
2366 if (user_cb == NULL) {
2367 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2368 sizeof(struct rte_eth_dev_callback), 0);
2369 if (user_cb != NULL) {
2370 user_cb->cb_fn = cb_fn;
2371 user_cb->cb_arg = cb_arg;
2372 user_cb->event = event;
2373 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2377 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2378 return (user_cb == NULL) ? -ENOMEM : 0;
2382 rte_eth_dev_callback_unregister(uint8_t port_id,
2383 enum rte_eth_event_type event,
2384 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2387 struct rte_eth_dev *dev;
2388 struct rte_eth_dev_callback *cb, *next;
2393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2395 dev = &rte_eth_devices[port_id];
2396 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2399 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2401 next = TAILQ_NEXT(cb, next);
2403 if (cb->cb_fn != cb_fn || cb->event != event ||
2404 (cb->cb_arg != (void *)-1 &&
2405 cb->cb_arg != cb_arg))
2409 * if this callback is not executing right now,
2412 if (cb->active == 0) {
2413 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2420 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2425 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2426 enum rte_eth_event_type event, void *cb_arg)
2428 struct rte_eth_dev_callback *cb_lst;
2429 struct rte_eth_dev_callback dev_cb;
2431 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2432 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2433 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2438 dev_cb.cb_arg = cb_arg;
2440 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2441 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2443 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2446 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2450 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2453 struct rte_eth_dev *dev;
2454 struct rte_intr_handle *intr_handle;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2462 if (!dev->intr_handle) {
2463 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2467 intr_handle = dev->intr_handle;
2468 if (!intr_handle->intr_vec) {
2469 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2473 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2474 vec = intr_handle->intr_vec[qid];
2475 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2476 if (rc && rc != -EEXIST) {
2477 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2478 " op %d epfd %d vec %u\n",
2479 port_id, qid, op, epfd, vec);
2486 const struct rte_memzone *
2487 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2488 uint16_t queue_id, size_t size, unsigned align,
2491 char z_name[RTE_MEMZONE_NAMESIZE];
2492 const struct rte_memzone *mz;
2494 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2495 dev->data->drv_name, ring_name,
2496 dev->data->port_id, queue_id);
2498 mz = rte_memzone_lookup(z_name);
2502 if (rte_xen_dom0_supported())
2503 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2504 0, align, RTE_PGSIZE_2M);
2506 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2511 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2512 int epfd, int op, void *data)
2515 struct rte_eth_dev *dev;
2516 struct rte_intr_handle *intr_handle;
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2521 dev = &rte_eth_devices[port_id];
2522 if (queue_id >= dev->data->nb_rx_queues) {
2523 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2527 if (!dev->intr_handle) {
2528 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2532 intr_handle = dev->intr_handle;
2533 if (!intr_handle->intr_vec) {
2534 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2538 vec = intr_handle->intr_vec[queue_id];
2539 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2540 if (rc && rc != -EEXIST) {
2541 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2542 " op %d epfd %d vec %u\n",
2543 port_id, queue_id, op, epfd, vec);
2551 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2554 struct rte_eth_dev *dev;
2556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2561 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2565 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2568 struct rte_eth_dev *dev;
2570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2572 dev = &rte_eth_devices[port_id];
2574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2575 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2578 #ifdef RTE_NIC_BYPASS
2579 int rte_eth_dev_bypass_init(uint8_t port_id)
2581 struct rte_eth_dev *dev;
2583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2587 (*dev->dev_ops->bypass_init)(dev);
2592 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2594 struct rte_eth_dev *dev;
2596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2598 dev = &rte_eth_devices[port_id];
2599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2600 (*dev->dev_ops->bypass_state_show)(dev, state);
2605 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2607 struct rte_eth_dev *dev;
2609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2611 dev = &rte_eth_devices[port_id];
2612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2613 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2618 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2620 struct rte_eth_dev *dev;
2622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2624 dev = &rte_eth_devices[port_id];
2625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2626 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2631 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2633 struct rte_eth_dev *dev;
2635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2637 dev = &rte_eth_devices[port_id];
2639 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2640 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2645 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2647 struct rte_eth_dev *dev;
2649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2651 dev = &rte_eth_devices[port_id];
2653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2654 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2659 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2661 struct rte_eth_dev *dev;
2663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2665 dev = &rte_eth_devices[port_id];
2667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2668 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2673 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2675 struct rte_eth_dev *dev;
2677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2679 dev = &rte_eth_devices[port_id];
2681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2682 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2687 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 dev = &rte_eth_devices[port_id];
2695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2696 (*dev->dev_ops->bypass_wd_reset)(dev);
2702 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2704 struct rte_eth_dev *dev;
2706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2708 dev = &rte_eth_devices[port_id];
2709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2710 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2711 RTE_ETH_FILTER_NOP, NULL);
2715 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2716 enum rte_filter_op filter_op, void *arg)
2718 struct rte_eth_dev *dev;
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2722 dev = &rte_eth_devices[port_id];
2723 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2724 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2728 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2729 rte_rx_callback_fn fn, void *user_param)
2731 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2732 rte_errno = ENOTSUP;
2735 /* check input parameters */
2736 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2737 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2741 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2749 cb->param = user_param;
2751 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2752 /* Add the callbacks in fifo order. */
2753 struct rte_eth_rxtx_callback *tail =
2754 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2757 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2764 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2770 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2771 rte_rx_callback_fn fn, void *user_param)
2773 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2774 rte_errno = ENOTSUP;
2777 /* check input parameters */
2778 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2779 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2784 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2792 cb->param = user_param;
2794 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2795 /* Add the callbacks at fisrt position*/
2796 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2798 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2799 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2805 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2806 rte_tx_callback_fn fn, void *user_param)
2808 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2809 rte_errno = ENOTSUP;
2812 /* check input parameters */
2813 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2814 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2819 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2827 cb->param = user_param;
2829 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2830 /* Add the callbacks in fifo order. */
2831 struct rte_eth_rxtx_callback *tail =
2832 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2835 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2842 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2848 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2849 struct rte_eth_rxtx_callback *user_cb)
2851 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2854 /* Check input parameters. */
2855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2856 if (user_cb == NULL ||
2857 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2860 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2861 struct rte_eth_rxtx_callback *cb;
2862 struct rte_eth_rxtx_callback **prev_cb;
2865 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2866 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2867 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2869 if (cb == user_cb) {
2870 /* Remove the user cb from the callback list. */
2871 *prev_cb = cb->next;
2876 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2882 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2883 struct rte_eth_rxtx_callback *user_cb)
2885 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2888 /* Check input parameters. */
2889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2890 if (user_cb == NULL ||
2891 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2894 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2896 struct rte_eth_rxtx_callback *cb;
2897 struct rte_eth_rxtx_callback **prev_cb;
2899 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2900 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2901 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2903 if (cb == user_cb) {
2904 /* Remove the user cb from the callback list. */
2905 *prev_cb = cb->next;
2910 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2916 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2917 struct rte_eth_rxq_info *qinfo)
2919 struct rte_eth_dev *dev;
2921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2926 dev = &rte_eth_devices[port_id];
2927 if (queue_id >= dev->data->nb_rx_queues) {
2928 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
2934 memset(qinfo, 0, sizeof(*qinfo));
2935 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
2940 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2941 struct rte_eth_txq_info *qinfo)
2943 struct rte_eth_dev *dev;
2945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2950 dev = &rte_eth_devices[port_id];
2951 if (queue_id >= dev->data->nb_tx_queues) {
2952 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
2956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
2958 memset(qinfo, 0, sizeof(*qinfo));
2959 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
2964 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
2965 struct ether_addr *mc_addr_set,
2966 uint32_t nb_mc_addr)
2968 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 dev = &rte_eth_devices[port_id];
2973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
2974 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
2978 rte_eth_timesync_enable(uint8_t port_id)
2980 struct rte_eth_dev *dev;
2982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2983 dev = &rte_eth_devices[port_id];
2985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
2986 return (*dev->dev_ops->timesync_enable)(dev);
2990 rte_eth_timesync_disable(uint8_t port_id)
2992 struct rte_eth_dev *dev;
2994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2995 dev = &rte_eth_devices[port_id];
2997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
2998 return (*dev->dev_ops->timesync_disable)(dev);
3002 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3005 struct rte_eth_dev *dev;
3007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3008 dev = &rte_eth_devices[port_id];
3010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3011 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3015 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3017 struct rte_eth_dev *dev;
3019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3020 dev = &rte_eth_devices[port_id];
3022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3023 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3027 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3029 struct rte_eth_dev *dev;
3031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3032 dev = &rte_eth_devices[port_id];
3034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3035 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3039 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3041 struct rte_eth_dev *dev;
3043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3044 dev = &rte_eth_devices[port_id];
3046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3047 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3051 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3053 struct rte_eth_dev *dev;
3055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3056 dev = &rte_eth_devices[port_id];
3058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3059 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3063 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3065 struct rte_eth_dev *dev;
3067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3069 dev = &rte_eth_devices[port_id];
3070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3071 return (*dev->dev_ops->get_reg)(dev, info);
3075 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3077 struct rte_eth_dev *dev;
3079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3081 dev = &rte_eth_devices[port_id];
3082 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3083 return (*dev->dev_ops->get_eeprom_length)(dev);
3087 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3089 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3095 return (*dev->dev_ops->get_eeprom)(dev, info);
3099 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3101 struct rte_eth_dev *dev;
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3105 dev = &rte_eth_devices[port_id];
3106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3107 return (*dev->dev_ops->set_eeprom)(dev, info);
3111 rte_eth_dev_get_dcb_info(uint8_t port_id,
3112 struct rte_eth_dcb_info *dcb_info)
3114 struct rte_eth_dev *dev;
3116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3118 dev = &rte_eth_devices[port_id];
3119 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3122 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3126 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3127 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3129 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 if (l2_tunnel == NULL) {
3133 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3137 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3138 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3142 dev = &rte_eth_devices[port_id];
3143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3145 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3149 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3150 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3154 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3158 if (l2_tunnel == NULL) {
3159 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3163 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3164 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3169 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3173 dev = &rte_eth_devices[port_id];
3174 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3176 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);