1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "ethdev_profile.h"
43 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
44 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 static struct rte_eth_dev_data *rte_eth_dev_data;
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* store statistics names and its offset in stats structure */
58 struct rte_eth_xstats_name_off {
59 char name[RTE_ETH_XSTATS_NAME_SIZE];
63 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
64 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
65 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
66 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
67 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
68 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
69 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
70 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
71 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
75 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
77 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
78 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
79 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
80 {"errors", offsetof(struct rte_eth_stats, q_errors)},
83 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
84 sizeof(rte_rxq_stats_strings[0]))
86 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
90 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
91 sizeof(rte_txq_stats_strings[0]))
95 * The user application callback description.
97 * It contains callback address to be registered by user application,
98 * the pointer to the parameters for callback, and the event type.
100 struct rte_eth_dev_callback {
101 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
102 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
103 void *cb_arg; /**< Parameter for callback */
104 void *ret_param; /**< Return parameter */
105 enum rte_eth_event_type event; /**< Interrupt event type */
106 uint32_t active; /**< Callback is executing */
115 rte_eth_find_next(uint16_t port_id)
117 while (port_id < RTE_MAX_ETHPORTS &&
118 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
121 if (port_id >= RTE_MAX_ETHPORTS)
122 return RTE_MAX_ETHPORTS;
128 rte_eth_dev_data_alloc(void)
130 const unsigned flags = 0;
131 const struct rte_memzone *mz;
133 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
134 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
135 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
136 rte_socket_id(), flags);
138 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
140 rte_panic("Cannot allocate memzone for ethernet port data\n");
142 rte_eth_dev_data = mz->addr;
143 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
144 memset(rte_eth_dev_data, 0,
145 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
149 rte_eth_dev_allocated(const char *name)
153 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
154 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
155 strcmp(rte_eth_devices[i].data->name, name) == 0)
156 return &rte_eth_devices[i];
162 rte_eth_dev_find_free_port(void)
166 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
167 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
170 return RTE_MAX_ETHPORTS;
173 static struct rte_eth_dev *
174 eth_dev_get(uint16_t port_id)
176 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
178 eth_dev->data = &rte_eth_dev_data[port_id];
179 eth_dev->state = RTE_ETH_DEV_ATTACHED;
181 eth_dev_last_created_port = port_id;
187 rte_eth_dev_allocate(const char *name)
190 struct rte_eth_dev *eth_dev;
192 port_id = rte_eth_dev_find_free_port();
193 if (port_id == RTE_MAX_ETHPORTS) {
194 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
198 if (rte_eth_dev_data == NULL)
199 rte_eth_dev_data_alloc();
201 if (rte_eth_dev_allocated(name) != NULL) {
202 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
207 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
208 eth_dev = eth_dev_get(port_id);
209 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
210 eth_dev->data->port_id = port_id;
211 eth_dev->data->mtu = ETHER_MTU;
213 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
219 * Attach to a port already registered by the primary process, which
220 * makes sure that the same device would have the same port id both
221 * in the primary and secondary process.
224 rte_eth_dev_attach_secondary(const char *name)
227 struct rte_eth_dev *eth_dev;
229 if (rte_eth_dev_data == NULL)
230 rte_eth_dev_data_alloc();
232 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
233 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
236 if (i == RTE_MAX_ETHPORTS) {
238 "device %s is not driven by the primary process\n",
243 eth_dev = eth_dev_get(i);
244 RTE_ASSERT(eth_dev->data->port_id == i);
250 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
255 eth_dev->state = RTE_ETH_DEV_UNUSED;
257 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
263 rte_eth_dev_is_valid_port(uint16_t port_id)
265 if (port_id >= RTE_MAX_ETHPORTS ||
266 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
267 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
274 rte_eth_dev_socket_id(uint16_t port_id)
276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
277 return rte_eth_devices[port_id].data->numa_node;
281 rte_eth_dev_get_sec_ctx(uint8_t port_id)
283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
284 return rte_eth_devices[port_id].security_ctx;
288 rte_eth_dev_count(void)
295 RTE_ETH_FOREACH_DEV(p)
302 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
309 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
313 /* shouldn't check 'rte_eth_devices[i].data',
314 * because it might be overwritten by VDEV PMD */
315 tmp = rte_eth_dev_data[port_id].name;
321 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
326 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
330 RTE_ETH_FOREACH_DEV(i) {
332 rte_eth_dev_data[i].name, strlen(name))) {
342 /* attach the new device, then store port_id of the device */
344 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
347 int current = rte_eth_dev_count();
351 if ((devargs == NULL) || (port_id == NULL)) {
356 /* parse devargs, then retrieve device name and args */
357 if (rte_eal_parse_devargs_str(devargs, &name, &args))
360 ret = rte_eal_dev_attach(name, args);
364 /* no point looking at the port count if no port exists */
365 if (!rte_eth_dev_count()) {
366 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
371 /* if nothing happened, there is a bug here, since some driver told us
372 * it did attach a device, but did not create a port.
374 if (current == rte_eth_dev_count()) {
379 *port_id = eth_dev_last_created_port;
388 /* detach the device, then store the name of the device */
390 rte_eth_dev_detach(uint16_t port_id, char *name)
395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
402 dev_flags = rte_eth_devices[port_id].data->dev_flags;
403 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
404 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
410 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
411 "%s", rte_eth_devices[port_id].data->name);
413 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
417 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
425 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
427 uint16_t old_nb_queues = dev->data->nb_rx_queues;
431 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
432 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
433 sizeof(dev->data->rx_queues[0]) * nb_queues,
434 RTE_CACHE_LINE_SIZE);
435 if (dev->data->rx_queues == NULL) {
436 dev->data->nb_rx_queues = 0;
439 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
442 rxq = dev->data->rx_queues;
444 for (i = nb_queues; i < old_nb_queues; i++)
445 (*dev->dev_ops->rx_queue_release)(rxq[i]);
446 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
447 RTE_CACHE_LINE_SIZE);
450 if (nb_queues > old_nb_queues) {
451 uint16_t new_qs = nb_queues - old_nb_queues;
453 memset(rxq + old_nb_queues, 0,
454 sizeof(rxq[0]) * new_qs);
457 dev->data->rx_queues = rxq;
459 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
460 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
462 rxq = dev->data->rx_queues;
464 for (i = nb_queues; i < old_nb_queues; i++)
465 (*dev->dev_ops->rx_queue_release)(rxq[i]);
467 rte_free(dev->data->rx_queues);
468 dev->data->rx_queues = NULL;
470 dev->data->nb_rx_queues = nb_queues;
475 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
477 struct rte_eth_dev *dev;
479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
481 dev = &rte_eth_devices[port_id];
482 if (rx_queue_id >= dev->data->nb_rx_queues) {
483 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
489 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
490 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
491 " already started\n",
492 rx_queue_id, port_id);
496 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
501 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
503 struct rte_eth_dev *dev;
505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
507 dev = &rte_eth_devices[port_id];
508 if (rx_queue_id >= dev->data->nb_rx_queues) {
509 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
515 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
516 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
517 " already stopped\n",
518 rx_queue_id, port_id);
522 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
527 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
529 struct rte_eth_dev *dev;
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
533 dev = &rte_eth_devices[port_id];
534 if (tx_queue_id >= dev->data->nb_tx_queues) {
535 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
539 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
541 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
542 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
543 " already started\n",
544 tx_queue_id, port_id);
548 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
553 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
555 struct rte_eth_dev *dev;
557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
559 dev = &rte_eth_devices[port_id];
560 if (tx_queue_id >= dev->data->nb_tx_queues) {
561 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
567 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
568 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
569 " already stopped\n",
570 tx_queue_id, port_id);
574 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
579 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
581 uint16_t old_nb_queues = dev->data->nb_tx_queues;
585 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
586 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
587 sizeof(dev->data->tx_queues[0]) * nb_queues,
588 RTE_CACHE_LINE_SIZE);
589 if (dev->data->tx_queues == NULL) {
590 dev->data->nb_tx_queues = 0;
593 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
596 txq = dev->data->tx_queues;
598 for (i = nb_queues; i < old_nb_queues; i++)
599 (*dev->dev_ops->tx_queue_release)(txq[i]);
600 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
601 RTE_CACHE_LINE_SIZE);
604 if (nb_queues > old_nb_queues) {
605 uint16_t new_qs = nb_queues - old_nb_queues;
607 memset(txq + old_nb_queues, 0,
608 sizeof(txq[0]) * new_qs);
611 dev->data->tx_queues = txq;
613 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
616 txq = dev->data->tx_queues;
618 for (i = nb_queues; i < old_nb_queues; i++)
619 (*dev->dev_ops->tx_queue_release)(txq[i]);
621 rte_free(dev->data->tx_queues);
622 dev->data->tx_queues = NULL;
624 dev->data->nb_tx_queues = nb_queues;
629 rte_eth_speed_bitflag(uint32_t speed, int duplex)
632 case ETH_SPEED_NUM_10M:
633 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
634 case ETH_SPEED_NUM_100M:
635 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
636 case ETH_SPEED_NUM_1G:
637 return ETH_LINK_SPEED_1G;
638 case ETH_SPEED_NUM_2_5G:
639 return ETH_LINK_SPEED_2_5G;
640 case ETH_SPEED_NUM_5G:
641 return ETH_LINK_SPEED_5G;
642 case ETH_SPEED_NUM_10G:
643 return ETH_LINK_SPEED_10G;
644 case ETH_SPEED_NUM_20G:
645 return ETH_LINK_SPEED_20G;
646 case ETH_SPEED_NUM_25G:
647 return ETH_LINK_SPEED_25G;
648 case ETH_SPEED_NUM_40G:
649 return ETH_LINK_SPEED_40G;
650 case ETH_SPEED_NUM_50G:
651 return ETH_LINK_SPEED_50G;
652 case ETH_SPEED_NUM_56G:
653 return ETH_LINK_SPEED_56G;
654 case ETH_SPEED_NUM_100G:
655 return ETH_LINK_SPEED_100G;
662 * A conversion function from rxmode bitfield API.
665 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
666 uint64_t *rx_offloads)
668 uint64_t offloads = 0;
670 if (rxmode->header_split == 1)
671 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
672 if (rxmode->hw_ip_checksum == 1)
673 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
674 if (rxmode->hw_vlan_filter == 1)
675 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
676 if (rxmode->hw_vlan_strip == 1)
677 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
678 if (rxmode->hw_vlan_extend == 1)
679 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
680 if (rxmode->jumbo_frame == 1)
681 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
682 if (rxmode->hw_strip_crc == 1)
683 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
684 if (rxmode->enable_scatter == 1)
685 offloads |= DEV_RX_OFFLOAD_SCATTER;
686 if (rxmode->enable_lro == 1)
687 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
688 if (rxmode->hw_timestamp == 1)
689 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
690 if (rxmode->security == 1)
691 offloads |= DEV_RX_OFFLOAD_SECURITY;
693 *rx_offloads = offloads;
697 * A conversion function from rxmode offloads API.
700 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
701 struct rte_eth_rxmode *rxmode)
704 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
705 rxmode->header_split = 1;
707 rxmode->header_split = 0;
708 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
709 rxmode->hw_ip_checksum = 1;
711 rxmode->hw_ip_checksum = 0;
712 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
713 rxmode->hw_vlan_filter = 1;
715 rxmode->hw_vlan_filter = 0;
716 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
717 rxmode->hw_vlan_strip = 1;
719 rxmode->hw_vlan_strip = 0;
720 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
721 rxmode->hw_vlan_extend = 1;
723 rxmode->hw_vlan_extend = 0;
724 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
725 rxmode->jumbo_frame = 1;
727 rxmode->jumbo_frame = 0;
728 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
729 rxmode->hw_strip_crc = 1;
731 rxmode->hw_strip_crc = 0;
732 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
733 rxmode->enable_scatter = 1;
735 rxmode->enable_scatter = 0;
736 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
737 rxmode->enable_lro = 1;
739 rxmode->enable_lro = 0;
740 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
741 rxmode->hw_timestamp = 1;
743 rxmode->hw_timestamp = 0;
744 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
745 rxmode->security = 1;
747 rxmode->security = 0;
751 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
752 const struct rte_eth_conf *dev_conf)
754 struct rte_eth_dev *dev;
755 struct rte_eth_dev_info dev_info;
756 struct rte_eth_conf local_conf = *dev_conf;
759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
761 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
763 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
764 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
768 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
770 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
771 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
775 dev = &rte_eth_devices[port_id];
777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
780 if (dev->data->dev_started) {
782 "port %d must be stopped to allow configuration\n", port_id);
787 * Convert between the offloads API to enable PMDs to support
790 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
791 rte_eth_convert_rx_offload_bitfield(
792 &dev_conf->rxmode, &local_conf.rxmode.offloads);
794 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
798 /* Copy the dev_conf parameter into the dev structure */
799 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
802 * Check that the numbers of RX and TX queues are not greater
803 * than the maximum number of RX and TX queues supported by the
806 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
808 if (nb_rx_q == 0 && nb_tx_q == 0) {
809 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
813 if (nb_rx_q > dev_info.max_rx_queues) {
814 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
815 port_id, nb_rx_q, dev_info.max_rx_queues);
819 if (nb_tx_q > dev_info.max_tx_queues) {
820 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
821 port_id, nb_tx_q, dev_info.max_tx_queues);
825 /* Check that the device supports requested interrupts */
826 if ((dev_conf->intr_conf.lsc == 1) &&
827 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
828 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
829 dev->device->driver->name);
832 if ((dev_conf->intr_conf.rmv == 1) &&
833 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
834 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
835 dev->device->driver->name);
840 * If jumbo frames are enabled, check that the maximum RX packet
841 * length is supported by the configured device.
843 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
844 if (dev_conf->rxmode.max_rx_pkt_len >
845 dev_info.max_rx_pktlen) {
846 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
847 " > max valid value %u\n",
849 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
850 (unsigned)dev_info.max_rx_pktlen);
852 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
853 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
854 " < min valid value %u\n",
856 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
857 (unsigned)ETHER_MIN_LEN);
861 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
862 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
863 /* Use default value */
864 dev->data->dev_conf.rxmode.max_rx_pkt_len =
869 * Setup new number of RX/TX queues and reconfigure device.
871 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
873 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
878 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
880 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
882 rte_eth_dev_rx_queue_config(dev, 0);
886 diag = (*dev->dev_ops->dev_configure)(dev);
888 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
890 rte_eth_dev_rx_queue_config(dev, 0);
891 rte_eth_dev_tx_queue_config(dev, 0);
895 /* Initialize Rx profiling if enabled at compilation time. */
896 diag = __rte_eth_profile_rx_init(port_id, dev);
898 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
900 rte_eth_dev_rx_queue_config(dev, 0);
901 rte_eth_dev_tx_queue_config(dev, 0);
909 _rte_eth_dev_reset(struct rte_eth_dev *dev)
911 if (dev->data->dev_started) {
913 "port %d must be stopped to allow reset\n",
918 rte_eth_dev_rx_queue_config(dev, 0);
919 rte_eth_dev_tx_queue_config(dev, 0);
921 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
925 rte_eth_dev_config_restore(uint16_t port_id)
927 struct rte_eth_dev *dev;
928 struct rte_eth_dev_info dev_info;
929 struct ether_addr *addr;
934 dev = &rte_eth_devices[port_id];
936 rte_eth_dev_info_get(port_id, &dev_info);
938 /* replay MAC address configuration including default MAC */
939 addr = &dev->data->mac_addrs[0];
940 if (*dev->dev_ops->mac_addr_set != NULL)
941 (*dev->dev_ops->mac_addr_set)(dev, addr);
942 else if (*dev->dev_ops->mac_addr_add != NULL)
943 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
945 if (*dev->dev_ops->mac_addr_add != NULL) {
946 for (i = 1; i < dev_info.max_mac_addrs; i++) {
947 addr = &dev->data->mac_addrs[i];
949 /* skip zero address */
950 if (is_zero_ether_addr(addr))
954 pool_mask = dev->data->mac_pool_sel[i];
957 if (pool_mask & 1ULL)
958 (*dev->dev_ops->mac_addr_add)(dev,
966 /* replay promiscuous configuration */
967 if (rte_eth_promiscuous_get(port_id) == 1)
968 rte_eth_promiscuous_enable(port_id);
969 else if (rte_eth_promiscuous_get(port_id) == 0)
970 rte_eth_promiscuous_disable(port_id);
972 /* replay all multicast configuration */
973 if (rte_eth_allmulticast_get(port_id) == 1)
974 rte_eth_allmulticast_enable(port_id);
975 else if (rte_eth_allmulticast_get(port_id) == 0)
976 rte_eth_allmulticast_disable(port_id);
980 rte_eth_dev_start(uint16_t port_id)
982 struct rte_eth_dev *dev;
985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
987 dev = &rte_eth_devices[port_id];
989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
991 if (dev->data->dev_started != 0) {
992 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
993 " already started\n",
998 diag = (*dev->dev_ops->dev_start)(dev);
1000 dev->data->dev_started = 1;
1004 rte_eth_dev_config_restore(port_id);
1006 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1008 (*dev->dev_ops->link_update)(dev, 0);
1014 rte_eth_dev_stop(uint16_t port_id)
1016 struct rte_eth_dev *dev;
1018 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1019 dev = &rte_eth_devices[port_id];
1021 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1023 if (dev->data->dev_started == 0) {
1024 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1025 " already stopped\n",
1030 dev->data->dev_started = 0;
1031 (*dev->dev_ops->dev_stop)(dev);
1035 rte_eth_dev_set_link_up(uint16_t port_id)
1037 struct rte_eth_dev *dev;
1039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1041 dev = &rte_eth_devices[port_id];
1043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1044 return (*dev->dev_ops->dev_set_link_up)(dev);
1048 rte_eth_dev_set_link_down(uint16_t port_id)
1050 struct rte_eth_dev *dev;
1052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1054 dev = &rte_eth_devices[port_id];
1056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1057 return (*dev->dev_ops->dev_set_link_down)(dev);
1061 rte_eth_dev_close(uint16_t port_id)
1063 struct rte_eth_dev *dev;
1065 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1066 dev = &rte_eth_devices[port_id];
1068 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1069 dev->data->dev_started = 0;
1070 (*dev->dev_ops->dev_close)(dev);
1072 dev->data->nb_rx_queues = 0;
1073 rte_free(dev->data->rx_queues);
1074 dev->data->rx_queues = NULL;
1075 dev->data->nb_tx_queues = 0;
1076 rte_free(dev->data->tx_queues);
1077 dev->data->tx_queues = NULL;
1081 rte_eth_dev_reset(uint16_t port_id)
1083 struct rte_eth_dev *dev;
1086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1087 dev = &rte_eth_devices[port_id];
1089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1091 rte_eth_dev_stop(port_id);
1092 ret = dev->dev_ops->dev_reset(dev);
1098 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1099 uint16_t nb_rx_desc, unsigned int socket_id,
1100 const struct rte_eth_rxconf *rx_conf,
1101 struct rte_mempool *mp)
1104 uint32_t mbp_buf_size;
1105 struct rte_eth_dev *dev;
1106 struct rte_eth_dev_info dev_info;
1107 struct rte_eth_rxconf local_conf;
1110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1112 dev = &rte_eth_devices[port_id];
1113 if (rx_queue_id >= dev->data->nb_rx_queues) {
1114 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1118 if (dev->data->dev_started) {
1119 RTE_PMD_DEBUG_TRACE(
1120 "port %d must be stopped to allow configuration\n", port_id);
1124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1128 * Check the size of the mbuf data buffer.
1129 * This value must be provided in the private data of the memory pool.
1130 * First check that the memory pool has a valid private data.
1132 rte_eth_dev_info_get(port_id, &dev_info);
1133 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1134 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1135 mp->name, (int) mp->private_data_size,
1136 (int) sizeof(struct rte_pktmbuf_pool_private));
1139 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1141 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1142 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1143 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1147 (int)(RTE_PKTMBUF_HEADROOM +
1148 dev_info.min_rx_bufsize),
1149 (int)RTE_PKTMBUF_HEADROOM,
1150 (int)dev_info.min_rx_bufsize);
1154 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1155 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1156 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1158 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1159 "should be: <= %hu, = %hu, and a product of %hu\n",
1161 dev_info.rx_desc_lim.nb_max,
1162 dev_info.rx_desc_lim.nb_min,
1163 dev_info.rx_desc_lim.nb_align);
1167 rxq = dev->data->rx_queues;
1168 if (rxq[rx_queue_id]) {
1169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1171 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1172 rxq[rx_queue_id] = NULL;
1175 if (rx_conf == NULL)
1176 rx_conf = &dev_info.default_rxconf;
1178 local_conf = *rx_conf;
1179 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1181 * Reflect port offloads to queue offloads in order for
1182 * offloads to not be discarded.
1184 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1185 &local_conf.offloads);
1188 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1189 socket_id, &local_conf, mp);
1191 if (!dev->data->min_rx_buf_size ||
1192 dev->data->min_rx_buf_size > mbp_buf_size)
1193 dev->data->min_rx_buf_size = mbp_buf_size;
1200 * A conversion function from txq_flags API.
1203 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1205 uint64_t offloads = 0;
1207 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1208 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1209 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1210 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1211 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1212 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1213 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1214 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1215 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1216 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1217 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1218 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1219 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1221 *tx_offloads = offloads;
1225 * A conversion function from offloads API.
1228 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1232 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1233 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1234 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1235 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1236 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1237 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1238 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1239 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1240 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1241 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1242 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1243 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1249 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1250 uint16_t nb_tx_desc, unsigned int socket_id,
1251 const struct rte_eth_txconf *tx_conf)
1253 struct rte_eth_dev *dev;
1254 struct rte_eth_dev_info dev_info;
1255 struct rte_eth_txconf local_conf;
1258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1260 dev = &rte_eth_devices[port_id];
1261 if (tx_queue_id >= dev->data->nb_tx_queues) {
1262 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1266 if (dev->data->dev_started) {
1267 RTE_PMD_DEBUG_TRACE(
1268 "port %d must be stopped to allow configuration\n", port_id);
1272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1275 rte_eth_dev_info_get(port_id, &dev_info);
1277 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1278 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1279 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1280 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1281 "should be: <= %hu, = %hu, and a product of %hu\n",
1283 dev_info.tx_desc_lim.nb_max,
1284 dev_info.tx_desc_lim.nb_min,
1285 dev_info.tx_desc_lim.nb_align);
1289 txq = dev->data->tx_queues;
1290 if (txq[tx_queue_id]) {
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1293 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1294 txq[tx_queue_id] = NULL;
1297 if (tx_conf == NULL)
1298 tx_conf = &dev_info.default_txconf;
1301 * Convert between the offloads API to enable PMDs to support
1304 local_conf = *tx_conf;
1305 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1306 rte_eth_convert_txq_offloads(tx_conf->offloads,
1307 &local_conf.txq_flags);
1308 /* Keep the ignore flag. */
1309 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1311 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1312 &local_conf.offloads);
1315 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1316 socket_id, &local_conf);
1320 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1321 void *userdata __rte_unused)
1325 for (i = 0; i < unsent; i++)
1326 rte_pktmbuf_free(pkts[i]);
1330 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1333 uint64_t *count = userdata;
1336 for (i = 0; i < unsent; i++)
1337 rte_pktmbuf_free(pkts[i]);
1343 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1344 buffer_tx_error_fn cbfn, void *userdata)
1346 buffer->error_callback = cbfn;
1347 buffer->error_userdata = userdata;
1352 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1359 buffer->size = size;
1360 if (buffer->error_callback == NULL) {
1361 ret = rte_eth_tx_buffer_set_err_callback(
1362 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1369 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1371 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1373 /* Validate Input Data. Bail if not valid or not supported. */
1374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1377 /* Call driver to free pending mbufs. */
1378 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1383 rte_eth_promiscuous_enable(uint16_t port_id)
1385 struct rte_eth_dev *dev;
1387 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1388 dev = &rte_eth_devices[port_id];
1390 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1391 (*dev->dev_ops->promiscuous_enable)(dev);
1392 dev->data->promiscuous = 1;
1396 rte_eth_promiscuous_disable(uint16_t port_id)
1398 struct rte_eth_dev *dev;
1400 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1401 dev = &rte_eth_devices[port_id];
1403 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1404 dev->data->promiscuous = 0;
1405 (*dev->dev_ops->promiscuous_disable)(dev);
1409 rte_eth_promiscuous_get(uint16_t port_id)
1411 struct rte_eth_dev *dev;
1413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1415 dev = &rte_eth_devices[port_id];
1416 return dev->data->promiscuous;
1420 rte_eth_allmulticast_enable(uint16_t port_id)
1422 struct rte_eth_dev *dev;
1424 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1425 dev = &rte_eth_devices[port_id];
1427 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1428 (*dev->dev_ops->allmulticast_enable)(dev);
1429 dev->data->all_multicast = 1;
1433 rte_eth_allmulticast_disable(uint16_t port_id)
1435 struct rte_eth_dev *dev;
1437 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1438 dev = &rte_eth_devices[port_id];
1440 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1441 dev->data->all_multicast = 0;
1442 (*dev->dev_ops->allmulticast_disable)(dev);
1446 rte_eth_allmulticast_get(uint16_t port_id)
1448 struct rte_eth_dev *dev;
1450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1452 dev = &rte_eth_devices[port_id];
1453 return dev->data->all_multicast;
1457 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1458 struct rte_eth_link *link)
1460 struct rte_eth_link *dst = link;
1461 struct rte_eth_link *src = &(dev->data->dev_link);
1463 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1464 *(uint64_t *)src) == 0)
1471 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1473 struct rte_eth_dev *dev;
1475 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1476 dev = &rte_eth_devices[port_id];
1478 if (dev->data->dev_conf.intr_conf.lsc != 0)
1479 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1481 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1482 (*dev->dev_ops->link_update)(dev, 1);
1483 *eth_link = dev->data->dev_link;
1488 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1490 struct rte_eth_dev *dev;
1492 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1493 dev = &rte_eth_devices[port_id];
1495 if (dev->data->dev_conf.intr_conf.lsc != 0)
1496 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1498 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1499 (*dev->dev_ops->link_update)(dev, 0);
1500 *eth_link = dev->data->dev_link;
1505 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1507 struct rte_eth_dev *dev;
1509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1511 dev = &rte_eth_devices[port_id];
1512 memset(stats, 0, sizeof(*stats));
1514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1515 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1516 return (*dev->dev_ops->stats_get)(dev, stats);
1520 rte_eth_stats_reset(uint16_t port_id)
1522 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1528 (*dev->dev_ops->stats_reset)(dev);
1529 dev->data->rx_mbuf_alloc_failed = 0;
1535 get_xstats_basic_count(struct rte_eth_dev *dev)
1537 uint16_t nb_rxqs, nb_txqs;
1540 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1541 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1543 count = RTE_NB_STATS;
1544 count += nb_rxqs * RTE_NB_RXQ_STATS;
1545 count += nb_txqs * RTE_NB_TXQ_STATS;
1551 get_xstats_count(uint16_t port_id)
1553 struct rte_eth_dev *dev;
1556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1557 dev = &rte_eth_devices[port_id];
1558 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1559 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1564 if (dev->dev_ops->xstats_get_names != NULL) {
1565 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1572 count += get_xstats_basic_count(dev);
1578 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1581 int cnt_xstats, idx_xstat;
1583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1586 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1591 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1596 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1597 if (cnt_xstats < 0) {
1598 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1602 /* Get id-name lookup table */
1603 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1605 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1606 port_id, xstats_names, cnt_xstats, NULL)) {
1607 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1611 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1612 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1621 /* retrieve basic stats names */
1623 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1624 struct rte_eth_xstat_name *xstats_names)
1626 int cnt_used_entries = 0;
1627 uint32_t idx, id_queue;
1630 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1631 snprintf(xstats_names[cnt_used_entries].name,
1632 sizeof(xstats_names[0].name),
1633 "%s", rte_stats_strings[idx].name);
1636 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1637 for (id_queue = 0; id_queue < num_q; id_queue++) {
1638 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1639 snprintf(xstats_names[cnt_used_entries].name,
1640 sizeof(xstats_names[0].name),
1642 id_queue, rte_rxq_stats_strings[idx].name);
1647 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1648 for (id_queue = 0; id_queue < num_q; id_queue++) {
1649 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1650 snprintf(xstats_names[cnt_used_entries].name,
1651 sizeof(xstats_names[0].name),
1653 id_queue, rte_txq_stats_strings[idx].name);
1657 return cnt_used_entries;
1660 /* retrieve ethdev extended statistics names */
1662 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1663 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1666 struct rte_eth_xstat_name *xstats_names_copy;
1667 unsigned int no_basic_stat_requested = 1;
1668 unsigned int no_ext_stat_requested = 1;
1669 unsigned int expected_entries;
1670 unsigned int basic_count;
1671 struct rte_eth_dev *dev;
1675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1676 dev = &rte_eth_devices[port_id];
1678 basic_count = get_xstats_basic_count(dev);
1679 ret = get_xstats_count(port_id);
1682 expected_entries = (unsigned int)ret;
1684 /* Return max number of stats if no ids given */
1687 return expected_entries;
1688 else if (xstats_names && size < expected_entries)
1689 return expected_entries;
1692 if (ids && !xstats_names)
1695 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1696 uint64_t ids_copy[size];
1698 for (i = 0; i < size; i++) {
1699 if (ids[i] < basic_count) {
1700 no_basic_stat_requested = 0;
1705 * Convert ids to xstats ids that PMD knows.
1706 * ids known by user are basic + extended stats.
1708 ids_copy[i] = ids[i] - basic_count;
1711 if (no_basic_stat_requested)
1712 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1713 xstats_names, ids_copy, size);
1716 /* Retrieve all stats */
1718 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1720 if (num_stats < 0 || num_stats > (int)expected_entries)
1723 return expected_entries;
1726 xstats_names_copy = calloc(expected_entries,
1727 sizeof(struct rte_eth_xstat_name));
1729 if (!xstats_names_copy) {
1730 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1735 for (i = 0; i < size; i++) {
1736 if (ids[i] > basic_count) {
1737 no_ext_stat_requested = 0;
1743 /* Fill xstats_names_copy structure */
1744 if (ids && no_ext_stat_requested) {
1745 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1747 rte_eth_xstats_get_names(port_id, xstats_names_copy,
1752 for (i = 0; i < size; i++) {
1753 if (ids[i] >= expected_entries) {
1754 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1755 free(xstats_names_copy);
1758 xstats_names[i] = xstats_names_copy[ids[i]];
1761 free(xstats_names_copy);
1766 rte_eth_xstats_get_names(uint16_t port_id,
1767 struct rte_eth_xstat_name *xstats_names,
1770 struct rte_eth_dev *dev;
1771 int cnt_used_entries;
1772 int cnt_expected_entries;
1773 int cnt_driver_entries;
1775 cnt_expected_entries = get_xstats_count(port_id);
1776 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1777 (int)size < cnt_expected_entries)
1778 return cnt_expected_entries;
1780 /* port_id checked in get_xstats_count() */
1781 dev = &rte_eth_devices[port_id];
1783 cnt_used_entries = rte_eth_basic_stats_get_names(
1786 if (dev->dev_ops->xstats_get_names != NULL) {
1787 /* If there are any driver-specific xstats, append them
1790 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1792 xstats_names + cnt_used_entries,
1793 size - cnt_used_entries);
1794 if (cnt_driver_entries < 0)
1795 return cnt_driver_entries;
1796 cnt_used_entries += cnt_driver_entries;
1799 return cnt_used_entries;
1804 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1806 struct rte_eth_dev *dev;
1807 struct rte_eth_stats eth_stats;
1808 unsigned int count = 0, i, q;
1809 uint64_t val, *stats_ptr;
1810 uint16_t nb_rxqs, nb_txqs;
1812 rte_eth_stats_get(port_id, ð_stats);
1813 dev = &rte_eth_devices[port_id];
1815 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1816 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1819 for (i = 0; i < RTE_NB_STATS; i++) {
1820 stats_ptr = RTE_PTR_ADD(ð_stats,
1821 rte_stats_strings[i].offset);
1823 xstats[count++].value = val;
1827 for (q = 0; q < nb_rxqs; q++) {
1828 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1829 stats_ptr = RTE_PTR_ADD(ð_stats,
1830 rte_rxq_stats_strings[i].offset +
1831 q * sizeof(uint64_t));
1833 xstats[count++].value = val;
1838 for (q = 0; q < nb_txqs; q++) {
1839 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1840 stats_ptr = RTE_PTR_ADD(ð_stats,
1841 rte_txq_stats_strings[i].offset +
1842 q * sizeof(uint64_t));
1844 xstats[count++].value = val;
1850 /* retrieve ethdev extended statistics */
1852 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1853 uint64_t *values, unsigned int size)
1855 unsigned int no_basic_stat_requested = 1;
1856 unsigned int no_ext_stat_requested = 1;
1857 unsigned int num_xstats_filled;
1858 unsigned int basic_count;
1859 uint16_t expected_entries;
1860 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1865 expected_entries = get_xstats_count(port_id);
1866 struct rte_eth_xstat xstats[expected_entries];
1867 dev = &rte_eth_devices[port_id];
1868 basic_count = get_xstats_basic_count(dev);
1870 /* Return max number of stats if no ids given */
1873 return expected_entries;
1874 else if (values && size < expected_entries)
1875 return expected_entries;
1881 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1882 unsigned int basic_count = get_xstats_basic_count(dev);
1883 uint64_t ids_copy[size];
1885 for (i = 0; i < size; i++) {
1886 if (ids[i] < basic_count) {
1887 no_basic_stat_requested = 0;
1892 * Convert ids to xstats ids that PMD knows.
1893 * ids known by user are basic + extended stats.
1895 ids_copy[i] = ids[i] - basic_count;
1898 if (no_basic_stat_requested)
1899 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1904 for (i = 0; i < size; i++) {
1905 if (ids[i] > basic_count) {
1906 no_ext_stat_requested = 0;
1912 /* Fill the xstats structure */
1913 if (ids && no_ext_stat_requested)
1914 ret = rte_eth_basic_stats_get(port_id, xstats);
1916 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1920 num_xstats_filled = (unsigned int)ret;
1922 /* Return all stats */
1924 for (i = 0; i < num_xstats_filled; i++)
1925 values[i] = xstats[i].value;
1926 return expected_entries;
1930 for (i = 0; i < size; i++) {
1931 if (ids[i] >= expected_entries) {
1932 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1935 values[i] = xstats[ids[i]].value;
1941 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1944 struct rte_eth_dev *dev;
1945 unsigned int count = 0, i;
1946 signed int xcount = 0;
1947 uint16_t nb_rxqs, nb_txqs;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1951 dev = &rte_eth_devices[port_id];
1953 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1954 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1956 /* Return generic statistics */
1957 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1958 (nb_txqs * RTE_NB_TXQ_STATS);
1960 /* implemented by the driver */
1961 if (dev->dev_ops->xstats_get != NULL) {
1962 /* Retrieve the xstats from the driver at the end of the
1965 xcount = (*dev->dev_ops->xstats_get)(dev,
1966 xstats ? xstats + count : NULL,
1967 (n > count) ? n - count : 0);
1973 if (n < count + xcount || xstats == NULL)
1974 return count + xcount;
1976 /* now fill the xstats structure */
1977 count = rte_eth_basic_stats_get(port_id, xstats);
1979 for (i = 0; i < count; i++)
1981 /* add an offset to driver-specific stats */
1982 for ( ; i < count + xcount; i++)
1983 xstats[i].id += count;
1985 return count + xcount;
1988 /* reset ethdev extended statistics */
1990 rte_eth_xstats_reset(uint16_t port_id)
1992 struct rte_eth_dev *dev;
1994 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1995 dev = &rte_eth_devices[port_id];
1997 /* implemented by the driver */
1998 if (dev->dev_ops->xstats_reset != NULL) {
1999 (*dev->dev_ops->xstats_reset)(dev);
2003 /* fallback to default */
2004 rte_eth_stats_reset(port_id);
2008 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2011 struct rte_eth_dev *dev;
2013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 dev = &rte_eth_devices[port_id];
2017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2018 return (*dev->dev_ops->queue_stats_mapping_set)
2019 (dev, queue_id, stat_idx, is_rx);
2024 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2027 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2033 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2036 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2041 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2043 struct rte_eth_dev *dev;
2045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2046 dev = &rte_eth_devices[port_id];
2048 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2049 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2053 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2055 struct rte_eth_dev *dev;
2056 const struct rte_eth_desc_lim lim = {
2057 .nb_max = UINT16_MAX,
2062 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2063 dev = &rte_eth_devices[port_id];
2065 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2066 dev_info->rx_desc_lim = lim;
2067 dev_info->tx_desc_lim = lim;
2069 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2070 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2071 dev_info->driver_name = dev->device->driver->name;
2072 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2073 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2077 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2078 uint32_t *ptypes, int num)
2081 struct rte_eth_dev *dev;
2082 const uint32_t *all_ptypes;
2084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2085 dev = &rte_eth_devices[port_id];
2086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2087 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2092 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2093 if (all_ptypes[i] & ptype_mask) {
2095 ptypes[j] = all_ptypes[i];
2103 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2105 struct rte_eth_dev *dev;
2107 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2108 dev = &rte_eth_devices[port_id];
2109 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2114 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2116 struct rte_eth_dev *dev;
2118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2120 dev = &rte_eth_devices[port_id];
2121 *mtu = dev->data->mtu;
2126 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2129 struct rte_eth_dev *dev;
2131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2132 dev = &rte_eth_devices[port_id];
2133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2135 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2137 dev->data->mtu = mtu;
2143 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2145 struct rte_eth_dev *dev;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2149 dev = &rte_eth_devices[port_id];
2150 if (!(dev->data->dev_conf.rxmode.offloads &
2151 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2152 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2156 if (vlan_id > 4095) {
2157 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2158 port_id, (unsigned) vlan_id);
2161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2163 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2165 struct rte_vlan_filter_conf *vfc;
2169 vfc = &dev->data->vlan_filter_conf;
2170 vidx = vlan_id / 64;
2171 vbit = vlan_id % 64;
2174 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2176 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2183 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2186 struct rte_eth_dev *dev;
2188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2189 dev = &rte_eth_devices[port_id];
2190 if (rx_queue_id >= dev->data->nb_rx_queues) {
2191 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2196 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2202 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2203 enum rte_vlan_type vlan_type,
2206 struct rte_eth_dev *dev;
2208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2209 dev = &rte_eth_devices[port_id];
2210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2212 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2216 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2218 struct rte_eth_dev *dev;
2222 uint64_t orig_offloads;
2224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2225 dev = &rte_eth_devices[port_id];
2227 /* save original values in case of failure */
2228 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2230 /*check which option changed by application*/
2231 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2232 org = !!(dev->data->dev_conf.rxmode.offloads &
2233 DEV_RX_OFFLOAD_VLAN_STRIP);
2236 dev->data->dev_conf.rxmode.offloads |=
2237 DEV_RX_OFFLOAD_VLAN_STRIP;
2239 dev->data->dev_conf.rxmode.offloads &=
2240 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2241 mask |= ETH_VLAN_STRIP_MASK;
2244 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2245 org = !!(dev->data->dev_conf.rxmode.offloads &
2246 DEV_RX_OFFLOAD_VLAN_FILTER);
2249 dev->data->dev_conf.rxmode.offloads |=
2250 DEV_RX_OFFLOAD_VLAN_FILTER;
2252 dev->data->dev_conf.rxmode.offloads &=
2253 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2254 mask |= ETH_VLAN_FILTER_MASK;
2257 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2258 org = !!(dev->data->dev_conf.rxmode.offloads &
2259 DEV_RX_OFFLOAD_VLAN_EXTEND);
2262 dev->data->dev_conf.rxmode.offloads |=
2263 DEV_RX_OFFLOAD_VLAN_EXTEND;
2265 dev->data->dev_conf.rxmode.offloads &=
2266 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2267 mask |= ETH_VLAN_EXTEND_MASK;
2274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2277 * Convert to the offload bitfield API just in case the underlying PMD
2278 * still supporting it.
2280 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2281 &dev->data->dev_conf.rxmode);
2282 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2284 /* hit an error restore original values */
2285 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2286 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2287 &dev->data->dev_conf.rxmode);
2294 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2296 struct rte_eth_dev *dev;
2299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2300 dev = &rte_eth_devices[port_id];
2302 if (dev->data->dev_conf.rxmode.offloads &
2303 DEV_RX_OFFLOAD_VLAN_STRIP)
2304 ret |= ETH_VLAN_STRIP_OFFLOAD;
2306 if (dev->data->dev_conf.rxmode.offloads &
2307 DEV_RX_OFFLOAD_VLAN_FILTER)
2308 ret |= ETH_VLAN_FILTER_OFFLOAD;
2310 if (dev->data->dev_conf.rxmode.offloads &
2311 DEV_RX_OFFLOAD_VLAN_EXTEND)
2312 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2318 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2320 struct rte_eth_dev *dev;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2323 dev = &rte_eth_devices[port_id];
2324 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2325 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2331 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2333 struct rte_eth_dev *dev;
2335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2336 dev = &rte_eth_devices[port_id];
2337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2338 memset(fc_conf, 0, sizeof(*fc_conf));
2339 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2343 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2345 struct rte_eth_dev *dev;
2347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2348 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2349 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2353 dev = &rte_eth_devices[port_id];
2354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2355 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2359 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2360 struct rte_eth_pfc_conf *pfc_conf)
2362 struct rte_eth_dev *dev;
2364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2365 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2366 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2370 dev = &rte_eth_devices[port_id];
2371 /* High water, low water validation are device specific */
2372 if (*dev->dev_ops->priority_flow_ctrl_set)
2373 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2378 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2386 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2387 for (i = 0; i < num; i++) {
2388 if (reta_conf[i].mask)
2396 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2400 uint16_t i, idx, shift;
2406 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2410 for (i = 0; i < reta_size; i++) {
2411 idx = i / RTE_RETA_GROUP_SIZE;
2412 shift = i % RTE_RETA_GROUP_SIZE;
2413 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2414 (reta_conf[idx].reta[shift] >= max_rxq)) {
2415 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2416 "the maximum rxq index: %u\n", idx, shift,
2417 reta_conf[idx].reta[shift], max_rxq);
2426 rte_eth_dev_rss_reta_update(uint16_t port_id,
2427 struct rte_eth_rss_reta_entry64 *reta_conf,
2430 struct rte_eth_dev *dev;
2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2434 /* Check mask bits */
2435 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2439 dev = &rte_eth_devices[port_id];
2441 /* Check entry value */
2442 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2443 dev->data->nb_rx_queues);
2447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2448 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2452 rte_eth_dev_rss_reta_query(uint16_t port_id,
2453 struct rte_eth_rss_reta_entry64 *reta_conf,
2456 struct rte_eth_dev *dev;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2461 /* Check mask bits */
2462 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2466 dev = &rte_eth_devices[port_id];
2467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2468 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2472 rte_eth_dev_rss_hash_update(uint16_t port_id,
2473 struct rte_eth_rss_conf *rss_conf)
2475 struct rte_eth_dev *dev;
2477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2478 dev = &rte_eth_devices[port_id];
2479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2480 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2484 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2485 struct rte_eth_rss_conf *rss_conf)
2487 struct rte_eth_dev *dev;
2489 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2490 dev = &rte_eth_devices[port_id];
2491 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2492 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2496 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2497 struct rte_eth_udp_tunnel *udp_tunnel)
2499 struct rte_eth_dev *dev;
2501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2502 if (udp_tunnel == NULL) {
2503 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2507 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2508 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2512 dev = &rte_eth_devices[port_id];
2513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2514 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2518 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2519 struct rte_eth_udp_tunnel *udp_tunnel)
2521 struct rte_eth_dev *dev;
2523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2524 dev = &rte_eth_devices[port_id];
2526 if (udp_tunnel == NULL) {
2527 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2531 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2532 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2537 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2541 rte_eth_led_on(uint16_t port_id)
2543 struct rte_eth_dev *dev;
2545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2546 dev = &rte_eth_devices[port_id];
2547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2548 return (*dev->dev_ops->dev_led_on)(dev);
2552 rte_eth_led_off(uint16_t port_id)
2554 struct rte_eth_dev *dev;
2556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2557 dev = &rte_eth_devices[port_id];
2558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2559 return (*dev->dev_ops->dev_led_off)(dev);
2563 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2567 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2569 struct rte_eth_dev_info dev_info;
2570 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2574 rte_eth_dev_info_get(port_id, &dev_info);
2576 for (i = 0; i < dev_info.max_mac_addrs; i++)
2577 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2583 static const struct ether_addr null_mac_addr;
2586 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2589 struct rte_eth_dev *dev;
2594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2595 dev = &rte_eth_devices[port_id];
2596 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2598 if (is_zero_ether_addr(addr)) {
2599 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2603 if (pool >= ETH_64_POOLS) {
2604 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2608 index = get_mac_addr_index(port_id, addr);
2610 index = get_mac_addr_index(port_id, &null_mac_addr);
2612 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2617 pool_mask = dev->data->mac_pool_sel[index];
2619 /* Check if both MAC address and pool is already there, and do nothing */
2620 if (pool_mask & (1ULL << pool))
2625 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2628 /* Update address in NIC data structure */
2629 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2631 /* Update pool bitmap in NIC data structure */
2632 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2639 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2641 struct rte_eth_dev *dev;
2644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2645 dev = &rte_eth_devices[port_id];
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2648 index = get_mac_addr_index(port_id, addr);
2650 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2652 } else if (index < 0)
2653 return 0; /* Do nothing if address wasn't found */
2656 (*dev->dev_ops->mac_addr_remove)(dev, index);
2658 /* Update address in NIC data structure */
2659 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2661 /* reset pool bitmap */
2662 dev->data->mac_pool_sel[index] = 0;
2668 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2670 struct rte_eth_dev *dev;
2672 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2674 if (!is_valid_assigned_ether_addr(addr))
2677 dev = &rte_eth_devices[port_id];
2678 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2680 /* Update default address in NIC data structure */
2681 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2683 (*dev->dev_ops->mac_addr_set)(dev, addr);
2690 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2694 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2696 struct rte_eth_dev_info dev_info;
2697 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2700 rte_eth_dev_info_get(port_id, &dev_info);
2701 if (!dev->data->hash_mac_addrs)
2704 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2705 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2706 ETHER_ADDR_LEN) == 0)
2713 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2718 struct rte_eth_dev *dev;
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2722 dev = &rte_eth_devices[port_id];
2723 if (is_zero_ether_addr(addr)) {
2724 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2729 index = get_hash_mac_addr_index(port_id, addr);
2730 /* Check if it's already there, and do nothing */
2731 if ((index >= 0) && on)
2736 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2737 "set in UTA\n", port_id);
2741 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2743 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2750 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2752 /* Update address in NIC data structure */
2754 ether_addr_copy(addr,
2755 &dev->data->hash_mac_addrs[index]);
2757 ether_addr_copy(&null_mac_addr,
2758 &dev->data->hash_mac_addrs[index]);
2765 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2767 struct rte_eth_dev *dev;
2769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2771 dev = &rte_eth_devices[port_id];
2773 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2774 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2777 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2780 struct rte_eth_dev *dev;
2781 struct rte_eth_dev_info dev_info;
2782 struct rte_eth_link link;
2784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2786 dev = &rte_eth_devices[port_id];
2787 rte_eth_dev_info_get(port_id, &dev_info);
2788 link = dev->data->dev_link;
2790 if (queue_idx > dev_info.max_tx_queues) {
2791 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2792 "invalid queue id=%d\n", port_id, queue_idx);
2796 if (tx_rate > link.link_speed) {
2797 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2798 "bigger than link speed= %d\n",
2799 tx_rate, link.link_speed);
2803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2804 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2808 rte_eth_mirror_rule_set(uint16_t port_id,
2809 struct rte_eth_mirror_conf *mirror_conf,
2810 uint8_t rule_id, uint8_t on)
2812 struct rte_eth_dev *dev;
2814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2815 if (mirror_conf->rule_type == 0) {
2816 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2820 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2821 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2826 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2827 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2828 (mirror_conf->pool_mask == 0)) {
2829 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2833 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2834 mirror_conf->vlan.vlan_mask == 0) {
2835 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2839 dev = &rte_eth_devices[port_id];
2840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2842 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2846 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2848 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2852 dev = &rte_eth_devices[port_id];
2853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2855 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2858 RTE_INIT(eth_dev_init_cb_lists)
2862 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
2863 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
2867 rte_eth_dev_callback_register(uint16_t port_id,
2868 enum rte_eth_event_type event,
2869 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2871 struct rte_eth_dev *dev;
2872 struct rte_eth_dev_callback *user_cb;
2873 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2879 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2880 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2884 if (port_id == RTE_ETH_ALL) {
2886 last_port = RTE_MAX_ETHPORTS - 1;
2888 next_port = last_port = port_id;
2891 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2894 dev = &rte_eth_devices[next_port];
2896 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2897 if (user_cb->cb_fn == cb_fn &&
2898 user_cb->cb_arg == cb_arg &&
2899 user_cb->event == event) {
2904 /* create a new callback. */
2905 if (user_cb == NULL) {
2906 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2907 sizeof(struct rte_eth_dev_callback), 0);
2908 if (user_cb != NULL) {
2909 user_cb->cb_fn = cb_fn;
2910 user_cb->cb_arg = cb_arg;
2911 user_cb->event = event;
2912 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
2915 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2916 rte_eth_dev_callback_unregister(port_id, event,
2922 } while (++next_port <= last_port);
2924 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2929 rte_eth_dev_callback_unregister(uint16_t port_id,
2930 enum rte_eth_event_type event,
2931 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2934 struct rte_eth_dev *dev;
2935 struct rte_eth_dev_callback *cb, *next;
2936 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2942 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2943 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2947 if (port_id == RTE_ETH_ALL) {
2949 last_port = RTE_MAX_ETHPORTS - 1;
2951 next_port = last_port = port_id;
2954 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2957 dev = &rte_eth_devices[next_port];
2959 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
2962 next = TAILQ_NEXT(cb, next);
2964 if (cb->cb_fn != cb_fn || cb->event != event ||
2965 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
2969 * if this callback is not executing right now,
2972 if (cb->active == 0) {
2973 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2979 } while (++next_port <= last_port);
2981 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2986 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2987 enum rte_eth_event_type event, void *ret_param)
2989 struct rte_eth_dev_callback *cb_lst;
2990 struct rte_eth_dev_callback dev_cb;
2993 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2994 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2995 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2999 if (ret_param != NULL)
3000 dev_cb.ret_param = ret_param;
3002 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3003 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3004 dev_cb.cb_arg, dev_cb.ret_param);
3005 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3008 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3013 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3016 struct rte_eth_dev *dev;
3017 struct rte_intr_handle *intr_handle;
3021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3023 dev = &rte_eth_devices[port_id];
3025 if (!dev->intr_handle) {
3026 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3030 intr_handle = dev->intr_handle;
3031 if (!intr_handle->intr_vec) {
3032 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3036 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3037 vec = intr_handle->intr_vec[qid];
3038 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3039 if (rc && rc != -EEXIST) {
3040 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3041 " op %d epfd %d vec %u\n",
3042 port_id, qid, op, epfd, vec);
3049 const struct rte_memzone *
3050 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3051 uint16_t queue_id, size_t size, unsigned align,
3054 char z_name[RTE_MEMZONE_NAMESIZE];
3055 const struct rte_memzone *mz;
3057 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3058 dev->device->driver->name, ring_name,
3059 dev->data->port_id, queue_id);
3061 mz = rte_memzone_lookup(z_name);
3065 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3069 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3070 int epfd, int op, void *data)
3073 struct rte_eth_dev *dev;
3074 struct rte_intr_handle *intr_handle;
3077 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3079 dev = &rte_eth_devices[port_id];
3080 if (queue_id >= dev->data->nb_rx_queues) {
3081 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3085 if (!dev->intr_handle) {
3086 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3090 intr_handle = dev->intr_handle;
3091 if (!intr_handle->intr_vec) {
3092 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3096 vec = intr_handle->intr_vec[queue_id];
3097 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3098 if (rc && rc != -EEXIST) {
3099 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3100 " op %d epfd %d vec %u\n",
3101 port_id, queue_id, op, epfd, vec);
3109 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3112 struct rte_eth_dev *dev;
3114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3116 dev = &rte_eth_devices[port_id];
3118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3119 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3123 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3126 struct rte_eth_dev *dev;
3128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 dev = &rte_eth_devices[port_id];
3132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3133 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3138 rte_eth_dev_filter_supported(uint16_t port_id,
3139 enum rte_filter_type filter_type)
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3145 dev = &rte_eth_devices[port_id];
3146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3147 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3148 RTE_ETH_FILTER_NOP, NULL);
3152 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3153 enum rte_filter_type filter_type,
3154 enum rte_filter_op filter_op, void *arg);
3157 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3158 enum rte_filter_type filter_type,
3159 enum rte_filter_op filter_op, void *arg)
3161 struct rte_eth_fdir_info_v22 {
3162 enum rte_fdir_mode mode;
3163 struct rte_eth_fdir_masks mask;
3164 struct rte_eth_fdir_flex_conf flex_conf;
3165 uint32_t guarant_spc;
3167 uint32_t flow_types_mask[1];
3168 uint32_t max_flexpayload;
3169 uint32_t flex_payload_unit;
3170 uint32_t max_flex_payload_segment_num;
3171 uint16_t flex_payload_limit;
3172 uint32_t flex_bitmask_unit;
3173 uint32_t max_flex_bitmask_num;
3176 struct rte_eth_hash_global_conf_v22 {
3177 enum rte_eth_hash_function hash_func;
3178 uint32_t sym_hash_enable_mask[1];
3179 uint32_t valid_bit_mask[1];
3182 struct rte_eth_hash_filter_info_v22 {
3183 enum rte_eth_hash_filter_info_type info_type;
3186 struct rte_eth_hash_global_conf_v22 global_conf;
3187 struct rte_eth_input_set_conf input_set_conf;
3191 struct rte_eth_dev *dev;
3193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3195 dev = &rte_eth_devices[port_id];
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3197 if (filter_op == RTE_ETH_FILTER_INFO) {
3199 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3200 struct rte_eth_fdir_info fdir_info;
3202 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3204 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3205 filter_op, (void *)&fdir_info);
3206 fdir_info_v22->mode = fdir_info.mode;
3207 fdir_info_v22->mask = fdir_info.mask;
3208 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3209 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3210 fdir_info_v22->best_spc = fdir_info.best_spc;
3211 fdir_info_v22->flow_types_mask[0] =
3212 (uint32_t)fdir_info.flow_types_mask[0];
3213 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3214 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3215 fdir_info_v22->max_flex_payload_segment_num =
3216 fdir_info.max_flex_payload_segment_num;
3217 fdir_info_v22->flex_payload_limit =
3218 fdir_info.flex_payload_limit;
3219 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3220 fdir_info_v22->max_flex_bitmask_num =
3221 fdir_info.max_flex_bitmask_num;
3223 } else if (filter_op == RTE_ETH_FILTER_GET) {
3225 struct rte_eth_hash_filter_info f_info;
3226 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3227 (struct rte_eth_hash_filter_info_v22 *)arg;
3229 f_info.info_type = f_info_v22->info_type;
3230 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3231 filter_op, (void *)&f_info);
3233 switch (f_info_v22->info_type) {
3234 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3235 f_info_v22->info.enable = f_info.info.enable;
3237 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3238 f_info_v22->info.global_conf.hash_func =
3239 f_info.info.global_conf.hash_func;
3240 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3242 f_info.info.global_conf.sym_hash_enable_mask[0];
3243 f_info_v22->info.global_conf.valid_bit_mask[0] =
3245 f_info.info.global_conf.valid_bit_mask[0];
3247 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3248 f_info_v22->info.input_set_conf =
3249 f_info.info.input_set_conf;
3255 } else if (filter_op == RTE_ETH_FILTER_SET) {
3256 struct rte_eth_hash_filter_info f_info;
3257 struct rte_eth_hash_filter_info_v22 *f_v22 =
3258 (struct rte_eth_hash_filter_info_v22 *)arg;
3260 f_info.info_type = f_v22->info_type;
3261 switch (f_v22->info_type) {
3262 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3263 f_info.info.enable = f_v22->info.enable;
3265 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3266 f_info.info.global_conf.hash_func =
3267 f_v22->info.global_conf.hash_func;
3268 f_info.info.global_conf.sym_hash_enable_mask[0] =
3270 f_v22->info.global_conf.sym_hash_enable_mask[0];
3271 f_info.info.global_conf.valid_bit_mask[0] =
3273 f_v22->info.global_conf.valid_bit_mask[0];
3275 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3276 f_info.info.input_set_conf =
3277 f_v22->info.input_set_conf;
3282 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3285 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3288 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3291 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3292 enum rte_filter_type filter_type,
3293 enum rte_filter_op filter_op, void *arg);
3296 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3297 enum rte_filter_type filter_type,
3298 enum rte_filter_op filter_op, void *arg)
3300 struct rte_eth_dev *dev;
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3304 dev = &rte_eth_devices[port_id];
3305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3306 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3308 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3309 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3310 enum rte_filter_type filter_type,
3311 enum rte_filter_op filter_op, void *arg),
3312 rte_eth_dev_filter_ctrl_v1802);
3315 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3316 rte_rx_callback_fn fn, void *user_param)
3318 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3319 rte_errno = ENOTSUP;
3322 /* check input parameters */
3323 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3324 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3328 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3336 cb->param = user_param;
3338 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3339 /* Add the callbacks in fifo order. */
3340 struct rte_eth_rxtx_callback *tail =
3341 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3344 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3351 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3357 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3358 rte_rx_callback_fn fn, void *user_param)
3360 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3361 rte_errno = ENOTSUP;
3364 /* check input parameters */
3365 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3366 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3371 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3379 cb->param = user_param;
3381 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3382 /* Add the callbacks at fisrt position*/
3383 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3385 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3386 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3392 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3393 rte_tx_callback_fn fn, void *user_param)
3395 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3396 rte_errno = ENOTSUP;
3399 /* check input parameters */
3400 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3401 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3406 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3414 cb->param = user_param;
3416 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3417 /* Add the callbacks in fifo order. */
3418 struct rte_eth_rxtx_callback *tail =
3419 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3422 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3429 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3435 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3436 struct rte_eth_rxtx_callback *user_cb)
3438 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3441 /* Check input parameters. */
3442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3443 if (user_cb == NULL ||
3444 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3447 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3448 struct rte_eth_rxtx_callback *cb;
3449 struct rte_eth_rxtx_callback **prev_cb;
3452 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3453 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3454 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3456 if (cb == user_cb) {
3457 /* Remove the user cb from the callback list. */
3458 *prev_cb = cb->next;
3463 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3469 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3470 struct rte_eth_rxtx_callback *user_cb)
3472 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3475 /* Check input parameters. */
3476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3477 if (user_cb == NULL ||
3478 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3481 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3483 struct rte_eth_rxtx_callback *cb;
3484 struct rte_eth_rxtx_callback **prev_cb;
3486 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3487 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3488 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3490 if (cb == user_cb) {
3491 /* Remove the user cb from the callback list. */
3492 *prev_cb = cb->next;
3497 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3503 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3504 struct rte_eth_rxq_info *qinfo)
3506 struct rte_eth_dev *dev;
3508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3513 dev = &rte_eth_devices[port_id];
3514 if (queue_id >= dev->data->nb_rx_queues) {
3515 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3519 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3521 memset(qinfo, 0, sizeof(*qinfo));
3522 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3527 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3528 struct rte_eth_txq_info *qinfo)
3530 struct rte_eth_dev *dev;
3532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3537 dev = &rte_eth_devices[port_id];
3538 if (queue_id >= dev->data->nb_tx_queues) {
3539 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3545 memset(qinfo, 0, sizeof(*qinfo));
3546 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3551 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3552 struct ether_addr *mc_addr_set,
3553 uint32_t nb_mc_addr)
3555 struct rte_eth_dev *dev;
3557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3559 dev = &rte_eth_devices[port_id];
3560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3561 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3565 rte_eth_timesync_enable(uint16_t port_id)
3567 struct rte_eth_dev *dev;
3569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3570 dev = &rte_eth_devices[port_id];
3572 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3573 return (*dev->dev_ops->timesync_enable)(dev);
3577 rte_eth_timesync_disable(uint16_t port_id)
3579 struct rte_eth_dev *dev;
3581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3582 dev = &rte_eth_devices[port_id];
3584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3585 return (*dev->dev_ops->timesync_disable)(dev);
3589 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3592 struct rte_eth_dev *dev;
3594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3595 dev = &rte_eth_devices[port_id];
3597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3598 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3602 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3603 struct timespec *timestamp)
3605 struct rte_eth_dev *dev;
3607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3608 dev = &rte_eth_devices[port_id];
3610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3611 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3615 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3617 struct rte_eth_dev *dev;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3620 dev = &rte_eth_devices[port_id];
3622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3623 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3627 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3629 struct rte_eth_dev *dev;
3631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3632 dev = &rte_eth_devices[port_id];
3634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3635 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3639 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3641 struct rte_eth_dev *dev;
3643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3644 dev = &rte_eth_devices[port_id];
3646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3647 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3651 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3653 struct rte_eth_dev *dev;
3655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3657 dev = &rte_eth_devices[port_id];
3658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3659 return (*dev->dev_ops->get_reg)(dev, info);
3663 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3665 struct rte_eth_dev *dev;
3667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3669 dev = &rte_eth_devices[port_id];
3670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3671 return (*dev->dev_ops->get_eeprom_length)(dev);
3675 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3677 struct rte_eth_dev *dev;
3679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3681 dev = &rte_eth_devices[port_id];
3682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3683 return (*dev->dev_ops->get_eeprom)(dev, info);
3687 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3693 dev = &rte_eth_devices[port_id];
3694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3695 return (*dev->dev_ops->set_eeprom)(dev, info);
3699 rte_eth_dev_get_dcb_info(uint16_t port_id,
3700 struct rte_eth_dcb_info *dcb_info)
3702 struct rte_eth_dev *dev;
3704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3706 dev = &rte_eth_devices[port_id];
3707 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3710 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3714 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3715 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3717 struct rte_eth_dev *dev;
3719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3720 if (l2_tunnel == NULL) {
3721 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3725 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3726 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3730 dev = &rte_eth_devices[port_id];
3731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3733 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3737 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3738 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3742 struct rte_eth_dev *dev;
3744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3746 if (l2_tunnel == NULL) {
3747 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3751 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3752 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3757 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3761 dev = &rte_eth_devices[port_id];
3762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3764 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3768 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3769 const struct rte_eth_desc_lim *desc_lim)
3771 if (desc_lim->nb_align != 0)
3772 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3774 if (desc_lim->nb_max != 0)
3775 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3777 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3781 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3782 uint16_t *nb_rx_desc,
3783 uint16_t *nb_tx_desc)
3785 struct rte_eth_dev *dev;
3786 struct rte_eth_dev_info dev_info;
3788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3790 dev = &rte_eth_devices[port_id];
3791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3793 rte_eth_dev_info_get(port_id, &dev_info);
3795 if (nb_rx_desc != NULL)
3796 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3798 if (nb_tx_desc != NULL)
3799 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3805 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3807 struct rte_eth_dev *dev;
3809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3814 dev = &rte_eth_devices[port_id];
3816 if (*dev->dev_ops->pool_ops_supported == NULL)
3817 return 1; /* all pools are supported */
3819 return (*dev->dev_ops->pool_ops_supported)(dev, pool);