1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_profile.h"
42 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
43 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
44 static struct rte_eth_dev_data *rte_eth_dev_data;
45 static uint8_t eth_dev_last_created_port;
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* store statistics names and its offset in stats structure */
57 struct rte_eth_xstats_name_off {
58 char name[RTE_ETH_XSTATS_NAME_SIZE];
62 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
63 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
64 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
65 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
66 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
67 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
68 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
69 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
73 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
75 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
76 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
77 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
78 {"errors", offsetof(struct rte_eth_stats, q_errors)},
81 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
82 sizeof(rte_rxq_stats_strings[0]))
84 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
85 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
86 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
88 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
89 sizeof(rte_txq_stats_strings[0]))
93 * The user application callback description.
95 * It contains callback address to be registered by user application,
96 * the pointer to the parameters for callback, and the event type.
98 struct rte_eth_dev_callback {
99 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
100 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
101 void *cb_arg; /**< Parameter for callback */
102 void *ret_param; /**< Return parameter */
103 enum rte_eth_event_type event; /**< Interrupt event type */
104 uint32_t active; /**< Callback is executing */
113 rte_eth_find_next(uint16_t port_id)
115 while (port_id < RTE_MAX_ETHPORTS &&
116 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
119 if (port_id >= RTE_MAX_ETHPORTS)
120 return RTE_MAX_ETHPORTS;
126 rte_eth_dev_data_alloc(void)
128 const unsigned flags = 0;
129 const struct rte_memzone *mz;
131 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
132 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
133 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
134 rte_socket_id(), flags);
136 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
138 rte_panic("Cannot allocate memzone for ethernet port data\n");
140 rte_eth_dev_data = mz->addr;
141 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
142 memset(rte_eth_dev_data, 0,
143 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
147 rte_eth_dev_allocated(const char *name)
151 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
152 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
153 strcmp(rte_eth_devices[i].data->name, name) == 0)
154 return &rte_eth_devices[i];
160 rte_eth_dev_find_free_port(void)
164 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
165 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
168 return RTE_MAX_ETHPORTS;
171 static struct rte_eth_dev *
172 eth_dev_get(uint16_t port_id)
174 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
176 eth_dev->data = &rte_eth_dev_data[port_id];
177 eth_dev->state = RTE_ETH_DEV_ATTACHED;
178 TAILQ_INIT(&(eth_dev->link_intr_cbs));
180 eth_dev_last_created_port = port_id;
186 rte_eth_dev_allocate(const char *name)
189 struct rte_eth_dev *eth_dev;
191 port_id = rte_eth_dev_find_free_port();
192 if (port_id == RTE_MAX_ETHPORTS) {
193 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
197 if (rte_eth_dev_data == NULL)
198 rte_eth_dev_data_alloc();
200 if (rte_eth_dev_allocated(name) != NULL) {
201 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
206 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
207 eth_dev = eth_dev_get(port_id);
208 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
209 eth_dev->data->port_id = port_id;
210 eth_dev->data->mtu = ETHER_MTU;
216 * Attach to a port already registered by the primary process, which
217 * makes sure that the same device would have the same port id both
218 * in the primary and secondary process.
221 rte_eth_dev_attach_secondary(const char *name)
224 struct rte_eth_dev *eth_dev;
226 if (rte_eth_dev_data == NULL)
227 rte_eth_dev_data_alloc();
229 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
230 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
233 if (i == RTE_MAX_ETHPORTS) {
235 "device %s is not driven by the primary process\n",
240 eth_dev = eth_dev_get(i);
241 RTE_ASSERT(eth_dev->data->port_id == i);
247 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
252 eth_dev->state = RTE_ETH_DEV_UNUSED;
257 rte_eth_dev_is_valid_port(uint16_t port_id)
259 if (port_id >= RTE_MAX_ETHPORTS ||
260 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
261 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
268 rte_eth_dev_socket_id(uint16_t port_id)
270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
271 return rte_eth_devices[port_id].data->numa_node;
275 rte_eth_dev_get_sec_ctx(uint8_t port_id)
277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
278 return rte_eth_devices[port_id].security_ctx;
282 rte_eth_dev_count(void)
289 RTE_ETH_FOREACH_DEV(p)
296 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
303 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
307 /* shouldn't check 'rte_eth_devices[i].data',
308 * because it might be overwritten by VDEV PMD */
309 tmp = rte_eth_dev_data[port_id].name;
315 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
320 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
324 RTE_ETH_FOREACH_DEV(i) {
326 rte_eth_dev_data[i].name, strlen(name))) {
336 /* attach the new device, then store port_id of the device */
338 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
341 int current = rte_eth_dev_count();
345 if ((devargs == NULL) || (port_id == NULL)) {
350 /* parse devargs, then retrieve device name and args */
351 if (rte_eal_parse_devargs_str(devargs, &name, &args))
354 ret = rte_eal_dev_attach(name, args);
358 /* no point looking at the port count if no port exists */
359 if (!rte_eth_dev_count()) {
360 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
365 /* if nothing happened, there is a bug here, since some driver told us
366 * it did attach a device, but did not create a port.
368 if (current == rte_eth_dev_count()) {
373 *port_id = eth_dev_last_created_port;
382 /* detach the device, then store the name of the device */
384 rte_eth_dev_detach(uint16_t port_id, char *name)
389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
396 dev_flags = rte_eth_devices[port_id].data->dev_flags;
397 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
398 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
404 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
405 "%s", rte_eth_devices[port_id].data->name);
407 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
411 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
419 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
421 uint16_t old_nb_queues = dev->data->nb_rx_queues;
425 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
426 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
427 sizeof(dev->data->rx_queues[0]) * nb_queues,
428 RTE_CACHE_LINE_SIZE);
429 if (dev->data->rx_queues == NULL) {
430 dev->data->nb_rx_queues = 0;
433 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
436 rxq = dev->data->rx_queues;
438 for (i = nb_queues; i < old_nb_queues; i++)
439 (*dev->dev_ops->rx_queue_release)(rxq[i]);
440 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
441 RTE_CACHE_LINE_SIZE);
444 if (nb_queues > old_nb_queues) {
445 uint16_t new_qs = nb_queues - old_nb_queues;
447 memset(rxq + old_nb_queues, 0,
448 sizeof(rxq[0]) * new_qs);
451 dev->data->rx_queues = rxq;
453 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
456 rxq = dev->data->rx_queues;
458 for (i = nb_queues; i < old_nb_queues; i++)
459 (*dev->dev_ops->rx_queue_release)(rxq[i]);
461 rte_free(dev->data->rx_queues);
462 dev->data->rx_queues = NULL;
464 dev->data->nb_rx_queues = nb_queues;
469 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
471 struct rte_eth_dev *dev;
473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
475 dev = &rte_eth_devices[port_id];
476 if (rx_queue_id >= dev->data->nb_rx_queues) {
477 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
483 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
484 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
485 " already started\n",
486 rx_queue_id, port_id);
490 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
495 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
497 struct rte_eth_dev *dev;
499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
501 dev = &rte_eth_devices[port_id];
502 if (rx_queue_id >= dev->data->nb_rx_queues) {
503 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
509 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
510 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
511 " already stopped\n",
512 rx_queue_id, port_id);
516 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
521 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
523 struct rte_eth_dev *dev;
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
527 dev = &rte_eth_devices[port_id];
528 if (tx_queue_id >= dev->data->nb_tx_queues) {
529 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
535 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
536 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
537 " already started\n",
538 tx_queue_id, port_id);
542 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
547 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
549 struct rte_eth_dev *dev;
551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
553 dev = &rte_eth_devices[port_id];
554 if (tx_queue_id >= dev->data->nb_tx_queues) {
555 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
561 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
562 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
563 " already stopped\n",
564 tx_queue_id, port_id);
568 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
573 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
575 uint16_t old_nb_queues = dev->data->nb_tx_queues;
579 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
580 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
581 sizeof(dev->data->tx_queues[0]) * nb_queues,
582 RTE_CACHE_LINE_SIZE);
583 if (dev->data->tx_queues == NULL) {
584 dev->data->nb_tx_queues = 0;
587 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
590 txq = dev->data->tx_queues;
592 for (i = nb_queues; i < old_nb_queues; i++)
593 (*dev->dev_ops->tx_queue_release)(txq[i]);
594 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
595 RTE_CACHE_LINE_SIZE);
598 if (nb_queues > old_nb_queues) {
599 uint16_t new_qs = nb_queues - old_nb_queues;
601 memset(txq + old_nb_queues, 0,
602 sizeof(txq[0]) * new_qs);
605 dev->data->tx_queues = txq;
607 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
610 txq = dev->data->tx_queues;
612 for (i = nb_queues; i < old_nb_queues; i++)
613 (*dev->dev_ops->tx_queue_release)(txq[i]);
615 rte_free(dev->data->tx_queues);
616 dev->data->tx_queues = NULL;
618 dev->data->nb_tx_queues = nb_queues;
623 rte_eth_speed_bitflag(uint32_t speed, int duplex)
626 case ETH_SPEED_NUM_10M:
627 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
628 case ETH_SPEED_NUM_100M:
629 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
630 case ETH_SPEED_NUM_1G:
631 return ETH_LINK_SPEED_1G;
632 case ETH_SPEED_NUM_2_5G:
633 return ETH_LINK_SPEED_2_5G;
634 case ETH_SPEED_NUM_5G:
635 return ETH_LINK_SPEED_5G;
636 case ETH_SPEED_NUM_10G:
637 return ETH_LINK_SPEED_10G;
638 case ETH_SPEED_NUM_20G:
639 return ETH_LINK_SPEED_20G;
640 case ETH_SPEED_NUM_25G:
641 return ETH_LINK_SPEED_25G;
642 case ETH_SPEED_NUM_40G:
643 return ETH_LINK_SPEED_40G;
644 case ETH_SPEED_NUM_50G:
645 return ETH_LINK_SPEED_50G;
646 case ETH_SPEED_NUM_56G:
647 return ETH_LINK_SPEED_56G;
648 case ETH_SPEED_NUM_100G:
649 return ETH_LINK_SPEED_100G;
656 * A conversion function from rxmode bitfield API.
659 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
660 uint64_t *rx_offloads)
662 uint64_t offloads = 0;
664 if (rxmode->header_split == 1)
665 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
666 if (rxmode->hw_ip_checksum == 1)
667 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
668 if (rxmode->hw_vlan_filter == 1)
669 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
670 if (rxmode->hw_vlan_strip == 1)
671 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
672 if (rxmode->hw_vlan_extend == 1)
673 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
674 if (rxmode->jumbo_frame == 1)
675 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
676 if (rxmode->hw_strip_crc == 1)
677 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
678 if (rxmode->enable_scatter == 1)
679 offloads |= DEV_RX_OFFLOAD_SCATTER;
680 if (rxmode->enable_lro == 1)
681 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
682 if (rxmode->hw_timestamp == 1)
683 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
684 if (rxmode->security == 1)
685 offloads |= DEV_RX_OFFLOAD_SECURITY;
687 *rx_offloads = offloads;
691 * A conversion function from rxmode offloads API.
694 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
695 struct rte_eth_rxmode *rxmode)
698 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
699 rxmode->header_split = 1;
701 rxmode->header_split = 0;
702 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
703 rxmode->hw_ip_checksum = 1;
705 rxmode->hw_ip_checksum = 0;
706 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
707 rxmode->hw_vlan_filter = 1;
709 rxmode->hw_vlan_filter = 0;
710 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
711 rxmode->hw_vlan_strip = 1;
713 rxmode->hw_vlan_strip = 0;
714 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
715 rxmode->hw_vlan_extend = 1;
717 rxmode->hw_vlan_extend = 0;
718 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
719 rxmode->jumbo_frame = 1;
721 rxmode->jumbo_frame = 0;
722 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
723 rxmode->hw_strip_crc = 1;
725 rxmode->hw_strip_crc = 0;
726 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
727 rxmode->enable_scatter = 1;
729 rxmode->enable_scatter = 0;
730 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
731 rxmode->enable_lro = 1;
733 rxmode->enable_lro = 0;
734 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
735 rxmode->hw_timestamp = 1;
737 rxmode->hw_timestamp = 0;
738 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
739 rxmode->security = 1;
741 rxmode->security = 0;
745 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
746 const struct rte_eth_conf *dev_conf)
748 struct rte_eth_dev *dev;
749 struct rte_eth_dev_info dev_info;
750 struct rte_eth_conf local_conf = *dev_conf;
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
755 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
757 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
758 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
762 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
764 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
765 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
769 dev = &rte_eth_devices[port_id];
771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
774 if (dev->data->dev_started) {
776 "port %d must be stopped to allow configuration\n", port_id);
781 * Convert between the offloads API to enable PMDs to support
784 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
785 rte_eth_convert_rx_offload_bitfield(
786 &dev_conf->rxmode, &local_conf.rxmode.offloads);
788 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
792 /* Copy the dev_conf parameter into the dev structure */
793 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
796 * Check that the numbers of RX and TX queues are not greater
797 * than the maximum number of RX and TX queues supported by the
800 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
802 if (nb_rx_q == 0 && nb_tx_q == 0) {
803 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
807 if (nb_rx_q > dev_info.max_rx_queues) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
809 port_id, nb_rx_q, dev_info.max_rx_queues);
813 if (nb_tx_q > dev_info.max_tx_queues) {
814 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
815 port_id, nb_tx_q, dev_info.max_tx_queues);
819 /* Check that the device supports requested interrupts */
820 if ((dev_conf->intr_conf.lsc == 1) &&
821 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
822 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
823 dev->device->driver->name);
826 if ((dev_conf->intr_conf.rmv == 1) &&
827 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
828 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
829 dev->device->driver->name);
834 * If jumbo frames are enabled, check that the maximum RX packet
835 * length is supported by the configured device.
837 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
838 if (dev_conf->rxmode.max_rx_pkt_len >
839 dev_info.max_rx_pktlen) {
840 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
841 " > max valid value %u\n",
843 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
844 (unsigned)dev_info.max_rx_pktlen);
846 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
847 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
848 " < min valid value %u\n",
850 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
851 (unsigned)ETHER_MIN_LEN);
855 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
856 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
857 /* Use default value */
858 dev->data->dev_conf.rxmode.max_rx_pkt_len =
863 * Setup new number of RX/TX queues and reconfigure device.
865 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
867 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
872 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
874 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
876 rte_eth_dev_rx_queue_config(dev, 0);
880 diag = (*dev->dev_ops->dev_configure)(dev);
882 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
884 rte_eth_dev_rx_queue_config(dev, 0);
885 rte_eth_dev_tx_queue_config(dev, 0);
889 /* Initialize Rx profiling if enabled at compilation time. */
890 diag = __rte_eth_profile_rx_init(port_id, dev);
892 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
894 rte_eth_dev_rx_queue_config(dev, 0);
895 rte_eth_dev_tx_queue_config(dev, 0);
903 _rte_eth_dev_reset(struct rte_eth_dev *dev)
905 if (dev->data->dev_started) {
907 "port %d must be stopped to allow reset\n",
912 rte_eth_dev_rx_queue_config(dev, 0);
913 rte_eth_dev_tx_queue_config(dev, 0);
915 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
919 rte_eth_dev_config_restore(uint16_t port_id)
921 struct rte_eth_dev *dev;
922 struct rte_eth_dev_info dev_info;
923 struct ether_addr *addr;
928 dev = &rte_eth_devices[port_id];
930 rte_eth_dev_info_get(port_id, &dev_info);
932 /* replay MAC address configuration including default MAC */
933 addr = &dev->data->mac_addrs[0];
934 if (*dev->dev_ops->mac_addr_set != NULL)
935 (*dev->dev_ops->mac_addr_set)(dev, addr);
936 else if (*dev->dev_ops->mac_addr_add != NULL)
937 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
939 if (*dev->dev_ops->mac_addr_add != NULL) {
940 for (i = 1; i < dev_info.max_mac_addrs; i++) {
941 addr = &dev->data->mac_addrs[i];
943 /* skip zero address */
944 if (is_zero_ether_addr(addr))
948 pool_mask = dev->data->mac_pool_sel[i];
951 if (pool_mask & 1ULL)
952 (*dev->dev_ops->mac_addr_add)(dev,
960 /* replay promiscuous configuration */
961 if (rte_eth_promiscuous_get(port_id) == 1)
962 rte_eth_promiscuous_enable(port_id);
963 else if (rte_eth_promiscuous_get(port_id) == 0)
964 rte_eth_promiscuous_disable(port_id);
966 /* replay all multicast configuration */
967 if (rte_eth_allmulticast_get(port_id) == 1)
968 rte_eth_allmulticast_enable(port_id);
969 else if (rte_eth_allmulticast_get(port_id) == 0)
970 rte_eth_allmulticast_disable(port_id);
974 rte_eth_dev_start(uint16_t port_id)
976 struct rte_eth_dev *dev;
979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
981 dev = &rte_eth_devices[port_id];
983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
985 if (dev->data->dev_started != 0) {
986 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
987 " already started\n",
992 diag = (*dev->dev_ops->dev_start)(dev);
994 dev->data->dev_started = 1;
998 rte_eth_dev_config_restore(port_id);
1000 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1002 (*dev->dev_ops->link_update)(dev, 0);
1008 rte_eth_dev_stop(uint16_t port_id)
1010 struct rte_eth_dev *dev;
1012 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1013 dev = &rte_eth_devices[port_id];
1015 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1017 if (dev->data->dev_started == 0) {
1018 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1019 " already stopped\n",
1024 dev->data->dev_started = 0;
1025 (*dev->dev_ops->dev_stop)(dev);
1029 rte_eth_dev_set_link_up(uint16_t port_id)
1031 struct rte_eth_dev *dev;
1033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1035 dev = &rte_eth_devices[port_id];
1037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1038 return (*dev->dev_ops->dev_set_link_up)(dev);
1042 rte_eth_dev_set_link_down(uint16_t port_id)
1044 struct rte_eth_dev *dev;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1048 dev = &rte_eth_devices[port_id];
1050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1051 return (*dev->dev_ops->dev_set_link_down)(dev);
1055 rte_eth_dev_close(uint16_t port_id)
1057 struct rte_eth_dev *dev;
1059 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1060 dev = &rte_eth_devices[port_id];
1062 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1063 dev->data->dev_started = 0;
1064 (*dev->dev_ops->dev_close)(dev);
1066 dev->data->nb_rx_queues = 0;
1067 rte_free(dev->data->rx_queues);
1068 dev->data->rx_queues = NULL;
1069 dev->data->nb_tx_queues = 0;
1070 rte_free(dev->data->tx_queues);
1071 dev->data->tx_queues = NULL;
1075 rte_eth_dev_reset(uint16_t port_id)
1077 struct rte_eth_dev *dev;
1080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1081 dev = &rte_eth_devices[port_id];
1083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1085 rte_eth_dev_stop(port_id);
1086 ret = dev->dev_ops->dev_reset(dev);
1092 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1093 uint16_t nb_rx_desc, unsigned int socket_id,
1094 const struct rte_eth_rxconf *rx_conf,
1095 struct rte_mempool *mp)
1098 uint32_t mbp_buf_size;
1099 struct rte_eth_dev *dev;
1100 struct rte_eth_dev_info dev_info;
1101 struct rte_eth_rxconf local_conf;
1104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1106 dev = &rte_eth_devices[port_id];
1107 if (rx_queue_id >= dev->data->nb_rx_queues) {
1108 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1112 if (dev->data->dev_started) {
1113 RTE_PMD_DEBUG_TRACE(
1114 "port %d must be stopped to allow configuration\n", port_id);
1118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1122 * Check the size of the mbuf data buffer.
1123 * This value must be provided in the private data of the memory pool.
1124 * First check that the memory pool has a valid private data.
1126 rte_eth_dev_info_get(port_id, &dev_info);
1127 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1128 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1129 mp->name, (int) mp->private_data_size,
1130 (int) sizeof(struct rte_pktmbuf_pool_private));
1133 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1135 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1136 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1137 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1141 (int)(RTE_PKTMBUF_HEADROOM +
1142 dev_info.min_rx_bufsize),
1143 (int)RTE_PKTMBUF_HEADROOM,
1144 (int)dev_info.min_rx_bufsize);
1148 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1149 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1150 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1152 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1153 "should be: <= %hu, = %hu, and a product of %hu\n",
1155 dev_info.rx_desc_lim.nb_max,
1156 dev_info.rx_desc_lim.nb_min,
1157 dev_info.rx_desc_lim.nb_align);
1161 rxq = dev->data->rx_queues;
1162 if (rxq[rx_queue_id]) {
1163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1165 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1166 rxq[rx_queue_id] = NULL;
1169 if (rx_conf == NULL)
1170 rx_conf = &dev_info.default_rxconf;
1172 local_conf = *rx_conf;
1173 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1175 * Reflect port offloads to queue offloads in order for
1176 * offloads to not be discarded.
1178 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1179 &local_conf.offloads);
1182 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1183 socket_id, &local_conf, mp);
1185 if (!dev->data->min_rx_buf_size ||
1186 dev->data->min_rx_buf_size > mbp_buf_size)
1187 dev->data->min_rx_buf_size = mbp_buf_size;
1194 * A conversion function from txq_flags API.
1197 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1199 uint64_t offloads = 0;
1201 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1202 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1203 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1204 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1205 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1206 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1207 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1208 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1209 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1210 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1211 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1212 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1213 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1215 *tx_offloads = offloads;
1219 * A conversion function from offloads API.
1222 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1226 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1227 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1228 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1229 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1230 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1231 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1232 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1233 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1234 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1235 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1236 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1237 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1243 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1244 uint16_t nb_tx_desc, unsigned int socket_id,
1245 const struct rte_eth_txconf *tx_conf)
1247 struct rte_eth_dev *dev;
1248 struct rte_eth_dev_info dev_info;
1249 struct rte_eth_txconf local_conf;
1252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1254 dev = &rte_eth_devices[port_id];
1255 if (tx_queue_id >= dev->data->nb_tx_queues) {
1256 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1260 if (dev->data->dev_started) {
1261 RTE_PMD_DEBUG_TRACE(
1262 "port %d must be stopped to allow configuration\n", port_id);
1266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1269 rte_eth_dev_info_get(port_id, &dev_info);
1271 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1272 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1273 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1274 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1275 "should be: <= %hu, = %hu, and a product of %hu\n",
1277 dev_info.tx_desc_lim.nb_max,
1278 dev_info.tx_desc_lim.nb_min,
1279 dev_info.tx_desc_lim.nb_align);
1283 txq = dev->data->tx_queues;
1284 if (txq[tx_queue_id]) {
1285 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1287 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1288 txq[tx_queue_id] = NULL;
1291 if (tx_conf == NULL)
1292 tx_conf = &dev_info.default_txconf;
1295 * Convert between the offloads API to enable PMDs to support
1298 local_conf = *tx_conf;
1299 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1300 rte_eth_convert_txq_offloads(tx_conf->offloads,
1301 &local_conf.txq_flags);
1302 /* Keep the ignore flag. */
1303 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1305 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1306 &local_conf.offloads);
1309 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1310 socket_id, &local_conf);
1314 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1315 void *userdata __rte_unused)
1319 for (i = 0; i < unsent; i++)
1320 rte_pktmbuf_free(pkts[i]);
1324 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1327 uint64_t *count = userdata;
1330 for (i = 0; i < unsent; i++)
1331 rte_pktmbuf_free(pkts[i]);
1337 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1338 buffer_tx_error_fn cbfn, void *userdata)
1340 buffer->error_callback = cbfn;
1341 buffer->error_userdata = userdata;
1346 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1353 buffer->size = size;
1354 if (buffer->error_callback == NULL) {
1355 ret = rte_eth_tx_buffer_set_err_callback(
1356 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1363 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1365 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1367 /* Validate Input Data. Bail if not valid or not supported. */
1368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1371 /* Call driver to free pending mbufs. */
1372 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1377 rte_eth_promiscuous_enable(uint16_t port_id)
1379 struct rte_eth_dev *dev;
1381 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1382 dev = &rte_eth_devices[port_id];
1384 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1385 (*dev->dev_ops->promiscuous_enable)(dev);
1386 dev->data->promiscuous = 1;
1390 rte_eth_promiscuous_disable(uint16_t port_id)
1392 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1395 dev = &rte_eth_devices[port_id];
1397 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1398 dev->data->promiscuous = 0;
1399 (*dev->dev_ops->promiscuous_disable)(dev);
1403 rte_eth_promiscuous_get(uint16_t port_id)
1405 struct rte_eth_dev *dev;
1407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1409 dev = &rte_eth_devices[port_id];
1410 return dev->data->promiscuous;
1414 rte_eth_allmulticast_enable(uint16_t port_id)
1416 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1419 dev = &rte_eth_devices[port_id];
1421 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1422 (*dev->dev_ops->allmulticast_enable)(dev);
1423 dev->data->all_multicast = 1;
1427 rte_eth_allmulticast_disable(uint16_t port_id)
1429 struct rte_eth_dev *dev;
1431 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1432 dev = &rte_eth_devices[port_id];
1434 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1435 dev->data->all_multicast = 0;
1436 (*dev->dev_ops->allmulticast_disable)(dev);
1440 rte_eth_allmulticast_get(uint16_t port_id)
1442 struct rte_eth_dev *dev;
1444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1446 dev = &rte_eth_devices[port_id];
1447 return dev->data->all_multicast;
1451 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1452 struct rte_eth_link *link)
1454 struct rte_eth_link *dst = link;
1455 struct rte_eth_link *src = &(dev->data->dev_link);
1457 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1458 *(uint64_t *)src) == 0)
1465 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1467 struct rte_eth_dev *dev;
1469 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1470 dev = &rte_eth_devices[port_id];
1472 if (dev->data->dev_conf.intr_conf.lsc != 0)
1473 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1475 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1476 (*dev->dev_ops->link_update)(dev, 1);
1477 *eth_link = dev->data->dev_link;
1482 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1484 struct rte_eth_dev *dev;
1486 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1487 dev = &rte_eth_devices[port_id];
1489 if (dev->data->dev_conf.intr_conf.lsc != 0)
1490 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1492 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1493 (*dev->dev_ops->link_update)(dev, 0);
1494 *eth_link = dev->data->dev_link;
1499 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1501 struct rte_eth_dev *dev;
1503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1505 dev = &rte_eth_devices[port_id];
1506 memset(stats, 0, sizeof(*stats));
1508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1509 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1510 return (*dev->dev_ops->stats_get)(dev, stats);
1514 rte_eth_stats_reset(uint16_t port_id)
1516 struct rte_eth_dev *dev;
1518 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1519 dev = &rte_eth_devices[port_id];
1521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1522 (*dev->dev_ops->stats_reset)(dev);
1523 dev->data->rx_mbuf_alloc_failed = 0;
1529 get_xstats_basic_count(struct rte_eth_dev *dev)
1531 uint16_t nb_rxqs, nb_txqs;
1534 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1535 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1537 count = RTE_NB_STATS;
1538 count += nb_rxqs * RTE_NB_RXQ_STATS;
1539 count += nb_txqs * RTE_NB_TXQ_STATS;
1545 get_xstats_count(uint16_t port_id)
1547 struct rte_eth_dev *dev;
1550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1551 dev = &rte_eth_devices[port_id];
1552 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1553 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1558 if (dev->dev_ops->xstats_get_names != NULL) {
1559 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1566 count += get_xstats_basic_count(dev);
1572 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1575 int cnt_xstats, idx_xstat;
1577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1580 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1585 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1590 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1591 if (cnt_xstats < 0) {
1592 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1596 /* Get id-name lookup table */
1597 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1599 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1600 port_id, xstats_names, cnt_xstats, NULL)) {
1601 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1605 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1606 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1615 /* retrieve ethdev extended statistics names */
1617 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1618 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1621 struct rte_eth_xstat_name *xstats_names_copy;
1622 unsigned int no_basic_stat_requested = 1;
1623 unsigned int expected_entries;
1624 struct rte_eth_dev *dev;
1628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1629 dev = &rte_eth_devices[port_id];
1631 ret = get_xstats_count(port_id);
1634 expected_entries = (unsigned int)ret;
1636 /* Return max number of stats if no ids given */
1639 return expected_entries;
1640 else if (xstats_names && size < expected_entries)
1641 return expected_entries;
1644 if (ids && !xstats_names)
1647 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1648 unsigned int basic_count = get_xstats_basic_count(dev);
1649 uint64_t ids_copy[size];
1651 for (i = 0; i < size; i++) {
1652 if (ids[i] < basic_count) {
1653 no_basic_stat_requested = 0;
1658 * Convert ids to xstats ids that PMD knows.
1659 * ids known by user are basic + extended stats.
1661 ids_copy[i] = ids[i] - basic_count;
1664 if (no_basic_stat_requested)
1665 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1666 xstats_names, ids_copy, size);
1669 /* Retrieve all stats */
1671 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1673 if (num_stats < 0 || num_stats > (int)expected_entries)
1676 return expected_entries;
1679 xstats_names_copy = calloc(expected_entries,
1680 sizeof(struct rte_eth_xstat_name));
1682 if (!xstats_names_copy) {
1683 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1687 /* Fill xstats_names_copy structure */
1688 rte_eth_xstats_get_names(port_id, xstats_names_copy, expected_entries);
1691 for (i = 0; i < size; i++) {
1692 if (ids[i] >= expected_entries) {
1693 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1694 free(xstats_names_copy);
1697 xstats_names[i] = xstats_names_copy[ids[i]];
1700 free(xstats_names_copy);
1705 rte_eth_xstats_get_names(uint16_t port_id,
1706 struct rte_eth_xstat_name *xstats_names,
1709 struct rte_eth_dev *dev;
1710 int cnt_used_entries;
1711 int cnt_expected_entries;
1712 int cnt_driver_entries;
1713 uint32_t idx, id_queue;
1716 cnt_expected_entries = get_xstats_count(port_id);
1717 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1718 (int)size < cnt_expected_entries)
1719 return cnt_expected_entries;
1721 /* port_id checked in get_xstats_count() */
1722 dev = &rte_eth_devices[port_id];
1723 cnt_used_entries = 0;
1725 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1726 snprintf(xstats_names[cnt_used_entries].name,
1727 sizeof(xstats_names[0].name),
1728 "%s", rte_stats_strings[idx].name);
1731 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1732 for (id_queue = 0; id_queue < num_q; id_queue++) {
1733 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1734 snprintf(xstats_names[cnt_used_entries].name,
1735 sizeof(xstats_names[0].name),
1737 id_queue, rte_rxq_stats_strings[idx].name);
1742 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1743 for (id_queue = 0; id_queue < num_q; id_queue++) {
1744 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1745 snprintf(xstats_names[cnt_used_entries].name,
1746 sizeof(xstats_names[0].name),
1748 id_queue, rte_txq_stats_strings[idx].name);
1753 if (dev->dev_ops->xstats_get_names != NULL) {
1754 /* If there are any driver-specific xstats, append them
1757 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1759 xstats_names + cnt_used_entries,
1760 size - cnt_used_entries);
1761 if (cnt_driver_entries < 0)
1762 return cnt_driver_entries;
1763 cnt_used_entries += cnt_driver_entries;
1766 return cnt_used_entries;
1769 /* retrieve ethdev extended statistics */
1771 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1772 uint64_t *values, unsigned int size)
1774 unsigned int no_basic_stat_requested = 1;
1775 unsigned int num_xstats_filled;
1776 uint16_t expected_entries;
1777 struct rte_eth_dev *dev;
1781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1782 expected_entries = get_xstats_count(port_id);
1783 struct rte_eth_xstat xstats[expected_entries];
1784 dev = &rte_eth_devices[port_id];
1786 /* Return max number of stats if no ids given */
1789 return expected_entries;
1790 else if (values && size < expected_entries)
1791 return expected_entries;
1797 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1798 unsigned int basic_count = get_xstats_basic_count(dev);
1799 uint64_t ids_copy[size];
1801 for (i = 0; i < size; i++) {
1802 if (ids[i] < basic_count) {
1803 no_basic_stat_requested = 0;
1808 * Convert ids to xstats ids that PMD knows.
1809 * ids known by user are basic + extended stats.
1811 ids_copy[i] = ids[i] - basic_count;
1814 if (no_basic_stat_requested)
1815 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1819 /* Fill the xstats structure */
1820 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1823 num_xstats_filled = (unsigned int)ret;
1825 /* Return all stats */
1827 for (i = 0; i < num_xstats_filled; i++)
1828 values[i] = xstats[i].value;
1829 return expected_entries;
1833 for (i = 0; i < size; i++) {
1834 if (ids[i] >= expected_entries) {
1835 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1838 values[i] = xstats[ids[i]].value;
1844 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1847 struct rte_eth_stats eth_stats;
1848 struct rte_eth_dev *dev;
1849 unsigned int count = 0, i, q;
1850 signed int xcount = 0;
1851 uint64_t val, *stats_ptr;
1852 uint16_t nb_rxqs, nb_txqs;
1854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1856 dev = &rte_eth_devices[port_id];
1858 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1859 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1861 /* Return generic statistics */
1862 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1863 (nb_txqs * RTE_NB_TXQ_STATS);
1865 /* implemented by the driver */
1866 if (dev->dev_ops->xstats_get != NULL) {
1867 /* Retrieve the xstats from the driver at the end of the
1870 xcount = (*dev->dev_ops->xstats_get)(dev,
1871 xstats ? xstats + count : NULL,
1872 (n > count) ? n - count : 0);
1878 if (n < count + xcount || xstats == NULL)
1879 return count + xcount;
1881 /* now fill the xstats structure */
1883 rte_eth_stats_get(port_id, ð_stats);
1886 for (i = 0; i < RTE_NB_STATS; i++) {
1887 stats_ptr = RTE_PTR_ADD(ð_stats,
1888 rte_stats_strings[i].offset);
1890 xstats[count++].value = val;
1894 for (q = 0; q < nb_rxqs; q++) {
1895 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1896 stats_ptr = RTE_PTR_ADD(ð_stats,
1897 rte_rxq_stats_strings[i].offset +
1898 q * sizeof(uint64_t));
1900 xstats[count++].value = val;
1905 for (q = 0; q < nb_txqs; q++) {
1906 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1907 stats_ptr = RTE_PTR_ADD(ð_stats,
1908 rte_txq_stats_strings[i].offset +
1909 q * sizeof(uint64_t));
1911 xstats[count++].value = val;
1915 for (i = 0; i < count; i++)
1917 /* add an offset to driver-specific stats */
1918 for ( ; i < count + xcount; i++)
1919 xstats[i].id += count;
1921 return count + xcount;
1924 /* reset ethdev extended statistics */
1926 rte_eth_xstats_reset(uint16_t port_id)
1928 struct rte_eth_dev *dev;
1930 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1931 dev = &rte_eth_devices[port_id];
1933 /* implemented by the driver */
1934 if (dev->dev_ops->xstats_reset != NULL) {
1935 (*dev->dev_ops->xstats_reset)(dev);
1939 /* fallback to default */
1940 rte_eth_stats_reset(port_id);
1944 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
1947 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1951 dev = &rte_eth_devices[port_id];
1953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1954 return (*dev->dev_ops->queue_stats_mapping_set)
1955 (dev, queue_id, stat_idx, is_rx);
1960 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
1963 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1969 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
1972 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1977 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
1979 struct rte_eth_dev *dev;
1981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1982 dev = &rte_eth_devices[port_id];
1984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1985 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1989 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
1991 struct rte_eth_dev *dev;
1992 const struct rte_eth_desc_lim lim = {
1993 .nb_max = UINT16_MAX,
1998 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1999 dev = &rte_eth_devices[port_id];
2001 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2002 dev_info->rx_desc_lim = lim;
2003 dev_info->tx_desc_lim = lim;
2005 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2006 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2007 dev_info->driver_name = dev->device->driver->name;
2008 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2009 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2013 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2014 uint32_t *ptypes, int num)
2017 struct rte_eth_dev *dev;
2018 const uint32_t *all_ptypes;
2020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2021 dev = &rte_eth_devices[port_id];
2022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2023 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2028 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2029 if (all_ptypes[i] & ptype_mask) {
2031 ptypes[j] = all_ptypes[i];
2039 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2041 struct rte_eth_dev *dev;
2043 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2044 dev = &rte_eth_devices[port_id];
2045 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2050 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2052 struct rte_eth_dev *dev;
2054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2056 dev = &rte_eth_devices[port_id];
2057 *mtu = dev->data->mtu;
2062 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2065 struct rte_eth_dev *dev;
2067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2068 dev = &rte_eth_devices[port_id];
2069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2071 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2073 dev->data->mtu = mtu;
2079 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2081 struct rte_eth_dev *dev;
2084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2085 dev = &rte_eth_devices[port_id];
2086 if (!(dev->data->dev_conf.rxmode.offloads &
2087 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2088 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2092 if (vlan_id > 4095) {
2093 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2094 port_id, (unsigned) vlan_id);
2097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2099 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2101 struct rte_vlan_filter_conf *vfc;
2105 vfc = &dev->data->vlan_filter_conf;
2106 vidx = vlan_id / 64;
2107 vbit = vlan_id % 64;
2110 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2112 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2119 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2122 struct rte_eth_dev *dev;
2124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2125 dev = &rte_eth_devices[port_id];
2126 if (rx_queue_id >= dev->data->nb_rx_queues) {
2127 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2132 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2138 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2139 enum rte_vlan_type vlan_type,
2142 struct rte_eth_dev *dev;
2144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2145 dev = &rte_eth_devices[port_id];
2146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2148 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2152 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2154 struct rte_eth_dev *dev;
2158 uint64_t orig_offloads;
2160 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2161 dev = &rte_eth_devices[port_id];
2163 /* save original values in case of failure */
2164 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2166 /*check which option changed by application*/
2167 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2168 org = !!(dev->data->dev_conf.rxmode.offloads &
2169 DEV_RX_OFFLOAD_VLAN_STRIP);
2172 dev->data->dev_conf.rxmode.offloads |=
2173 DEV_RX_OFFLOAD_VLAN_STRIP;
2175 dev->data->dev_conf.rxmode.offloads &=
2176 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2177 mask |= ETH_VLAN_STRIP_MASK;
2180 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2181 org = !!(dev->data->dev_conf.rxmode.offloads &
2182 DEV_RX_OFFLOAD_VLAN_FILTER);
2185 dev->data->dev_conf.rxmode.offloads |=
2186 DEV_RX_OFFLOAD_VLAN_FILTER;
2188 dev->data->dev_conf.rxmode.offloads &=
2189 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2190 mask |= ETH_VLAN_FILTER_MASK;
2193 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2194 org = !!(dev->data->dev_conf.rxmode.offloads &
2195 DEV_RX_OFFLOAD_VLAN_EXTEND);
2198 dev->data->dev_conf.rxmode.offloads |=
2199 DEV_RX_OFFLOAD_VLAN_EXTEND;
2201 dev->data->dev_conf.rxmode.offloads &=
2202 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2203 mask |= ETH_VLAN_EXTEND_MASK;
2210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2213 * Convert to the offload bitfield API just in case the underlying PMD
2214 * still supporting it.
2216 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2217 &dev->data->dev_conf.rxmode);
2218 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2220 /* hit an error restore original values */
2221 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2222 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2223 &dev->data->dev_conf.rxmode);
2230 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2232 struct rte_eth_dev *dev;
2235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2236 dev = &rte_eth_devices[port_id];
2238 if (dev->data->dev_conf.rxmode.offloads &
2239 DEV_RX_OFFLOAD_VLAN_STRIP)
2240 ret |= ETH_VLAN_STRIP_OFFLOAD;
2242 if (dev->data->dev_conf.rxmode.offloads &
2243 DEV_RX_OFFLOAD_VLAN_FILTER)
2244 ret |= ETH_VLAN_FILTER_OFFLOAD;
2246 if (dev->data->dev_conf.rxmode.offloads &
2247 DEV_RX_OFFLOAD_VLAN_EXTEND)
2248 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2254 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2256 struct rte_eth_dev *dev;
2258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2259 dev = &rte_eth_devices[port_id];
2260 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2261 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2267 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2269 struct rte_eth_dev *dev;
2271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2272 dev = &rte_eth_devices[port_id];
2273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2274 memset(fc_conf, 0, sizeof(*fc_conf));
2275 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2279 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2281 struct rte_eth_dev *dev;
2283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2284 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2285 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2289 dev = &rte_eth_devices[port_id];
2290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2291 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2295 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2296 struct rte_eth_pfc_conf *pfc_conf)
2298 struct rte_eth_dev *dev;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2301 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2302 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2306 dev = &rte_eth_devices[port_id];
2307 /* High water, low water validation are device specific */
2308 if (*dev->dev_ops->priority_flow_ctrl_set)
2309 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2314 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2322 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2323 for (i = 0; i < num; i++) {
2324 if (reta_conf[i].mask)
2332 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2336 uint16_t i, idx, shift;
2342 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2346 for (i = 0; i < reta_size; i++) {
2347 idx = i / RTE_RETA_GROUP_SIZE;
2348 shift = i % RTE_RETA_GROUP_SIZE;
2349 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2350 (reta_conf[idx].reta[shift] >= max_rxq)) {
2351 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2352 "the maximum rxq index: %u\n", idx, shift,
2353 reta_conf[idx].reta[shift], max_rxq);
2362 rte_eth_dev_rss_reta_update(uint16_t port_id,
2363 struct rte_eth_rss_reta_entry64 *reta_conf,
2366 struct rte_eth_dev *dev;
2369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2370 /* Check mask bits */
2371 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2375 dev = &rte_eth_devices[port_id];
2377 /* Check entry value */
2378 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2379 dev->data->nb_rx_queues);
2383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2384 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2388 rte_eth_dev_rss_reta_query(uint16_t port_id,
2389 struct rte_eth_rss_reta_entry64 *reta_conf,
2392 struct rte_eth_dev *dev;
2395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2397 /* Check mask bits */
2398 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2402 dev = &rte_eth_devices[port_id];
2403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2404 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2408 rte_eth_dev_rss_hash_update(uint16_t port_id,
2409 struct rte_eth_rss_conf *rss_conf)
2411 struct rte_eth_dev *dev;
2413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2414 dev = &rte_eth_devices[port_id];
2415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2416 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2420 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2421 struct rte_eth_rss_conf *rss_conf)
2423 struct rte_eth_dev *dev;
2425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2426 dev = &rte_eth_devices[port_id];
2427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2428 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2432 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2433 struct rte_eth_udp_tunnel *udp_tunnel)
2435 struct rte_eth_dev *dev;
2437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2438 if (udp_tunnel == NULL) {
2439 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2443 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2444 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2448 dev = &rte_eth_devices[port_id];
2449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2450 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2454 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2455 struct rte_eth_udp_tunnel *udp_tunnel)
2457 struct rte_eth_dev *dev;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2462 if (udp_tunnel == NULL) {
2463 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2467 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2468 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2473 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2477 rte_eth_led_on(uint16_t port_id)
2479 struct rte_eth_dev *dev;
2481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2482 dev = &rte_eth_devices[port_id];
2483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2484 return (*dev->dev_ops->dev_led_on)(dev);
2488 rte_eth_led_off(uint16_t port_id)
2490 struct rte_eth_dev *dev;
2492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 dev = &rte_eth_devices[port_id];
2494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2495 return (*dev->dev_ops->dev_led_off)(dev);
2499 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2503 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2505 struct rte_eth_dev_info dev_info;
2506 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2510 rte_eth_dev_info_get(port_id, &dev_info);
2512 for (i = 0; i < dev_info.max_mac_addrs; i++)
2513 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2519 static const struct ether_addr null_mac_addr;
2522 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2525 struct rte_eth_dev *dev;
2530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2531 dev = &rte_eth_devices[port_id];
2532 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2534 if (is_zero_ether_addr(addr)) {
2535 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2539 if (pool >= ETH_64_POOLS) {
2540 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2544 index = get_mac_addr_index(port_id, addr);
2546 index = get_mac_addr_index(port_id, &null_mac_addr);
2548 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2553 pool_mask = dev->data->mac_pool_sel[index];
2555 /* Check if both MAC address and pool is already there, and do nothing */
2556 if (pool_mask & (1ULL << pool))
2561 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2564 /* Update address in NIC data structure */
2565 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2567 /* Update pool bitmap in NIC data structure */
2568 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2575 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2577 struct rte_eth_dev *dev;
2580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2581 dev = &rte_eth_devices[port_id];
2582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2584 index = get_mac_addr_index(port_id, addr);
2586 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2588 } else if (index < 0)
2589 return 0; /* Do nothing if address wasn't found */
2592 (*dev->dev_ops->mac_addr_remove)(dev, index);
2594 /* Update address in NIC data structure */
2595 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2597 /* reset pool bitmap */
2598 dev->data->mac_pool_sel[index] = 0;
2604 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2606 struct rte_eth_dev *dev;
2608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2610 if (!is_valid_assigned_ether_addr(addr))
2613 dev = &rte_eth_devices[port_id];
2614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2616 /* Update default address in NIC data structure */
2617 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2619 (*dev->dev_ops->mac_addr_set)(dev, addr);
2626 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2630 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2632 struct rte_eth_dev_info dev_info;
2633 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2636 rte_eth_dev_info_get(port_id, &dev_info);
2637 if (!dev->data->hash_mac_addrs)
2640 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2641 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2642 ETHER_ADDR_LEN) == 0)
2649 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2658 dev = &rte_eth_devices[port_id];
2659 if (is_zero_ether_addr(addr)) {
2660 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2665 index = get_hash_mac_addr_index(port_id, addr);
2666 /* Check if it's already there, and do nothing */
2667 if ((index >= 0) && (on))
2672 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2673 "set in UTA\n", port_id);
2677 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2679 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2686 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2688 /* Update address in NIC data structure */
2690 ether_addr_copy(addr,
2691 &dev->data->hash_mac_addrs[index]);
2693 ether_addr_copy(&null_mac_addr,
2694 &dev->data->hash_mac_addrs[index]);
2701 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2703 struct rte_eth_dev *dev;
2705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2707 dev = &rte_eth_devices[port_id];
2709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2710 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2713 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2716 struct rte_eth_dev *dev;
2717 struct rte_eth_dev_info dev_info;
2718 struct rte_eth_link link;
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2722 dev = &rte_eth_devices[port_id];
2723 rte_eth_dev_info_get(port_id, &dev_info);
2724 link = dev->data->dev_link;
2726 if (queue_idx > dev_info.max_tx_queues) {
2727 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2728 "invalid queue id=%d\n", port_id, queue_idx);
2732 if (tx_rate > link.link_speed) {
2733 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2734 "bigger than link speed= %d\n",
2735 tx_rate, link.link_speed);
2739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2740 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2744 rte_eth_mirror_rule_set(uint16_t port_id,
2745 struct rte_eth_mirror_conf *mirror_conf,
2746 uint8_t rule_id, uint8_t on)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 if (mirror_conf->rule_type == 0) {
2752 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2756 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2757 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2762 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2763 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2764 (mirror_conf->pool_mask == 0)) {
2765 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2769 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2770 mirror_conf->vlan.vlan_mask == 0) {
2771 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2775 dev = &rte_eth_devices[port_id];
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2778 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2782 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2784 struct rte_eth_dev *dev;
2786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2788 dev = &rte_eth_devices[port_id];
2789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2791 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2795 rte_eth_dev_callback_register(uint16_t port_id,
2796 enum rte_eth_event_type event,
2797 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2799 struct rte_eth_dev *dev;
2800 struct rte_eth_dev_callback *user_cb;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2807 dev = &rte_eth_devices[port_id];
2808 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2810 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2811 if (user_cb->cb_fn == cb_fn &&
2812 user_cb->cb_arg == cb_arg &&
2813 user_cb->event == event) {
2818 /* create a new callback. */
2819 if (user_cb == NULL) {
2820 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2821 sizeof(struct rte_eth_dev_callback), 0);
2822 if (user_cb != NULL) {
2823 user_cb->cb_fn = cb_fn;
2824 user_cb->cb_arg = cb_arg;
2825 user_cb->event = event;
2826 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2830 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2831 return (user_cb == NULL) ? -ENOMEM : 0;
2835 rte_eth_dev_callback_unregister(uint16_t port_id,
2836 enum rte_eth_event_type event,
2837 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2840 struct rte_eth_dev *dev;
2841 struct rte_eth_dev_callback *cb, *next;
2846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2848 dev = &rte_eth_devices[port_id];
2849 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2852 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2854 next = TAILQ_NEXT(cb, next);
2856 if (cb->cb_fn != cb_fn || cb->event != event ||
2857 (cb->cb_arg != (void *)-1 &&
2858 cb->cb_arg != cb_arg))
2862 * if this callback is not executing right now,
2865 if (cb->active == 0) {
2866 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2873 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2878 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2879 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2881 struct rte_eth_dev_callback *cb_lst;
2882 struct rte_eth_dev_callback dev_cb;
2885 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2886 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2887 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2892 dev_cb.cb_arg = cb_arg;
2893 if (ret_param != NULL)
2894 dev_cb.ret_param = ret_param;
2896 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2897 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2898 dev_cb.cb_arg, dev_cb.ret_param);
2899 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2902 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2907 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2910 struct rte_eth_dev *dev;
2911 struct rte_intr_handle *intr_handle;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 dev = &rte_eth_devices[port_id];
2919 if (!dev->intr_handle) {
2920 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2924 intr_handle = dev->intr_handle;
2925 if (!intr_handle->intr_vec) {
2926 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2930 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2931 vec = intr_handle->intr_vec[qid];
2932 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2933 if (rc && rc != -EEXIST) {
2934 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2935 " op %d epfd %d vec %u\n",
2936 port_id, qid, op, epfd, vec);
2943 const struct rte_memzone *
2944 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2945 uint16_t queue_id, size_t size, unsigned align,
2948 char z_name[RTE_MEMZONE_NAMESIZE];
2949 const struct rte_memzone *mz;
2951 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2952 dev->device->driver->name, ring_name,
2953 dev->data->port_id, queue_id);
2955 mz = rte_memzone_lookup(z_name);
2959 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
2963 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
2964 int epfd, int op, void *data)
2967 struct rte_eth_dev *dev;
2968 struct rte_intr_handle *intr_handle;
2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2973 dev = &rte_eth_devices[port_id];
2974 if (queue_id >= dev->data->nb_rx_queues) {
2975 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2979 if (!dev->intr_handle) {
2980 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2984 intr_handle = dev->intr_handle;
2985 if (!intr_handle->intr_vec) {
2986 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2990 vec = intr_handle->intr_vec[queue_id];
2991 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2992 if (rc && rc != -EEXIST) {
2993 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2994 " op %d epfd %d vec %u\n",
2995 port_id, queue_id, op, epfd, vec);
3003 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3006 struct rte_eth_dev *dev;
3008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3010 dev = &rte_eth_devices[port_id];
3012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3013 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3017 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3020 struct rte_eth_dev *dev;
3022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3024 dev = &rte_eth_devices[port_id];
3026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3027 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3032 rte_eth_dev_filter_supported(uint16_t port_id,
3033 enum rte_filter_type filter_type)
3035 struct rte_eth_dev *dev;
3037 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3039 dev = &rte_eth_devices[port_id];
3040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3041 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3042 RTE_ETH_FILTER_NOP, NULL);
3046 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3047 enum rte_filter_op filter_op, void *arg)
3049 struct rte_eth_dev *dev;
3051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 dev = &rte_eth_devices[port_id];
3054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3055 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3059 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3060 rte_rx_callback_fn fn, void *user_param)
3062 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3063 rte_errno = ENOTSUP;
3066 /* check input parameters */
3067 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3068 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3072 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3080 cb->param = user_param;
3082 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3083 /* Add the callbacks in fifo order. */
3084 struct rte_eth_rxtx_callback *tail =
3085 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3088 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3095 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3101 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3102 rte_rx_callback_fn fn, void *user_param)
3104 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3105 rte_errno = ENOTSUP;
3108 /* check input parameters */
3109 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3110 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3115 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3123 cb->param = user_param;
3125 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3126 /* Add the callbacks at fisrt position*/
3127 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3129 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3130 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3136 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3137 rte_tx_callback_fn fn, void *user_param)
3139 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3140 rte_errno = ENOTSUP;
3143 /* check input parameters */
3144 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3145 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3150 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3158 cb->param = user_param;
3160 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3161 /* Add the callbacks in fifo order. */
3162 struct rte_eth_rxtx_callback *tail =
3163 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3166 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3173 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3179 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3180 struct rte_eth_rxtx_callback *user_cb)
3182 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3185 /* Check input parameters. */
3186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3187 if (user_cb == NULL ||
3188 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3191 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3192 struct rte_eth_rxtx_callback *cb;
3193 struct rte_eth_rxtx_callback **prev_cb;
3196 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3197 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3198 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3200 if (cb == user_cb) {
3201 /* Remove the user cb from the callback list. */
3202 *prev_cb = cb->next;
3207 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3213 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3214 struct rte_eth_rxtx_callback *user_cb)
3216 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3219 /* Check input parameters. */
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3221 if (user_cb == NULL ||
3222 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3225 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3227 struct rte_eth_rxtx_callback *cb;
3228 struct rte_eth_rxtx_callback **prev_cb;
3230 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3231 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3232 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3234 if (cb == user_cb) {
3235 /* Remove the user cb from the callback list. */
3236 *prev_cb = cb->next;
3241 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3247 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3248 struct rte_eth_rxq_info *qinfo)
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3257 dev = &rte_eth_devices[port_id];
3258 if (queue_id >= dev->data->nb_rx_queues) {
3259 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3265 memset(qinfo, 0, sizeof(*qinfo));
3266 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3271 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3272 struct rte_eth_txq_info *qinfo)
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3281 dev = &rte_eth_devices[port_id];
3282 if (queue_id >= dev->data->nb_tx_queues) {
3283 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3289 memset(qinfo, 0, sizeof(*qinfo));
3290 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3295 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3296 struct ether_addr *mc_addr_set,
3297 uint32_t nb_mc_addr)
3299 struct rte_eth_dev *dev;
3301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 dev = &rte_eth_devices[port_id];
3304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3305 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3309 rte_eth_timesync_enable(uint16_t port_id)
3311 struct rte_eth_dev *dev;
3313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3314 dev = &rte_eth_devices[port_id];
3316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3317 return (*dev->dev_ops->timesync_enable)(dev);
3321 rte_eth_timesync_disable(uint16_t port_id)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3326 dev = &rte_eth_devices[port_id];
3328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3329 return (*dev->dev_ops->timesync_disable)(dev);
3333 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3336 struct rte_eth_dev *dev;
3338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3339 dev = &rte_eth_devices[port_id];
3341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3342 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3346 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3347 struct timespec *timestamp)
3349 struct rte_eth_dev *dev;
3351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3352 dev = &rte_eth_devices[port_id];
3354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3355 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3359 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3361 struct rte_eth_dev *dev;
3363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3364 dev = &rte_eth_devices[port_id];
3366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3367 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3371 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3373 struct rte_eth_dev *dev;
3375 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3376 dev = &rte_eth_devices[port_id];
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3379 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3383 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3385 struct rte_eth_dev *dev;
3387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3388 dev = &rte_eth_devices[port_id];
3390 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3391 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3395 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3397 struct rte_eth_dev *dev;
3399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3401 dev = &rte_eth_devices[port_id];
3402 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3403 return (*dev->dev_ops->get_reg)(dev, info);
3407 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3409 struct rte_eth_dev *dev;
3411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3413 dev = &rte_eth_devices[port_id];
3414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3415 return (*dev->dev_ops->get_eeprom_length)(dev);
3419 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3421 struct rte_eth_dev *dev;
3423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3425 dev = &rte_eth_devices[port_id];
3426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3427 return (*dev->dev_ops->get_eeprom)(dev, info);
3431 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3433 struct rte_eth_dev *dev;
3435 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3437 dev = &rte_eth_devices[port_id];
3438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3439 return (*dev->dev_ops->set_eeprom)(dev, info);
3443 rte_eth_dev_get_dcb_info(uint16_t port_id,
3444 struct rte_eth_dcb_info *dcb_info)
3446 struct rte_eth_dev *dev;
3448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3450 dev = &rte_eth_devices[port_id];
3451 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3454 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3458 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3459 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3461 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 if (l2_tunnel == NULL) {
3465 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3469 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3470 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3474 dev = &rte_eth_devices[port_id];
3475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3477 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3481 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3482 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3486 struct rte_eth_dev *dev;
3488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3490 if (l2_tunnel == NULL) {
3491 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3495 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3496 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3501 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3505 dev = &rte_eth_devices[port_id];
3506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3508 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3512 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3513 const struct rte_eth_desc_lim *desc_lim)
3515 if (desc_lim->nb_align != 0)
3516 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3518 if (desc_lim->nb_max != 0)
3519 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3521 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3525 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3526 uint16_t *nb_rx_desc,
3527 uint16_t *nb_tx_desc)
3529 struct rte_eth_dev *dev;
3530 struct rte_eth_dev_info dev_info;
3532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3534 dev = &rte_eth_devices[port_id];
3535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3537 rte_eth_dev_info_get(port_id, &dev_info);
3539 if (nb_rx_desc != NULL)
3540 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3542 if (nb_tx_desc != NULL)
3543 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3549 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3551 struct rte_eth_dev *dev;
3553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3558 dev = &rte_eth_devices[port_id];
3560 if (*dev->dev_ops->pool_ops_supported == NULL)
3561 return 1; /* all pools are supported */
3563 return (*dev->dev_ops->pool_ops_supported)(dev, pool);