1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "ethdev_profile.h"
43 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
44 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 static struct rte_eth_dev_data *rte_eth_dev_data;
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* store statistics names and its offset in stats structure */
58 struct rte_eth_xstats_name_off {
59 char name[RTE_ETH_XSTATS_NAME_SIZE];
63 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
64 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
65 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
66 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
67 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
68 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
69 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
70 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
71 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
75 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
77 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
78 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
79 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
80 {"errors", offsetof(struct rte_eth_stats, q_errors)},
83 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
84 sizeof(rte_rxq_stats_strings[0]))
86 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
90 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
91 sizeof(rte_txq_stats_strings[0]))
93 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
94 { DEV_RX_OFFLOAD_##_name, #_name }
99 } rte_rx_offload_names[] = {
100 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
101 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
102 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
103 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
104 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
105 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
106 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
107 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
108 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
109 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
111 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
112 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
114 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
115 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
118 #undef RTE_RX_OFFLOAD_BIT2STR
120 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
121 { DEV_TX_OFFLOAD_##_name, #_name }
123 static const struct {
126 } rte_tx_offload_names[] = {
127 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
128 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
129 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
130 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
131 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
133 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
134 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
135 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
136 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
137 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
138 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
139 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
140 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
141 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
142 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
143 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
144 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
147 #undef RTE_TX_OFFLOAD_BIT2STR
150 * The user application callback description.
152 * It contains callback address to be registered by user application,
153 * the pointer to the parameters for callback, and the event type.
155 struct rte_eth_dev_callback {
156 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
157 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
158 void *cb_arg; /**< Parameter for callback */
159 void *ret_param; /**< Return parameter */
160 enum rte_eth_event_type event; /**< Interrupt event type */
161 uint32_t active; /**< Callback is executing */
170 rte_eth_find_next(uint16_t port_id)
172 while (port_id < RTE_MAX_ETHPORTS &&
173 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
176 if (port_id >= RTE_MAX_ETHPORTS)
177 return RTE_MAX_ETHPORTS;
183 rte_eth_dev_data_alloc(void)
185 const unsigned flags = 0;
186 const struct rte_memzone *mz;
188 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
189 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
190 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
191 rte_socket_id(), flags);
193 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
195 rte_panic("Cannot allocate memzone for ethernet port data\n");
197 rte_eth_dev_data = mz->addr;
198 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
199 memset(rte_eth_dev_data, 0,
200 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
204 rte_eth_dev_allocated(const char *name)
208 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
209 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
210 strcmp(rte_eth_devices[i].data->name, name) == 0)
211 return &rte_eth_devices[i];
217 rte_eth_dev_find_free_port(void)
221 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
222 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
225 return RTE_MAX_ETHPORTS;
228 static struct rte_eth_dev *
229 eth_dev_get(uint16_t port_id)
231 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
233 eth_dev->data = &rte_eth_dev_data[port_id];
234 eth_dev->state = RTE_ETH_DEV_ATTACHED;
236 eth_dev_last_created_port = port_id;
242 rte_eth_dev_allocate(const char *name)
245 struct rte_eth_dev *eth_dev;
247 port_id = rte_eth_dev_find_free_port();
248 if (port_id == RTE_MAX_ETHPORTS) {
249 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
253 if (rte_eth_dev_data == NULL)
254 rte_eth_dev_data_alloc();
256 if (rte_eth_dev_allocated(name) != NULL) {
257 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
262 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
263 eth_dev = eth_dev_get(port_id);
264 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
265 eth_dev->data->port_id = port_id;
266 eth_dev->data->mtu = ETHER_MTU;
268 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
274 * Attach to a port already registered by the primary process, which
275 * makes sure that the same device would have the same port id both
276 * in the primary and secondary process.
279 rte_eth_dev_attach_secondary(const char *name)
282 struct rte_eth_dev *eth_dev;
284 if (rte_eth_dev_data == NULL)
285 rte_eth_dev_data_alloc();
287 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
288 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
291 if (i == RTE_MAX_ETHPORTS) {
293 "device %s is not driven by the primary process\n",
298 eth_dev = eth_dev_get(i);
299 RTE_ASSERT(eth_dev->data->port_id == i);
305 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
310 eth_dev->state = RTE_ETH_DEV_UNUSED;
312 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
318 rte_eth_dev_is_valid_port(uint16_t port_id)
320 if (port_id >= RTE_MAX_ETHPORTS ||
321 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
322 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
329 rte_eth_dev_socket_id(uint16_t port_id)
331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
332 return rte_eth_devices[port_id].data->numa_node;
336 rte_eth_dev_get_sec_ctx(uint8_t port_id)
338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
339 return rte_eth_devices[port_id].security_ctx;
343 rte_eth_dev_count(void)
350 RTE_ETH_FOREACH_DEV(p)
357 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
364 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
368 /* shouldn't check 'rte_eth_devices[i].data',
369 * because it might be overwritten by VDEV PMD */
370 tmp = rte_eth_dev_data[port_id].name;
376 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
381 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
385 RTE_ETH_FOREACH_DEV(i) {
387 rte_eth_dev_data[i].name, strlen(name))) {
397 /* attach the new device, then store port_id of the device */
399 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
402 int current = rte_eth_dev_count();
406 if ((devargs == NULL) || (port_id == NULL)) {
411 /* parse devargs, then retrieve device name and args */
412 if (rte_eal_parse_devargs_str(devargs, &name, &args))
415 ret = rte_eal_dev_attach(name, args);
419 /* no point looking at the port count if no port exists */
420 if (!rte_eth_dev_count()) {
421 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
426 /* if nothing happened, there is a bug here, since some driver told us
427 * it did attach a device, but did not create a port.
429 if (current == rte_eth_dev_count()) {
434 *port_id = eth_dev_last_created_port;
443 /* detach the device, then store the name of the device */
445 rte_eth_dev_detach(uint16_t port_id, char *name)
450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
457 dev_flags = rte_eth_devices[port_id].data->dev_flags;
458 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
459 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
465 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
466 "%s", rte_eth_devices[port_id].data->name);
468 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
472 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
480 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
482 uint16_t old_nb_queues = dev->data->nb_rx_queues;
486 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
487 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
488 sizeof(dev->data->rx_queues[0]) * nb_queues,
489 RTE_CACHE_LINE_SIZE);
490 if (dev->data->rx_queues == NULL) {
491 dev->data->nb_rx_queues = 0;
494 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
497 rxq = dev->data->rx_queues;
499 for (i = nb_queues; i < old_nb_queues; i++)
500 (*dev->dev_ops->rx_queue_release)(rxq[i]);
501 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
502 RTE_CACHE_LINE_SIZE);
505 if (nb_queues > old_nb_queues) {
506 uint16_t new_qs = nb_queues - old_nb_queues;
508 memset(rxq + old_nb_queues, 0,
509 sizeof(rxq[0]) * new_qs);
512 dev->data->rx_queues = rxq;
514 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
517 rxq = dev->data->rx_queues;
519 for (i = nb_queues; i < old_nb_queues; i++)
520 (*dev->dev_ops->rx_queue_release)(rxq[i]);
522 rte_free(dev->data->rx_queues);
523 dev->data->rx_queues = NULL;
525 dev->data->nb_rx_queues = nb_queues;
530 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already started\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
556 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (rx_queue_id >= dev->data->nb_rx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
570 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already stopped\n",
573 rx_queue_id, port_id);
577 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
582 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already started\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
610 struct rte_eth_dev *dev;
612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
614 dev = &rte_eth_devices[port_id];
615 if (tx_queue_id >= dev->data->nb_tx_queues) {
616 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
622 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
623 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
624 " already stopped\n",
625 tx_queue_id, port_id);
629 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
634 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
636 uint16_t old_nb_queues = dev->data->nb_tx_queues;
640 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
641 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
642 sizeof(dev->data->tx_queues[0]) * nb_queues,
643 RTE_CACHE_LINE_SIZE);
644 if (dev->data->tx_queues == NULL) {
645 dev->data->nb_tx_queues = 0;
648 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
651 txq = dev->data->tx_queues;
653 for (i = nb_queues; i < old_nb_queues; i++)
654 (*dev->dev_ops->tx_queue_release)(txq[i]);
655 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
656 RTE_CACHE_LINE_SIZE);
659 if (nb_queues > old_nb_queues) {
660 uint16_t new_qs = nb_queues - old_nb_queues;
662 memset(txq + old_nb_queues, 0,
663 sizeof(txq[0]) * new_qs);
666 dev->data->tx_queues = txq;
668 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
669 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
671 txq = dev->data->tx_queues;
673 for (i = nb_queues; i < old_nb_queues; i++)
674 (*dev->dev_ops->tx_queue_release)(txq[i]);
676 rte_free(dev->data->tx_queues);
677 dev->data->tx_queues = NULL;
679 dev->data->nb_tx_queues = nb_queues;
684 rte_eth_speed_bitflag(uint32_t speed, int duplex)
687 case ETH_SPEED_NUM_10M:
688 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
689 case ETH_SPEED_NUM_100M:
690 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
691 case ETH_SPEED_NUM_1G:
692 return ETH_LINK_SPEED_1G;
693 case ETH_SPEED_NUM_2_5G:
694 return ETH_LINK_SPEED_2_5G;
695 case ETH_SPEED_NUM_5G:
696 return ETH_LINK_SPEED_5G;
697 case ETH_SPEED_NUM_10G:
698 return ETH_LINK_SPEED_10G;
699 case ETH_SPEED_NUM_20G:
700 return ETH_LINK_SPEED_20G;
701 case ETH_SPEED_NUM_25G:
702 return ETH_LINK_SPEED_25G;
703 case ETH_SPEED_NUM_40G:
704 return ETH_LINK_SPEED_40G;
705 case ETH_SPEED_NUM_50G:
706 return ETH_LINK_SPEED_50G;
707 case ETH_SPEED_NUM_56G:
708 return ETH_LINK_SPEED_56G;
709 case ETH_SPEED_NUM_100G:
710 return ETH_LINK_SPEED_100G;
717 * A conversion function from rxmode bitfield API.
720 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
721 uint64_t *rx_offloads)
723 uint64_t offloads = 0;
725 if (rxmode->header_split == 1)
726 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
727 if (rxmode->hw_ip_checksum == 1)
728 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
729 if (rxmode->hw_vlan_filter == 1)
730 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
731 if (rxmode->hw_vlan_strip == 1)
732 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
733 if (rxmode->hw_vlan_extend == 1)
734 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
735 if (rxmode->jumbo_frame == 1)
736 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
737 if (rxmode->hw_strip_crc == 1)
738 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
739 if (rxmode->enable_scatter == 1)
740 offloads |= DEV_RX_OFFLOAD_SCATTER;
741 if (rxmode->enable_lro == 1)
742 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
743 if (rxmode->hw_timestamp == 1)
744 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
745 if (rxmode->security == 1)
746 offloads |= DEV_RX_OFFLOAD_SECURITY;
748 *rx_offloads = offloads;
752 * A conversion function from rxmode offloads API.
755 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
756 struct rte_eth_rxmode *rxmode)
759 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
760 rxmode->header_split = 1;
762 rxmode->header_split = 0;
763 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
764 rxmode->hw_ip_checksum = 1;
766 rxmode->hw_ip_checksum = 0;
767 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
768 rxmode->hw_vlan_filter = 1;
770 rxmode->hw_vlan_filter = 0;
771 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
772 rxmode->hw_vlan_strip = 1;
774 rxmode->hw_vlan_strip = 0;
775 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
776 rxmode->hw_vlan_extend = 1;
778 rxmode->hw_vlan_extend = 0;
779 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
780 rxmode->jumbo_frame = 1;
782 rxmode->jumbo_frame = 0;
783 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
784 rxmode->hw_strip_crc = 1;
786 rxmode->hw_strip_crc = 0;
787 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
788 rxmode->enable_scatter = 1;
790 rxmode->enable_scatter = 0;
791 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
792 rxmode->enable_lro = 1;
794 rxmode->enable_lro = 0;
795 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
796 rxmode->hw_timestamp = 1;
798 rxmode->hw_timestamp = 0;
799 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
800 rxmode->security = 1;
802 rxmode->security = 0;
806 rte_eth_dev_rx_offload_name(uint64_t offload)
808 const char *name = "UNKNOWN";
811 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
812 if (offload == rte_rx_offload_names[i].offload) {
813 name = rte_rx_offload_names[i].name;
822 rte_eth_dev_tx_offload_name(uint64_t offload)
824 const char *name = "UNKNOWN";
827 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
828 if (offload == rte_tx_offload_names[i].offload) {
829 name = rte_tx_offload_names[i].name;
838 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
839 const struct rte_eth_conf *dev_conf)
841 struct rte_eth_dev *dev;
842 struct rte_eth_dev_info dev_info;
843 struct rte_eth_conf local_conf = *dev_conf;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
850 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
851 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
855 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
857 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
858 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
862 dev = &rte_eth_devices[port_id];
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
867 if (dev->data->dev_started) {
869 "port %d must be stopped to allow configuration\n", port_id);
874 * Convert between the offloads API to enable PMDs to support
877 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
878 rte_eth_convert_rx_offload_bitfield(
879 &dev_conf->rxmode, &local_conf.rxmode.offloads);
881 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
885 /* Copy the dev_conf parameter into the dev structure */
886 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
889 * Check that the numbers of RX and TX queues are not greater
890 * than the maximum number of RX and TX queues supported by the
893 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
895 if (nb_rx_q == 0 && nb_tx_q == 0) {
896 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
900 if (nb_rx_q > dev_info.max_rx_queues) {
901 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
902 port_id, nb_rx_q, dev_info.max_rx_queues);
906 if (nb_tx_q > dev_info.max_tx_queues) {
907 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
908 port_id, nb_tx_q, dev_info.max_tx_queues);
912 /* Check that the device supports requested interrupts */
913 if ((dev_conf->intr_conf.lsc == 1) &&
914 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
915 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
916 dev->device->driver->name);
919 if ((dev_conf->intr_conf.rmv == 1) &&
920 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
921 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
922 dev->device->driver->name);
927 * If jumbo frames are enabled, check that the maximum RX packet
928 * length is supported by the configured device.
930 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
931 if (dev_conf->rxmode.max_rx_pkt_len >
932 dev_info.max_rx_pktlen) {
933 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
934 " > max valid value %u\n",
936 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
937 (unsigned)dev_info.max_rx_pktlen);
939 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
940 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
941 " < min valid value %u\n",
943 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
944 (unsigned)ETHER_MIN_LEN);
948 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
949 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
950 /* Use default value */
951 dev->data->dev_conf.rxmode.max_rx_pkt_len =
956 * Setup new number of RX/TX queues and reconfigure device.
958 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
960 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
965 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
967 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
969 rte_eth_dev_rx_queue_config(dev, 0);
973 diag = (*dev->dev_ops->dev_configure)(dev);
975 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
977 rte_eth_dev_rx_queue_config(dev, 0);
978 rte_eth_dev_tx_queue_config(dev, 0);
982 /* Initialize Rx profiling if enabled at compilation time. */
983 diag = __rte_eth_profile_rx_init(port_id, dev);
985 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
987 rte_eth_dev_rx_queue_config(dev, 0);
988 rte_eth_dev_tx_queue_config(dev, 0);
996 _rte_eth_dev_reset(struct rte_eth_dev *dev)
998 if (dev->data->dev_started) {
1000 "port %d must be stopped to allow reset\n",
1001 dev->data->port_id);
1005 rte_eth_dev_rx_queue_config(dev, 0);
1006 rte_eth_dev_tx_queue_config(dev, 0);
1008 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1012 rte_eth_dev_config_restore(uint16_t port_id)
1014 struct rte_eth_dev *dev;
1015 struct rte_eth_dev_info dev_info;
1016 struct ether_addr *addr;
1021 dev = &rte_eth_devices[port_id];
1023 rte_eth_dev_info_get(port_id, &dev_info);
1025 /* replay MAC address configuration including default MAC */
1026 addr = &dev->data->mac_addrs[0];
1027 if (*dev->dev_ops->mac_addr_set != NULL)
1028 (*dev->dev_ops->mac_addr_set)(dev, addr);
1029 else if (*dev->dev_ops->mac_addr_add != NULL)
1030 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1032 if (*dev->dev_ops->mac_addr_add != NULL) {
1033 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1034 addr = &dev->data->mac_addrs[i];
1036 /* skip zero address */
1037 if (is_zero_ether_addr(addr))
1041 pool_mask = dev->data->mac_pool_sel[i];
1044 if (pool_mask & 1ULL)
1045 (*dev->dev_ops->mac_addr_add)(dev,
1049 } while (pool_mask);
1053 /* replay promiscuous configuration */
1054 if (rte_eth_promiscuous_get(port_id) == 1)
1055 rte_eth_promiscuous_enable(port_id);
1056 else if (rte_eth_promiscuous_get(port_id) == 0)
1057 rte_eth_promiscuous_disable(port_id);
1059 /* replay all multicast configuration */
1060 if (rte_eth_allmulticast_get(port_id) == 1)
1061 rte_eth_allmulticast_enable(port_id);
1062 else if (rte_eth_allmulticast_get(port_id) == 0)
1063 rte_eth_allmulticast_disable(port_id);
1067 rte_eth_dev_start(uint16_t port_id)
1069 struct rte_eth_dev *dev;
1072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1074 dev = &rte_eth_devices[port_id];
1076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1078 if (dev->data->dev_started != 0) {
1079 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1080 " already started\n",
1085 diag = (*dev->dev_ops->dev_start)(dev);
1087 dev->data->dev_started = 1;
1091 rte_eth_dev_config_restore(port_id);
1093 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1095 (*dev->dev_ops->link_update)(dev, 0);
1101 rte_eth_dev_stop(uint16_t port_id)
1103 struct rte_eth_dev *dev;
1105 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1106 dev = &rte_eth_devices[port_id];
1108 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1110 if (dev->data->dev_started == 0) {
1111 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1112 " already stopped\n",
1117 dev->data->dev_started = 0;
1118 (*dev->dev_ops->dev_stop)(dev);
1122 rte_eth_dev_set_link_up(uint16_t port_id)
1124 struct rte_eth_dev *dev;
1126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1128 dev = &rte_eth_devices[port_id];
1130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1131 return (*dev->dev_ops->dev_set_link_up)(dev);
1135 rte_eth_dev_set_link_down(uint16_t port_id)
1137 struct rte_eth_dev *dev;
1139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1141 dev = &rte_eth_devices[port_id];
1143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1144 return (*dev->dev_ops->dev_set_link_down)(dev);
1148 rte_eth_dev_close(uint16_t port_id)
1150 struct rte_eth_dev *dev;
1152 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1153 dev = &rte_eth_devices[port_id];
1155 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1156 dev->data->dev_started = 0;
1157 (*dev->dev_ops->dev_close)(dev);
1159 dev->data->nb_rx_queues = 0;
1160 rte_free(dev->data->rx_queues);
1161 dev->data->rx_queues = NULL;
1162 dev->data->nb_tx_queues = 0;
1163 rte_free(dev->data->tx_queues);
1164 dev->data->tx_queues = NULL;
1168 rte_eth_dev_reset(uint16_t port_id)
1170 struct rte_eth_dev *dev;
1173 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1174 dev = &rte_eth_devices[port_id];
1176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1178 rte_eth_dev_stop(port_id);
1179 ret = dev->dev_ops->dev_reset(dev);
1185 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1186 uint16_t nb_rx_desc, unsigned int socket_id,
1187 const struct rte_eth_rxconf *rx_conf,
1188 struct rte_mempool *mp)
1191 uint32_t mbp_buf_size;
1192 struct rte_eth_dev *dev;
1193 struct rte_eth_dev_info dev_info;
1194 struct rte_eth_rxconf local_conf;
1197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1199 dev = &rte_eth_devices[port_id];
1200 if (rx_queue_id >= dev->data->nb_rx_queues) {
1201 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1205 if (dev->data->dev_started) {
1206 RTE_PMD_DEBUG_TRACE(
1207 "port %d must be stopped to allow configuration\n", port_id);
1211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1215 * Check the size of the mbuf data buffer.
1216 * This value must be provided in the private data of the memory pool.
1217 * First check that the memory pool has a valid private data.
1219 rte_eth_dev_info_get(port_id, &dev_info);
1220 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1221 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1222 mp->name, (int) mp->private_data_size,
1223 (int) sizeof(struct rte_pktmbuf_pool_private));
1226 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1228 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1229 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1230 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1234 (int)(RTE_PKTMBUF_HEADROOM +
1235 dev_info.min_rx_bufsize),
1236 (int)RTE_PKTMBUF_HEADROOM,
1237 (int)dev_info.min_rx_bufsize);
1241 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1242 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1243 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1245 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1246 "should be: <= %hu, = %hu, and a product of %hu\n",
1248 dev_info.rx_desc_lim.nb_max,
1249 dev_info.rx_desc_lim.nb_min,
1250 dev_info.rx_desc_lim.nb_align);
1254 rxq = dev->data->rx_queues;
1255 if (rxq[rx_queue_id]) {
1256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1258 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1259 rxq[rx_queue_id] = NULL;
1262 if (rx_conf == NULL)
1263 rx_conf = &dev_info.default_rxconf;
1265 local_conf = *rx_conf;
1266 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1268 * Reflect port offloads to queue offloads in order for
1269 * offloads to not be discarded.
1271 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1272 &local_conf.offloads);
1275 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1276 socket_id, &local_conf, mp);
1278 if (!dev->data->min_rx_buf_size ||
1279 dev->data->min_rx_buf_size > mbp_buf_size)
1280 dev->data->min_rx_buf_size = mbp_buf_size;
1287 * A conversion function from txq_flags API.
1290 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1292 uint64_t offloads = 0;
1294 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1295 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1296 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1297 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1298 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1299 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1300 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1301 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1302 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1303 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1304 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1305 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1306 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1308 *tx_offloads = offloads;
1312 * A conversion function from offloads API.
1315 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1319 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1320 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1321 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1322 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1323 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1324 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1325 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1326 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1327 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1328 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1329 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1330 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1336 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1337 uint16_t nb_tx_desc, unsigned int socket_id,
1338 const struct rte_eth_txconf *tx_conf)
1340 struct rte_eth_dev *dev;
1341 struct rte_eth_dev_info dev_info;
1342 struct rte_eth_txconf local_conf;
1345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1347 dev = &rte_eth_devices[port_id];
1348 if (tx_queue_id >= dev->data->nb_tx_queues) {
1349 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1353 if (dev->data->dev_started) {
1354 RTE_PMD_DEBUG_TRACE(
1355 "port %d must be stopped to allow configuration\n", port_id);
1359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1362 rte_eth_dev_info_get(port_id, &dev_info);
1364 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1365 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1366 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1367 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1368 "should be: <= %hu, = %hu, and a product of %hu\n",
1370 dev_info.tx_desc_lim.nb_max,
1371 dev_info.tx_desc_lim.nb_min,
1372 dev_info.tx_desc_lim.nb_align);
1376 txq = dev->data->tx_queues;
1377 if (txq[tx_queue_id]) {
1378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1380 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1381 txq[tx_queue_id] = NULL;
1384 if (tx_conf == NULL)
1385 tx_conf = &dev_info.default_txconf;
1388 * Convert between the offloads API to enable PMDs to support
1391 local_conf = *tx_conf;
1392 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1393 rte_eth_convert_txq_offloads(tx_conf->offloads,
1394 &local_conf.txq_flags);
1395 /* Keep the ignore flag. */
1396 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1398 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1399 &local_conf.offloads);
1402 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1403 socket_id, &local_conf);
1407 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1408 void *userdata __rte_unused)
1412 for (i = 0; i < unsent; i++)
1413 rte_pktmbuf_free(pkts[i]);
1417 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1420 uint64_t *count = userdata;
1423 for (i = 0; i < unsent; i++)
1424 rte_pktmbuf_free(pkts[i]);
1430 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1431 buffer_tx_error_fn cbfn, void *userdata)
1433 buffer->error_callback = cbfn;
1434 buffer->error_userdata = userdata;
1439 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1446 buffer->size = size;
1447 if (buffer->error_callback == NULL) {
1448 ret = rte_eth_tx_buffer_set_err_callback(
1449 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1456 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1458 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1460 /* Validate Input Data. Bail if not valid or not supported. */
1461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1464 /* Call driver to free pending mbufs. */
1465 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1470 rte_eth_promiscuous_enable(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1475 dev = &rte_eth_devices[port_id];
1477 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1478 (*dev->dev_ops->promiscuous_enable)(dev);
1479 dev->data->promiscuous = 1;
1483 rte_eth_promiscuous_disable(uint16_t port_id)
1485 struct rte_eth_dev *dev;
1487 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1488 dev = &rte_eth_devices[port_id];
1490 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1491 dev->data->promiscuous = 0;
1492 (*dev->dev_ops->promiscuous_disable)(dev);
1496 rte_eth_promiscuous_get(uint16_t port_id)
1498 struct rte_eth_dev *dev;
1500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1502 dev = &rte_eth_devices[port_id];
1503 return dev->data->promiscuous;
1507 rte_eth_allmulticast_enable(uint16_t port_id)
1509 struct rte_eth_dev *dev;
1511 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1512 dev = &rte_eth_devices[port_id];
1514 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1515 (*dev->dev_ops->allmulticast_enable)(dev);
1516 dev->data->all_multicast = 1;
1520 rte_eth_allmulticast_disable(uint16_t port_id)
1522 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1528 dev->data->all_multicast = 0;
1529 (*dev->dev_ops->allmulticast_disable)(dev);
1533 rte_eth_allmulticast_get(uint16_t port_id)
1535 struct rte_eth_dev *dev;
1537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1539 dev = &rte_eth_devices[port_id];
1540 return dev->data->all_multicast;
1544 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1545 struct rte_eth_link *link)
1547 struct rte_eth_link *dst = link;
1548 struct rte_eth_link *src = &(dev->data->dev_link);
1550 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1551 *(uint64_t *)src) == 0)
1558 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1560 struct rte_eth_dev *dev;
1562 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1563 dev = &rte_eth_devices[port_id];
1565 if (dev->data->dev_conf.intr_conf.lsc != 0)
1566 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1568 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1569 (*dev->dev_ops->link_update)(dev, 1);
1570 *eth_link = dev->data->dev_link;
1575 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1577 struct rte_eth_dev *dev;
1579 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1580 dev = &rte_eth_devices[port_id];
1582 if (dev->data->dev_conf.intr_conf.lsc != 0)
1583 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1585 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1586 (*dev->dev_ops->link_update)(dev, 0);
1587 *eth_link = dev->data->dev_link;
1592 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1594 struct rte_eth_dev *dev;
1596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1598 dev = &rte_eth_devices[port_id];
1599 memset(stats, 0, sizeof(*stats));
1601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1602 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1603 return (*dev->dev_ops->stats_get)(dev, stats);
1607 rte_eth_stats_reset(uint16_t port_id)
1609 struct rte_eth_dev *dev;
1611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1612 dev = &rte_eth_devices[port_id];
1614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1615 (*dev->dev_ops->stats_reset)(dev);
1616 dev->data->rx_mbuf_alloc_failed = 0;
1622 get_xstats_basic_count(struct rte_eth_dev *dev)
1624 uint16_t nb_rxqs, nb_txqs;
1627 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1628 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1630 count = RTE_NB_STATS;
1631 count += nb_rxqs * RTE_NB_RXQ_STATS;
1632 count += nb_txqs * RTE_NB_TXQ_STATS;
1638 get_xstats_count(uint16_t port_id)
1640 struct rte_eth_dev *dev;
1643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1644 dev = &rte_eth_devices[port_id];
1645 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1646 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1651 if (dev->dev_ops->xstats_get_names != NULL) {
1652 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1659 count += get_xstats_basic_count(dev);
1665 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1668 int cnt_xstats, idx_xstat;
1670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1673 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1678 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1683 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1684 if (cnt_xstats < 0) {
1685 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1689 /* Get id-name lookup table */
1690 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1692 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1693 port_id, xstats_names, cnt_xstats, NULL)) {
1694 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1698 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1699 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1708 /* retrieve basic stats names */
1710 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1711 struct rte_eth_xstat_name *xstats_names)
1713 int cnt_used_entries = 0;
1714 uint32_t idx, id_queue;
1717 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1718 snprintf(xstats_names[cnt_used_entries].name,
1719 sizeof(xstats_names[0].name),
1720 "%s", rte_stats_strings[idx].name);
1723 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1724 for (id_queue = 0; id_queue < num_q; id_queue++) {
1725 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1726 snprintf(xstats_names[cnt_used_entries].name,
1727 sizeof(xstats_names[0].name),
1729 id_queue, rte_rxq_stats_strings[idx].name);
1734 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1735 for (id_queue = 0; id_queue < num_q; id_queue++) {
1736 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1737 snprintf(xstats_names[cnt_used_entries].name,
1738 sizeof(xstats_names[0].name),
1740 id_queue, rte_txq_stats_strings[idx].name);
1744 return cnt_used_entries;
1747 /* retrieve ethdev extended statistics names */
1749 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1750 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1753 struct rte_eth_xstat_name *xstats_names_copy;
1754 unsigned int no_basic_stat_requested = 1;
1755 unsigned int no_ext_stat_requested = 1;
1756 unsigned int expected_entries;
1757 unsigned int basic_count;
1758 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1763 dev = &rte_eth_devices[port_id];
1765 basic_count = get_xstats_basic_count(dev);
1766 ret = get_xstats_count(port_id);
1769 expected_entries = (unsigned int)ret;
1771 /* Return max number of stats if no ids given */
1774 return expected_entries;
1775 else if (xstats_names && size < expected_entries)
1776 return expected_entries;
1779 if (ids && !xstats_names)
1782 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1783 uint64_t ids_copy[size];
1785 for (i = 0; i < size; i++) {
1786 if (ids[i] < basic_count) {
1787 no_basic_stat_requested = 0;
1792 * Convert ids to xstats ids that PMD knows.
1793 * ids known by user are basic + extended stats.
1795 ids_copy[i] = ids[i] - basic_count;
1798 if (no_basic_stat_requested)
1799 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1800 xstats_names, ids_copy, size);
1803 /* Retrieve all stats */
1805 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1807 if (num_stats < 0 || num_stats > (int)expected_entries)
1810 return expected_entries;
1813 xstats_names_copy = calloc(expected_entries,
1814 sizeof(struct rte_eth_xstat_name));
1816 if (!xstats_names_copy) {
1817 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1822 for (i = 0; i < size; i++) {
1823 if (ids[i] > basic_count) {
1824 no_ext_stat_requested = 0;
1830 /* Fill xstats_names_copy structure */
1831 if (ids && no_ext_stat_requested) {
1832 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1834 rte_eth_xstats_get_names(port_id, xstats_names_copy,
1839 for (i = 0; i < size; i++) {
1840 if (ids[i] >= expected_entries) {
1841 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1842 free(xstats_names_copy);
1845 xstats_names[i] = xstats_names_copy[ids[i]];
1848 free(xstats_names_copy);
1853 rte_eth_xstats_get_names(uint16_t port_id,
1854 struct rte_eth_xstat_name *xstats_names,
1857 struct rte_eth_dev *dev;
1858 int cnt_used_entries;
1859 int cnt_expected_entries;
1860 int cnt_driver_entries;
1862 cnt_expected_entries = get_xstats_count(port_id);
1863 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1864 (int)size < cnt_expected_entries)
1865 return cnt_expected_entries;
1867 /* port_id checked in get_xstats_count() */
1868 dev = &rte_eth_devices[port_id];
1870 cnt_used_entries = rte_eth_basic_stats_get_names(
1873 if (dev->dev_ops->xstats_get_names != NULL) {
1874 /* If there are any driver-specific xstats, append them
1877 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1879 xstats_names + cnt_used_entries,
1880 size - cnt_used_entries);
1881 if (cnt_driver_entries < 0)
1882 return cnt_driver_entries;
1883 cnt_used_entries += cnt_driver_entries;
1886 return cnt_used_entries;
1891 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1893 struct rte_eth_dev *dev;
1894 struct rte_eth_stats eth_stats;
1895 unsigned int count = 0, i, q;
1896 uint64_t val, *stats_ptr;
1897 uint16_t nb_rxqs, nb_txqs;
1899 rte_eth_stats_get(port_id, ð_stats);
1900 dev = &rte_eth_devices[port_id];
1902 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1903 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1906 for (i = 0; i < RTE_NB_STATS; i++) {
1907 stats_ptr = RTE_PTR_ADD(ð_stats,
1908 rte_stats_strings[i].offset);
1910 xstats[count++].value = val;
1914 for (q = 0; q < nb_rxqs; q++) {
1915 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1916 stats_ptr = RTE_PTR_ADD(ð_stats,
1917 rte_rxq_stats_strings[i].offset +
1918 q * sizeof(uint64_t));
1920 xstats[count++].value = val;
1925 for (q = 0; q < nb_txqs; q++) {
1926 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1927 stats_ptr = RTE_PTR_ADD(ð_stats,
1928 rte_txq_stats_strings[i].offset +
1929 q * sizeof(uint64_t));
1931 xstats[count++].value = val;
1937 /* retrieve ethdev extended statistics */
1939 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1940 uint64_t *values, unsigned int size)
1942 unsigned int no_basic_stat_requested = 1;
1943 unsigned int no_ext_stat_requested = 1;
1944 unsigned int num_xstats_filled;
1945 unsigned int basic_count;
1946 uint16_t expected_entries;
1947 struct rte_eth_dev *dev;
1951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1952 expected_entries = get_xstats_count(port_id);
1953 struct rte_eth_xstat xstats[expected_entries];
1954 dev = &rte_eth_devices[port_id];
1955 basic_count = get_xstats_basic_count(dev);
1957 /* Return max number of stats if no ids given */
1960 return expected_entries;
1961 else if (values && size < expected_entries)
1962 return expected_entries;
1968 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1969 unsigned int basic_count = get_xstats_basic_count(dev);
1970 uint64_t ids_copy[size];
1972 for (i = 0; i < size; i++) {
1973 if (ids[i] < basic_count) {
1974 no_basic_stat_requested = 0;
1979 * Convert ids to xstats ids that PMD knows.
1980 * ids known by user are basic + extended stats.
1982 ids_copy[i] = ids[i] - basic_count;
1985 if (no_basic_stat_requested)
1986 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1991 for (i = 0; i < size; i++) {
1992 if (ids[i] > basic_count) {
1993 no_ext_stat_requested = 0;
1999 /* Fill the xstats structure */
2000 if (ids && no_ext_stat_requested)
2001 ret = rte_eth_basic_stats_get(port_id, xstats);
2003 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2007 num_xstats_filled = (unsigned int)ret;
2009 /* Return all stats */
2011 for (i = 0; i < num_xstats_filled; i++)
2012 values[i] = xstats[i].value;
2013 return expected_entries;
2017 for (i = 0; i < size; i++) {
2018 if (ids[i] >= expected_entries) {
2019 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2022 values[i] = xstats[ids[i]].value;
2028 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2031 struct rte_eth_dev *dev;
2032 unsigned int count = 0, i;
2033 signed int xcount = 0;
2034 uint16_t nb_rxqs, nb_txqs;
2036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2038 dev = &rte_eth_devices[port_id];
2040 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2041 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2043 /* Return generic statistics */
2044 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2045 (nb_txqs * RTE_NB_TXQ_STATS);
2047 /* implemented by the driver */
2048 if (dev->dev_ops->xstats_get != NULL) {
2049 /* Retrieve the xstats from the driver at the end of the
2052 xcount = (*dev->dev_ops->xstats_get)(dev,
2053 xstats ? xstats + count : NULL,
2054 (n > count) ? n - count : 0);
2060 if (n < count + xcount || xstats == NULL)
2061 return count + xcount;
2063 /* now fill the xstats structure */
2064 count = rte_eth_basic_stats_get(port_id, xstats);
2066 for (i = 0; i < count; i++)
2068 /* add an offset to driver-specific stats */
2069 for ( ; i < count + xcount; i++)
2070 xstats[i].id += count;
2072 return count + xcount;
2075 /* reset ethdev extended statistics */
2077 rte_eth_xstats_reset(uint16_t port_id)
2079 struct rte_eth_dev *dev;
2081 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2082 dev = &rte_eth_devices[port_id];
2084 /* implemented by the driver */
2085 if (dev->dev_ops->xstats_reset != NULL) {
2086 (*dev->dev_ops->xstats_reset)(dev);
2090 /* fallback to default */
2091 rte_eth_stats_reset(port_id);
2095 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2098 struct rte_eth_dev *dev;
2100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2102 dev = &rte_eth_devices[port_id];
2104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2105 return (*dev->dev_ops->queue_stats_mapping_set)
2106 (dev, queue_id, stat_idx, is_rx);
2111 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2114 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2120 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2123 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2128 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2130 struct rte_eth_dev *dev;
2132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2133 dev = &rte_eth_devices[port_id];
2135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2136 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2140 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2142 struct rte_eth_dev *dev;
2143 const struct rte_eth_desc_lim lim = {
2144 .nb_max = UINT16_MAX,
2149 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2150 dev = &rte_eth_devices[port_id];
2152 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2153 dev_info->rx_desc_lim = lim;
2154 dev_info->tx_desc_lim = lim;
2156 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2157 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2158 dev_info->driver_name = dev->device->driver->name;
2159 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2160 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2164 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2165 uint32_t *ptypes, int num)
2168 struct rte_eth_dev *dev;
2169 const uint32_t *all_ptypes;
2171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2172 dev = &rte_eth_devices[port_id];
2173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2174 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2179 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2180 if (all_ptypes[i] & ptype_mask) {
2182 ptypes[j] = all_ptypes[i];
2190 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2192 struct rte_eth_dev *dev;
2194 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2195 dev = &rte_eth_devices[port_id];
2196 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2201 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2203 struct rte_eth_dev *dev;
2205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 dev = &rte_eth_devices[port_id];
2208 *mtu = dev->data->mtu;
2213 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2216 struct rte_eth_dev *dev;
2218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2219 dev = &rte_eth_devices[port_id];
2220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2222 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2224 dev->data->mtu = mtu;
2230 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2232 struct rte_eth_dev *dev;
2235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2236 dev = &rte_eth_devices[port_id];
2237 if (!(dev->data->dev_conf.rxmode.offloads &
2238 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2239 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2243 if (vlan_id > 4095) {
2244 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2245 port_id, (unsigned) vlan_id);
2248 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2250 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2252 struct rte_vlan_filter_conf *vfc;
2256 vfc = &dev->data->vlan_filter_conf;
2257 vidx = vlan_id / 64;
2258 vbit = vlan_id % 64;
2261 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2263 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2270 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2273 struct rte_eth_dev *dev;
2275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2276 dev = &rte_eth_devices[port_id];
2277 if (rx_queue_id >= dev->data->nb_rx_queues) {
2278 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2283 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2289 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2290 enum rte_vlan_type vlan_type,
2293 struct rte_eth_dev *dev;
2295 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2296 dev = &rte_eth_devices[port_id];
2297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2299 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2303 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2305 struct rte_eth_dev *dev;
2309 uint64_t orig_offloads;
2311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2312 dev = &rte_eth_devices[port_id];
2314 /* save original values in case of failure */
2315 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2317 /*check which option changed by application*/
2318 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2319 org = !!(dev->data->dev_conf.rxmode.offloads &
2320 DEV_RX_OFFLOAD_VLAN_STRIP);
2323 dev->data->dev_conf.rxmode.offloads |=
2324 DEV_RX_OFFLOAD_VLAN_STRIP;
2326 dev->data->dev_conf.rxmode.offloads &=
2327 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2328 mask |= ETH_VLAN_STRIP_MASK;
2331 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2332 org = !!(dev->data->dev_conf.rxmode.offloads &
2333 DEV_RX_OFFLOAD_VLAN_FILTER);
2336 dev->data->dev_conf.rxmode.offloads |=
2337 DEV_RX_OFFLOAD_VLAN_FILTER;
2339 dev->data->dev_conf.rxmode.offloads &=
2340 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2341 mask |= ETH_VLAN_FILTER_MASK;
2344 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2345 org = !!(dev->data->dev_conf.rxmode.offloads &
2346 DEV_RX_OFFLOAD_VLAN_EXTEND);
2349 dev->data->dev_conf.rxmode.offloads |=
2350 DEV_RX_OFFLOAD_VLAN_EXTEND;
2352 dev->data->dev_conf.rxmode.offloads &=
2353 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2354 mask |= ETH_VLAN_EXTEND_MASK;
2361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2364 * Convert to the offload bitfield API just in case the underlying PMD
2365 * still supporting it.
2367 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2368 &dev->data->dev_conf.rxmode);
2369 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2371 /* hit an error restore original values */
2372 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2373 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2374 &dev->data->dev_conf.rxmode);
2381 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2383 struct rte_eth_dev *dev;
2386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2387 dev = &rte_eth_devices[port_id];
2389 if (dev->data->dev_conf.rxmode.offloads &
2390 DEV_RX_OFFLOAD_VLAN_STRIP)
2391 ret |= ETH_VLAN_STRIP_OFFLOAD;
2393 if (dev->data->dev_conf.rxmode.offloads &
2394 DEV_RX_OFFLOAD_VLAN_FILTER)
2395 ret |= ETH_VLAN_FILTER_OFFLOAD;
2397 if (dev->data->dev_conf.rxmode.offloads &
2398 DEV_RX_OFFLOAD_VLAN_EXTEND)
2399 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2405 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2407 struct rte_eth_dev *dev;
2409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 dev = &rte_eth_devices[port_id];
2411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2412 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2418 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2420 struct rte_eth_dev *dev;
2422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2423 dev = &rte_eth_devices[port_id];
2424 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2425 memset(fc_conf, 0, sizeof(*fc_conf));
2426 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2430 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2432 struct rte_eth_dev *dev;
2434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2435 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2436 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2440 dev = &rte_eth_devices[port_id];
2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2442 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2446 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2447 struct rte_eth_pfc_conf *pfc_conf)
2449 struct rte_eth_dev *dev;
2451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2452 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2453 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2457 dev = &rte_eth_devices[port_id];
2458 /* High water, low water validation are device specific */
2459 if (*dev->dev_ops->priority_flow_ctrl_set)
2460 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2465 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2473 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2474 for (i = 0; i < num; i++) {
2475 if (reta_conf[i].mask)
2483 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2487 uint16_t i, idx, shift;
2493 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2497 for (i = 0; i < reta_size; i++) {
2498 idx = i / RTE_RETA_GROUP_SIZE;
2499 shift = i % RTE_RETA_GROUP_SIZE;
2500 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2501 (reta_conf[idx].reta[shift] >= max_rxq)) {
2502 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2503 "the maximum rxq index: %u\n", idx, shift,
2504 reta_conf[idx].reta[shift], max_rxq);
2513 rte_eth_dev_rss_reta_update(uint16_t port_id,
2514 struct rte_eth_rss_reta_entry64 *reta_conf,
2517 struct rte_eth_dev *dev;
2520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2521 /* Check mask bits */
2522 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2526 dev = &rte_eth_devices[port_id];
2528 /* Check entry value */
2529 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2530 dev->data->nb_rx_queues);
2534 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2535 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2539 rte_eth_dev_rss_reta_query(uint16_t port_id,
2540 struct rte_eth_rss_reta_entry64 *reta_conf,
2543 struct rte_eth_dev *dev;
2546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2548 /* Check mask bits */
2549 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2553 dev = &rte_eth_devices[port_id];
2554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2555 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2559 rte_eth_dev_rss_hash_update(uint16_t port_id,
2560 struct rte_eth_rss_conf *rss_conf)
2562 struct rte_eth_dev *dev;
2564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2565 dev = &rte_eth_devices[port_id];
2566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2567 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2571 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2572 struct rte_eth_rss_conf *rss_conf)
2574 struct rte_eth_dev *dev;
2576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2577 dev = &rte_eth_devices[port_id];
2578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2579 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2583 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2584 struct rte_eth_udp_tunnel *udp_tunnel)
2586 struct rte_eth_dev *dev;
2588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 if (udp_tunnel == NULL) {
2590 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2594 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2595 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2599 dev = &rte_eth_devices[port_id];
2600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2601 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2605 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2606 struct rte_eth_udp_tunnel *udp_tunnel)
2608 struct rte_eth_dev *dev;
2610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2611 dev = &rte_eth_devices[port_id];
2613 if (udp_tunnel == NULL) {
2614 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2618 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2619 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2624 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2628 rte_eth_led_on(uint16_t port_id)
2630 struct rte_eth_dev *dev;
2632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2633 dev = &rte_eth_devices[port_id];
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2635 return (*dev->dev_ops->dev_led_on)(dev);
2639 rte_eth_led_off(uint16_t port_id)
2641 struct rte_eth_dev *dev;
2643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2644 dev = &rte_eth_devices[port_id];
2645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2646 return (*dev->dev_ops->dev_led_off)(dev);
2650 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2654 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2656 struct rte_eth_dev_info dev_info;
2657 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2661 rte_eth_dev_info_get(port_id, &dev_info);
2663 for (i = 0; i < dev_info.max_mac_addrs; i++)
2664 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2670 static const struct ether_addr null_mac_addr;
2673 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2676 struct rte_eth_dev *dev;
2681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2682 dev = &rte_eth_devices[port_id];
2683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2685 if (is_zero_ether_addr(addr)) {
2686 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2690 if (pool >= ETH_64_POOLS) {
2691 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2695 index = get_mac_addr_index(port_id, addr);
2697 index = get_mac_addr_index(port_id, &null_mac_addr);
2699 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2704 pool_mask = dev->data->mac_pool_sel[index];
2706 /* Check if both MAC address and pool is already there, and do nothing */
2707 if (pool_mask & (1ULL << pool))
2712 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2715 /* Update address in NIC data structure */
2716 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2718 /* Update pool bitmap in NIC data structure */
2719 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2726 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2728 struct rte_eth_dev *dev;
2731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2732 dev = &rte_eth_devices[port_id];
2733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2735 index = get_mac_addr_index(port_id, addr);
2737 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2739 } else if (index < 0)
2740 return 0; /* Do nothing if address wasn't found */
2743 (*dev->dev_ops->mac_addr_remove)(dev, index);
2745 /* Update address in NIC data structure */
2746 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2748 /* reset pool bitmap */
2749 dev->data->mac_pool_sel[index] = 0;
2755 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2757 struct rte_eth_dev *dev;
2759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2761 if (!is_valid_assigned_ether_addr(addr))
2764 dev = &rte_eth_devices[port_id];
2765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2767 /* Update default address in NIC data structure */
2768 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2770 (*dev->dev_ops->mac_addr_set)(dev, addr);
2777 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2781 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2783 struct rte_eth_dev_info dev_info;
2784 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2787 rte_eth_dev_info_get(port_id, &dev_info);
2788 if (!dev->data->hash_mac_addrs)
2791 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2792 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2793 ETHER_ADDR_LEN) == 0)
2800 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2805 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 if (is_zero_ether_addr(addr)) {
2811 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2816 index = get_hash_mac_addr_index(port_id, addr);
2817 /* Check if it's already there, and do nothing */
2818 if ((index >= 0) && on)
2823 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2824 "set in UTA\n", port_id);
2828 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2830 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2837 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2839 /* Update address in NIC data structure */
2841 ether_addr_copy(addr,
2842 &dev->data->hash_mac_addrs[index]);
2844 ether_addr_copy(&null_mac_addr,
2845 &dev->data->hash_mac_addrs[index]);
2852 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2858 dev = &rte_eth_devices[port_id];
2860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2861 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2864 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2867 struct rte_eth_dev *dev;
2868 struct rte_eth_dev_info dev_info;
2869 struct rte_eth_link link;
2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 dev = &rte_eth_devices[port_id];
2874 rte_eth_dev_info_get(port_id, &dev_info);
2875 link = dev->data->dev_link;
2877 if (queue_idx > dev_info.max_tx_queues) {
2878 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2879 "invalid queue id=%d\n", port_id, queue_idx);
2883 if (tx_rate > link.link_speed) {
2884 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2885 "bigger than link speed= %d\n",
2886 tx_rate, link.link_speed);
2890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2891 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2895 rte_eth_mirror_rule_set(uint16_t port_id,
2896 struct rte_eth_mirror_conf *mirror_conf,
2897 uint8_t rule_id, uint8_t on)
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2902 if (mirror_conf->rule_type == 0) {
2903 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2907 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2908 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2913 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2914 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2915 (mirror_conf->pool_mask == 0)) {
2916 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2920 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2921 mirror_conf->vlan.vlan_mask == 0) {
2922 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2926 dev = &rte_eth_devices[port_id];
2927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2929 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2933 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2935 struct rte_eth_dev *dev;
2937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 dev = &rte_eth_devices[port_id];
2940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2942 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2945 RTE_INIT(eth_dev_init_cb_lists)
2949 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
2950 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
2954 rte_eth_dev_callback_register(uint16_t port_id,
2955 enum rte_eth_event_type event,
2956 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2958 struct rte_eth_dev *dev;
2959 struct rte_eth_dev_callback *user_cb;
2960 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2966 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2967 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2971 if (port_id == RTE_ETH_ALL) {
2973 last_port = RTE_MAX_ETHPORTS - 1;
2975 next_port = last_port = port_id;
2978 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2981 dev = &rte_eth_devices[next_port];
2983 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2984 if (user_cb->cb_fn == cb_fn &&
2985 user_cb->cb_arg == cb_arg &&
2986 user_cb->event == event) {
2991 /* create a new callback. */
2992 if (user_cb == NULL) {
2993 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2994 sizeof(struct rte_eth_dev_callback), 0);
2995 if (user_cb != NULL) {
2996 user_cb->cb_fn = cb_fn;
2997 user_cb->cb_arg = cb_arg;
2998 user_cb->event = event;
2999 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3002 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3003 rte_eth_dev_callback_unregister(port_id, event,
3009 } while (++next_port <= last_port);
3011 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3016 rte_eth_dev_callback_unregister(uint16_t port_id,
3017 enum rte_eth_event_type event,
3018 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3021 struct rte_eth_dev *dev;
3022 struct rte_eth_dev_callback *cb, *next;
3023 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3029 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3030 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3034 if (port_id == RTE_ETH_ALL) {
3036 last_port = RTE_MAX_ETHPORTS - 1;
3038 next_port = last_port = port_id;
3041 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3044 dev = &rte_eth_devices[next_port];
3046 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3049 next = TAILQ_NEXT(cb, next);
3051 if (cb->cb_fn != cb_fn || cb->event != event ||
3052 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3056 * if this callback is not executing right now,
3059 if (cb->active == 0) {
3060 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3066 } while (++next_port <= last_port);
3068 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3073 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3074 enum rte_eth_event_type event, void *ret_param)
3076 struct rte_eth_dev_callback *cb_lst;
3077 struct rte_eth_dev_callback dev_cb;
3080 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3081 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3082 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3086 if (ret_param != NULL)
3087 dev_cb.ret_param = ret_param;
3089 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3090 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3091 dev_cb.cb_arg, dev_cb.ret_param);
3092 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3095 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3100 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3103 struct rte_eth_dev *dev;
3104 struct rte_intr_handle *intr_handle;
3108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3110 dev = &rte_eth_devices[port_id];
3112 if (!dev->intr_handle) {
3113 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3117 intr_handle = dev->intr_handle;
3118 if (!intr_handle->intr_vec) {
3119 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3123 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3124 vec = intr_handle->intr_vec[qid];
3125 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3126 if (rc && rc != -EEXIST) {
3127 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3128 " op %d epfd %d vec %u\n",
3129 port_id, qid, op, epfd, vec);
3136 const struct rte_memzone *
3137 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3138 uint16_t queue_id, size_t size, unsigned align,
3141 char z_name[RTE_MEMZONE_NAMESIZE];
3142 const struct rte_memzone *mz;
3144 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3145 dev->device->driver->name, ring_name,
3146 dev->data->port_id, queue_id);
3148 mz = rte_memzone_lookup(z_name);
3152 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3156 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3157 int epfd, int op, void *data)
3160 struct rte_eth_dev *dev;
3161 struct rte_intr_handle *intr_handle;
3164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3166 dev = &rte_eth_devices[port_id];
3167 if (queue_id >= dev->data->nb_rx_queues) {
3168 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3172 if (!dev->intr_handle) {
3173 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3177 intr_handle = dev->intr_handle;
3178 if (!intr_handle->intr_vec) {
3179 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3183 vec = intr_handle->intr_vec[queue_id];
3184 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3185 if (rc && rc != -EEXIST) {
3186 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3187 " op %d epfd %d vec %u\n",
3188 port_id, queue_id, op, epfd, vec);
3196 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3199 struct rte_eth_dev *dev;
3201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 dev = &rte_eth_devices[port_id];
3205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3206 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3210 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3213 struct rte_eth_dev *dev;
3215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3217 dev = &rte_eth_devices[port_id];
3219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3220 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3225 rte_eth_dev_filter_supported(uint16_t port_id,
3226 enum rte_filter_type filter_type)
3228 struct rte_eth_dev *dev;
3230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 dev = &rte_eth_devices[port_id];
3233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3234 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3235 RTE_ETH_FILTER_NOP, NULL);
3239 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3240 enum rte_filter_type filter_type,
3241 enum rte_filter_op filter_op, void *arg);
3244 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3245 enum rte_filter_type filter_type,
3246 enum rte_filter_op filter_op, void *arg)
3248 struct rte_eth_fdir_info_v22 {
3249 enum rte_fdir_mode mode;
3250 struct rte_eth_fdir_masks mask;
3251 struct rte_eth_fdir_flex_conf flex_conf;
3252 uint32_t guarant_spc;
3254 uint32_t flow_types_mask[1];
3255 uint32_t max_flexpayload;
3256 uint32_t flex_payload_unit;
3257 uint32_t max_flex_payload_segment_num;
3258 uint16_t flex_payload_limit;
3259 uint32_t flex_bitmask_unit;
3260 uint32_t max_flex_bitmask_num;
3263 struct rte_eth_hash_global_conf_v22 {
3264 enum rte_eth_hash_function hash_func;
3265 uint32_t sym_hash_enable_mask[1];
3266 uint32_t valid_bit_mask[1];
3269 struct rte_eth_hash_filter_info_v22 {
3270 enum rte_eth_hash_filter_info_type info_type;
3273 struct rte_eth_hash_global_conf_v22 global_conf;
3274 struct rte_eth_input_set_conf input_set_conf;
3278 struct rte_eth_dev *dev;
3280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3282 dev = &rte_eth_devices[port_id];
3283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3284 if (filter_op == RTE_ETH_FILTER_INFO) {
3286 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3287 struct rte_eth_fdir_info fdir_info;
3289 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3291 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3292 filter_op, (void *)&fdir_info);
3293 fdir_info_v22->mode = fdir_info.mode;
3294 fdir_info_v22->mask = fdir_info.mask;
3295 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3296 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3297 fdir_info_v22->best_spc = fdir_info.best_spc;
3298 fdir_info_v22->flow_types_mask[0] =
3299 (uint32_t)fdir_info.flow_types_mask[0];
3300 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3301 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3302 fdir_info_v22->max_flex_payload_segment_num =
3303 fdir_info.max_flex_payload_segment_num;
3304 fdir_info_v22->flex_payload_limit =
3305 fdir_info.flex_payload_limit;
3306 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3307 fdir_info_v22->max_flex_bitmask_num =
3308 fdir_info.max_flex_bitmask_num;
3310 } else if (filter_op == RTE_ETH_FILTER_GET) {
3312 struct rte_eth_hash_filter_info f_info;
3313 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3314 (struct rte_eth_hash_filter_info_v22 *)arg;
3316 f_info.info_type = f_info_v22->info_type;
3317 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3318 filter_op, (void *)&f_info);
3320 switch (f_info_v22->info_type) {
3321 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3322 f_info_v22->info.enable = f_info.info.enable;
3324 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3325 f_info_v22->info.global_conf.hash_func =
3326 f_info.info.global_conf.hash_func;
3327 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3329 f_info.info.global_conf.sym_hash_enable_mask[0];
3330 f_info_v22->info.global_conf.valid_bit_mask[0] =
3332 f_info.info.global_conf.valid_bit_mask[0];
3334 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3335 f_info_v22->info.input_set_conf =
3336 f_info.info.input_set_conf;
3342 } else if (filter_op == RTE_ETH_FILTER_SET) {
3343 struct rte_eth_hash_filter_info f_info;
3344 struct rte_eth_hash_filter_info_v22 *f_v22 =
3345 (struct rte_eth_hash_filter_info_v22 *)arg;
3347 f_info.info_type = f_v22->info_type;
3348 switch (f_v22->info_type) {
3349 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3350 f_info.info.enable = f_v22->info.enable;
3352 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3353 f_info.info.global_conf.hash_func =
3354 f_v22->info.global_conf.hash_func;
3355 f_info.info.global_conf.sym_hash_enable_mask[0] =
3357 f_v22->info.global_conf.sym_hash_enable_mask[0];
3358 f_info.info.global_conf.valid_bit_mask[0] =
3360 f_v22->info.global_conf.valid_bit_mask[0];
3362 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3363 f_info.info.input_set_conf =
3364 f_v22->info.input_set_conf;
3369 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3372 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3375 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3378 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3379 enum rte_filter_type filter_type,
3380 enum rte_filter_op filter_op, void *arg);
3383 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3384 enum rte_filter_type filter_type,
3385 enum rte_filter_op filter_op, void *arg)
3387 struct rte_eth_dev *dev;
3389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3391 dev = &rte_eth_devices[port_id];
3392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3393 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3395 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3396 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3397 enum rte_filter_type filter_type,
3398 enum rte_filter_op filter_op, void *arg),
3399 rte_eth_dev_filter_ctrl_v1802);
3402 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3403 rte_rx_callback_fn fn, void *user_param)
3405 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3406 rte_errno = ENOTSUP;
3409 /* check input parameters */
3410 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3411 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3415 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3423 cb->param = user_param;
3425 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3426 /* Add the callbacks in fifo order. */
3427 struct rte_eth_rxtx_callback *tail =
3428 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3431 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3438 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3444 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3445 rte_rx_callback_fn fn, void *user_param)
3447 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3448 rte_errno = ENOTSUP;
3451 /* check input parameters */
3452 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3453 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3458 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3466 cb->param = user_param;
3468 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3469 /* Add the callbacks at fisrt position*/
3470 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3472 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3473 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3479 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3480 rte_tx_callback_fn fn, void *user_param)
3482 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3483 rte_errno = ENOTSUP;
3486 /* check input parameters */
3487 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3488 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3493 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3501 cb->param = user_param;
3503 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3504 /* Add the callbacks in fifo order. */
3505 struct rte_eth_rxtx_callback *tail =
3506 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3509 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3516 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3522 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3523 struct rte_eth_rxtx_callback *user_cb)
3525 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3528 /* Check input parameters. */
3529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3530 if (user_cb == NULL ||
3531 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3534 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3535 struct rte_eth_rxtx_callback *cb;
3536 struct rte_eth_rxtx_callback **prev_cb;
3539 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3540 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3541 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3543 if (cb == user_cb) {
3544 /* Remove the user cb from the callback list. */
3545 *prev_cb = cb->next;
3550 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3556 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3557 struct rte_eth_rxtx_callback *user_cb)
3559 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3562 /* Check input parameters. */
3563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3564 if (user_cb == NULL ||
3565 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3568 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3570 struct rte_eth_rxtx_callback *cb;
3571 struct rte_eth_rxtx_callback **prev_cb;
3573 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3574 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3575 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3577 if (cb == user_cb) {
3578 /* Remove the user cb from the callback list. */
3579 *prev_cb = cb->next;
3584 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3590 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3591 struct rte_eth_rxq_info *qinfo)
3593 struct rte_eth_dev *dev;
3595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3600 dev = &rte_eth_devices[port_id];
3601 if (queue_id >= dev->data->nb_rx_queues) {
3602 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3606 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3608 memset(qinfo, 0, sizeof(*qinfo));
3609 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3614 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3615 struct rte_eth_txq_info *qinfo)
3617 struct rte_eth_dev *dev;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3624 dev = &rte_eth_devices[port_id];
3625 if (queue_id >= dev->data->nb_tx_queues) {
3626 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3630 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3632 memset(qinfo, 0, sizeof(*qinfo));
3633 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3638 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3639 struct ether_addr *mc_addr_set,
3640 uint32_t nb_mc_addr)
3642 struct rte_eth_dev *dev;
3644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3646 dev = &rte_eth_devices[port_id];
3647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3648 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3652 rte_eth_timesync_enable(uint16_t port_id)
3654 struct rte_eth_dev *dev;
3656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3657 dev = &rte_eth_devices[port_id];
3659 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3660 return (*dev->dev_ops->timesync_enable)(dev);
3664 rte_eth_timesync_disable(uint16_t port_id)
3666 struct rte_eth_dev *dev;
3668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3669 dev = &rte_eth_devices[port_id];
3671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3672 return (*dev->dev_ops->timesync_disable)(dev);
3676 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3679 struct rte_eth_dev *dev;
3681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3682 dev = &rte_eth_devices[port_id];
3684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3685 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3689 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3690 struct timespec *timestamp)
3692 struct rte_eth_dev *dev;
3694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3695 dev = &rte_eth_devices[port_id];
3697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3698 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3702 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3704 struct rte_eth_dev *dev;
3706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3707 dev = &rte_eth_devices[port_id];
3709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3710 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3714 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3716 struct rte_eth_dev *dev;
3718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3719 dev = &rte_eth_devices[port_id];
3721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3722 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3726 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3728 struct rte_eth_dev *dev;
3730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3731 dev = &rte_eth_devices[port_id];
3733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3734 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3738 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3740 struct rte_eth_dev *dev;
3742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3744 dev = &rte_eth_devices[port_id];
3745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3746 return (*dev->dev_ops->get_reg)(dev, info);
3750 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3752 struct rte_eth_dev *dev;
3754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3756 dev = &rte_eth_devices[port_id];
3757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3758 return (*dev->dev_ops->get_eeprom_length)(dev);
3762 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3764 struct rte_eth_dev *dev;
3766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3768 dev = &rte_eth_devices[port_id];
3769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3770 return (*dev->dev_ops->get_eeprom)(dev, info);
3774 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3776 struct rte_eth_dev *dev;
3778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3780 dev = &rte_eth_devices[port_id];
3781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3782 return (*dev->dev_ops->set_eeprom)(dev, info);
3786 rte_eth_dev_get_dcb_info(uint16_t port_id,
3787 struct rte_eth_dcb_info *dcb_info)
3789 struct rte_eth_dev *dev;
3791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3793 dev = &rte_eth_devices[port_id];
3794 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3797 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3801 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3802 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3804 struct rte_eth_dev *dev;
3806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3807 if (l2_tunnel == NULL) {
3808 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3812 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3813 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3817 dev = &rte_eth_devices[port_id];
3818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3820 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3824 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3825 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3829 struct rte_eth_dev *dev;
3831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3833 if (l2_tunnel == NULL) {
3834 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3838 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3839 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3844 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3848 dev = &rte_eth_devices[port_id];
3849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3851 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3855 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3856 const struct rte_eth_desc_lim *desc_lim)
3858 if (desc_lim->nb_align != 0)
3859 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3861 if (desc_lim->nb_max != 0)
3862 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3864 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3868 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3869 uint16_t *nb_rx_desc,
3870 uint16_t *nb_tx_desc)
3872 struct rte_eth_dev *dev;
3873 struct rte_eth_dev_info dev_info;
3875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3877 dev = &rte_eth_devices[port_id];
3878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3880 rte_eth_dev_info_get(port_id, &dev_info);
3882 if (nb_rx_desc != NULL)
3883 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3885 if (nb_tx_desc != NULL)
3886 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3892 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3894 struct rte_eth_dev *dev;
3896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3901 dev = &rte_eth_devices[port_id];
3903 if (*dev->dev_ops->pool_ops_supported == NULL)
3904 return 1; /* all pools are supported */
3906 return (*dev->dev_ops->pool_ops_supported)(dev, pool);