4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
193 rte_eth_dev_allocate(const char *name)
196 struct rte_eth_dev *eth_dev;
198 port_id = rte_eth_dev_find_free_port();
199 if (port_id == RTE_MAX_ETHPORTS) {
200 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
204 if (rte_eth_dev_data == NULL)
205 rte_eth_dev_data_alloc();
207 if (rte_eth_dev_allocated(name) != NULL) {
208 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
213 eth_dev = &rte_eth_devices[port_id];
214 eth_dev->data = &rte_eth_dev_data[port_id];
215 memset(eth_dev->data, 0, sizeof(*eth_dev->data));
216 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
217 eth_dev->data->port_id = port_id;
218 eth_dev->data->mtu = ETHER_MTU;
219 TAILQ_INIT(&(eth_dev->link_intr_cbs));
221 eth_dev->attached = DEV_ATTACHED;
222 eth_dev_last_created_port = port_id;
228 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
233 eth_dev->attached = DEV_DETACHED;
239 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
240 struct rte_pci_device *pci_dev)
242 struct eth_driver *eth_drv;
243 struct rte_eth_dev *eth_dev;
244 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
248 eth_drv = (struct eth_driver *)pci_drv;
250 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
251 sizeof(ethdev_name));
253 eth_dev = rte_eth_dev_allocate(ethdev_name);
257 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
258 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
259 eth_drv->dev_private_size,
260 RTE_CACHE_LINE_SIZE);
261 if (eth_dev->data->dev_private == NULL)
262 rte_panic("Cannot allocate memzone for private port data\n");
264 eth_dev->pci_dev = pci_dev;
265 eth_dev->driver = eth_drv;
267 /* Invoke PMD device initialization function */
268 diag = (*eth_drv->eth_dev_init)(eth_dev);
272 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
273 pci_drv->driver.name,
274 (unsigned) pci_dev->id.vendor_id,
275 (unsigned) pci_dev->id.device_id);
276 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
277 rte_free(eth_dev->data->dev_private);
278 rte_eth_dev_release_port(eth_dev);
283 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
285 const struct eth_driver *eth_drv;
286 struct rte_eth_dev *eth_dev;
287 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
293 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
294 sizeof(ethdev_name));
296 eth_dev = rte_eth_dev_allocated(ethdev_name);
300 eth_drv = (const struct eth_driver *)pci_dev->driver;
302 /* Invoke PMD device uninit function */
303 if (*eth_drv->eth_dev_uninit) {
304 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
309 /* free ether device */
310 rte_eth_dev_release_port(eth_dev);
312 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
313 rte_free(eth_dev->data->dev_private);
315 eth_dev->pci_dev = NULL;
316 eth_dev->driver = NULL;
317 eth_dev->data = NULL;
323 rte_eth_dev_is_valid_port(uint8_t port_id)
325 if (port_id >= RTE_MAX_ETHPORTS ||
326 rte_eth_devices[port_id].attached != DEV_ATTACHED)
333 rte_eth_dev_socket_id(uint8_t port_id)
335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
336 return rte_eth_devices[port_id].data->numa_node;
340 rte_eth_dev_count(void)
346 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
353 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
357 /* shouldn't check 'rte_eth_devices[i].data',
358 * because it might be overwritten by VDEV PMD */
359 tmp = rte_eth_dev_data[port_id].name;
365 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
370 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
377 *port_id = RTE_MAX_ETHPORTS;
379 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
382 rte_eth_dev_data[i].name, strlen(name))) {
393 rte_eth_dev_is_detachable(uint8_t port_id)
397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
399 switch (rte_eth_devices[port_id].data->kdrv) {
400 case RTE_KDRV_IGB_UIO:
401 case RTE_KDRV_UIO_GENERIC:
402 case RTE_KDRV_NIC_UIO:
409 dev_flags = rte_eth_devices[port_id].data->dev_flags;
410 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
411 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
417 /* attach the new device, then store port_id of the device */
419 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
422 int current = rte_eth_dev_count();
426 if ((devargs == NULL) || (port_id == NULL)) {
431 /* parse devargs, then retrieve device name and args */
432 if (rte_eal_parse_devargs_str(devargs, &name, &args))
435 ret = rte_eal_dev_attach(name, args);
439 /* no point looking at the port count if no port exists */
440 if (!rte_eth_dev_count()) {
441 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
446 /* if nothing happened, there is a bug here, since some driver told us
447 * it did attach a device, but did not create a port.
449 if (current == rte_eth_dev_count()) {
454 *port_id = eth_dev_last_created_port;
463 /* detach the device, then store the name of the device */
465 rte_eth_dev_detach(uint8_t port_id, char *name)
474 /* FIXME: move this to eal, once device flags are relocated there */
475 if (rte_eth_dev_is_detachable(port_id))
478 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
479 "%s", rte_eth_devices[port_id].data->name);
480 ret = rte_eal_dev_detach(name);
491 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
493 uint16_t old_nb_queues = dev->data->nb_rx_queues;
497 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
498 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
499 sizeof(dev->data->rx_queues[0]) * nb_queues,
500 RTE_CACHE_LINE_SIZE);
501 if (dev->data->rx_queues == NULL) {
502 dev->data->nb_rx_queues = 0;
505 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
508 rxq = dev->data->rx_queues;
510 for (i = nb_queues; i < old_nb_queues; i++)
511 (*dev->dev_ops->rx_queue_release)(rxq[i]);
512 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
513 RTE_CACHE_LINE_SIZE);
516 if (nb_queues > old_nb_queues) {
517 uint16_t new_qs = nb_queues - old_nb_queues;
519 memset(rxq + old_nb_queues, 0,
520 sizeof(rxq[0]) * new_qs);
523 dev->data->rx_queues = rxq;
525 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
528 rxq = dev->data->rx_queues;
530 for (i = nb_queues; i < old_nb_queues; i++)
531 (*dev->dev_ops->rx_queue_release)(rxq[i]);
533 dev->data->nb_rx_queues = nb_queues;
538 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
540 struct rte_eth_dev *dev;
542 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
544 dev = &rte_eth_devices[port_id];
545 if (rx_queue_id >= dev->data->nb_rx_queues) {
546 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
552 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
553 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
554 " already started\n",
555 rx_queue_id, port_id);
559 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
564 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
566 struct rte_eth_dev *dev;
568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
570 dev = &rte_eth_devices[port_id];
571 if (rx_queue_id >= dev->data->nb_rx_queues) {
572 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
578 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
579 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
580 " already stopped\n",
581 rx_queue_id, port_id);
585 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
590 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
592 struct rte_eth_dev *dev;
594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
596 dev = &rte_eth_devices[port_id];
597 if (tx_queue_id >= dev->data->nb_tx_queues) {
598 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
604 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
605 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
606 " already started\n",
607 tx_queue_id, port_id);
611 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
616 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
618 struct rte_eth_dev *dev;
620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
622 dev = &rte_eth_devices[port_id];
623 if (tx_queue_id >= dev->data->nb_tx_queues) {
624 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
630 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
631 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
632 " already stopped\n",
633 tx_queue_id, port_id);
637 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
642 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
644 uint16_t old_nb_queues = dev->data->nb_tx_queues;
648 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
649 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
650 sizeof(dev->data->tx_queues[0]) * nb_queues,
651 RTE_CACHE_LINE_SIZE);
652 if (dev->data->tx_queues == NULL) {
653 dev->data->nb_tx_queues = 0;
656 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
659 txq = dev->data->tx_queues;
661 for (i = nb_queues; i < old_nb_queues; i++)
662 (*dev->dev_ops->tx_queue_release)(txq[i]);
663 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
664 RTE_CACHE_LINE_SIZE);
667 if (nb_queues > old_nb_queues) {
668 uint16_t new_qs = nb_queues - old_nb_queues;
670 memset(txq + old_nb_queues, 0,
671 sizeof(txq[0]) * new_qs);
674 dev->data->tx_queues = txq;
676 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
679 txq = dev->data->tx_queues;
681 for (i = nb_queues; i < old_nb_queues; i++)
682 (*dev->dev_ops->tx_queue_release)(txq[i]);
684 dev->data->nb_tx_queues = nb_queues;
689 rte_eth_speed_bitflag(uint32_t speed, int duplex)
692 case ETH_SPEED_NUM_10M:
693 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
694 case ETH_SPEED_NUM_100M:
695 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
696 case ETH_SPEED_NUM_1G:
697 return ETH_LINK_SPEED_1G;
698 case ETH_SPEED_NUM_2_5G:
699 return ETH_LINK_SPEED_2_5G;
700 case ETH_SPEED_NUM_5G:
701 return ETH_LINK_SPEED_5G;
702 case ETH_SPEED_NUM_10G:
703 return ETH_LINK_SPEED_10G;
704 case ETH_SPEED_NUM_20G:
705 return ETH_LINK_SPEED_20G;
706 case ETH_SPEED_NUM_25G:
707 return ETH_LINK_SPEED_25G;
708 case ETH_SPEED_NUM_40G:
709 return ETH_LINK_SPEED_40G;
710 case ETH_SPEED_NUM_50G:
711 return ETH_LINK_SPEED_50G;
712 case ETH_SPEED_NUM_56G:
713 return ETH_LINK_SPEED_56G;
714 case ETH_SPEED_NUM_100G:
715 return ETH_LINK_SPEED_100G;
722 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
723 const struct rte_eth_conf *dev_conf)
725 struct rte_eth_dev *dev;
726 struct rte_eth_dev_info dev_info;
729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
731 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
733 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
734 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
738 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
740 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
741 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
745 dev = &rte_eth_devices[port_id];
747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
750 if (dev->data->dev_started) {
752 "port %d must be stopped to allow configuration\n", port_id);
756 /* Copy the dev_conf parameter into the dev structure */
757 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
760 * Check that the numbers of RX and TX queues are not greater
761 * than the maximum number of RX and TX queues supported by the
764 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
766 if (nb_rx_q == 0 && nb_tx_q == 0) {
767 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
771 if (nb_rx_q > dev_info.max_rx_queues) {
772 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
773 port_id, nb_rx_q, dev_info.max_rx_queues);
777 if (nb_tx_q > dev_info.max_tx_queues) {
778 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
779 port_id, nb_tx_q, dev_info.max_tx_queues);
784 * If link state interrupt is enabled, check that the
785 * device supports it.
787 if ((dev_conf->intr_conf.lsc == 1) &&
788 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
789 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
790 dev->data->drv_name);
795 * If jumbo frames are enabled, check that the maximum RX packet
796 * length is supported by the configured device.
798 if (dev_conf->rxmode.jumbo_frame == 1) {
799 if (dev_conf->rxmode.max_rx_pkt_len >
800 dev_info.max_rx_pktlen) {
801 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
802 " > max valid value %u\n",
804 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
805 (unsigned)dev_info.max_rx_pktlen);
807 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
809 " < min valid value %u\n",
811 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
812 (unsigned)ETHER_MIN_LEN);
816 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
817 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
818 /* Use default value */
819 dev->data->dev_conf.rxmode.max_rx_pkt_len =
824 * Setup new number of RX/TX queues and reconfigure device.
826 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
828 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
833 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
835 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
837 rte_eth_dev_rx_queue_config(dev, 0);
841 diag = (*dev->dev_ops->dev_configure)(dev);
843 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
845 rte_eth_dev_rx_queue_config(dev, 0);
846 rte_eth_dev_tx_queue_config(dev, 0);
854 rte_eth_dev_config_restore(uint8_t port_id)
856 struct rte_eth_dev *dev;
857 struct rte_eth_dev_info dev_info;
858 struct ether_addr addr;
862 dev = &rte_eth_devices[port_id];
864 rte_eth_dev_info_get(port_id, &dev_info);
866 if (RTE_ETH_DEV_SRIOV(dev).active)
867 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
869 /* replay MAC address configuration */
870 for (i = 0; i < dev_info.max_mac_addrs; i++) {
871 addr = dev->data->mac_addrs[i];
873 /* skip zero address */
874 if (is_zero_ether_addr(&addr))
877 /* add address to the hardware */
878 if (*dev->dev_ops->mac_addr_add &&
879 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
880 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
882 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
884 /* exit the loop but not return an error */
889 /* replay promiscuous configuration */
890 if (rte_eth_promiscuous_get(port_id) == 1)
891 rte_eth_promiscuous_enable(port_id);
892 else if (rte_eth_promiscuous_get(port_id) == 0)
893 rte_eth_promiscuous_disable(port_id);
895 /* replay all multicast configuration */
896 if (rte_eth_allmulticast_get(port_id) == 1)
897 rte_eth_allmulticast_enable(port_id);
898 else if (rte_eth_allmulticast_get(port_id) == 0)
899 rte_eth_allmulticast_disable(port_id);
903 rte_eth_dev_start(uint8_t port_id)
905 struct rte_eth_dev *dev;
908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
910 dev = &rte_eth_devices[port_id];
912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
914 if (dev->data->dev_started != 0) {
915 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
916 " already started\n",
921 diag = (*dev->dev_ops->dev_start)(dev);
923 dev->data->dev_started = 1;
927 rte_eth_dev_config_restore(port_id);
929 if (dev->data->dev_conf.intr_conf.lsc == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
931 (*dev->dev_ops->link_update)(dev, 0);
937 rte_eth_dev_stop(uint8_t port_id)
939 struct rte_eth_dev *dev;
941 RTE_ETH_VALID_PORTID_OR_RET(port_id);
942 dev = &rte_eth_devices[port_id];
944 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
946 if (dev->data->dev_started == 0) {
947 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
948 " already stopped\n",
953 dev->data->dev_started = 0;
954 (*dev->dev_ops->dev_stop)(dev);
958 rte_eth_dev_set_link_up(uint8_t port_id)
960 struct rte_eth_dev *dev;
962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
964 dev = &rte_eth_devices[port_id];
966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
967 return (*dev->dev_ops->dev_set_link_up)(dev);
971 rte_eth_dev_set_link_down(uint8_t port_id)
973 struct rte_eth_dev *dev;
975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
977 dev = &rte_eth_devices[port_id];
979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
980 return (*dev->dev_ops->dev_set_link_down)(dev);
984 rte_eth_dev_close(uint8_t port_id)
986 struct rte_eth_dev *dev;
988 RTE_ETH_VALID_PORTID_OR_RET(port_id);
989 dev = &rte_eth_devices[port_id];
991 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
992 dev->data->dev_started = 0;
993 (*dev->dev_ops->dev_close)(dev);
995 rte_free(dev->data->rx_queues);
996 dev->data->rx_queues = NULL;
997 rte_free(dev->data->tx_queues);
998 dev->data->tx_queues = NULL;
1002 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1003 uint16_t nb_rx_desc, unsigned int socket_id,
1004 const struct rte_eth_rxconf *rx_conf,
1005 struct rte_mempool *mp)
1008 uint32_t mbp_buf_size;
1009 struct rte_eth_dev *dev;
1010 struct rte_eth_dev_info dev_info;
1012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1014 dev = &rte_eth_devices[port_id];
1015 if (rx_queue_id >= dev->data->nb_rx_queues) {
1016 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1020 if (dev->data->dev_started) {
1021 RTE_PMD_DEBUG_TRACE(
1022 "port %d must be stopped to allow configuration\n", port_id);
1026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1030 * Check the size of the mbuf data buffer.
1031 * This value must be provided in the private data of the memory pool.
1032 * First check that the memory pool has a valid private data.
1034 rte_eth_dev_info_get(port_id, &dev_info);
1035 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1036 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1037 mp->name, (int) mp->private_data_size,
1038 (int) sizeof(struct rte_pktmbuf_pool_private));
1041 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1043 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1044 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1045 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1049 (int)(RTE_PKTMBUF_HEADROOM +
1050 dev_info.min_rx_bufsize),
1051 (int)RTE_PKTMBUF_HEADROOM,
1052 (int)dev_info.min_rx_bufsize);
1056 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1057 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1058 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1060 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1061 "should be: <= %hu, = %hu, and a product of %hu\n",
1063 dev_info.rx_desc_lim.nb_max,
1064 dev_info.rx_desc_lim.nb_min,
1065 dev_info.rx_desc_lim.nb_align);
1069 if (rx_conf == NULL)
1070 rx_conf = &dev_info.default_rxconf;
1072 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1073 socket_id, rx_conf, mp);
1075 if (!dev->data->min_rx_buf_size ||
1076 dev->data->min_rx_buf_size > mbp_buf_size)
1077 dev->data->min_rx_buf_size = mbp_buf_size;
1084 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1085 uint16_t nb_tx_desc, unsigned int socket_id,
1086 const struct rte_eth_txconf *tx_conf)
1088 struct rte_eth_dev *dev;
1089 struct rte_eth_dev_info dev_info;
1091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1093 dev = &rte_eth_devices[port_id];
1094 if (tx_queue_id >= dev->data->nb_tx_queues) {
1095 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1099 if (dev->data->dev_started) {
1100 RTE_PMD_DEBUG_TRACE(
1101 "port %d must be stopped to allow configuration\n", port_id);
1105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1108 rte_eth_dev_info_get(port_id, &dev_info);
1110 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1111 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1112 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1113 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1114 "should be: <= %hu, = %hu, and a product of %hu\n",
1116 dev_info.tx_desc_lim.nb_max,
1117 dev_info.tx_desc_lim.nb_min,
1118 dev_info.tx_desc_lim.nb_align);
1122 if (tx_conf == NULL)
1123 tx_conf = &dev_info.default_txconf;
1125 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1126 socket_id, tx_conf);
1130 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1131 void *userdata __rte_unused)
1135 for (i = 0; i < unsent; i++)
1136 rte_pktmbuf_free(pkts[i]);
1140 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1143 uint64_t *count = userdata;
1146 for (i = 0; i < unsent; i++)
1147 rte_pktmbuf_free(pkts[i]);
1153 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1154 buffer_tx_error_fn cbfn, void *userdata)
1156 buffer->error_callback = cbfn;
1157 buffer->error_userdata = userdata;
1162 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1169 buffer->size = size;
1170 if (buffer->error_callback == NULL) {
1171 ret = rte_eth_tx_buffer_set_err_callback(
1172 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1179 rte_eth_promiscuous_enable(uint8_t port_id)
1181 struct rte_eth_dev *dev;
1183 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1184 dev = &rte_eth_devices[port_id];
1186 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1187 (*dev->dev_ops->promiscuous_enable)(dev);
1188 dev->data->promiscuous = 1;
1192 rte_eth_promiscuous_disable(uint8_t port_id)
1194 struct rte_eth_dev *dev;
1196 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1197 dev = &rte_eth_devices[port_id];
1199 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1200 dev->data->promiscuous = 0;
1201 (*dev->dev_ops->promiscuous_disable)(dev);
1205 rte_eth_promiscuous_get(uint8_t port_id)
1207 struct rte_eth_dev *dev;
1209 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1211 dev = &rte_eth_devices[port_id];
1212 return dev->data->promiscuous;
1216 rte_eth_allmulticast_enable(uint8_t port_id)
1218 struct rte_eth_dev *dev;
1220 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1221 dev = &rte_eth_devices[port_id];
1223 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1224 (*dev->dev_ops->allmulticast_enable)(dev);
1225 dev->data->all_multicast = 1;
1229 rte_eth_allmulticast_disable(uint8_t port_id)
1231 struct rte_eth_dev *dev;
1233 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1234 dev = &rte_eth_devices[port_id];
1236 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1237 dev->data->all_multicast = 0;
1238 (*dev->dev_ops->allmulticast_disable)(dev);
1242 rte_eth_allmulticast_get(uint8_t port_id)
1244 struct rte_eth_dev *dev;
1246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1248 dev = &rte_eth_devices[port_id];
1249 return dev->data->all_multicast;
1253 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1254 struct rte_eth_link *link)
1256 struct rte_eth_link *dst = link;
1257 struct rte_eth_link *src = &(dev->data->dev_link);
1259 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1260 *(uint64_t *)src) == 0)
1267 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1269 struct rte_eth_dev *dev;
1271 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1272 dev = &rte_eth_devices[port_id];
1274 if (dev->data->dev_conf.intr_conf.lsc != 0)
1275 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1277 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1278 (*dev->dev_ops->link_update)(dev, 1);
1279 *eth_link = dev->data->dev_link;
1284 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1286 struct rte_eth_dev *dev;
1288 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1289 dev = &rte_eth_devices[port_id];
1291 if (dev->data->dev_conf.intr_conf.lsc != 0)
1292 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1294 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1295 (*dev->dev_ops->link_update)(dev, 0);
1296 *eth_link = dev->data->dev_link;
1301 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1303 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1307 dev = &rte_eth_devices[port_id];
1308 memset(stats, 0, sizeof(*stats));
1310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1311 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1312 (*dev->dev_ops->stats_get)(dev, stats);
1317 rte_eth_stats_reset(uint8_t port_id)
1319 struct rte_eth_dev *dev;
1321 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1322 dev = &rte_eth_devices[port_id];
1324 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1325 (*dev->dev_ops->stats_reset)(dev);
1326 dev->data->rx_mbuf_alloc_failed = 0;
1330 get_xstats_count(uint8_t port_id)
1332 struct rte_eth_dev *dev;
1335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1336 dev = &rte_eth_devices[port_id];
1337 if (dev->dev_ops->xstats_get_names != NULL) {
1338 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1343 count += RTE_NB_STATS;
1344 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1346 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1352 rte_eth_xstats_get_names(uint8_t port_id,
1353 struct rte_eth_xstat_name *xstats_names,
1356 struct rte_eth_dev *dev;
1357 int cnt_used_entries;
1358 int cnt_expected_entries;
1359 int cnt_driver_entries;
1360 uint32_t idx, id_queue;
1363 cnt_expected_entries = get_xstats_count(port_id);
1364 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1365 (int)size < cnt_expected_entries)
1366 return cnt_expected_entries;
1368 /* port_id checked in get_xstats_count() */
1369 dev = &rte_eth_devices[port_id];
1370 cnt_used_entries = 0;
1372 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1373 snprintf(xstats_names[cnt_used_entries].name,
1374 sizeof(xstats_names[0].name),
1375 "%s", rte_stats_strings[idx].name);
1378 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1379 for (id_queue = 0; id_queue < num_q; id_queue++) {
1380 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1381 snprintf(xstats_names[cnt_used_entries].name,
1382 sizeof(xstats_names[0].name),
1384 id_queue, rte_rxq_stats_strings[idx].name);
1389 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1390 for (id_queue = 0; id_queue < num_q; id_queue++) {
1391 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1392 snprintf(xstats_names[cnt_used_entries].name,
1393 sizeof(xstats_names[0].name),
1395 id_queue, rte_txq_stats_strings[idx].name);
1400 if (dev->dev_ops->xstats_get_names != NULL) {
1401 /* If there are any driver-specific xstats, append them
1404 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1406 xstats_names + cnt_used_entries,
1407 size - cnt_used_entries);
1408 if (cnt_driver_entries < 0)
1409 return cnt_driver_entries;
1410 cnt_used_entries += cnt_driver_entries;
1413 return cnt_used_entries;
1416 /* retrieve ethdev extended statistics */
1418 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1421 struct rte_eth_stats eth_stats;
1422 struct rte_eth_dev *dev;
1423 unsigned count = 0, i, q;
1425 uint64_t val, *stats_ptr;
1426 uint16_t nb_rxqs, nb_txqs;
1428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1430 dev = &rte_eth_devices[port_id];
1432 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1433 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1435 /* Return generic statistics */
1436 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1437 (nb_txqs * RTE_NB_TXQ_STATS);
1439 /* implemented by the driver */
1440 if (dev->dev_ops->xstats_get != NULL) {
1441 /* Retrieve the xstats from the driver at the end of the
1444 xcount = (*dev->dev_ops->xstats_get)(dev,
1445 xstats ? xstats + count : NULL,
1446 (n > count) ? n - count : 0);
1452 if (n < count + xcount || xstats == NULL)
1453 return count + xcount;
1455 /* now fill the xstats structure */
1457 rte_eth_stats_get(port_id, ð_stats);
1460 for (i = 0; i < RTE_NB_STATS; i++) {
1461 stats_ptr = RTE_PTR_ADD(ð_stats,
1462 rte_stats_strings[i].offset);
1464 xstats[count++].value = val;
1468 for (q = 0; q < nb_rxqs; q++) {
1469 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1470 stats_ptr = RTE_PTR_ADD(ð_stats,
1471 rte_rxq_stats_strings[i].offset +
1472 q * sizeof(uint64_t));
1474 xstats[count++].value = val;
1479 for (q = 0; q < nb_txqs; q++) {
1480 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1481 stats_ptr = RTE_PTR_ADD(ð_stats,
1482 rte_txq_stats_strings[i].offset +
1483 q * sizeof(uint64_t));
1485 xstats[count++].value = val;
1489 for (i = 0; i < count + xcount; i++)
1492 return count + xcount;
1495 /* reset ethdev extended statistics */
1497 rte_eth_xstats_reset(uint8_t port_id)
1499 struct rte_eth_dev *dev;
1501 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1502 dev = &rte_eth_devices[port_id];
1504 /* implemented by the driver */
1505 if (dev->dev_ops->xstats_reset != NULL) {
1506 (*dev->dev_ops->xstats_reset)(dev);
1510 /* fallback to default */
1511 rte_eth_stats_reset(port_id);
1515 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1518 struct rte_eth_dev *dev;
1520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1522 dev = &rte_eth_devices[port_id];
1524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1525 return (*dev->dev_ops->queue_stats_mapping_set)
1526 (dev, queue_id, stat_idx, is_rx);
1531 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1534 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1540 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1543 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1548 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1550 struct rte_eth_dev *dev;
1551 const struct rte_eth_desc_lim lim = {
1552 .nb_max = UINT16_MAX,
1557 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1558 dev = &rte_eth_devices[port_id];
1560 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1561 dev_info->rx_desc_lim = lim;
1562 dev_info->tx_desc_lim = lim;
1564 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1565 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1566 dev_info->pci_dev = dev->pci_dev;
1567 dev_info->driver_name = dev->data->drv_name;
1568 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1569 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1573 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1574 uint32_t *ptypes, int num)
1577 struct rte_eth_dev *dev;
1578 const uint32_t *all_ptypes;
1580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1581 dev = &rte_eth_devices[port_id];
1582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1583 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1588 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1589 if (all_ptypes[i] & ptype_mask) {
1591 ptypes[j] = all_ptypes[i];
1599 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1601 struct rte_eth_dev *dev;
1603 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1604 dev = &rte_eth_devices[port_id];
1605 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1610 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1612 struct rte_eth_dev *dev;
1614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1616 dev = &rte_eth_devices[port_id];
1617 *mtu = dev->data->mtu;
1622 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1625 struct rte_eth_dev *dev;
1627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1628 dev = &rte_eth_devices[port_id];
1629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1631 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1633 dev->data->mtu = mtu;
1639 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1641 struct rte_eth_dev *dev;
1643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1644 dev = &rte_eth_devices[port_id];
1645 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1646 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1650 if (vlan_id > 4095) {
1651 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1652 port_id, (unsigned) vlan_id);
1655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1657 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1661 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1663 struct rte_eth_dev *dev;
1665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1666 dev = &rte_eth_devices[port_id];
1667 if (rx_queue_id >= dev->data->nb_rx_queues) {
1668 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1673 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1679 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1680 enum rte_vlan_type vlan_type,
1683 struct rte_eth_dev *dev;
1685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1686 dev = &rte_eth_devices[port_id];
1687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1689 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1693 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1695 struct rte_eth_dev *dev;
1700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1701 dev = &rte_eth_devices[port_id];
1703 /*check which option changed by application*/
1704 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1705 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1707 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1708 mask |= ETH_VLAN_STRIP_MASK;
1711 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1712 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1714 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1715 mask |= ETH_VLAN_FILTER_MASK;
1718 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1719 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1721 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1722 mask |= ETH_VLAN_EXTEND_MASK;
1729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1730 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1736 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1738 struct rte_eth_dev *dev;
1741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1742 dev = &rte_eth_devices[port_id];
1744 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1745 ret |= ETH_VLAN_STRIP_OFFLOAD;
1747 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1748 ret |= ETH_VLAN_FILTER_OFFLOAD;
1750 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1751 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1757 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1759 struct rte_eth_dev *dev;
1761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1762 dev = &rte_eth_devices[port_id];
1763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1764 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1770 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1772 struct rte_eth_dev *dev;
1774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1775 dev = &rte_eth_devices[port_id];
1776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1777 memset(fc_conf, 0, sizeof(*fc_conf));
1778 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1782 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1784 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1787 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1788 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1792 dev = &rte_eth_devices[port_id];
1793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1794 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1798 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1800 struct rte_eth_dev *dev;
1802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1803 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1804 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1808 dev = &rte_eth_devices[port_id];
1809 /* High water, low water validation are device specific */
1810 if (*dev->dev_ops->priority_flow_ctrl_set)
1811 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1816 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1824 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1825 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1826 RTE_RETA_GROUP_SIZE);
1830 num = reta_size / RTE_RETA_GROUP_SIZE;
1831 for (i = 0; i < num; i++) {
1832 if (reta_conf[i].mask)
1840 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1844 uint16_t i, idx, shift;
1850 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1854 for (i = 0; i < reta_size; i++) {
1855 idx = i / RTE_RETA_GROUP_SIZE;
1856 shift = i % RTE_RETA_GROUP_SIZE;
1857 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1858 (reta_conf[idx].reta[shift] >= max_rxq)) {
1859 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1860 "the maximum rxq index: %u\n", idx, shift,
1861 reta_conf[idx].reta[shift], max_rxq);
1870 rte_eth_dev_rss_reta_update(uint8_t port_id,
1871 struct rte_eth_rss_reta_entry64 *reta_conf,
1874 struct rte_eth_dev *dev;
1877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1878 /* Check mask bits */
1879 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1883 dev = &rte_eth_devices[port_id];
1885 /* Check entry value */
1886 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1887 dev->data->nb_rx_queues);
1891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1892 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1896 rte_eth_dev_rss_reta_query(uint8_t port_id,
1897 struct rte_eth_rss_reta_entry64 *reta_conf,
1900 struct rte_eth_dev *dev;
1903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1905 /* Check mask bits */
1906 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1910 dev = &rte_eth_devices[port_id];
1911 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1912 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1916 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1918 struct rte_eth_dev *dev;
1919 uint16_t rss_hash_protos;
1921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1922 rss_hash_protos = rss_conf->rss_hf;
1923 if ((rss_hash_protos != 0) &&
1924 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1925 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1929 dev = &rte_eth_devices[port_id];
1930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1931 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1935 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1936 struct rte_eth_rss_conf *rss_conf)
1938 struct rte_eth_dev *dev;
1940 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1941 dev = &rte_eth_devices[port_id];
1942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1943 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1947 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1948 struct rte_eth_udp_tunnel *udp_tunnel)
1950 struct rte_eth_dev *dev;
1952 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1953 if (udp_tunnel == NULL) {
1954 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1958 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1959 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1963 dev = &rte_eth_devices[port_id];
1964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
1965 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
1969 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
1970 struct rte_eth_udp_tunnel *udp_tunnel)
1972 struct rte_eth_dev *dev;
1974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1975 dev = &rte_eth_devices[port_id];
1977 if (udp_tunnel == NULL) {
1978 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1982 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1983 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
1988 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
1992 rte_eth_led_on(uint8_t port_id)
1994 struct rte_eth_dev *dev;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1997 dev = &rte_eth_devices[port_id];
1998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
1999 return (*dev->dev_ops->dev_led_on)(dev);
2003 rte_eth_led_off(uint8_t port_id)
2005 struct rte_eth_dev *dev;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2008 dev = &rte_eth_devices[port_id];
2009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2010 return (*dev->dev_ops->dev_led_off)(dev);
2014 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2018 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2020 struct rte_eth_dev_info dev_info;
2021 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2024 rte_eth_dev_info_get(port_id, &dev_info);
2026 for (i = 0; i < dev_info.max_mac_addrs; i++)
2027 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2033 static const struct ether_addr null_mac_addr;
2036 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2039 struct rte_eth_dev *dev;
2043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2044 dev = &rte_eth_devices[port_id];
2045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2047 if (is_zero_ether_addr(addr)) {
2048 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2052 if (pool >= ETH_64_POOLS) {
2053 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2057 index = get_mac_addr_index(port_id, addr);
2059 index = get_mac_addr_index(port_id, &null_mac_addr);
2061 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2066 pool_mask = dev->data->mac_pool_sel[index];
2068 /* Check if both MAC address and pool is already there, and do nothing */
2069 if (pool_mask & (1ULL << pool))
2074 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2076 /* Update address in NIC data structure */
2077 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2079 /* Update pool bitmap in NIC data structure */
2080 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2086 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2088 struct rte_eth_dev *dev;
2091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2092 dev = &rte_eth_devices[port_id];
2093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2095 index = get_mac_addr_index(port_id, addr);
2097 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2099 } else if (index < 0)
2100 return 0; /* Do nothing if address wasn't found */
2103 (*dev->dev_ops->mac_addr_remove)(dev, index);
2105 /* Update address in NIC data structure */
2106 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2108 /* reset pool bitmap */
2109 dev->data->mac_pool_sel[index] = 0;
2115 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2117 struct rte_eth_dev *dev;
2119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2121 if (!is_valid_assigned_ether_addr(addr))
2124 dev = &rte_eth_devices[port_id];
2125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2127 /* Update default address in NIC data structure */
2128 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2130 (*dev->dev_ops->mac_addr_set)(dev, addr);
2136 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2137 uint16_t rx_mode, uint8_t on)
2140 struct rte_eth_dev *dev;
2141 struct rte_eth_dev_info dev_info;
2143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2145 dev = &rte_eth_devices[port_id];
2146 rte_eth_dev_info_get(port_id, &dev_info);
2148 num_vfs = dev_info.max_vfs;
2150 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2155 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2159 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2163 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2167 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2169 struct rte_eth_dev_info dev_info;
2170 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2173 rte_eth_dev_info_get(port_id, &dev_info);
2174 if (!dev->data->hash_mac_addrs)
2177 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2178 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2179 ETHER_ADDR_LEN) == 0)
2186 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2191 struct rte_eth_dev *dev;
2193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2195 dev = &rte_eth_devices[port_id];
2196 if (is_zero_ether_addr(addr)) {
2197 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2202 index = get_hash_mac_addr_index(port_id, addr);
2203 /* Check if it's already there, and do nothing */
2204 if ((index >= 0) && (on))
2209 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2210 "set in UTA\n", port_id);
2214 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2216 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2222 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2223 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2225 /* Update address in NIC data structure */
2227 ether_addr_copy(addr,
2228 &dev->data->hash_mac_addrs[index]);
2230 ether_addr_copy(&null_mac_addr,
2231 &dev->data->hash_mac_addrs[index]);
2238 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2240 struct rte_eth_dev *dev;
2242 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2244 dev = &rte_eth_devices[port_id];
2246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2247 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2251 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2254 struct rte_eth_dev *dev;
2255 struct rte_eth_dev_info dev_info;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2259 dev = &rte_eth_devices[port_id];
2260 rte_eth_dev_info_get(port_id, &dev_info);
2262 num_vfs = dev_info.max_vfs;
2264 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2269 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2273 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2276 struct rte_eth_dev *dev;
2277 struct rte_eth_dev_info dev_info;
2279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2281 dev = &rte_eth_devices[port_id];
2282 rte_eth_dev_info_get(port_id, &dev_info);
2284 num_vfs = dev_info.max_vfs;
2286 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2291 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2295 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2296 uint64_t vf_mask, uint8_t vlan_on)
2298 struct rte_eth_dev *dev;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2304 if (vlan_id > ETHER_MAX_VLAN_ID) {
2305 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2311 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2316 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2320 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2323 struct rte_eth_dev *dev;
2324 struct rte_eth_dev_info dev_info;
2325 struct rte_eth_link link;
2327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2329 dev = &rte_eth_devices[port_id];
2330 rte_eth_dev_info_get(port_id, &dev_info);
2331 link = dev->data->dev_link;
2333 if (queue_idx > dev_info.max_tx_queues) {
2334 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2335 "invalid queue id=%d\n", port_id, queue_idx);
2339 if (tx_rate > link.link_speed) {
2340 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2341 "bigger than link speed= %d\n",
2342 tx_rate, link.link_speed);
2346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2347 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2350 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2353 struct rte_eth_dev *dev;
2354 struct rte_eth_dev_info dev_info;
2355 struct rte_eth_link link;
2360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2362 dev = &rte_eth_devices[port_id];
2363 rte_eth_dev_info_get(port_id, &dev_info);
2364 link = dev->data->dev_link;
2366 if (vf > dev_info.max_vfs) {
2367 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2368 "invalid vf id=%d\n", port_id, vf);
2372 if (tx_rate > link.link_speed) {
2373 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2374 "bigger than link speed= %d\n",
2375 tx_rate, link.link_speed);
2379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2380 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2384 rte_eth_mirror_rule_set(uint8_t port_id,
2385 struct rte_eth_mirror_conf *mirror_conf,
2386 uint8_t rule_id, uint8_t on)
2388 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2391 if (mirror_conf->rule_type == 0) {
2392 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2396 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2397 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2402 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2403 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2404 (mirror_conf->pool_mask == 0)) {
2405 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2409 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2410 mirror_conf->vlan.vlan_mask == 0) {
2411 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2415 dev = &rte_eth_devices[port_id];
2416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2418 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2422 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2424 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2428 dev = &rte_eth_devices[port_id];
2429 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2431 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2435 rte_eth_dev_callback_register(uint8_t port_id,
2436 enum rte_eth_event_type event,
2437 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2439 struct rte_eth_dev *dev;
2440 struct rte_eth_dev_callback *user_cb;
2445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2447 dev = &rte_eth_devices[port_id];
2448 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2450 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2451 if (user_cb->cb_fn == cb_fn &&
2452 user_cb->cb_arg == cb_arg &&
2453 user_cb->event == event) {
2458 /* create a new callback. */
2459 if (user_cb == NULL) {
2460 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2461 sizeof(struct rte_eth_dev_callback), 0);
2462 if (user_cb != NULL) {
2463 user_cb->cb_fn = cb_fn;
2464 user_cb->cb_arg = cb_arg;
2465 user_cb->event = event;
2466 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2470 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2471 return (user_cb == NULL) ? -ENOMEM : 0;
2475 rte_eth_dev_callback_unregister(uint8_t port_id,
2476 enum rte_eth_event_type event,
2477 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2480 struct rte_eth_dev *dev;
2481 struct rte_eth_dev_callback *cb, *next;
2486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2488 dev = &rte_eth_devices[port_id];
2489 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2492 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2494 next = TAILQ_NEXT(cb, next);
2496 if (cb->cb_fn != cb_fn || cb->event != event ||
2497 (cb->cb_arg != (void *)-1 &&
2498 cb->cb_arg != cb_arg))
2502 * if this callback is not executing right now,
2505 if (cb->active == 0) {
2506 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2513 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2518 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2519 enum rte_eth_event_type event, void *cb_arg)
2521 struct rte_eth_dev_callback *cb_lst;
2522 struct rte_eth_dev_callback dev_cb;
2524 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2525 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2526 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2531 dev_cb.cb_arg = (void *) cb_arg;
2533 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2534 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2536 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2539 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2543 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2546 struct rte_eth_dev *dev;
2547 struct rte_intr_handle *intr_handle;
2551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2553 dev = &rte_eth_devices[port_id];
2554 intr_handle = &dev->pci_dev->intr_handle;
2555 if (!intr_handle->intr_vec) {
2556 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2560 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2561 vec = intr_handle->intr_vec[qid];
2562 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2563 if (rc && rc != -EEXIST) {
2564 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2565 " op %d epfd %d vec %u\n",
2566 port_id, qid, op, epfd, vec);
2573 const struct rte_memzone *
2574 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2575 uint16_t queue_id, size_t size, unsigned align,
2578 char z_name[RTE_MEMZONE_NAMESIZE];
2579 const struct rte_memzone *mz;
2581 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2582 dev->driver->pci_drv.driver.name, ring_name,
2583 dev->data->port_id, queue_id);
2585 mz = rte_memzone_lookup(z_name);
2589 if (rte_xen_dom0_supported())
2590 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2591 0, align, RTE_PGSIZE_2M);
2593 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2598 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2599 int epfd, int op, void *data)
2602 struct rte_eth_dev *dev;
2603 struct rte_intr_handle *intr_handle;
2606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2608 dev = &rte_eth_devices[port_id];
2609 if (queue_id >= dev->data->nb_rx_queues) {
2610 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2614 intr_handle = &dev->pci_dev->intr_handle;
2615 if (!intr_handle->intr_vec) {
2616 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2620 vec = intr_handle->intr_vec[queue_id];
2621 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2622 if (rc && rc != -EEXIST) {
2623 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2624 " op %d epfd %d vec %u\n",
2625 port_id, queue_id, op, epfd, vec);
2633 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2636 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2640 dev = &rte_eth_devices[port_id];
2642 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2643 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2647 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2650 struct rte_eth_dev *dev;
2652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2654 dev = &rte_eth_devices[port_id];
2656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2657 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2660 #ifdef RTE_NIC_BYPASS
2661 int rte_eth_dev_bypass_init(uint8_t port_id)
2663 struct rte_eth_dev *dev;
2665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2667 dev = &rte_eth_devices[port_id];
2668 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2669 (*dev->dev_ops->bypass_init)(dev);
2674 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2676 struct rte_eth_dev *dev;
2678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2680 dev = &rte_eth_devices[port_id];
2681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2682 (*dev->dev_ops->bypass_state_show)(dev, state);
2687 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 dev = &rte_eth_devices[port_id];
2694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2695 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2700 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2702 struct rte_eth_dev *dev;
2704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2706 dev = &rte_eth_devices[port_id];
2707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2708 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2713 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2715 struct rte_eth_dev *dev;
2717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2719 dev = &rte_eth_devices[port_id];
2721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2722 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2727 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2729 struct rte_eth_dev *dev;
2731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2733 dev = &rte_eth_devices[port_id];
2735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2736 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2741 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2743 struct rte_eth_dev *dev;
2745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2747 dev = &rte_eth_devices[port_id];
2749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2750 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2755 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2757 struct rte_eth_dev *dev;
2759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2761 dev = &rte_eth_devices[port_id];
2763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2764 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2769 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2771 struct rte_eth_dev *dev;
2773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 dev = &rte_eth_devices[port_id];
2777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2778 (*dev->dev_ops->bypass_wd_reset)(dev);
2784 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2786 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2790 dev = &rte_eth_devices[port_id];
2791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2792 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2793 RTE_ETH_FILTER_NOP, NULL);
2797 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2798 enum rte_filter_op filter_op, void *arg)
2800 struct rte_eth_dev *dev;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 dev = &rte_eth_devices[port_id];
2805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2806 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2810 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2811 rte_rx_callback_fn fn, void *user_param)
2813 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2814 rte_errno = ENOTSUP;
2817 /* check input parameters */
2818 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2819 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2823 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2831 cb->param = user_param;
2833 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2834 /* Add the callbacks in fifo order. */
2835 struct rte_eth_rxtx_callback *tail =
2836 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2839 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2846 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2852 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2853 rte_rx_callback_fn fn, void *user_param)
2855 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2856 rte_errno = ENOTSUP;
2859 /* check input parameters */
2860 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2861 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2866 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2874 cb->param = user_param;
2876 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2877 /* Add the callbacks at fisrt position*/
2878 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2880 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2881 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2887 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2888 rte_tx_callback_fn fn, void *user_param)
2890 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2891 rte_errno = ENOTSUP;
2894 /* check input parameters */
2895 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2896 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2901 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2909 cb->param = user_param;
2911 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2912 /* Add the callbacks in fifo order. */
2913 struct rte_eth_rxtx_callback *tail =
2914 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2917 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2924 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2930 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2931 struct rte_eth_rxtx_callback *user_cb)
2933 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2936 /* Check input parameters. */
2937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2938 if (user_cb == NULL ||
2939 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2942 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2943 struct rte_eth_rxtx_callback *cb;
2944 struct rte_eth_rxtx_callback **prev_cb;
2947 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2948 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2949 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2951 if (cb == user_cb) {
2952 /* Remove the user cb from the callback list. */
2953 *prev_cb = cb->next;
2958 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2964 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2965 struct rte_eth_rxtx_callback *user_cb)
2967 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2970 /* Check input parameters. */
2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2972 if (user_cb == NULL ||
2973 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2976 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2978 struct rte_eth_rxtx_callback *cb;
2979 struct rte_eth_rxtx_callback **prev_cb;
2981 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2982 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2983 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2985 if (cb == user_cb) {
2986 /* Remove the user cb from the callback list. */
2987 *prev_cb = cb->next;
2992 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2998 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2999 struct rte_eth_rxq_info *qinfo)
3001 struct rte_eth_dev *dev;
3003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3008 dev = &rte_eth_devices[port_id];
3009 if (queue_id >= dev->data->nb_rx_queues) {
3010 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3016 memset(qinfo, 0, sizeof(*qinfo));
3017 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3022 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3023 struct rte_eth_txq_info *qinfo)
3025 struct rte_eth_dev *dev;
3027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3032 dev = &rte_eth_devices[port_id];
3033 if (queue_id >= dev->data->nb_tx_queues) {
3034 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3040 memset(qinfo, 0, sizeof(*qinfo));
3041 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3046 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3047 struct ether_addr *mc_addr_set,
3048 uint32_t nb_mc_addr)
3050 struct rte_eth_dev *dev;
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3054 dev = &rte_eth_devices[port_id];
3055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3056 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3060 rte_eth_timesync_enable(uint8_t port_id)
3062 struct rte_eth_dev *dev;
3064 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3065 dev = &rte_eth_devices[port_id];
3067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3068 return (*dev->dev_ops->timesync_enable)(dev);
3072 rte_eth_timesync_disable(uint8_t port_id)
3074 struct rte_eth_dev *dev;
3076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3077 dev = &rte_eth_devices[port_id];
3079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3080 return (*dev->dev_ops->timesync_disable)(dev);
3084 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3087 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3093 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3097 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3099 struct rte_eth_dev *dev;
3101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3102 dev = &rte_eth_devices[port_id];
3104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3105 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3109 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3111 struct rte_eth_dev *dev;
3113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3114 dev = &rte_eth_devices[port_id];
3116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3117 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3121 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3123 struct rte_eth_dev *dev;
3125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3126 dev = &rte_eth_devices[port_id];
3128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3129 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3133 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3135 struct rte_eth_dev *dev;
3137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3138 dev = &rte_eth_devices[port_id];
3140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3141 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3145 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3147 struct rte_eth_dev *dev;
3149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3151 dev = &rte_eth_devices[port_id];
3152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3153 return (*dev->dev_ops->get_reg)(dev, info);
3157 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3159 struct rte_eth_dev *dev;
3161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3163 dev = &rte_eth_devices[port_id];
3164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3165 return (*dev->dev_ops->get_eeprom_length)(dev);
3169 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3171 struct rte_eth_dev *dev;
3173 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3175 dev = &rte_eth_devices[port_id];
3176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3177 return (*dev->dev_ops->get_eeprom)(dev, info);
3181 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3183 struct rte_eth_dev *dev;
3185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3187 dev = &rte_eth_devices[port_id];
3188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3189 return (*dev->dev_ops->set_eeprom)(dev, info);
3193 rte_eth_dev_get_dcb_info(uint8_t port_id,
3194 struct rte_eth_dcb_info *dcb_info)
3196 struct rte_eth_dev *dev;
3198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3200 dev = &rte_eth_devices[port_id];
3201 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3204 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3208 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3210 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3211 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3216 eth_dev->data->dev_flags = 0;
3217 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3218 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3219 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3220 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3222 eth_dev->data->kdrv = pci_dev->kdrv;
3223 eth_dev->data->numa_node = pci_dev->device.numa_node;
3224 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3228 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3229 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3231 struct rte_eth_dev *dev;
3233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234 if (l2_tunnel == NULL) {
3235 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3239 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3240 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3244 dev = &rte_eth_devices[port_id];
3245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3247 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3251 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3252 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3256 struct rte_eth_dev *dev;
3258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3260 if (l2_tunnel == NULL) {
3261 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3265 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3266 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3271 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3275 dev = &rte_eth_devices[port_id];
3276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3278 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);