1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_profile.h"
42 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
43 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
44 static struct rte_eth_dev_data *rte_eth_dev_data;
45 static uint8_t eth_dev_last_created_port;
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* store statistics names and its offset in stats structure */
57 struct rte_eth_xstats_name_off {
58 char name[RTE_ETH_XSTATS_NAME_SIZE];
62 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
63 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
64 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
65 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
66 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
67 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
68 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
69 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
70 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
74 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
76 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
77 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
78 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
79 {"errors", offsetof(struct rte_eth_stats, q_errors)},
82 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
83 sizeof(rte_rxq_stats_strings[0]))
85 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
86 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
87 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
89 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
90 sizeof(rte_txq_stats_strings[0]))
94 * The user application callback description.
96 * It contains callback address to be registered by user application,
97 * the pointer to the parameters for callback, and the event type.
99 struct rte_eth_dev_callback {
100 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
101 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
102 void *cb_arg; /**< Parameter for callback */
103 void *ret_param; /**< Return parameter */
104 enum rte_eth_event_type event; /**< Interrupt event type */
105 uint32_t active; /**< Callback is executing */
114 rte_eth_find_next(uint16_t port_id)
116 while (port_id < RTE_MAX_ETHPORTS &&
117 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
120 if (port_id >= RTE_MAX_ETHPORTS)
121 return RTE_MAX_ETHPORTS;
127 rte_eth_dev_data_alloc(void)
129 const unsigned flags = 0;
130 const struct rte_memzone *mz;
132 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
133 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
134 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
135 rte_socket_id(), flags);
137 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
139 rte_panic("Cannot allocate memzone for ethernet port data\n");
141 rte_eth_dev_data = mz->addr;
142 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
143 memset(rte_eth_dev_data, 0,
144 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
148 rte_eth_dev_allocated(const char *name)
152 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
153 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
154 strcmp(rte_eth_devices[i].data->name, name) == 0)
155 return &rte_eth_devices[i];
161 rte_eth_dev_find_free_port(void)
165 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
166 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
169 return RTE_MAX_ETHPORTS;
172 static struct rte_eth_dev *
173 eth_dev_get(uint16_t port_id)
175 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
177 eth_dev->data = &rte_eth_dev_data[port_id];
178 eth_dev->state = RTE_ETH_DEV_ATTACHED;
180 eth_dev_last_created_port = port_id;
186 rte_eth_dev_allocate(const char *name)
189 struct rte_eth_dev *eth_dev;
191 port_id = rte_eth_dev_find_free_port();
192 if (port_id == RTE_MAX_ETHPORTS) {
193 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
197 if (rte_eth_dev_data == NULL)
198 rte_eth_dev_data_alloc();
200 if (rte_eth_dev_allocated(name) != NULL) {
201 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
206 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
207 eth_dev = eth_dev_get(port_id);
208 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
209 eth_dev->data->port_id = port_id;
210 eth_dev->data->mtu = ETHER_MTU;
216 * Attach to a port already registered by the primary process, which
217 * makes sure that the same device would have the same port id both
218 * in the primary and secondary process.
221 rte_eth_dev_attach_secondary(const char *name)
224 struct rte_eth_dev *eth_dev;
226 if (rte_eth_dev_data == NULL)
227 rte_eth_dev_data_alloc();
229 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
230 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
233 if (i == RTE_MAX_ETHPORTS) {
235 "device %s is not driven by the primary process\n",
240 eth_dev = eth_dev_get(i);
241 RTE_ASSERT(eth_dev->data->port_id == i);
247 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
252 eth_dev->state = RTE_ETH_DEV_UNUSED;
257 rte_eth_dev_is_valid_port(uint16_t port_id)
259 if (port_id >= RTE_MAX_ETHPORTS ||
260 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
261 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
268 rte_eth_dev_socket_id(uint16_t port_id)
270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
271 return rte_eth_devices[port_id].data->numa_node;
275 rte_eth_dev_get_sec_ctx(uint8_t port_id)
277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
278 return rte_eth_devices[port_id].security_ctx;
282 rte_eth_dev_count(void)
289 RTE_ETH_FOREACH_DEV(p)
296 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
303 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
307 /* shouldn't check 'rte_eth_devices[i].data',
308 * because it might be overwritten by VDEV PMD */
309 tmp = rte_eth_dev_data[port_id].name;
315 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
320 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
324 RTE_ETH_FOREACH_DEV(i) {
326 rte_eth_dev_data[i].name, strlen(name))) {
336 /* attach the new device, then store port_id of the device */
338 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
341 int current = rte_eth_dev_count();
345 if ((devargs == NULL) || (port_id == NULL)) {
350 /* parse devargs, then retrieve device name and args */
351 if (rte_eal_parse_devargs_str(devargs, &name, &args))
354 ret = rte_eal_dev_attach(name, args);
358 /* no point looking at the port count if no port exists */
359 if (!rte_eth_dev_count()) {
360 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
365 /* if nothing happened, there is a bug here, since some driver told us
366 * it did attach a device, but did not create a port.
368 if (current == rte_eth_dev_count()) {
373 *port_id = eth_dev_last_created_port;
382 /* detach the device, then store the name of the device */
384 rte_eth_dev_detach(uint16_t port_id, char *name)
389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
396 dev_flags = rte_eth_devices[port_id].data->dev_flags;
397 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
398 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
404 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
405 "%s", rte_eth_devices[port_id].data->name);
407 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
411 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
419 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
421 uint16_t old_nb_queues = dev->data->nb_rx_queues;
425 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
426 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
427 sizeof(dev->data->rx_queues[0]) * nb_queues,
428 RTE_CACHE_LINE_SIZE);
429 if (dev->data->rx_queues == NULL) {
430 dev->data->nb_rx_queues = 0;
433 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
436 rxq = dev->data->rx_queues;
438 for (i = nb_queues; i < old_nb_queues; i++)
439 (*dev->dev_ops->rx_queue_release)(rxq[i]);
440 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
441 RTE_CACHE_LINE_SIZE);
444 if (nb_queues > old_nb_queues) {
445 uint16_t new_qs = nb_queues - old_nb_queues;
447 memset(rxq + old_nb_queues, 0,
448 sizeof(rxq[0]) * new_qs);
451 dev->data->rx_queues = rxq;
453 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
456 rxq = dev->data->rx_queues;
458 for (i = nb_queues; i < old_nb_queues; i++)
459 (*dev->dev_ops->rx_queue_release)(rxq[i]);
461 rte_free(dev->data->rx_queues);
462 dev->data->rx_queues = NULL;
464 dev->data->nb_rx_queues = nb_queues;
469 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
471 struct rte_eth_dev *dev;
473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
475 dev = &rte_eth_devices[port_id];
476 if (rx_queue_id >= dev->data->nb_rx_queues) {
477 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
483 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
484 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
485 " already started\n",
486 rx_queue_id, port_id);
490 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
495 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
497 struct rte_eth_dev *dev;
499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
501 dev = &rte_eth_devices[port_id];
502 if (rx_queue_id >= dev->data->nb_rx_queues) {
503 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
509 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
510 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
511 " already stopped\n",
512 rx_queue_id, port_id);
516 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
521 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
523 struct rte_eth_dev *dev;
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
527 dev = &rte_eth_devices[port_id];
528 if (tx_queue_id >= dev->data->nb_tx_queues) {
529 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
535 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
536 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
537 " already started\n",
538 tx_queue_id, port_id);
542 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
547 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
549 struct rte_eth_dev *dev;
551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
553 dev = &rte_eth_devices[port_id];
554 if (tx_queue_id >= dev->data->nb_tx_queues) {
555 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
561 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
562 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
563 " already stopped\n",
564 tx_queue_id, port_id);
568 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
573 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
575 uint16_t old_nb_queues = dev->data->nb_tx_queues;
579 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
580 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
581 sizeof(dev->data->tx_queues[0]) * nb_queues,
582 RTE_CACHE_LINE_SIZE);
583 if (dev->data->tx_queues == NULL) {
584 dev->data->nb_tx_queues = 0;
587 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
590 txq = dev->data->tx_queues;
592 for (i = nb_queues; i < old_nb_queues; i++)
593 (*dev->dev_ops->tx_queue_release)(txq[i]);
594 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
595 RTE_CACHE_LINE_SIZE);
598 if (nb_queues > old_nb_queues) {
599 uint16_t new_qs = nb_queues - old_nb_queues;
601 memset(txq + old_nb_queues, 0,
602 sizeof(txq[0]) * new_qs);
605 dev->data->tx_queues = txq;
607 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
610 txq = dev->data->tx_queues;
612 for (i = nb_queues; i < old_nb_queues; i++)
613 (*dev->dev_ops->tx_queue_release)(txq[i]);
615 rte_free(dev->data->tx_queues);
616 dev->data->tx_queues = NULL;
618 dev->data->nb_tx_queues = nb_queues;
623 rte_eth_speed_bitflag(uint32_t speed, int duplex)
626 case ETH_SPEED_NUM_10M:
627 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
628 case ETH_SPEED_NUM_100M:
629 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
630 case ETH_SPEED_NUM_1G:
631 return ETH_LINK_SPEED_1G;
632 case ETH_SPEED_NUM_2_5G:
633 return ETH_LINK_SPEED_2_5G;
634 case ETH_SPEED_NUM_5G:
635 return ETH_LINK_SPEED_5G;
636 case ETH_SPEED_NUM_10G:
637 return ETH_LINK_SPEED_10G;
638 case ETH_SPEED_NUM_20G:
639 return ETH_LINK_SPEED_20G;
640 case ETH_SPEED_NUM_25G:
641 return ETH_LINK_SPEED_25G;
642 case ETH_SPEED_NUM_40G:
643 return ETH_LINK_SPEED_40G;
644 case ETH_SPEED_NUM_50G:
645 return ETH_LINK_SPEED_50G;
646 case ETH_SPEED_NUM_56G:
647 return ETH_LINK_SPEED_56G;
648 case ETH_SPEED_NUM_100G:
649 return ETH_LINK_SPEED_100G;
656 * A conversion function from rxmode bitfield API.
659 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
660 uint64_t *rx_offloads)
662 uint64_t offloads = 0;
664 if (rxmode->header_split == 1)
665 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
666 if (rxmode->hw_ip_checksum == 1)
667 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
668 if (rxmode->hw_vlan_filter == 1)
669 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
670 if (rxmode->hw_vlan_strip == 1)
671 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
672 if (rxmode->hw_vlan_extend == 1)
673 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
674 if (rxmode->jumbo_frame == 1)
675 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
676 if (rxmode->hw_strip_crc == 1)
677 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
678 if (rxmode->enable_scatter == 1)
679 offloads |= DEV_RX_OFFLOAD_SCATTER;
680 if (rxmode->enable_lro == 1)
681 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
682 if (rxmode->hw_timestamp == 1)
683 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
684 if (rxmode->security == 1)
685 offloads |= DEV_RX_OFFLOAD_SECURITY;
687 *rx_offloads = offloads;
691 * A conversion function from rxmode offloads API.
694 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
695 struct rte_eth_rxmode *rxmode)
698 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
699 rxmode->header_split = 1;
701 rxmode->header_split = 0;
702 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
703 rxmode->hw_ip_checksum = 1;
705 rxmode->hw_ip_checksum = 0;
706 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
707 rxmode->hw_vlan_filter = 1;
709 rxmode->hw_vlan_filter = 0;
710 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
711 rxmode->hw_vlan_strip = 1;
713 rxmode->hw_vlan_strip = 0;
714 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
715 rxmode->hw_vlan_extend = 1;
717 rxmode->hw_vlan_extend = 0;
718 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
719 rxmode->jumbo_frame = 1;
721 rxmode->jumbo_frame = 0;
722 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
723 rxmode->hw_strip_crc = 1;
725 rxmode->hw_strip_crc = 0;
726 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
727 rxmode->enable_scatter = 1;
729 rxmode->enable_scatter = 0;
730 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
731 rxmode->enable_lro = 1;
733 rxmode->enable_lro = 0;
734 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
735 rxmode->hw_timestamp = 1;
737 rxmode->hw_timestamp = 0;
738 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
739 rxmode->security = 1;
741 rxmode->security = 0;
745 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
746 const struct rte_eth_conf *dev_conf)
748 struct rte_eth_dev *dev;
749 struct rte_eth_dev_info dev_info;
750 struct rte_eth_conf local_conf = *dev_conf;
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
755 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
757 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
758 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
762 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
764 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
765 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
769 dev = &rte_eth_devices[port_id];
771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
774 if (dev->data->dev_started) {
776 "port %d must be stopped to allow configuration\n", port_id);
781 * Convert between the offloads API to enable PMDs to support
784 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
785 rte_eth_convert_rx_offload_bitfield(
786 &dev_conf->rxmode, &local_conf.rxmode.offloads);
788 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
792 /* Copy the dev_conf parameter into the dev structure */
793 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
796 * Check that the numbers of RX and TX queues are not greater
797 * than the maximum number of RX and TX queues supported by the
800 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
802 if (nb_rx_q == 0 && nb_tx_q == 0) {
803 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
807 if (nb_rx_q > dev_info.max_rx_queues) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
809 port_id, nb_rx_q, dev_info.max_rx_queues);
813 if (nb_tx_q > dev_info.max_tx_queues) {
814 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
815 port_id, nb_tx_q, dev_info.max_tx_queues);
819 /* Check that the device supports requested interrupts */
820 if ((dev_conf->intr_conf.lsc == 1) &&
821 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
822 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
823 dev->device->driver->name);
826 if ((dev_conf->intr_conf.rmv == 1) &&
827 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
828 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
829 dev->device->driver->name);
834 * If jumbo frames are enabled, check that the maximum RX packet
835 * length is supported by the configured device.
837 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
838 if (dev_conf->rxmode.max_rx_pkt_len >
839 dev_info.max_rx_pktlen) {
840 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
841 " > max valid value %u\n",
843 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
844 (unsigned)dev_info.max_rx_pktlen);
846 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
847 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
848 " < min valid value %u\n",
850 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
851 (unsigned)ETHER_MIN_LEN);
855 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
856 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
857 /* Use default value */
858 dev->data->dev_conf.rxmode.max_rx_pkt_len =
863 * Setup new number of RX/TX queues and reconfigure device.
865 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
867 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
872 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
874 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
876 rte_eth_dev_rx_queue_config(dev, 0);
880 diag = (*dev->dev_ops->dev_configure)(dev);
882 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
884 rte_eth_dev_rx_queue_config(dev, 0);
885 rte_eth_dev_tx_queue_config(dev, 0);
889 /* Initialize Rx profiling if enabled at compilation time. */
890 diag = __rte_eth_profile_rx_init(port_id, dev);
892 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
894 rte_eth_dev_rx_queue_config(dev, 0);
895 rte_eth_dev_tx_queue_config(dev, 0);
903 _rte_eth_dev_reset(struct rte_eth_dev *dev)
905 if (dev->data->dev_started) {
907 "port %d must be stopped to allow reset\n",
912 rte_eth_dev_rx_queue_config(dev, 0);
913 rte_eth_dev_tx_queue_config(dev, 0);
915 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
919 rte_eth_dev_config_restore(uint16_t port_id)
921 struct rte_eth_dev *dev;
922 struct rte_eth_dev_info dev_info;
923 struct ether_addr *addr;
928 dev = &rte_eth_devices[port_id];
930 rte_eth_dev_info_get(port_id, &dev_info);
932 /* replay MAC address configuration including default MAC */
933 addr = &dev->data->mac_addrs[0];
934 if (*dev->dev_ops->mac_addr_set != NULL)
935 (*dev->dev_ops->mac_addr_set)(dev, addr);
936 else if (*dev->dev_ops->mac_addr_add != NULL)
937 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
939 if (*dev->dev_ops->mac_addr_add != NULL) {
940 for (i = 1; i < dev_info.max_mac_addrs; i++) {
941 addr = &dev->data->mac_addrs[i];
943 /* skip zero address */
944 if (is_zero_ether_addr(addr))
948 pool_mask = dev->data->mac_pool_sel[i];
951 if (pool_mask & 1ULL)
952 (*dev->dev_ops->mac_addr_add)(dev,
960 /* replay promiscuous configuration */
961 if (rte_eth_promiscuous_get(port_id) == 1)
962 rte_eth_promiscuous_enable(port_id);
963 else if (rte_eth_promiscuous_get(port_id) == 0)
964 rte_eth_promiscuous_disable(port_id);
966 /* replay all multicast configuration */
967 if (rte_eth_allmulticast_get(port_id) == 1)
968 rte_eth_allmulticast_enable(port_id);
969 else if (rte_eth_allmulticast_get(port_id) == 0)
970 rte_eth_allmulticast_disable(port_id);
974 rte_eth_dev_start(uint16_t port_id)
976 struct rte_eth_dev *dev;
979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
981 dev = &rte_eth_devices[port_id];
983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
985 if (dev->data->dev_started != 0) {
986 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
987 " already started\n",
992 diag = (*dev->dev_ops->dev_start)(dev);
994 dev->data->dev_started = 1;
998 rte_eth_dev_config_restore(port_id);
1000 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1002 (*dev->dev_ops->link_update)(dev, 0);
1008 rte_eth_dev_stop(uint16_t port_id)
1010 struct rte_eth_dev *dev;
1012 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1013 dev = &rte_eth_devices[port_id];
1015 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1017 if (dev->data->dev_started == 0) {
1018 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1019 " already stopped\n",
1024 dev->data->dev_started = 0;
1025 (*dev->dev_ops->dev_stop)(dev);
1029 rte_eth_dev_set_link_up(uint16_t port_id)
1031 struct rte_eth_dev *dev;
1033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1035 dev = &rte_eth_devices[port_id];
1037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1038 return (*dev->dev_ops->dev_set_link_up)(dev);
1042 rte_eth_dev_set_link_down(uint16_t port_id)
1044 struct rte_eth_dev *dev;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1048 dev = &rte_eth_devices[port_id];
1050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1051 return (*dev->dev_ops->dev_set_link_down)(dev);
1055 rte_eth_dev_close(uint16_t port_id)
1057 struct rte_eth_dev *dev;
1059 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1060 dev = &rte_eth_devices[port_id];
1062 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1063 dev->data->dev_started = 0;
1064 (*dev->dev_ops->dev_close)(dev);
1066 dev->data->nb_rx_queues = 0;
1067 rte_free(dev->data->rx_queues);
1068 dev->data->rx_queues = NULL;
1069 dev->data->nb_tx_queues = 0;
1070 rte_free(dev->data->tx_queues);
1071 dev->data->tx_queues = NULL;
1075 rte_eth_dev_reset(uint16_t port_id)
1077 struct rte_eth_dev *dev;
1080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1081 dev = &rte_eth_devices[port_id];
1083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1085 rte_eth_dev_stop(port_id);
1086 ret = dev->dev_ops->dev_reset(dev);
1092 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1093 uint16_t nb_rx_desc, unsigned int socket_id,
1094 const struct rte_eth_rxconf *rx_conf,
1095 struct rte_mempool *mp)
1098 uint32_t mbp_buf_size;
1099 struct rte_eth_dev *dev;
1100 struct rte_eth_dev_info dev_info;
1101 struct rte_eth_rxconf local_conf;
1104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1106 dev = &rte_eth_devices[port_id];
1107 if (rx_queue_id >= dev->data->nb_rx_queues) {
1108 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1112 if (dev->data->dev_started) {
1113 RTE_PMD_DEBUG_TRACE(
1114 "port %d must be stopped to allow configuration\n", port_id);
1118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1122 * Check the size of the mbuf data buffer.
1123 * This value must be provided in the private data of the memory pool.
1124 * First check that the memory pool has a valid private data.
1126 rte_eth_dev_info_get(port_id, &dev_info);
1127 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1128 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1129 mp->name, (int) mp->private_data_size,
1130 (int) sizeof(struct rte_pktmbuf_pool_private));
1133 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1135 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1136 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1137 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1141 (int)(RTE_PKTMBUF_HEADROOM +
1142 dev_info.min_rx_bufsize),
1143 (int)RTE_PKTMBUF_HEADROOM,
1144 (int)dev_info.min_rx_bufsize);
1148 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1149 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1150 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1152 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1153 "should be: <= %hu, = %hu, and a product of %hu\n",
1155 dev_info.rx_desc_lim.nb_max,
1156 dev_info.rx_desc_lim.nb_min,
1157 dev_info.rx_desc_lim.nb_align);
1161 rxq = dev->data->rx_queues;
1162 if (rxq[rx_queue_id]) {
1163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1165 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1166 rxq[rx_queue_id] = NULL;
1169 if (rx_conf == NULL)
1170 rx_conf = &dev_info.default_rxconf;
1172 local_conf = *rx_conf;
1173 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1175 * Reflect port offloads to queue offloads in order for
1176 * offloads to not be discarded.
1178 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1179 &local_conf.offloads);
1182 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1183 socket_id, &local_conf, mp);
1185 if (!dev->data->min_rx_buf_size ||
1186 dev->data->min_rx_buf_size > mbp_buf_size)
1187 dev->data->min_rx_buf_size = mbp_buf_size;
1194 * A conversion function from txq_flags API.
1197 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1199 uint64_t offloads = 0;
1201 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1202 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1203 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1204 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1205 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1206 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1207 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1208 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1209 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1210 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1211 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1212 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1213 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1215 *tx_offloads = offloads;
1219 * A conversion function from offloads API.
1222 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1226 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1227 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1228 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1229 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1230 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1231 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1232 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1233 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1234 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1235 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1236 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1237 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1243 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1244 uint16_t nb_tx_desc, unsigned int socket_id,
1245 const struct rte_eth_txconf *tx_conf)
1247 struct rte_eth_dev *dev;
1248 struct rte_eth_dev_info dev_info;
1249 struct rte_eth_txconf local_conf;
1252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1254 dev = &rte_eth_devices[port_id];
1255 if (tx_queue_id >= dev->data->nb_tx_queues) {
1256 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1260 if (dev->data->dev_started) {
1261 RTE_PMD_DEBUG_TRACE(
1262 "port %d must be stopped to allow configuration\n", port_id);
1266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1269 rte_eth_dev_info_get(port_id, &dev_info);
1271 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1272 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1273 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1274 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1275 "should be: <= %hu, = %hu, and a product of %hu\n",
1277 dev_info.tx_desc_lim.nb_max,
1278 dev_info.tx_desc_lim.nb_min,
1279 dev_info.tx_desc_lim.nb_align);
1283 txq = dev->data->tx_queues;
1284 if (txq[tx_queue_id]) {
1285 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1287 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1288 txq[tx_queue_id] = NULL;
1291 if (tx_conf == NULL)
1292 tx_conf = &dev_info.default_txconf;
1295 * Convert between the offloads API to enable PMDs to support
1298 local_conf = *tx_conf;
1299 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1300 rte_eth_convert_txq_offloads(tx_conf->offloads,
1301 &local_conf.txq_flags);
1302 /* Keep the ignore flag. */
1303 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1305 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1306 &local_conf.offloads);
1309 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1310 socket_id, &local_conf);
1314 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1315 void *userdata __rte_unused)
1319 for (i = 0; i < unsent; i++)
1320 rte_pktmbuf_free(pkts[i]);
1324 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1327 uint64_t *count = userdata;
1330 for (i = 0; i < unsent; i++)
1331 rte_pktmbuf_free(pkts[i]);
1337 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1338 buffer_tx_error_fn cbfn, void *userdata)
1340 buffer->error_callback = cbfn;
1341 buffer->error_userdata = userdata;
1346 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1353 buffer->size = size;
1354 if (buffer->error_callback == NULL) {
1355 ret = rte_eth_tx_buffer_set_err_callback(
1356 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1363 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1365 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1367 /* Validate Input Data. Bail if not valid or not supported. */
1368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1371 /* Call driver to free pending mbufs. */
1372 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1377 rte_eth_promiscuous_enable(uint16_t port_id)
1379 struct rte_eth_dev *dev;
1381 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1382 dev = &rte_eth_devices[port_id];
1384 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1385 (*dev->dev_ops->promiscuous_enable)(dev);
1386 dev->data->promiscuous = 1;
1390 rte_eth_promiscuous_disable(uint16_t port_id)
1392 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1395 dev = &rte_eth_devices[port_id];
1397 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1398 dev->data->promiscuous = 0;
1399 (*dev->dev_ops->promiscuous_disable)(dev);
1403 rte_eth_promiscuous_get(uint16_t port_id)
1405 struct rte_eth_dev *dev;
1407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1409 dev = &rte_eth_devices[port_id];
1410 return dev->data->promiscuous;
1414 rte_eth_allmulticast_enable(uint16_t port_id)
1416 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1419 dev = &rte_eth_devices[port_id];
1421 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1422 (*dev->dev_ops->allmulticast_enable)(dev);
1423 dev->data->all_multicast = 1;
1427 rte_eth_allmulticast_disable(uint16_t port_id)
1429 struct rte_eth_dev *dev;
1431 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1432 dev = &rte_eth_devices[port_id];
1434 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1435 dev->data->all_multicast = 0;
1436 (*dev->dev_ops->allmulticast_disable)(dev);
1440 rte_eth_allmulticast_get(uint16_t port_id)
1442 struct rte_eth_dev *dev;
1444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1446 dev = &rte_eth_devices[port_id];
1447 return dev->data->all_multicast;
1451 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1452 struct rte_eth_link *link)
1454 struct rte_eth_link *dst = link;
1455 struct rte_eth_link *src = &(dev->data->dev_link);
1457 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1458 *(uint64_t *)src) == 0)
1465 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1467 struct rte_eth_dev *dev;
1469 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1470 dev = &rte_eth_devices[port_id];
1472 if (dev->data->dev_conf.intr_conf.lsc != 0)
1473 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1475 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1476 (*dev->dev_ops->link_update)(dev, 1);
1477 *eth_link = dev->data->dev_link;
1482 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1484 struct rte_eth_dev *dev;
1486 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1487 dev = &rte_eth_devices[port_id];
1489 if (dev->data->dev_conf.intr_conf.lsc != 0)
1490 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1492 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1493 (*dev->dev_ops->link_update)(dev, 0);
1494 *eth_link = dev->data->dev_link;
1499 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1501 struct rte_eth_dev *dev;
1503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1505 dev = &rte_eth_devices[port_id];
1506 memset(stats, 0, sizeof(*stats));
1508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1509 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1510 return (*dev->dev_ops->stats_get)(dev, stats);
1514 rte_eth_stats_reset(uint16_t port_id)
1516 struct rte_eth_dev *dev;
1518 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1519 dev = &rte_eth_devices[port_id];
1521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1522 (*dev->dev_ops->stats_reset)(dev);
1523 dev->data->rx_mbuf_alloc_failed = 0;
1529 get_xstats_basic_count(struct rte_eth_dev *dev)
1531 uint16_t nb_rxqs, nb_txqs;
1534 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1535 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1537 count = RTE_NB_STATS;
1538 count += nb_rxqs * RTE_NB_RXQ_STATS;
1539 count += nb_txqs * RTE_NB_TXQ_STATS;
1545 get_xstats_count(uint16_t port_id)
1547 struct rte_eth_dev *dev;
1550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1551 dev = &rte_eth_devices[port_id];
1552 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1553 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1558 if (dev->dev_ops->xstats_get_names != NULL) {
1559 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1566 count += get_xstats_basic_count(dev);
1572 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1575 int cnt_xstats, idx_xstat;
1577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1580 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1585 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1590 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1591 if (cnt_xstats < 0) {
1592 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1596 /* Get id-name lookup table */
1597 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1599 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1600 port_id, xstats_names, cnt_xstats, NULL)) {
1601 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1605 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1606 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1615 /* retrieve basic stats names */
1617 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1618 struct rte_eth_xstat_name *xstats_names)
1620 int cnt_used_entries = 0;
1621 uint32_t idx, id_queue;
1624 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1625 snprintf(xstats_names[cnt_used_entries].name,
1626 sizeof(xstats_names[0].name),
1627 "%s", rte_stats_strings[idx].name);
1630 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1631 for (id_queue = 0; id_queue < num_q; id_queue++) {
1632 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1633 snprintf(xstats_names[cnt_used_entries].name,
1634 sizeof(xstats_names[0].name),
1636 id_queue, rte_rxq_stats_strings[idx].name);
1641 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1642 for (id_queue = 0; id_queue < num_q; id_queue++) {
1643 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1644 snprintf(xstats_names[cnt_used_entries].name,
1645 sizeof(xstats_names[0].name),
1647 id_queue, rte_txq_stats_strings[idx].name);
1651 return cnt_used_entries;
1654 /* retrieve ethdev extended statistics names */
1656 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1657 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1660 struct rte_eth_xstat_name *xstats_names_copy;
1661 unsigned int no_basic_stat_requested = 1;
1662 unsigned int no_ext_stat_requested = 1;
1663 unsigned int expected_entries;
1664 unsigned int basic_count;
1665 struct rte_eth_dev *dev;
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1670 dev = &rte_eth_devices[port_id];
1672 basic_count = get_xstats_basic_count(dev);
1673 ret = get_xstats_count(port_id);
1676 expected_entries = (unsigned int)ret;
1678 /* Return max number of stats if no ids given */
1681 return expected_entries;
1682 else if (xstats_names && size < expected_entries)
1683 return expected_entries;
1686 if (ids && !xstats_names)
1689 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1690 uint64_t ids_copy[size];
1692 for (i = 0; i < size; i++) {
1693 if (ids[i] < basic_count) {
1694 no_basic_stat_requested = 0;
1699 * Convert ids to xstats ids that PMD knows.
1700 * ids known by user are basic + extended stats.
1702 ids_copy[i] = ids[i] - basic_count;
1705 if (no_basic_stat_requested)
1706 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1707 xstats_names, ids_copy, size);
1710 /* Retrieve all stats */
1712 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1714 if (num_stats < 0 || num_stats > (int)expected_entries)
1717 return expected_entries;
1720 xstats_names_copy = calloc(expected_entries,
1721 sizeof(struct rte_eth_xstat_name));
1723 if (!xstats_names_copy) {
1724 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1729 for (i = 0; i < size; i++) {
1730 if (ids[i] > basic_count) {
1731 no_ext_stat_requested = 0;
1737 /* Fill xstats_names_copy structure */
1738 if (ids && no_ext_stat_requested) {
1739 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1741 rte_eth_xstats_get_names(port_id, xstats_names_copy,
1746 for (i = 0; i < size; i++) {
1747 if (ids[i] >= expected_entries) {
1748 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1749 free(xstats_names_copy);
1752 xstats_names[i] = xstats_names_copy[ids[i]];
1755 free(xstats_names_copy);
1760 rte_eth_xstats_get_names(uint16_t port_id,
1761 struct rte_eth_xstat_name *xstats_names,
1764 struct rte_eth_dev *dev;
1765 int cnt_used_entries;
1766 int cnt_expected_entries;
1767 int cnt_driver_entries;
1769 cnt_expected_entries = get_xstats_count(port_id);
1770 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1771 (int)size < cnt_expected_entries)
1772 return cnt_expected_entries;
1774 /* port_id checked in get_xstats_count() */
1775 dev = &rte_eth_devices[port_id];
1777 cnt_used_entries = rte_eth_basic_stats_get_names(
1780 if (dev->dev_ops->xstats_get_names != NULL) {
1781 /* If there are any driver-specific xstats, append them
1784 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1786 xstats_names + cnt_used_entries,
1787 size - cnt_used_entries);
1788 if (cnt_driver_entries < 0)
1789 return cnt_driver_entries;
1790 cnt_used_entries += cnt_driver_entries;
1793 return cnt_used_entries;
1798 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1800 struct rte_eth_dev *dev;
1801 struct rte_eth_stats eth_stats;
1802 unsigned int count = 0, i, q;
1803 uint64_t val, *stats_ptr;
1804 uint16_t nb_rxqs, nb_txqs;
1806 rte_eth_stats_get(port_id, ð_stats);
1807 dev = &rte_eth_devices[port_id];
1809 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1810 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1813 for (i = 0; i < RTE_NB_STATS; i++) {
1814 stats_ptr = RTE_PTR_ADD(ð_stats,
1815 rte_stats_strings[i].offset);
1817 xstats[count++].value = val;
1821 for (q = 0; q < nb_rxqs; q++) {
1822 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1823 stats_ptr = RTE_PTR_ADD(ð_stats,
1824 rte_rxq_stats_strings[i].offset +
1825 q * sizeof(uint64_t));
1827 xstats[count++].value = val;
1832 for (q = 0; q < nb_txqs; q++) {
1833 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1834 stats_ptr = RTE_PTR_ADD(ð_stats,
1835 rte_txq_stats_strings[i].offset +
1836 q * sizeof(uint64_t));
1838 xstats[count++].value = val;
1844 /* retrieve ethdev extended statistics */
1846 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1847 uint64_t *values, unsigned int size)
1849 unsigned int no_basic_stat_requested = 1;
1850 unsigned int no_ext_stat_requested = 1;
1851 unsigned int num_xstats_filled;
1852 unsigned int basic_count;
1853 uint16_t expected_entries;
1854 struct rte_eth_dev *dev;
1858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1859 expected_entries = get_xstats_count(port_id);
1860 struct rte_eth_xstat xstats[expected_entries];
1861 dev = &rte_eth_devices[port_id];
1862 basic_count = get_xstats_basic_count(dev);
1864 /* Return max number of stats if no ids given */
1867 return expected_entries;
1868 else if (values && size < expected_entries)
1869 return expected_entries;
1875 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1876 unsigned int basic_count = get_xstats_basic_count(dev);
1877 uint64_t ids_copy[size];
1879 for (i = 0; i < size; i++) {
1880 if (ids[i] < basic_count) {
1881 no_basic_stat_requested = 0;
1886 * Convert ids to xstats ids that PMD knows.
1887 * ids known by user are basic + extended stats.
1889 ids_copy[i] = ids[i] - basic_count;
1892 if (no_basic_stat_requested)
1893 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1898 for (i = 0; i < size; i++) {
1899 if (ids[i] > basic_count) {
1900 no_ext_stat_requested = 0;
1906 /* Fill the xstats structure */
1907 if (ids && no_ext_stat_requested)
1908 ret = rte_eth_basic_stats_get(port_id, xstats);
1910 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1914 num_xstats_filled = (unsigned int)ret;
1916 /* Return all stats */
1918 for (i = 0; i < num_xstats_filled; i++)
1919 values[i] = xstats[i].value;
1920 return expected_entries;
1924 for (i = 0; i < size; i++) {
1925 if (ids[i] >= expected_entries) {
1926 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1929 values[i] = xstats[ids[i]].value;
1935 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1938 struct rte_eth_dev *dev;
1939 unsigned int count = 0, i;
1940 signed int xcount = 0;
1941 uint16_t nb_rxqs, nb_txqs;
1943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1945 dev = &rte_eth_devices[port_id];
1947 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1948 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1950 /* Return generic statistics */
1951 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1952 (nb_txqs * RTE_NB_TXQ_STATS);
1954 /* implemented by the driver */
1955 if (dev->dev_ops->xstats_get != NULL) {
1956 /* Retrieve the xstats from the driver at the end of the
1959 xcount = (*dev->dev_ops->xstats_get)(dev,
1960 xstats ? xstats + count : NULL,
1961 (n > count) ? n - count : 0);
1967 if (n < count + xcount || xstats == NULL)
1968 return count + xcount;
1970 /* now fill the xstats structure */
1971 count = rte_eth_basic_stats_get(port_id, xstats);
1973 for (i = 0; i < count; i++)
1975 /* add an offset to driver-specific stats */
1976 for ( ; i < count + xcount; i++)
1977 xstats[i].id += count;
1979 return count + xcount;
1982 /* reset ethdev extended statistics */
1984 rte_eth_xstats_reset(uint16_t port_id)
1986 struct rte_eth_dev *dev;
1988 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1989 dev = &rte_eth_devices[port_id];
1991 /* implemented by the driver */
1992 if (dev->dev_ops->xstats_reset != NULL) {
1993 (*dev->dev_ops->xstats_reset)(dev);
1997 /* fallback to default */
1998 rte_eth_stats_reset(port_id);
2002 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2005 struct rte_eth_dev *dev;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2009 dev = &rte_eth_devices[port_id];
2011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2012 return (*dev->dev_ops->queue_stats_mapping_set)
2013 (dev, queue_id, stat_idx, is_rx);
2018 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2021 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2027 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2030 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2035 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2037 struct rte_eth_dev *dev;
2039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2040 dev = &rte_eth_devices[port_id];
2042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2043 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2047 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2049 struct rte_eth_dev *dev;
2050 const struct rte_eth_desc_lim lim = {
2051 .nb_max = UINT16_MAX,
2056 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2057 dev = &rte_eth_devices[port_id];
2059 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2060 dev_info->rx_desc_lim = lim;
2061 dev_info->tx_desc_lim = lim;
2063 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2064 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2065 dev_info->driver_name = dev->device->driver->name;
2066 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2067 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2071 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2072 uint32_t *ptypes, int num)
2075 struct rte_eth_dev *dev;
2076 const uint32_t *all_ptypes;
2078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2079 dev = &rte_eth_devices[port_id];
2080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2081 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2086 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2087 if (all_ptypes[i] & ptype_mask) {
2089 ptypes[j] = all_ptypes[i];
2097 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2099 struct rte_eth_dev *dev;
2101 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2102 dev = &rte_eth_devices[port_id];
2103 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2108 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2110 struct rte_eth_dev *dev;
2112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2114 dev = &rte_eth_devices[port_id];
2115 *mtu = dev->data->mtu;
2120 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2123 struct rte_eth_dev *dev;
2125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2126 dev = &rte_eth_devices[port_id];
2127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2129 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2131 dev->data->mtu = mtu;
2137 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2139 struct rte_eth_dev *dev;
2142 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2143 dev = &rte_eth_devices[port_id];
2144 if (!(dev->data->dev_conf.rxmode.offloads &
2145 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2146 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2150 if (vlan_id > 4095) {
2151 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2152 port_id, (unsigned) vlan_id);
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2157 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2159 struct rte_vlan_filter_conf *vfc;
2163 vfc = &dev->data->vlan_filter_conf;
2164 vidx = vlan_id / 64;
2165 vbit = vlan_id % 64;
2168 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2170 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2177 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2180 struct rte_eth_dev *dev;
2182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2183 dev = &rte_eth_devices[port_id];
2184 if (rx_queue_id >= dev->data->nb_rx_queues) {
2185 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2190 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2196 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2197 enum rte_vlan_type vlan_type,
2200 struct rte_eth_dev *dev;
2202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2203 dev = &rte_eth_devices[port_id];
2204 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2206 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2210 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2212 struct rte_eth_dev *dev;
2216 uint64_t orig_offloads;
2218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2219 dev = &rte_eth_devices[port_id];
2221 /* save original values in case of failure */
2222 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2224 /*check which option changed by application*/
2225 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2226 org = !!(dev->data->dev_conf.rxmode.offloads &
2227 DEV_RX_OFFLOAD_VLAN_STRIP);
2230 dev->data->dev_conf.rxmode.offloads |=
2231 DEV_RX_OFFLOAD_VLAN_STRIP;
2233 dev->data->dev_conf.rxmode.offloads &=
2234 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2235 mask |= ETH_VLAN_STRIP_MASK;
2238 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2239 org = !!(dev->data->dev_conf.rxmode.offloads &
2240 DEV_RX_OFFLOAD_VLAN_FILTER);
2243 dev->data->dev_conf.rxmode.offloads |=
2244 DEV_RX_OFFLOAD_VLAN_FILTER;
2246 dev->data->dev_conf.rxmode.offloads &=
2247 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2248 mask |= ETH_VLAN_FILTER_MASK;
2251 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2252 org = !!(dev->data->dev_conf.rxmode.offloads &
2253 DEV_RX_OFFLOAD_VLAN_EXTEND);
2256 dev->data->dev_conf.rxmode.offloads |=
2257 DEV_RX_OFFLOAD_VLAN_EXTEND;
2259 dev->data->dev_conf.rxmode.offloads &=
2260 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2261 mask |= ETH_VLAN_EXTEND_MASK;
2268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2271 * Convert to the offload bitfield API just in case the underlying PMD
2272 * still supporting it.
2274 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2275 &dev->data->dev_conf.rxmode);
2276 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2278 /* hit an error restore original values */
2279 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2280 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2281 &dev->data->dev_conf.rxmode);
2288 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2290 struct rte_eth_dev *dev;
2293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2294 dev = &rte_eth_devices[port_id];
2296 if (dev->data->dev_conf.rxmode.offloads &
2297 DEV_RX_OFFLOAD_VLAN_STRIP)
2298 ret |= ETH_VLAN_STRIP_OFFLOAD;
2300 if (dev->data->dev_conf.rxmode.offloads &
2301 DEV_RX_OFFLOAD_VLAN_FILTER)
2302 ret |= ETH_VLAN_FILTER_OFFLOAD;
2304 if (dev->data->dev_conf.rxmode.offloads &
2305 DEV_RX_OFFLOAD_VLAN_EXTEND)
2306 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2312 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2314 struct rte_eth_dev *dev;
2316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2317 dev = &rte_eth_devices[port_id];
2318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2319 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2325 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2327 struct rte_eth_dev *dev;
2329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2330 dev = &rte_eth_devices[port_id];
2331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2332 memset(fc_conf, 0, sizeof(*fc_conf));
2333 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2337 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2339 struct rte_eth_dev *dev;
2341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2342 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2343 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2347 dev = &rte_eth_devices[port_id];
2348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2349 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2353 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2354 struct rte_eth_pfc_conf *pfc_conf)
2356 struct rte_eth_dev *dev;
2358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2359 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2360 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2364 dev = &rte_eth_devices[port_id];
2365 /* High water, low water validation are device specific */
2366 if (*dev->dev_ops->priority_flow_ctrl_set)
2367 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2372 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2380 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2381 for (i = 0; i < num; i++) {
2382 if (reta_conf[i].mask)
2390 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2394 uint16_t i, idx, shift;
2400 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2404 for (i = 0; i < reta_size; i++) {
2405 idx = i / RTE_RETA_GROUP_SIZE;
2406 shift = i % RTE_RETA_GROUP_SIZE;
2407 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2408 (reta_conf[idx].reta[shift] >= max_rxq)) {
2409 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2410 "the maximum rxq index: %u\n", idx, shift,
2411 reta_conf[idx].reta[shift], max_rxq);
2420 rte_eth_dev_rss_reta_update(uint16_t port_id,
2421 struct rte_eth_rss_reta_entry64 *reta_conf,
2424 struct rte_eth_dev *dev;
2427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2428 /* Check mask bits */
2429 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2433 dev = &rte_eth_devices[port_id];
2435 /* Check entry value */
2436 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2437 dev->data->nb_rx_queues);
2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2442 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2446 rte_eth_dev_rss_reta_query(uint16_t port_id,
2447 struct rte_eth_rss_reta_entry64 *reta_conf,
2450 struct rte_eth_dev *dev;
2453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2455 /* Check mask bits */
2456 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2460 dev = &rte_eth_devices[port_id];
2461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2462 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2466 rte_eth_dev_rss_hash_update(uint16_t port_id,
2467 struct rte_eth_rss_conf *rss_conf)
2469 struct rte_eth_dev *dev;
2471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2472 dev = &rte_eth_devices[port_id];
2473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2474 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2478 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2479 struct rte_eth_rss_conf *rss_conf)
2481 struct rte_eth_dev *dev;
2483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 dev = &rte_eth_devices[port_id];
2485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2486 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2490 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2491 struct rte_eth_udp_tunnel *udp_tunnel)
2493 struct rte_eth_dev *dev;
2495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2496 if (udp_tunnel == NULL) {
2497 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2501 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2502 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2506 dev = &rte_eth_devices[port_id];
2507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2508 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2512 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2513 struct rte_eth_udp_tunnel *udp_tunnel)
2515 struct rte_eth_dev *dev;
2517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2518 dev = &rte_eth_devices[port_id];
2520 if (udp_tunnel == NULL) {
2521 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2525 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2526 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2531 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2535 rte_eth_led_on(uint16_t port_id)
2537 struct rte_eth_dev *dev;
2539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2540 dev = &rte_eth_devices[port_id];
2541 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2542 return (*dev->dev_ops->dev_led_on)(dev);
2546 rte_eth_led_off(uint16_t port_id)
2548 struct rte_eth_dev *dev;
2550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2551 dev = &rte_eth_devices[port_id];
2552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2553 return (*dev->dev_ops->dev_led_off)(dev);
2557 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2561 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2563 struct rte_eth_dev_info dev_info;
2564 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2568 rte_eth_dev_info_get(port_id, &dev_info);
2570 for (i = 0; i < dev_info.max_mac_addrs; i++)
2571 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2577 static const struct ether_addr null_mac_addr;
2580 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2583 struct rte_eth_dev *dev;
2588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 dev = &rte_eth_devices[port_id];
2590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2592 if (is_zero_ether_addr(addr)) {
2593 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2597 if (pool >= ETH_64_POOLS) {
2598 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2602 index = get_mac_addr_index(port_id, addr);
2604 index = get_mac_addr_index(port_id, &null_mac_addr);
2606 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2611 pool_mask = dev->data->mac_pool_sel[index];
2613 /* Check if both MAC address and pool is already there, and do nothing */
2614 if (pool_mask & (1ULL << pool))
2619 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2622 /* Update address in NIC data structure */
2623 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2625 /* Update pool bitmap in NIC data structure */
2626 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2633 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2635 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2642 index = get_mac_addr_index(port_id, addr);
2644 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2646 } else if (index < 0)
2647 return 0; /* Do nothing if address wasn't found */
2650 (*dev->dev_ops->mac_addr_remove)(dev, index);
2652 /* Update address in NIC data structure */
2653 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2655 /* reset pool bitmap */
2656 dev->data->mac_pool_sel[index] = 0;
2662 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2664 struct rte_eth_dev *dev;
2666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2668 if (!is_valid_assigned_ether_addr(addr))
2671 dev = &rte_eth_devices[port_id];
2672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2674 /* Update default address in NIC data structure */
2675 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2677 (*dev->dev_ops->mac_addr_set)(dev, addr);
2684 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2688 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2690 struct rte_eth_dev_info dev_info;
2691 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2694 rte_eth_dev_info_get(port_id, &dev_info);
2695 if (!dev->data->hash_mac_addrs)
2698 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2699 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2700 ETHER_ADDR_LEN) == 0)
2707 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2712 struct rte_eth_dev *dev;
2714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2716 dev = &rte_eth_devices[port_id];
2717 if (is_zero_ether_addr(addr)) {
2718 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2723 index = get_hash_mac_addr_index(port_id, addr);
2724 /* Check if it's already there, and do nothing */
2725 if ((index >= 0) && on)
2730 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2731 "set in UTA\n", port_id);
2735 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2737 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2743 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2744 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2746 /* Update address in NIC data structure */
2748 ether_addr_copy(addr,
2749 &dev->data->hash_mac_addrs[index]);
2751 ether_addr_copy(&null_mac_addr,
2752 &dev->data->hash_mac_addrs[index]);
2759 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2761 struct rte_eth_dev *dev;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2768 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2771 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2774 struct rte_eth_dev *dev;
2775 struct rte_eth_dev_info dev_info;
2776 struct rte_eth_link link;
2778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2781 rte_eth_dev_info_get(port_id, &dev_info);
2782 link = dev->data->dev_link;
2784 if (queue_idx > dev_info.max_tx_queues) {
2785 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2786 "invalid queue id=%d\n", port_id, queue_idx);
2790 if (tx_rate > link.link_speed) {
2791 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2792 "bigger than link speed= %d\n",
2793 tx_rate, link.link_speed);
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2798 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2802 rte_eth_mirror_rule_set(uint16_t port_id,
2803 struct rte_eth_mirror_conf *mirror_conf,
2804 uint8_t rule_id, uint8_t on)
2806 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 if (mirror_conf->rule_type == 0) {
2810 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2814 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2815 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2820 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2821 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2822 (mirror_conf->pool_mask == 0)) {
2823 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2827 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2828 mirror_conf->vlan.vlan_mask == 0) {
2829 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2833 dev = &rte_eth_devices[port_id];
2834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2836 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2840 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2846 dev = &rte_eth_devices[port_id];
2847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2849 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2852 RTE_INIT(eth_dev_init_cb_lists)
2856 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
2857 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
2861 rte_eth_dev_callback_register(uint16_t port_id,
2862 enum rte_eth_event_type event,
2863 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2865 struct rte_eth_dev *dev;
2866 struct rte_eth_dev_callback *user_cb;
2867 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2873 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2874 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2878 if (port_id == RTE_ETH_ALL) {
2880 last_port = RTE_MAX_ETHPORTS - 1;
2882 next_port = last_port = port_id;
2885 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2888 dev = &rte_eth_devices[next_port];
2890 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2891 if (user_cb->cb_fn == cb_fn &&
2892 user_cb->cb_arg == cb_arg &&
2893 user_cb->event == event) {
2898 /* create a new callback. */
2899 if (user_cb == NULL) {
2900 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2901 sizeof(struct rte_eth_dev_callback), 0);
2902 if (user_cb != NULL) {
2903 user_cb->cb_fn = cb_fn;
2904 user_cb->cb_arg = cb_arg;
2905 user_cb->event = event;
2906 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
2909 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2910 rte_eth_dev_callback_unregister(port_id, event,
2916 } while (++next_port <= last_port);
2918 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2923 rte_eth_dev_callback_unregister(uint16_t port_id,
2924 enum rte_eth_event_type event,
2925 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2928 struct rte_eth_dev *dev;
2929 struct rte_eth_dev_callback *cb, *next;
2930 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
2936 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
2937 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
2941 if (port_id == RTE_ETH_ALL) {
2943 last_port = RTE_MAX_ETHPORTS - 1;
2945 next_port = last_port = port_id;
2948 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2951 dev = &rte_eth_devices[next_port];
2953 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
2956 next = TAILQ_NEXT(cb, next);
2958 if (cb->cb_fn != cb_fn || cb->event != event ||
2959 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
2963 * if this callback is not executing right now,
2966 if (cb->active == 0) {
2967 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2973 } while (++next_port <= last_port);
2975 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2980 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2981 enum rte_eth_event_type event, void *ret_param)
2983 struct rte_eth_dev_callback *cb_lst;
2984 struct rte_eth_dev_callback dev_cb;
2987 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2988 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2989 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2993 if (ret_param != NULL)
2994 dev_cb.ret_param = ret_param;
2996 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2997 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2998 dev_cb.cb_arg, dev_cb.ret_param);
2999 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3002 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3007 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3010 struct rte_eth_dev *dev;
3011 struct rte_intr_handle *intr_handle;
3015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3017 dev = &rte_eth_devices[port_id];
3019 if (!dev->intr_handle) {
3020 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3024 intr_handle = dev->intr_handle;
3025 if (!intr_handle->intr_vec) {
3026 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3030 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3031 vec = intr_handle->intr_vec[qid];
3032 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3033 if (rc && rc != -EEXIST) {
3034 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3035 " op %d epfd %d vec %u\n",
3036 port_id, qid, op, epfd, vec);
3043 const struct rte_memzone *
3044 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3045 uint16_t queue_id, size_t size, unsigned align,
3048 char z_name[RTE_MEMZONE_NAMESIZE];
3049 const struct rte_memzone *mz;
3051 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3052 dev->device->driver->name, ring_name,
3053 dev->data->port_id, queue_id);
3055 mz = rte_memzone_lookup(z_name);
3059 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3063 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3064 int epfd, int op, void *data)
3067 struct rte_eth_dev *dev;
3068 struct rte_intr_handle *intr_handle;
3071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3073 dev = &rte_eth_devices[port_id];
3074 if (queue_id >= dev->data->nb_rx_queues) {
3075 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3079 if (!dev->intr_handle) {
3080 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3084 intr_handle = dev->intr_handle;
3085 if (!intr_handle->intr_vec) {
3086 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3090 vec = intr_handle->intr_vec[queue_id];
3091 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3092 if (rc && rc != -EEXIST) {
3093 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3094 " op %d epfd %d vec %u\n",
3095 port_id, queue_id, op, epfd, vec);
3103 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3106 struct rte_eth_dev *dev;
3108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3110 dev = &rte_eth_devices[port_id];
3112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3113 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3117 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3120 struct rte_eth_dev *dev;
3122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3124 dev = &rte_eth_devices[port_id];
3126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3127 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3132 rte_eth_dev_filter_supported(uint16_t port_id,
3133 enum rte_filter_type filter_type)
3135 struct rte_eth_dev *dev;
3137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3139 dev = &rte_eth_devices[port_id];
3140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3141 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3142 RTE_ETH_FILTER_NOP, NULL);
3146 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3147 enum rte_filter_op filter_op, void *arg)
3149 struct rte_eth_dev *dev;
3151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3153 dev = &rte_eth_devices[port_id];
3154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3155 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3159 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3160 rte_rx_callback_fn fn, void *user_param)
3162 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3163 rte_errno = ENOTSUP;
3166 /* check input parameters */
3167 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3168 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3172 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3180 cb->param = user_param;
3182 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3183 /* Add the callbacks in fifo order. */
3184 struct rte_eth_rxtx_callback *tail =
3185 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3188 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3195 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3201 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3202 rte_rx_callback_fn fn, void *user_param)
3204 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3205 rte_errno = ENOTSUP;
3208 /* check input parameters */
3209 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3210 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3215 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3223 cb->param = user_param;
3225 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3226 /* Add the callbacks at fisrt position*/
3227 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3229 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3230 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3236 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3237 rte_tx_callback_fn fn, void *user_param)
3239 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3240 rte_errno = ENOTSUP;
3243 /* check input parameters */
3244 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3245 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3250 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3258 cb->param = user_param;
3260 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3261 /* Add the callbacks in fifo order. */
3262 struct rte_eth_rxtx_callback *tail =
3263 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3266 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3273 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3279 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3280 struct rte_eth_rxtx_callback *user_cb)
3282 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3285 /* Check input parameters. */
3286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3287 if (user_cb == NULL ||
3288 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3291 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3292 struct rte_eth_rxtx_callback *cb;
3293 struct rte_eth_rxtx_callback **prev_cb;
3296 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3297 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3298 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3300 if (cb == user_cb) {
3301 /* Remove the user cb from the callback list. */
3302 *prev_cb = cb->next;
3307 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3313 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3314 struct rte_eth_rxtx_callback *user_cb)
3316 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3319 /* Check input parameters. */
3320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3321 if (user_cb == NULL ||
3322 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3325 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3327 struct rte_eth_rxtx_callback *cb;
3328 struct rte_eth_rxtx_callback **prev_cb;
3330 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3331 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3332 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3334 if (cb == user_cb) {
3335 /* Remove the user cb from the callback list. */
3336 *prev_cb = cb->next;
3341 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3347 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3348 struct rte_eth_rxq_info *qinfo)
3350 struct rte_eth_dev *dev;
3352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3357 dev = &rte_eth_devices[port_id];
3358 if (queue_id >= dev->data->nb_rx_queues) {
3359 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3365 memset(qinfo, 0, sizeof(*qinfo));
3366 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3371 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3372 struct rte_eth_txq_info *qinfo)
3374 struct rte_eth_dev *dev;
3376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3381 dev = &rte_eth_devices[port_id];
3382 if (queue_id >= dev->data->nb_tx_queues) {
3383 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3389 memset(qinfo, 0, sizeof(*qinfo));
3390 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3395 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3396 struct ether_addr *mc_addr_set,
3397 uint32_t nb_mc_addr)
3399 struct rte_eth_dev *dev;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403 dev = &rte_eth_devices[port_id];
3404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3405 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3409 rte_eth_timesync_enable(uint16_t port_id)
3411 struct rte_eth_dev *dev;
3413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3414 dev = &rte_eth_devices[port_id];
3416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3417 return (*dev->dev_ops->timesync_enable)(dev);
3421 rte_eth_timesync_disable(uint16_t port_id)
3423 struct rte_eth_dev *dev;
3425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3426 dev = &rte_eth_devices[port_id];
3428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3429 return (*dev->dev_ops->timesync_disable)(dev);
3433 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3436 struct rte_eth_dev *dev;
3438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3439 dev = &rte_eth_devices[port_id];
3441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3442 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3446 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3447 struct timespec *timestamp)
3449 struct rte_eth_dev *dev;
3451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3452 dev = &rte_eth_devices[port_id];
3454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3455 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3459 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3461 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 dev = &rte_eth_devices[port_id];
3466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3467 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3471 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3473 struct rte_eth_dev *dev;
3475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3476 dev = &rte_eth_devices[port_id];
3478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3479 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3483 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3485 struct rte_eth_dev *dev;
3487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3488 dev = &rte_eth_devices[port_id];
3490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3491 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3495 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3497 struct rte_eth_dev *dev;
3499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3501 dev = &rte_eth_devices[port_id];
3502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3503 return (*dev->dev_ops->get_reg)(dev, info);
3507 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3509 struct rte_eth_dev *dev;
3511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3513 dev = &rte_eth_devices[port_id];
3514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3515 return (*dev->dev_ops->get_eeprom_length)(dev);
3519 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3521 struct rte_eth_dev *dev;
3523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3525 dev = &rte_eth_devices[port_id];
3526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3527 return (*dev->dev_ops->get_eeprom)(dev, info);
3531 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3533 struct rte_eth_dev *dev;
3535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3537 dev = &rte_eth_devices[port_id];
3538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3539 return (*dev->dev_ops->set_eeprom)(dev, info);
3543 rte_eth_dev_get_dcb_info(uint16_t port_id,
3544 struct rte_eth_dcb_info *dcb_info)
3546 struct rte_eth_dev *dev;
3548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3550 dev = &rte_eth_devices[port_id];
3551 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3553 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3554 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3558 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3559 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3561 struct rte_eth_dev *dev;
3563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564 if (l2_tunnel == NULL) {
3565 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3569 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3570 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3574 dev = &rte_eth_devices[port_id];
3575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3577 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3581 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3582 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3586 struct rte_eth_dev *dev;
3588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3590 if (l2_tunnel == NULL) {
3591 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3595 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3596 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3601 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3605 dev = &rte_eth_devices[port_id];
3606 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3608 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3612 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3613 const struct rte_eth_desc_lim *desc_lim)
3615 if (desc_lim->nb_align != 0)
3616 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3618 if (desc_lim->nb_max != 0)
3619 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3621 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3625 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3626 uint16_t *nb_rx_desc,
3627 uint16_t *nb_tx_desc)
3629 struct rte_eth_dev *dev;
3630 struct rte_eth_dev_info dev_info;
3632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3634 dev = &rte_eth_devices[port_id];
3635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3637 rte_eth_dev_info_get(port_id, &dev_info);
3639 if (nb_rx_desc != NULL)
3640 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3642 if (nb_tx_desc != NULL)
3643 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3649 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3651 struct rte_eth_dev *dev;
3653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3658 dev = &rte_eth_devices[port_id];
3660 if (*dev->dev_ops->pool_ops_supported == NULL)
3661 return 1; /* all pools are supported */
3663 return (*dev->dev_ops->pool_ops_supported)(dev, pool);