1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_compat.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "ethdev_profile.h"
43 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
44 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 static struct rte_eth_dev_data *rte_eth_dev_data;
46 static uint8_t eth_dev_last_created_port;
48 /* spinlock for eth device callbacks */
49 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove rx callbacks */
52 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove tx callbacks */
55 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* store statistics names and its offset in stats structure */
58 struct rte_eth_xstats_name_off {
59 char name[RTE_ETH_XSTATS_NAME_SIZE];
63 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
64 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
65 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
66 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
67 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
68 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
69 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
70 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
71 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
75 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
77 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
78 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
79 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
80 {"errors", offsetof(struct rte_eth_stats, q_errors)},
83 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
84 sizeof(rte_rxq_stats_strings[0]))
86 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
90 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
91 sizeof(rte_txq_stats_strings[0]))
93 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
94 { DEV_RX_OFFLOAD_##_name, #_name }
99 } rte_rx_offload_names[] = {
100 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
101 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
102 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
103 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
104 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
105 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
106 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
107 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
108 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
109 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
111 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
112 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
114 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
115 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
118 #undef RTE_RX_OFFLOAD_BIT2STR
120 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
121 { DEV_TX_OFFLOAD_##_name, #_name }
123 static const struct {
126 } rte_tx_offload_names[] = {
127 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
128 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
129 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
130 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
131 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
133 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
134 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
135 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
136 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
137 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
138 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
139 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
140 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
141 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
142 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
143 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
144 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
147 #undef RTE_TX_OFFLOAD_BIT2STR
150 * The user application callback description.
152 * It contains callback address to be registered by user application,
153 * the pointer to the parameters for callback, and the event type.
155 struct rte_eth_dev_callback {
156 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
157 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
158 void *cb_arg; /**< Parameter for callback */
159 void *ret_param; /**< Return parameter */
160 enum rte_eth_event_type event; /**< Interrupt event type */
161 uint32_t active; /**< Callback is executing */
170 rte_eth_find_next(uint16_t port_id)
172 while (port_id < RTE_MAX_ETHPORTS &&
173 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
174 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
177 if (port_id >= RTE_MAX_ETHPORTS)
178 return RTE_MAX_ETHPORTS;
184 rte_eth_dev_data_alloc(void)
186 const unsigned flags = 0;
187 const struct rte_memzone *mz;
189 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
190 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
191 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
192 rte_socket_id(), flags);
194 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
196 rte_panic("Cannot allocate memzone for ethernet port data\n");
198 rte_eth_dev_data = mz->addr;
199 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
200 memset(rte_eth_dev_data, 0,
201 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
205 rte_eth_dev_allocated(const char *name)
209 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
210 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
211 strcmp(rte_eth_devices[i].data->name, name) == 0)
212 return &rte_eth_devices[i];
218 rte_eth_dev_find_free_port(void)
222 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
223 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
226 return RTE_MAX_ETHPORTS;
229 static struct rte_eth_dev *
230 eth_dev_get(uint16_t port_id)
232 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
234 eth_dev->data = &rte_eth_dev_data[port_id];
235 eth_dev->state = RTE_ETH_DEV_ATTACHED;
237 eth_dev_last_created_port = port_id;
243 rte_eth_dev_allocate(const char *name)
246 struct rte_eth_dev *eth_dev;
248 port_id = rte_eth_dev_find_free_port();
249 if (port_id == RTE_MAX_ETHPORTS) {
250 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
254 if (rte_eth_dev_data == NULL)
255 rte_eth_dev_data_alloc();
257 if (rte_eth_dev_allocated(name) != NULL) {
258 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
263 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
264 eth_dev = eth_dev_get(port_id);
265 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
266 eth_dev->data->port_id = port_id;
267 eth_dev->data->mtu = ETHER_MTU;
269 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
275 * Attach to a port already registered by the primary process, which
276 * makes sure that the same device would have the same port id both
277 * in the primary and secondary process.
280 rte_eth_dev_attach_secondary(const char *name)
283 struct rte_eth_dev *eth_dev;
285 if (rte_eth_dev_data == NULL)
286 rte_eth_dev_data_alloc();
288 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
289 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
292 if (i == RTE_MAX_ETHPORTS) {
294 "device %s is not driven by the primary process\n",
299 eth_dev = eth_dev_get(i);
300 RTE_ASSERT(eth_dev->data->port_id == i);
306 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
311 eth_dev->state = RTE_ETH_DEV_UNUSED;
313 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
319 rte_eth_dev_is_valid_port(uint16_t port_id)
321 if (port_id >= RTE_MAX_ETHPORTS ||
322 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
329 rte_eth_dev_socket_id(uint16_t port_id)
331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
332 return rte_eth_devices[port_id].data->numa_node;
336 rte_eth_dev_get_sec_ctx(uint8_t port_id)
338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
339 return rte_eth_devices[port_id].security_ctx;
343 rte_eth_dev_count(void)
350 RTE_ETH_FOREACH_DEV(p)
357 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
364 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
368 /* shouldn't check 'rte_eth_devices[i].data',
369 * because it might be overwritten by VDEV PMD */
370 tmp = rte_eth_dev_data[port_id].name;
376 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
381 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
385 RTE_ETH_FOREACH_DEV(i) {
387 rte_eth_dev_data[i].name, strlen(name))) {
398 eth_err(uint16_t port_id, int ret)
402 if (rte_eth_dev_is_removed(port_id))
407 /* attach the new device, then store port_id of the device */
409 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
412 int current = rte_eth_dev_count();
416 if ((devargs == NULL) || (port_id == NULL)) {
421 /* parse devargs, then retrieve device name and args */
422 if (rte_eal_parse_devargs_str(devargs, &name, &args))
425 ret = rte_eal_dev_attach(name, args);
429 /* no point looking at the port count if no port exists */
430 if (!rte_eth_dev_count()) {
431 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
436 /* if nothing happened, there is a bug here, since some driver told us
437 * it did attach a device, but did not create a port.
439 if (current == rte_eth_dev_count()) {
444 *port_id = eth_dev_last_created_port;
453 /* detach the device, then store the name of the device */
455 rte_eth_dev_detach(uint16_t port_id, char *name)
460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
467 dev_flags = rte_eth_devices[port_id].data->dev_flags;
468 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
469 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
475 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
476 "%s", rte_eth_devices[port_id].data->name);
478 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
482 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
490 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
492 uint16_t old_nb_queues = dev->data->nb_rx_queues;
496 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
497 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
498 sizeof(dev->data->rx_queues[0]) * nb_queues,
499 RTE_CACHE_LINE_SIZE);
500 if (dev->data->rx_queues == NULL) {
501 dev->data->nb_rx_queues = 0;
504 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
507 rxq = dev->data->rx_queues;
509 for (i = nb_queues; i < old_nb_queues; i++)
510 (*dev->dev_ops->rx_queue_release)(rxq[i]);
511 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
512 RTE_CACHE_LINE_SIZE);
515 if (nb_queues > old_nb_queues) {
516 uint16_t new_qs = nb_queues - old_nb_queues;
518 memset(rxq + old_nb_queues, 0,
519 sizeof(rxq[0]) * new_qs);
522 dev->data->rx_queues = rxq;
524 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
527 rxq = dev->data->rx_queues;
529 for (i = nb_queues; i < old_nb_queues; i++)
530 (*dev->dev_ops->rx_queue_release)(rxq[i]);
532 rte_free(dev->data->rx_queues);
533 dev->data->rx_queues = NULL;
535 dev->data->nb_rx_queues = nb_queues;
540 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
542 struct rte_eth_dev *dev;
544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
546 dev = &rte_eth_devices[port_id];
547 if (rx_queue_id >= dev->data->nb_rx_queues) {
548 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
554 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
555 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
556 " already started\n",
557 rx_queue_id, port_id);
561 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
567 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
569 struct rte_eth_dev *dev;
571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
573 dev = &rte_eth_devices[port_id];
574 if (rx_queue_id >= dev->data->nb_rx_queues) {
575 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
581 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
582 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
583 " already stopped\n",
584 rx_queue_id, port_id);
588 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
593 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
595 struct rte_eth_dev *dev;
597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
599 dev = &rte_eth_devices[port_id];
600 if (tx_queue_id >= dev->data->nb_tx_queues) {
601 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
605 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
607 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
608 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
609 " already started\n",
610 tx_queue_id, port_id);
614 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
620 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
622 struct rte_eth_dev *dev;
624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
626 dev = &rte_eth_devices[port_id];
627 if (tx_queue_id >= dev->data->nb_tx_queues) {
628 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
634 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
635 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
636 " already stopped\n",
637 tx_queue_id, port_id);
641 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
646 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
648 uint16_t old_nb_queues = dev->data->nb_tx_queues;
652 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
653 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
654 sizeof(dev->data->tx_queues[0]) * nb_queues,
655 RTE_CACHE_LINE_SIZE);
656 if (dev->data->tx_queues == NULL) {
657 dev->data->nb_tx_queues = 0;
660 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
663 txq = dev->data->tx_queues;
665 for (i = nb_queues; i < old_nb_queues; i++)
666 (*dev->dev_ops->tx_queue_release)(txq[i]);
667 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
668 RTE_CACHE_LINE_SIZE);
671 if (nb_queues > old_nb_queues) {
672 uint16_t new_qs = nb_queues - old_nb_queues;
674 memset(txq + old_nb_queues, 0,
675 sizeof(txq[0]) * new_qs);
678 dev->data->tx_queues = txq;
680 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
683 txq = dev->data->tx_queues;
685 for (i = nb_queues; i < old_nb_queues; i++)
686 (*dev->dev_ops->tx_queue_release)(txq[i]);
688 rte_free(dev->data->tx_queues);
689 dev->data->tx_queues = NULL;
691 dev->data->nb_tx_queues = nb_queues;
696 rte_eth_speed_bitflag(uint32_t speed, int duplex)
699 case ETH_SPEED_NUM_10M:
700 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
701 case ETH_SPEED_NUM_100M:
702 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
703 case ETH_SPEED_NUM_1G:
704 return ETH_LINK_SPEED_1G;
705 case ETH_SPEED_NUM_2_5G:
706 return ETH_LINK_SPEED_2_5G;
707 case ETH_SPEED_NUM_5G:
708 return ETH_LINK_SPEED_5G;
709 case ETH_SPEED_NUM_10G:
710 return ETH_LINK_SPEED_10G;
711 case ETH_SPEED_NUM_20G:
712 return ETH_LINK_SPEED_20G;
713 case ETH_SPEED_NUM_25G:
714 return ETH_LINK_SPEED_25G;
715 case ETH_SPEED_NUM_40G:
716 return ETH_LINK_SPEED_40G;
717 case ETH_SPEED_NUM_50G:
718 return ETH_LINK_SPEED_50G;
719 case ETH_SPEED_NUM_56G:
720 return ETH_LINK_SPEED_56G;
721 case ETH_SPEED_NUM_100G:
722 return ETH_LINK_SPEED_100G;
729 * A conversion function from rxmode bitfield API.
732 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
733 uint64_t *rx_offloads)
735 uint64_t offloads = 0;
737 if (rxmode->header_split == 1)
738 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
739 if (rxmode->hw_ip_checksum == 1)
740 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
741 if (rxmode->hw_vlan_filter == 1)
742 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
743 if (rxmode->hw_vlan_strip == 1)
744 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
745 if (rxmode->hw_vlan_extend == 1)
746 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
747 if (rxmode->jumbo_frame == 1)
748 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
749 if (rxmode->hw_strip_crc == 1)
750 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
751 if (rxmode->enable_scatter == 1)
752 offloads |= DEV_RX_OFFLOAD_SCATTER;
753 if (rxmode->enable_lro == 1)
754 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
755 if (rxmode->hw_timestamp == 1)
756 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
757 if (rxmode->security == 1)
758 offloads |= DEV_RX_OFFLOAD_SECURITY;
760 *rx_offloads = offloads;
764 * A conversion function from rxmode offloads API.
767 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
768 struct rte_eth_rxmode *rxmode)
771 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
772 rxmode->header_split = 1;
774 rxmode->header_split = 0;
775 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
776 rxmode->hw_ip_checksum = 1;
778 rxmode->hw_ip_checksum = 0;
779 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
780 rxmode->hw_vlan_filter = 1;
782 rxmode->hw_vlan_filter = 0;
783 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
784 rxmode->hw_vlan_strip = 1;
786 rxmode->hw_vlan_strip = 0;
787 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
788 rxmode->hw_vlan_extend = 1;
790 rxmode->hw_vlan_extend = 0;
791 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
792 rxmode->jumbo_frame = 1;
794 rxmode->jumbo_frame = 0;
795 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
796 rxmode->hw_strip_crc = 1;
798 rxmode->hw_strip_crc = 0;
799 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
800 rxmode->enable_scatter = 1;
802 rxmode->enable_scatter = 0;
803 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
804 rxmode->enable_lro = 1;
806 rxmode->enable_lro = 0;
807 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
808 rxmode->hw_timestamp = 1;
810 rxmode->hw_timestamp = 0;
811 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
812 rxmode->security = 1;
814 rxmode->security = 0;
818 rte_eth_dev_rx_offload_name(uint64_t offload)
820 const char *name = "UNKNOWN";
823 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
824 if (offload == rte_rx_offload_names[i].offload) {
825 name = rte_rx_offload_names[i].name;
834 rte_eth_dev_tx_offload_name(uint64_t offload)
836 const char *name = "UNKNOWN";
839 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
840 if (offload == rte_tx_offload_names[i].offload) {
841 name = rte_tx_offload_names[i].name;
850 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
851 const struct rte_eth_conf *dev_conf)
853 struct rte_eth_dev *dev;
854 struct rte_eth_dev_info dev_info;
855 struct rte_eth_conf local_conf = *dev_conf;
858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
860 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
862 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
863 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
867 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
869 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
870 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
874 dev = &rte_eth_devices[port_id];
876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
879 if (dev->data->dev_started) {
881 "port %d must be stopped to allow configuration\n", port_id);
886 * Convert between the offloads API to enable PMDs to support
889 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
890 rte_eth_convert_rx_offload_bitfield(
891 &dev_conf->rxmode, &local_conf.rxmode.offloads);
893 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
897 /* Copy the dev_conf parameter into the dev structure */
898 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
901 * Check that the numbers of RX and TX queues are not greater
902 * than the maximum number of RX and TX queues supported by the
905 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
907 if (nb_rx_q == 0 && nb_tx_q == 0) {
908 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
912 if (nb_rx_q > dev_info.max_rx_queues) {
913 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
914 port_id, nb_rx_q, dev_info.max_rx_queues);
918 if (nb_tx_q > dev_info.max_tx_queues) {
919 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
920 port_id, nb_tx_q, dev_info.max_tx_queues);
924 /* Check that the device supports requested interrupts */
925 if ((dev_conf->intr_conf.lsc == 1) &&
926 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
927 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
928 dev->device->driver->name);
931 if ((dev_conf->intr_conf.rmv == 1) &&
932 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
933 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
934 dev->device->driver->name);
939 * If jumbo frames are enabled, check that the maximum RX packet
940 * length is supported by the configured device.
942 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
943 if (dev_conf->rxmode.max_rx_pkt_len >
944 dev_info.max_rx_pktlen) {
945 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
946 " > max valid value %u\n",
948 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
949 (unsigned)dev_info.max_rx_pktlen);
951 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
952 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
953 " < min valid value %u\n",
955 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
956 (unsigned)ETHER_MIN_LEN);
960 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
961 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
962 /* Use default value */
963 dev->data->dev_conf.rxmode.max_rx_pkt_len =
968 * Setup new number of RX/TX queues and reconfigure device.
970 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
972 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
977 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
979 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
981 rte_eth_dev_rx_queue_config(dev, 0);
985 diag = (*dev->dev_ops->dev_configure)(dev);
987 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
989 rte_eth_dev_rx_queue_config(dev, 0);
990 rte_eth_dev_tx_queue_config(dev, 0);
991 return eth_err(port_id, diag);
994 /* Initialize Rx profiling if enabled at compilation time. */
995 diag = __rte_eth_profile_rx_init(port_id, dev);
997 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
999 rte_eth_dev_rx_queue_config(dev, 0);
1000 rte_eth_dev_tx_queue_config(dev, 0);
1001 return eth_err(port_id, diag);
1008 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1010 if (dev->data->dev_started) {
1011 RTE_PMD_DEBUG_TRACE(
1012 "port %d must be stopped to allow reset\n",
1013 dev->data->port_id);
1017 rte_eth_dev_rx_queue_config(dev, 0);
1018 rte_eth_dev_tx_queue_config(dev, 0);
1020 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1024 rte_eth_dev_config_restore(uint16_t port_id)
1026 struct rte_eth_dev *dev;
1027 struct rte_eth_dev_info dev_info;
1028 struct ether_addr *addr;
1033 dev = &rte_eth_devices[port_id];
1035 rte_eth_dev_info_get(port_id, &dev_info);
1037 /* replay MAC address configuration including default MAC */
1038 addr = &dev->data->mac_addrs[0];
1039 if (*dev->dev_ops->mac_addr_set != NULL)
1040 (*dev->dev_ops->mac_addr_set)(dev, addr);
1041 else if (*dev->dev_ops->mac_addr_add != NULL)
1042 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1044 if (*dev->dev_ops->mac_addr_add != NULL) {
1045 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1046 addr = &dev->data->mac_addrs[i];
1048 /* skip zero address */
1049 if (is_zero_ether_addr(addr))
1053 pool_mask = dev->data->mac_pool_sel[i];
1056 if (pool_mask & 1ULL)
1057 (*dev->dev_ops->mac_addr_add)(dev,
1061 } while (pool_mask);
1065 /* replay promiscuous configuration */
1066 if (rte_eth_promiscuous_get(port_id) == 1)
1067 rte_eth_promiscuous_enable(port_id);
1068 else if (rte_eth_promiscuous_get(port_id) == 0)
1069 rte_eth_promiscuous_disable(port_id);
1071 /* replay all multicast configuration */
1072 if (rte_eth_allmulticast_get(port_id) == 1)
1073 rte_eth_allmulticast_enable(port_id);
1074 else if (rte_eth_allmulticast_get(port_id) == 0)
1075 rte_eth_allmulticast_disable(port_id);
1079 rte_eth_dev_start(uint16_t port_id)
1081 struct rte_eth_dev *dev;
1084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1086 dev = &rte_eth_devices[port_id];
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1090 if (dev->data->dev_started != 0) {
1091 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1092 " already started\n",
1097 diag = (*dev->dev_ops->dev_start)(dev);
1099 dev->data->dev_started = 1;
1101 return eth_err(port_id, diag);
1103 rte_eth_dev_config_restore(port_id);
1105 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1107 (*dev->dev_ops->link_update)(dev, 0);
1113 rte_eth_dev_stop(uint16_t port_id)
1115 struct rte_eth_dev *dev;
1117 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1118 dev = &rte_eth_devices[port_id];
1120 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1122 if (dev->data->dev_started == 0) {
1123 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1124 " already stopped\n",
1129 dev->data->dev_started = 0;
1130 (*dev->dev_ops->dev_stop)(dev);
1134 rte_eth_dev_set_link_up(uint16_t port_id)
1136 struct rte_eth_dev *dev;
1138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1140 dev = &rte_eth_devices[port_id];
1142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1143 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1147 rte_eth_dev_set_link_down(uint16_t port_id)
1149 struct rte_eth_dev *dev;
1151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1153 dev = &rte_eth_devices[port_id];
1155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1156 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1160 rte_eth_dev_close(uint16_t port_id)
1162 struct rte_eth_dev *dev;
1164 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1165 dev = &rte_eth_devices[port_id];
1167 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1168 dev->data->dev_started = 0;
1169 (*dev->dev_ops->dev_close)(dev);
1171 dev->data->nb_rx_queues = 0;
1172 rte_free(dev->data->rx_queues);
1173 dev->data->rx_queues = NULL;
1174 dev->data->nb_tx_queues = 0;
1175 rte_free(dev->data->tx_queues);
1176 dev->data->tx_queues = NULL;
1180 rte_eth_dev_reset(uint16_t port_id)
1182 struct rte_eth_dev *dev;
1185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1186 dev = &rte_eth_devices[port_id];
1188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1190 rte_eth_dev_stop(port_id);
1191 ret = dev->dev_ops->dev_reset(dev);
1193 return eth_err(port_id, ret);
1197 rte_eth_dev_is_removed(uint16_t port_id)
1199 struct rte_eth_dev *dev;
1202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1204 dev = &rte_eth_devices[port_id];
1206 if (dev->state == RTE_ETH_DEV_REMOVED)
1209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1211 ret = dev->dev_ops->is_removed(dev);
1213 /* Device is physically removed. */
1214 dev->state = RTE_ETH_DEV_REMOVED;
1220 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1221 uint16_t nb_rx_desc, unsigned int socket_id,
1222 const struct rte_eth_rxconf *rx_conf,
1223 struct rte_mempool *mp)
1226 uint32_t mbp_buf_size;
1227 struct rte_eth_dev *dev;
1228 struct rte_eth_dev_info dev_info;
1229 struct rte_eth_rxconf local_conf;
1232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1234 dev = &rte_eth_devices[port_id];
1235 if (rx_queue_id >= dev->data->nb_rx_queues) {
1236 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1240 if (dev->data->dev_started) {
1241 RTE_PMD_DEBUG_TRACE(
1242 "port %d must be stopped to allow configuration\n", port_id);
1246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1250 * Check the size of the mbuf data buffer.
1251 * This value must be provided in the private data of the memory pool.
1252 * First check that the memory pool has a valid private data.
1254 rte_eth_dev_info_get(port_id, &dev_info);
1255 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1256 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1257 mp->name, (int) mp->private_data_size,
1258 (int) sizeof(struct rte_pktmbuf_pool_private));
1261 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1263 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1264 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1265 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1269 (int)(RTE_PKTMBUF_HEADROOM +
1270 dev_info.min_rx_bufsize),
1271 (int)RTE_PKTMBUF_HEADROOM,
1272 (int)dev_info.min_rx_bufsize);
1276 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1277 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1278 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1280 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1281 "should be: <= %hu, = %hu, and a product of %hu\n",
1283 dev_info.rx_desc_lim.nb_max,
1284 dev_info.rx_desc_lim.nb_min,
1285 dev_info.rx_desc_lim.nb_align);
1289 rxq = dev->data->rx_queues;
1290 if (rxq[rx_queue_id]) {
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1293 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1294 rxq[rx_queue_id] = NULL;
1297 if (rx_conf == NULL)
1298 rx_conf = &dev_info.default_rxconf;
1300 local_conf = *rx_conf;
1301 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1303 * Reflect port offloads to queue offloads in order for
1304 * offloads to not be discarded.
1306 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1307 &local_conf.offloads);
1310 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1311 socket_id, &local_conf, mp);
1313 if (!dev->data->min_rx_buf_size ||
1314 dev->data->min_rx_buf_size > mbp_buf_size)
1315 dev->data->min_rx_buf_size = mbp_buf_size;
1318 return eth_err(port_id, ret);
1322 * A conversion function from txq_flags API.
1325 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1327 uint64_t offloads = 0;
1329 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1330 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1331 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1332 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1333 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1334 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1335 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1336 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1337 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1338 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1339 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1340 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1341 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1343 *tx_offloads = offloads;
1347 * A conversion function from offloads API.
1350 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1354 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1355 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1356 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1357 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1358 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1359 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1360 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1361 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1362 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1363 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1364 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1365 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1371 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1372 uint16_t nb_tx_desc, unsigned int socket_id,
1373 const struct rte_eth_txconf *tx_conf)
1375 struct rte_eth_dev *dev;
1376 struct rte_eth_dev_info dev_info;
1377 struct rte_eth_txconf local_conf;
1380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1382 dev = &rte_eth_devices[port_id];
1383 if (tx_queue_id >= dev->data->nb_tx_queues) {
1384 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1388 if (dev->data->dev_started) {
1389 RTE_PMD_DEBUG_TRACE(
1390 "port %d must be stopped to allow configuration\n", port_id);
1394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1397 rte_eth_dev_info_get(port_id, &dev_info);
1399 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1400 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1401 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1402 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1403 "should be: <= %hu, = %hu, and a product of %hu\n",
1405 dev_info.tx_desc_lim.nb_max,
1406 dev_info.tx_desc_lim.nb_min,
1407 dev_info.tx_desc_lim.nb_align);
1411 txq = dev->data->tx_queues;
1412 if (txq[tx_queue_id]) {
1413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1415 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1416 txq[tx_queue_id] = NULL;
1419 if (tx_conf == NULL)
1420 tx_conf = &dev_info.default_txconf;
1423 * Convert between the offloads API to enable PMDs to support
1426 local_conf = *tx_conf;
1427 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1428 rte_eth_convert_txq_offloads(tx_conf->offloads,
1429 &local_conf.txq_flags);
1430 /* Keep the ignore flag. */
1431 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1433 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1434 &local_conf.offloads);
1437 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1438 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1442 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1443 void *userdata __rte_unused)
1447 for (i = 0; i < unsent; i++)
1448 rte_pktmbuf_free(pkts[i]);
1452 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1455 uint64_t *count = userdata;
1458 for (i = 0; i < unsent; i++)
1459 rte_pktmbuf_free(pkts[i]);
1465 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1466 buffer_tx_error_fn cbfn, void *userdata)
1468 buffer->error_callback = cbfn;
1469 buffer->error_userdata = userdata;
1474 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1481 buffer->size = size;
1482 if (buffer->error_callback == NULL) {
1483 ret = rte_eth_tx_buffer_set_err_callback(
1484 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1491 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1493 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1496 /* Validate Input Data. Bail if not valid or not supported. */
1497 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1500 /* Call driver to free pending mbufs. */
1501 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1503 return eth_err(port_id, ret);
1507 rte_eth_promiscuous_enable(uint16_t port_id)
1509 struct rte_eth_dev *dev;
1511 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1512 dev = &rte_eth_devices[port_id];
1514 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1515 (*dev->dev_ops->promiscuous_enable)(dev);
1516 dev->data->promiscuous = 1;
1520 rte_eth_promiscuous_disable(uint16_t port_id)
1522 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1528 dev->data->promiscuous = 0;
1529 (*dev->dev_ops->promiscuous_disable)(dev);
1533 rte_eth_promiscuous_get(uint16_t port_id)
1535 struct rte_eth_dev *dev;
1537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1539 dev = &rte_eth_devices[port_id];
1540 return dev->data->promiscuous;
1544 rte_eth_allmulticast_enable(uint16_t port_id)
1546 struct rte_eth_dev *dev;
1548 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1549 dev = &rte_eth_devices[port_id];
1551 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1552 (*dev->dev_ops->allmulticast_enable)(dev);
1553 dev->data->all_multicast = 1;
1557 rte_eth_allmulticast_disable(uint16_t port_id)
1559 struct rte_eth_dev *dev;
1561 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1562 dev = &rte_eth_devices[port_id];
1564 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1565 dev->data->all_multicast = 0;
1566 (*dev->dev_ops->allmulticast_disable)(dev);
1570 rte_eth_allmulticast_get(uint16_t port_id)
1572 struct rte_eth_dev *dev;
1574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1576 dev = &rte_eth_devices[port_id];
1577 return dev->data->all_multicast;
1581 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1582 struct rte_eth_link *link)
1584 struct rte_eth_link *dst = link;
1585 struct rte_eth_link *src = &(dev->data->dev_link);
1587 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1588 *(uint64_t *)src) == 0)
1595 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1597 struct rte_eth_dev *dev;
1599 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1600 dev = &rte_eth_devices[port_id];
1602 if (dev->data->dev_conf.intr_conf.lsc != 0)
1603 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1605 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1606 (*dev->dev_ops->link_update)(dev, 1);
1607 *eth_link = dev->data->dev_link;
1612 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1614 struct rte_eth_dev *dev;
1616 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1617 dev = &rte_eth_devices[port_id];
1619 if (dev->data->dev_conf.intr_conf.lsc != 0)
1620 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1622 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1623 (*dev->dev_ops->link_update)(dev, 0);
1624 *eth_link = dev->data->dev_link;
1629 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1631 struct rte_eth_dev *dev;
1633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1635 dev = &rte_eth_devices[port_id];
1636 memset(stats, 0, sizeof(*stats));
1638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1639 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1640 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1644 rte_eth_stats_reset(uint16_t port_id)
1646 struct rte_eth_dev *dev;
1648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1649 dev = &rte_eth_devices[port_id];
1651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1652 (*dev->dev_ops->stats_reset)(dev);
1653 dev->data->rx_mbuf_alloc_failed = 0;
1659 get_xstats_basic_count(struct rte_eth_dev *dev)
1661 uint16_t nb_rxqs, nb_txqs;
1664 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1665 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1667 count = RTE_NB_STATS;
1668 count += nb_rxqs * RTE_NB_RXQ_STATS;
1669 count += nb_txqs * RTE_NB_TXQ_STATS;
1675 get_xstats_count(uint16_t port_id)
1677 struct rte_eth_dev *dev;
1680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1681 dev = &rte_eth_devices[port_id];
1682 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1683 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1686 return eth_err(port_id, count);
1688 if (dev->dev_ops->xstats_get_names != NULL) {
1689 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1691 return eth_err(port_id, count);
1696 count += get_xstats_basic_count(dev);
1702 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1705 int cnt_xstats, idx_xstat;
1707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1710 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1715 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1720 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1721 if (cnt_xstats < 0) {
1722 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1726 /* Get id-name lookup table */
1727 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1729 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1730 port_id, xstats_names, cnt_xstats, NULL)) {
1731 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1735 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1736 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1745 /* retrieve basic stats names */
1747 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1748 struct rte_eth_xstat_name *xstats_names)
1750 int cnt_used_entries = 0;
1751 uint32_t idx, id_queue;
1754 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1755 snprintf(xstats_names[cnt_used_entries].name,
1756 sizeof(xstats_names[0].name),
1757 "%s", rte_stats_strings[idx].name);
1760 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1761 for (id_queue = 0; id_queue < num_q; id_queue++) {
1762 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1763 snprintf(xstats_names[cnt_used_entries].name,
1764 sizeof(xstats_names[0].name),
1766 id_queue, rte_rxq_stats_strings[idx].name);
1771 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1772 for (id_queue = 0; id_queue < num_q; id_queue++) {
1773 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1774 snprintf(xstats_names[cnt_used_entries].name,
1775 sizeof(xstats_names[0].name),
1777 id_queue, rte_txq_stats_strings[idx].name);
1781 return cnt_used_entries;
1784 /* retrieve ethdev extended statistics names */
1786 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1787 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1790 struct rte_eth_xstat_name *xstats_names_copy;
1791 unsigned int no_basic_stat_requested = 1;
1792 unsigned int no_ext_stat_requested = 1;
1793 unsigned int expected_entries;
1794 unsigned int basic_count;
1795 struct rte_eth_dev *dev;
1799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1800 dev = &rte_eth_devices[port_id];
1802 basic_count = get_xstats_basic_count(dev);
1803 ret = get_xstats_count(port_id);
1806 expected_entries = (unsigned int)ret;
1808 /* Return max number of stats if no ids given */
1811 return expected_entries;
1812 else if (xstats_names && size < expected_entries)
1813 return expected_entries;
1816 if (ids && !xstats_names)
1819 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1820 uint64_t ids_copy[size];
1822 for (i = 0; i < size; i++) {
1823 if (ids[i] < basic_count) {
1824 no_basic_stat_requested = 0;
1829 * Convert ids to xstats ids that PMD knows.
1830 * ids known by user are basic + extended stats.
1832 ids_copy[i] = ids[i] - basic_count;
1835 if (no_basic_stat_requested)
1836 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1837 xstats_names, ids_copy, size);
1840 /* Retrieve all stats */
1842 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1844 if (num_stats < 0 || num_stats > (int)expected_entries)
1847 return expected_entries;
1850 xstats_names_copy = calloc(expected_entries,
1851 sizeof(struct rte_eth_xstat_name));
1853 if (!xstats_names_copy) {
1854 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1859 for (i = 0; i < size; i++) {
1860 if (ids[i] > basic_count) {
1861 no_ext_stat_requested = 0;
1867 /* Fill xstats_names_copy structure */
1868 if (ids && no_ext_stat_requested) {
1869 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
1871 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
1874 free(xstats_names_copy);
1880 for (i = 0; i < size; i++) {
1881 if (ids[i] >= expected_entries) {
1882 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1883 free(xstats_names_copy);
1886 xstats_names[i] = xstats_names_copy[ids[i]];
1889 free(xstats_names_copy);
1894 rte_eth_xstats_get_names(uint16_t port_id,
1895 struct rte_eth_xstat_name *xstats_names,
1898 struct rte_eth_dev *dev;
1899 int cnt_used_entries;
1900 int cnt_expected_entries;
1901 int cnt_driver_entries;
1903 cnt_expected_entries = get_xstats_count(port_id);
1904 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1905 (int)size < cnt_expected_entries)
1906 return cnt_expected_entries;
1908 /* port_id checked in get_xstats_count() */
1909 dev = &rte_eth_devices[port_id];
1911 cnt_used_entries = rte_eth_basic_stats_get_names(
1914 if (dev->dev_ops->xstats_get_names != NULL) {
1915 /* If there are any driver-specific xstats, append them
1918 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1920 xstats_names + cnt_used_entries,
1921 size - cnt_used_entries);
1922 if (cnt_driver_entries < 0)
1923 return eth_err(port_id, cnt_driver_entries);
1924 cnt_used_entries += cnt_driver_entries;
1927 return cnt_used_entries;
1932 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1934 struct rte_eth_dev *dev;
1935 struct rte_eth_stats eth_stats;
1936 unsigned int count = 0, i, q;
1937 uint64_t val, *stats_ptr;
1938 uint16_t nb_rxqs, nb_txqs;
1941 ret = rte_eth_stats_get(port_id, ð_stats);
1945 dev = &rte_eth_devices[port_id];
1947 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1948 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1951 for (i = 0; i < RTE_NB_STATS; i++) {
1952 stats_ptr = RTE_PTR_ADD(ð_stats,
1953 rte_stats_strings[i].offset);
1955 xstats[count++].value = val;
1959 for (q = 0; q < nb_rxqs; q++) {
1960 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1961 stats_ptr = RTE_PTR_ADD(ð_stats,
1962 rte_rxq_stats_strings[i].offset +
1963 q * sizeof(uint64_t));
1965 xstats[count++].value = val;
1970 for (q = 0; q < nb_txqs; q++) {
1971 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1972 stats_ptr = RTE_PTR_ADD(ð_stats,
1973 rte_txq_stats_strings[i].offset +
1974 q * sizeof(uint64_t));
1976 xstats[count++].value = val;
1982 /* retrieve ethdev extended statistics */
1984 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1985 uint64_t *values, unsigned int size)
1987 unsigned int no_basic_stat_requested = 1;
1988 unsigned int no_ext_stat_requested = 1;
1989 unsigned int num_xstats_filled;
1990 unsigned int basic_count;
1991 uint16_t expected_entries;
1992 struct rte_eth_dev *dev;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1997 ret = get_xstats_count(port_id);
2000 expected_entries = (uint16_t)ret;
2001 struct rte_eth_xstat xstats[expected_entries];
2002 dev = &rte_eth_devices[port_id];
2003 basic_count = get_xstats_basic_count(dev);
2005 /* Return max number of stats if no ids given */
2008 return expected_entries;
2009 else if (values && size < expected_entries)
2010 return expected_entries;
2016 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2017 unsigned int basic_count = get_xstats_basic_count(dev);
2018 uint64_t ids_copy[size];
2020 for (i = 0; i < size; i++) {
2021 if (ids[i] < basic_count) {
2022 no_basic_stat_requested = 0;
2027 * Convert ids to xstats ids that PMD knows.
2028 * ids known by user are basic + extended stats.
2030 ids_copy[i] = ids[i] - basic_count;
2033 if (no_basic_stat_requested)
2034 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2039 for (i = 0; i < size; i++) {
2040 if (ids[i] > basic_count) {
2041 no_ext_stat_requested = 0;
2047 /* Fill the xstats structure */
2048 if (ids && no_ext_stat_requested)
2049 ret = rte_eth_basic_stats_get(port_id, xstats);
2051 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2055 num_xstats_filled = (unsigned int)ret;
2057 /* Return all stats */
2059 for (i = 0; i < num_xstats_filled; i++)
2060 values[i] = xstats[i].value;
2061 return expected_entries;
2065 for (i = 0; i < size; i++) {
2066 if (ids[i] >= expected_entries) {
2067 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2070 values[i] = xstats[ids[i]].value;
2076 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2079 struct rte_eth_dev *dev;
2080 unsigned int count = 0, i;
2081 signed int xcount = 0;
2082 uint16_t nb_rxqs, nb_txqs;
2085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2087 dev = &rte_eth_devices[port_id];
2089 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2090 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2092 /* Return generic statistics */
2093 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2094 (nb_txqs * RTE_NB_TXQ_STATS);
2096 /* implemented by the driver */
2097 if (dev->dev_ops->xstats_get != NULL) {
2098 /* Retrieve the xstats from the driver at the end of the
2101 xcount = (*dev->dev_ops->xstats_get)(dev,
2102 xstats ? xstats + count : NULL,
2103 (n > count) ? n - count : 0);
2106 return eth_err(port_id, xcount);
2109 if (n < count + xcount || xstats == NULL)
2110 return count + xcount;
2112 /* now fill the xstats structure */
2113 ret = rte_eth_basic_stats_get(port_id, xstats);
2118 for (i = 0; i < count; i++)
2120 /* add an offset to driver-specific stats */
2121 for ( ; i < count + xcount; i++)
2122 xstats[i].id += count;
2124 return count + xcount;
2127 /* reset ethdev extended statistics */
2129 rte_eth_xstats_reset(uint16_t port_id)
2131 struct rte_eth_dev *dev;
2133 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2134 dev = &rte_eth_devices[port_id];
2136 /* implemented by the driver */
2137 if (dev->dev_ops->xstats_reset != NULL) {
2138 (*dev->dev_ops->xstats_reset)(dev);
2142 /* fallback to default */
2143 rte_eth_stats_reset(port_id);
2147 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2150 struct rte_eth_dev *dev;
2152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2154 dev = &rte_eth_devices[port_id];
2156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2157 return (*dev->dev_ops->queue_stats_mapping_set)
2158 (dev, queue_id, stat_idx, is_rx);
2163 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2166 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2167 stat_idx, STAT_QMAP_TX));
2172 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2175 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2176 stat_idx, STAT_QMAP_RX));
2180 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2182 struct rte_eth_dev *dev;
2184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2185 dev = &rte_eth_devices[port_id];
2187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2188 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2189 fw_version, fw_size));
2193 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2195 struct rte_eth_dev *dev;
2196 const struct rte_eth_desc_lim lim = {
2197 .nb_max = UINT16_MAX,
2202 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2203 dev = &rte_eth_devices[port_id];
2205 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2206 dev_info->rx_desc_lim = lim;
2207 dev_info->tx_desc_lim = lim;
2209 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2210 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2211 dev_info->driver_name = dev->device->driver->name;
2212 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2213 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2217 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2218 uint32_t *ptypes, int num)
2221 struct rte_eth_dev *dev;
2222 const uint32_t *all_ptypes;
2224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2225 dev = &rte_eth_devices[port_id];
2226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2227 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2232 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2233 if (all_ptypes[i] & ptype_mask) {
2235 ptypes[j] = all_ptypes[i];
2243 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2245 struct rte_eth_dev *dev;
2247 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2248 dev = &rte_eth_devices[port_id];
2249 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2254 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2256 struct rte_eth_dev *dev;
2258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2260 dev = &rte_eth_devices[port_id];
2261 *mtu = dev->data->mtu;
2266 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2269 struct rte_eth_dev *dev;
2271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2272 dev = &rte_eth_devices[port_id];
2273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2275 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2277 dev->data->mtu = mtu;
2279 return eth_err(port_id, ret);
2283 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2285 struct rte_eth_dev *dev;
2288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2289 dev = &rte_eth_devices[port_id];
2290 if (!(dev->data->dev_conf.rxmode.offloads &
2291 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2292 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2296 if (vlan_id > 4095) {
2297 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2298 port_id, (unsigned) vlan_id);
2301 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2303 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2305 struct rte_vlan_filter_conf *vfc;
2309 vfc = &dev->data->vlan_filter_conf;
2310 vidx = vlan_id / 64;
2311 vbit = vlan_id % 64;
2314 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2316 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2319 return eth_err(port_id, ret);
2323 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2326 struct rte_eth_dev *dev;
2328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2329 dev = &rte_eth_devices[port_id];
2330 if (rx_queue_id >= dev->data->nb_rx_queues) {
2331 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2335 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2336 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2342 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2343 enum rte_vlan_type vlan_type,
2346 struct rte_eth_dev *dev;
2348 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2349 dev = &rte_eth_devices[port_id];
2350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2352 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2357 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2359 struct rte_eth_dev *dev;
2363 uint64_t orig_offloads;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2366 dev = &rte_eth_devices[port_id];
2368 /* save original values in case of failure */
2369 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2371 /*check which option changed by application*/
2372 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2373 org = !!(dev->data->dev_conf.rxmode.offloads &
2374 DEV_RX_OFFLOAD_VLAN_STRIP);
2377 dev->data->dev_conf.rxmode.offloads |=
2378 DEV_RX_OFFLOAD_VLAN_STRIP;
2380 dev->data->dev_conf.rxmode.offloads &=
2381 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2382 mask |= ETH_VLAN_STRIP_MASK;
2385 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2386 org = !!(dev->data->dev_conf.rxmode.offloads &
2387 DEV_RX_OFFLOAD_VLAN_FILTER);
2390 dev->data->dev_conf.rxmode.offloads |=
2391 DEV_RX_OFFLOAD_VLAN_FILTER;
2393 dev->data->dev_conf.rxmode.offloads &=
2394 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2395 mask |= ETH_VLAN_FILTER_MASK;
2398 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2399 org = !!(dev->data->dev_conf.rxmode.offloads &
2400 DEV_RX_OFFLOAD_VLAN_EXTEND);
2403 dev->data->dev_conf.rxmode.offloads |=
2404 DEV_RX_OFFLOAD_VLAN_EXTEND;
2406 dev->data->dev_conf.rxmode.offloads &=
2407 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2408 mask |= ETH_VLAN_EXTEND_MASK;
2415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2418 * Convert to the offload bitfield API just in case the underlying PMD
2419 * still supporting it.
2421 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2422 &dev->data->dev_conf.rxmode);
2423 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2425 /* hit an error restore original values */
2426 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2427 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2428 &dev->data->dev_conf.rxmode);
2431 return eth_err(port_id, ret);
2435 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2437 struct rte_eth_dev *dev;
2440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2441 dev = &rte_eth_devices[port_id];
2443 if (dev->data->dev_conf.rxmode.offloads &
2444 DEV_RX_OFFLOAD_VLAN_STRIP)
2445 ret |= ETH_VLAN_STRIP_OFFLOAD;
2447 if (dev->data->dev_conf.rxmode.offloads &
2448 DEV_RX_OFFLOAD_VLAN_FILTER)
2449 ret |= ETH_VLAN_FILTER_OFFLOAD;
2451 if (dev->data->dev_conf.rxmode.offloads &
2452 DEV_RX_OFFLOAD_VLAN_EXTEND)
2453 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2459 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2461 struct rte_eth_dev *dev;
2463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2464 dev = &rte_eth_devices[port_id];
2465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2467 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2471 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2473 struct rte_eth_dev *dev;
2475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2476 dev = &rte_eth_devices[port_id];
2477 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2478 memset(fc_conf, 0, sizeof(*fc_conf));
2479 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2483 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2485 struct rte_eth_dev *dev;
2487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2488 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2489 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2493 dev = &rte_eth_devices[port_id];
2494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2495 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2499 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2500 struct rte_eth_pfc_conf *pfc_conf)
2502 struct rte_eth_dev *dev;
2504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2505 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2506 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2510 dev = &rte_eth_devices[port_id];
2511 /* High water, low water validation are device specific */
2512 if (*dev->dev_ops->priority_flow_ctrl_set)
2513 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2519 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2527 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2528 for (i = 0; i < num; i++) {
2529 if (reta_conf[i].mask)
2537 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2541 uint16_t i, idx, shift;
2547 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2551 for (i = 0; i < reta_size; i++) {
2552 idx = i / RTE_RETA_GROUP_SIZE;
2553 shift = i % RTE_RETA_GROUP_SIZE;
2554 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2555 (reta_conf[idx].reta[shift] >= max_rxq)) {
2556 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2557 "the maximum rxq index: %u\n", idx, shift,
2558 reta_conf[idx].reta[shift], max_rxq);
2567 rte_eth_dev_rss_reta_update(uint16_t port_id,
2568 struct rte_eth_rss_reta_entry64 *reta_conf,
2571 struct rte_eth_dev *dev;
2574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2575 /* Check mask bits */
2576 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2580 dev = &rte_eth_devices[port_id];
2582 /* Check entry value */
2583 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2584 dev->data->nb_rx_queues);
2588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2589 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2594 rte_eth_dev_rss_reta_query(uint16_t port_id,
2595 struct rte_eth_rss_reta_entry64 *reta_conf,
2598 struct rte_eth_dev *dev;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2603 /* Check mask bits */
2604 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2608 dev = &rte_eth_devices[port_id];
2609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2610 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2615 rte_eth_dev_rss_hash_update(uint16_t port_id,
2616 struct rte_eth_rss_conf *rss_conf)
2618 struct rte_eth_dev *dev;
2620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2621 dev = &rte_eth_devices[port_id];
2622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2623 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2628 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2629 struct rte_eth_rss_conf *rss_conf)
2631 struct rte_eth_dev *dev;
2633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2634 dev = &rte_eth_devices[port_id];
2635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2636 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2641 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2642 struct rte_eth_udp_tunnel *udp_tunnel)
2644 struct rte_eth_dev *dev;
2646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2647 if (udp_tunnel == NULL) {
2648 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2652 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2653 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2657 dev = &rte_eth_devices[port_id];
2658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2659 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2664 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2665 struct rte_eth_udp_tunnel *udp_tunnel)
2667 struct rte_eth_dev *dev;
2669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2670 dev = &rte_eth_devices[port_id];
2672 if (udp_tunnel == NULL) {
2673 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2677 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2678 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2683 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2688 rte_eth_led_on(uint16_t port_id)
2690 struct rte_eth_dev *dev;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 dev = &rte_eth_devices[port_id];
2694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2695 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2699 rte_eth_led_off(uint16_t port_id)
2701 struct rte_eth_dev *dev;
2703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2704 dev = &rte_eth_devices[port_id];
2705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2706 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2710 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2714 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2716 struct rte_eth_dev_info dev_info;
2717 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 rte_eth_dev_info_get(port_id, &dev_info);
2723 for (i = 0; i < dev_info.max_mac_addrs; i++)
2724 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2730 static const struct ether_addr null_mac_addr;
2733 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2736 struct rte_eth_dev *dev;
2741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2742 dev = &rte_eth_devices[port_id];
2743 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2745 if (is_zero_ether_addr(addr)) {
2746 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2750 if (pool >= ETH_64_POOLS) {
2751 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2755 index = get_mac_addr_index(port_id, addr);
2757 index = get_mac_addr_index(port_id, &null_mac_addr);
2759 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2764 pool_mask = dev->data->mac_pool_sel[index];
2766 /* Check if both MAC address and pool is already there, and do nothing */
2767 if (pool_mask & (1ULL << pool))
2772 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2775 /* Update address in NIC data structure */
2776 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2778 /* Update pool bitmap in NIC data structure */
2779 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2782 return eth_err(port_id, ret);
2786 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2788 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 dev = &rte_eth_devices[port_id];
2793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2795 index = get_mac_addr_index(port_id, addr);
2797 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2799 } else if (index < 0)
2800 return 0; /* Do nothing if address wasn't found */
2803 (*dev->dev_ops->mac_addr_remove)(dev, index);
2805 /* Update address in NIC data structure */
2806 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2808 /* reset pool bitmap */
2809 dev->data->mac_pool_sel[index] = 0;
2815 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2817 struct rte_eth_dev *dev;
2819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2821 if (!is_valid_assigned_ether_addr(addr))
2824 dev = &rte_eth_devices[port_id];
2825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2827 /* Update default address in NIC data structure */
2828 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2830 (*dev->dev_ops->mac_addr_set)(dev, addr);
2837 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2841 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2843 struct rte_eth_dev_info dev_info;
2844 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2847 rte_eth_dev_info_get(port_id, &dev_info);
2848 if (!dev->data->hash_mac_addrs)
2851 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2852 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2853 ETHER_ADDR_LEN) == 0)
2860 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2865 struct rte_eth_dev *dev;
2867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2869 dev = &rte_eth_devices[port_id];
2870 if (is_zero_ether_addr(addr)) {
2871 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2876 index = get_hash_mac_addr_index(port_id, addr);
2877 /* Check if it's already there, and do nothing */
2878 if ((index >= 0) && on)
2883 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2884 "set in UTA\n", port_id);
2888 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2890 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2897 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2899 /* Update address in NIC data structure */
2901 ether_addr_copy(addr,
2902 &dev->data->hash_mac_addrs[index]);
2904 ether_addr_copy(&null_mac_addr,
2905 &dev->data->hash_mac_addrs[index]);
2908 return eth_err(port_id, ret);
2912 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2914 struct rte_eth_dev *dev;
2916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2918 dev = &rte_eth_devices[port_id];
2920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2921 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
2925 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2928 struct rte_eth_dev *dev;
2929 struct rte_eth_dev_info dev_info;
2930 struct rte_eth_link link;
2932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 dev = &rte_eth_devices[port_id];
2935 rte_eth_dev_info_get(port_id, &dev_info);
2936 link = dev->data->dev_link;
2938 if (queue_idx > dev_info.max_tx_queues) {
2939 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2940 "invalid queue id=%d\n", port_id, queue_idx);
2944 if (tx_rate > link.link_speed) {
2945 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2946 "bigger than link speed= %d\n",
2947 tx_rate, link.link_speed);
2951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2952 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
2953 queue_idx, tx_rate));
2957 rte_eth_mirror_rule_set(uint16_t port_id,
2958 struct rte_eth_mirror_conf *mirror_conf,
2959 uint8_t rule_id, uint8_t on)
2961 struct rte_eth_dev *dev;
2963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2964 if (mirror_conf->rule_type == 0) {
2965 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2969 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2970 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2975 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2976 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2977 (mirror_conf->pool_mask == 0)) {
2978 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2982 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2983 mirror_conf->vlan.vlan_mask == 0) {
2984 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2988 dev = &rte_eth_devices[port_id];
2989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2991 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
2992 mirror_conf, rule_id, on));
2996 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2998 struct rte_eth_dev *dev;
3000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3002 dev = &rte_eth_devices[port_id];
3003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3005 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3009 RTE_INIT(eth_dev_init_cb_lists)
3013 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3014 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3018 rte_eth_dev_callback_register(uint16_t port_id,
3019 enum rte_eth_event_type event,
3020 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3022 struct rte_eth_dev *dev;
3023 struct rte_eth_dev_callback *user_cb;
3024 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3030 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3031 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3035 if (port_id == RTE_ETH_ALL) {
3037 last_port = RTE_MAX_ETHPORTS - 1;
3039 next_port = last_port = port_id;
3042 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3045 dev = &rte_eth_devices[next_port];
3047 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3048 if (user_cb->cb_fn == cb_fn &&
3049 user_cb->cb_arg == cb_arg &&
3050 user_cb->event == event) {
3055 /* create a new callback. */
3056 if (user_cb == NULL) {
3057 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3058 sizeof(struct rte_eth_dev_callback), 0);
3059 if (user_cb != NULL) {
3060 user_cb->cb_fn = cb_fn;
3061 user_cb->cb_arg = cb_arg;
3062 user_cb->event = event;
3063 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3066 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3067 rte_eth_dev_callback_unregister(port_id, event,
3073 } while (++next_port <= last_port);
3075 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3080 rte_eth_dev_callback_unregister(uint16_t port_id,
3081 enum rte_eth_event_type event,
3082 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3085 struct rte_eth_dev *dev;
3086 struct rte_eth_dev_callback *cb, *next;
3087 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3093 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3094 RTE_LOG(ERR, EAL, "Invalid port_id=%d\n", port_id);
3098 if (port_id == RTE_ETH_ALL) {
3100 last_port = RTE_MAX_ETHPORTS - 1;
3102 next_port = last_port = port_id;
3105 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3108 dev = &rte_eth_devices[next_port];
3110 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3113 next = TAILQ_NEXT(cb, next);
3115 if (cb->cb_fn != cb_fn || cb->event != event ||
3116 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3120 * if this callback is not executing right now,
3123 if (cb->active == 0) {
3124 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3130 } while (++next_port <= last_port);
3132 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3137 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3138 enum rte_eth_event_type event, void *ret_param)
3140 struct rte_eth_dev_callback *cb_lst;
3141 struct rte_eth_dev_callback dev_cb;
3144 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3145 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3146 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3150 if (ret_param != NULL)
3151 dev_cb.ret_param = ret_param;
3153 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3154 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3155 dev_cb.cb_arg, dev_cb.ret_param);
3156 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3159 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3164 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3167 struct rte_eth_dev *dev;
3168 struct rte_intr_handle *intr_handle;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3176 if (!dev->intr_handle) {
3177 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3181 intr_handle = dev->intr_handle;
3182 if (!intr_handle->intr_vec) {
3183 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3187 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3188 vec = intr_handle->intr_vec[qid];
3189 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3190 if (rc && rc != -EEXIST) {
3191 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3192 " op %d epfd %d vec %u\n",
3193 port_id, qid, op, epfd, vec);
3200 const struct rte_memzone *
3201 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3202 uint16_t queue_id, size_t size, unsigned align,
3205 char z_name[RTE_MEMZONE_NAMESIZE];
3206 const struct rte_memzone *mz;
3208 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3209 dev->device->driver->name, ring_name,
3210 dev->data->port_id, queue_id);
3212 mz = rte_memzone_lookup(z_name);
3216 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3220 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3221 int epfd, int op, void *data)
3224 struct rte_eth_dev *dev;
3225 struct rte_intr_handle *intr_handle;
3228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3231 if (queue_id >= dev->data->nb_rx_queues) {
3232 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3236 if (!dev->intr_handle) {
3237 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3241 intr_handle = dev->intr_handle;
3242 if (!intr_handle->intr_vec) {
3243 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3247 vec = intr_handle->intr_vec[queue_id];
3248 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3249 if (rc && rc != -EEXIST) {
3250 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3251 " op %d epfd %d vec %u\n",
3252 port_id, queue_id, op, epfd, vec);
3260 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3263 struct rte_eth_dev *dev;
3265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3267 dev = &rte_eth_devices[port_id];
3269 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3270 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3275 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3278 struct rte_eth_dev *dev;
3280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3282 dev = &rte_eth_devices[port_id];
3284 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3285 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3291 rte_eth_dev_filter_supported(uint16_t port_id,
3292 enum rte_filter_type filter_type)
3294 struct rte_eth_dev *dev;
3296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3298 dev = &rte_eth_devices[port_id];
3299 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3300 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3301 RTE_ETH_FILTER_NOP, NULL);
3305 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3306 enum rte_filter_type filter_type,
3307 enum rte_filter_op filter_op, void *arg);
3310 rte_eth_dev_filter_ctrl_v22(uint16_t port_id,
3311 enum rte_filter_type filter_type,
3312 enum rte_filter_op filter_op, void *arg)
3314 struct rte_eth_fdir_info_v22 {
3315 enum rte_fdir_mode mode;
3316 struct rte_eth_fdir_masks mask;
3317 struct rte_eth_fdir_flex_conf flex_conf;
3318 uint32_t guarant_spc;
3320 uint32_t flow_types_mask[1];
3321 uint32_t max_flexpayload;
3322 uint32_t flex_payload_unit;
3323 uint32_t max_flex_payload_segment_num;
3324 uint16_t flex_payload_limit;
3325 uint32_t flex_bitmask_unit;
3326 uint32_t max_flex_bitmask_num;
3329 struct rte_eth_hash_global_conf_v22 {
3330 enum rte_eth_hash_function hash_func;
3331 uint32_t sym_hash_enable_mask[1];
3332 uint32_t valid_bit_mask[1];
3335 struct rte_eth_hash_filter_info_v22 {
3336 enum rte_eth_hash_filter_info_type info_type;
3339 struct rte_eth_hash_global_conf_v22 global_conf;
3340 struct rte_eth_input_set_conf input_set_conf;
3344 struct rte_eth_dev *dev;
3346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3348 dev = &rte_eth_devices[port_id];
3349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3350 if (filter_op == RTE_ETH_FILTER_INFO) {
3352 struct rte_eth_fdir_info_v22 *fdir_info_v22;
3353 struct rte_eth_fdir_info fdir_info;
3355 fdir_info_v22 = (struct rte_eth_fdir_info_v22 *)arg;
3357 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3358 filter_op, (void *)&fdir_info);
3359 fdir_info_v22->mode = fdir_info.mode;
3360 fdir_info_v22->mask = fdir_info.mask;
3361 fdir_info_v22->flex_conf = fdir_info.flex_conf;
3362 fdir_info_v22->guarant_spc = fdir_info.guarant_spc;
3363 fdir_info_v22->best_spc = fdir_info.best_spc;
3364 fdir_info_v22->flow_types_mask[0] =
3365 (uint32_t)fdir_info.flow_types_mask[0];
3366 fdir_info_v22->max_flexpayload = fdir_info.max_flexpayload;
3367 fdir_info_v22->flex_payload_unit = fdir_info.flex_payload_unit;
3368 fdir_info_v22->max_flex_payload_segment_num =
3369 fdir_info.max_flex_payload_segment_num;
3370 fdir_info_v22->flex_payload_limit =
3371 fdir_info.flex_payload_limit;
3372 fdir_info_v22->flex_bitmask_unit = fdir_info.flex_bitmask_unit;
3373 fdir_info_v22->max_flex_bitmask_num =
3374 fdir_info.max_flex_bitmask_num;
3376 } else if (filter_op == RTE_ETH_FILTER_GET) {
3378 struct rte_eth_hash_filter_info f_info;
3379 struct rte_eth_hash_filter_info_v22 *f_info_v22 =
3380 (struct rte_eth_hash_filter_info_v22 *)arg;
3382 f_info.info_type = f_info_v22->info_type;
3383 retval = (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3384 filter_op, (void *)&f_info);
3386 switch (f_info_v22->info_type) {
3387 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3388 f_info_v22->info.enable = f_info.info.enable;
3390 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3391 f_info_v22->info.global_conf.hash_func =
3392 f_info.info.global_conf.hash_func;
3393 f_info_v22->info.global_conf.sym_hash_enable_mask[0] =
3395 f_info.info.global_conf.sym_hash_enable_mask[0];
3396 f_info_v22->info.global_conf.valid_bit_mask[0] =
3398 f_info.info.global_conf.valid_bit_mask[0];
3400 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3401 f_info_v22->info.input_set_conf =
3402 f_info.info.input_set_conf;
3408 } else if (filter_op == RTE_ETH_FILTER_SET) {
3409 struct rte_eth_hash_filter_info f_info;
3410 struct rte_eth_hash_filter_info_v22 *f_v22 =
3411 (struct rte_eth_hash_filter_info_v22 *)arg;
3413 f_info.info_type = f_v22->info_type;
3414 switch (f_v22->info_type) {
3415 case RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT:
3416 f_info.info.enable = f_v22->info.enable;
3418 case RTE_ETH_HASH_FILTER_GLOBAL_CONFIG:
3419 f_info.info.global_conf.hash_func =
3420 f_v22->info.global_conf.hash_func;
3421 f_info.info.global_conf.sym_hash_enable_mask[0] =
3423 f_v22->info.global_conf.sym_hash_enable_mask[0];
3424 f_info.info.global_conf.valid_bit_mask[0] =
3426 f_v22->info.global_conf.valid_bit_mask[0];
3428 case RTE_ETH_HASH_FILTER_INPUT_SET_SELECT:
3429 f_info.info.input_set_conf =
3430 f_v22->info.input_set_conf;
3435 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3438 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op,
3441 VERSION_SYMBOL(rte_eth_dev_filter_ctrl, _v22, 2.2);
3444 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3445 enum rte_filter_type filter_type,
3446 enum rte_filter_op filter_op, void *arg);
3449 rte_eth_dev_filter_ctrl_v1802(uint16_t port_id,
3450 enum rte_filter_type filter_type,
3451 enum rte_filter_op filter_op, void *arg)
3453 struct rte_eth_dev *dev;
3455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3457 dev = &rte_eth_devices[port_id];
3458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3459 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3462 BIND_DEFAULT_SYMBOL(rte_eth_dev_filter_ctrl, _v1802, 18.02);
3463 MAP_STATIC_SYMBOL(int rte_eth_dev_filter_ctrl(uint16_t port_id,
3464 enum rte_filter_type filter_type,
3465 enum rte_filter_op filter_op, void *arg),
3466 rte_eth_dev_filter_ctrl_v1802);
3469 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3470 rte_rx_callback_fn fn, void *user_param)
3472 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3473 rte_errno = ENOTSUP;
3476 /* check input parameters */
3477 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3478 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3482 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3490 cb->param = user_param;
3492 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3493 /* Add the callbacks in fifo order. */
3494 struct rte_eth_rxtx_callback *tail =
3495 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3498 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3505 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3511 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3512 rte_rx_callback_fn fn, void *user_param)
3514 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3515 rte_errno = ENOTSUP;
3518 /* check input parameters */
3519 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3520 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3525 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3533 cb->param = user_param;
3535 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3536 /* Add the callbacks at fisrt position*/
3537 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3539 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3540 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3546 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3547 rte_tx_callback_fn fn, void *user_param)
3549 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3550 rte_errno = ENOTSUP;
3553 /* check input parameters */
3554 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3555 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3560 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3568 cb->param = user_param;
3570 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3571 /* Add the callbacks in fifo order. */
3572 struct rte_eth_rxtx_callback *tail =
3573 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3576 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3583 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3589 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3590 struct rte_eth_rxtx_callback *user_cb)
3592 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3595 /* Check input parameters. */
3596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3597 if (user_cb == NULL ||
3598 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3601 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3602 struct rte_eth_rxtx_callback *cb;
3603 struct rte_eth_rxtx_callback **prev_cb;
3606 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3607 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3608 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3610 if (cb == user_cb) {
3611 /* Remove the user cb from the callback list. */
3612 *prev_cb = cb->next;
3617 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3623 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3624 struct rte_eth_rxtx_callback *user_cb)
3626 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3629 /* Check input parameters. */
3630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3631 if (user_cb == NULL ||
3632 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3635 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3637 struct rte_eth_rxtx_callback *cb;
3638 struct rte_eth_rxtx_callback **prev_cb;
3640 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3641 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3642 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3644 if (cb == user_cb) {
3645 /* Remove the user cb from the callback list. */
3646 *prev_cb = cb->next;
3651 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3657 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3658 struct rte_eth_rxq_info *qinfo)
3660 struct rte_eth_dev *dev;
3662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3667 dev = &rte_eth_devices[port_id];
3668 if (queue_id >= dev->data->nb_rx_queues) {
3669 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3675 memset(qinfo, 0, sizeof(*qinfo));
3676 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3681 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3682 struct rte_eth_txq_info *qinfo)
3684 struct rte_eth_dev *dev;
3686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3691 dev = &rte_eth_devices[port_id];
3692 if (queue_id >= dev->data->nb_tx_queues) {
3693 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3699 memset(qinfo, 0, sizeof(*qinfo));
3700 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3705 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3706 struct ether_addr *mc_addr_set,
3707 uint32_t nb_mc_addr)
3709 struct rte_eth_dev *dev;
3711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3713 dev = &rte_eth_devices[port_id];
3714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3715 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3716 mc_addr_set, nb_mc_addr));
3720 rte_eth_timesync_enable(uint16_t port_id)
3722 struct rte_eth_dev *dev;
3724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3725 dev = &rte_eth_devices[port_id];
3727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3728 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3732 rte_eth_timesync_disable(uint16_t port_id)
3734 struct rte_eth_dev *dev;
3736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3737 dev = &rte_eth_devices[port_id];
3739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3740 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3744 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3747 struct rte_eth_dev *dev;
3749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3750 dev = &rte_eth_devices[port_id];
3752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3753 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3754 (dev, timestamp, flags));
3758 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3759 struct timespec *timestamp)
3761 struct rte_eth_dev *dev;
3763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3764 dev = &rte_eth_devices[port_id];
3766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3767 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3772 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3774 struct rte_eth_dev *dev;
3776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3777 dev = &rte_eth_devices[port_id];
3779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3780 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3785 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3787 struct rte_eth_dev *dev;
3789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3790 dev = &rte_eth_devices[port_id];
3792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3793 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3798 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3800 struct rte_eth_dev *dev;
3802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3803 dev = &rte_eth_devices[port_id];
3805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3806 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3811 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3813 struct rte_eth_dev *dev;
3815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3817 dev = &rte_eth_devices[port_id];
3818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3819 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3823 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3825 struct rte_eth_dev *dev;
3827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3829 dev = &rte_eth_devices[port_id];
3830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3831 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3835 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3837 struct rte_eth_dev *dev;
3839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3841 dev = &rte_eth_devices[port_id];
3842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3843 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3847 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3849 struct rte_eth_dev *dev;
3851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3853 dev = &rte_eth_devices[port_id];
3854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3855 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3859 rte_eth_dev_get_dcb_info(uint16_t port_id,
3860 struct rte_eth_dcb_info *dcb_info)
3862 struct rte_eth_dev *dev;
3864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3866 dev = &rte_eth_devices[port_id];
3867 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3870 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3874 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3875 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3877 struct rte_eth_dev *dev;
3879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3880 if (l2_tunnel == NULL) {
3881 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3885 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3886 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3890 dev = &rte_eth_devices[port_id];
3891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3893 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3898 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3899 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3903 struct rte_eth_dev *dev;
3905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3907 if (l2_tunnel == NULL) {
3908 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3912 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3913 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3918 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3922 dev = &rte_eth_devices[port_id];
3923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3925 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3926 l2_tunnel, mask, en));
3930 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3931 const struct rte_eth_desc_lim *desc_lim)
3933 if (desc_lim->nb_align != 0)
3934 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3936 if (desc_lim->nb_max != 0)
3937 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3939 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3943 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3944 uint16_t *nb_rx_desc,
3945 uint16_t *nb_tx_desc)
3947 struct rte_eth_dev *dev;
3948 struct rte_eth_dev_info dev_info;
3950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3952 dev = &rte_eth_devices[port_id];
3953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3955 rte_eth_dev_info_get(port_id, &dev_info);
3957 if (nb_rx_desc != NULL)
3958 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3960 if (nb_tx_desc != NULL)
3961 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3967 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3969 struct rte_eth_dev *dev;
3971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3976 dev = &rte_eth_devices[port_id];
3978 if (*dev->dev_ops->pool_ops_supported == NULL)
3979 return 1; /* all pools are supported */
3981 return (*dev->dev_ops->pool_ops_supported)(dev, pool);