4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
62 #include <rte_mempool.h>
63 #include <rte_malloc.h>
65 #include <rte_errno.h>
66 #include <rte_spinlock.h>
67 #include <rte_string_fns.h>
69 #include "rte_ether.h"
70 #include "rte_ethdev.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* store statistics names and its offset in stats structure */
81 struct rte_eth_xstats_name_off {
82 char name[RTE_ETH_XSTATS_NAME_SIZE];
86 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
87 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
88 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
89 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
90 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
91 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
92 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
93 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
97 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
102 {"errors", offsetof(struct rte_eth_stats, q_errors)},
105 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
106 sizeof(rte_rxq_stats_strings[0]))
108 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
109 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
110 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
112 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
113 sizeof(rte_txq_stats_strings[0]))
117 * The user application callback description.
119 * It contains callback address to be registered by user application,
120 * the pointer to the parameters for callback, and the event type.
122 struct rte_eth_dev_callback {
123 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
124 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
125 void *cb_arg; /**< Parameter for callback */
126 enum rte_eth_event_type event; /**< Interrupt event type */
127 uint32_t active; /**< Callback is executing */
141 rte_eth_dev_data_alloc(void)
143 const unsigned flags = 0;
144 const struct rte_memzone *mz;
146 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
147 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
148 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
149 rte_socket_id(), flags);
151 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
153 rte_panic("Cannot allocate memzone for ethernet port data\n");
155 rte_eth_dev_data = mz->addr;
156 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
157 memset(rte_eth_dev_data, 0,
158 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
162 rte_eth_dev_allocated(const char *name)
166 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
167 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
168 strcmp(rte_eth_devices[i].data->name, name) == 0)
169 return &rte_eth_devices[i];
175 rte_eth_dev_find_free_port(void)
179 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
180 if (rte_eth_devices[i].attached == DEV_DETACHED)
183 return RTE_MAX_ETHPORTS;
187 rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
190 struct rte_eth_dev *eth_dev;
192 port_id = rte_eth_dev_find_free_port();
193 if (port_id == RTE_MAX_ETHPORTS) {
194 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
198 if (rte_eth_dev_data == NULL)
199 rte_eth_dev_data_alloc();
201 if (rte_eth_dev_allocated(name) != NULL) {
202 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
207 eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
210 eth_dev->data->port_id = port_id;
211 eth_dev->attached = DEV_ATTACHED;
212 eth_dev->dev_type = type;
218 rte_eth_dev_create_unique_device_name(char *name, size_t size,
219 struct rte_pci_device *pci_dev)
223 ret = snprintf(name, size, "%d:%d.%d",
224 pci_dev->addr.bus, pci_dev->addr.devid,
225 pci_dev->addr.function);
232 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
237 eth_dev->attached = DEV_DETACHED;
243 rte_eth_dev_init(struct rte_pci_driver *pci_drv,
244 struct rte_pci_device *pci_dev)
246 struct eth_driver *eth_drv;
247 struct rte_eth_dev *eth_dev;
248 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
252 eth_drv = (struct eth_driver *)pci_drv;
254 /* Create unique Ethernet device name using PCI address */
255 rte_eth_dev_create_unique_device_name(ethdev_name,
256 sizeof(ethdev_name), pci_dev);
258 eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
262 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
263 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
264 eth_drv->dev_private_size,
265 RTE_CACHE_LINE_SIZE);
266 if (eth_dev->data->dev_private == NULL)
267 rte_panic("Cannot allocate memzone for private port data\n");
269 eth_dev->pci_dev = pci_dev;
270 eth_dev->driver = eth_drv;
271 eth_dev->data->rx_mbuf_alloc_failed = 0;
273 /* init user callbacks */
274 TAILQ_INIT(&(eth_dev->link_intr_cbs));
277 * Set the default MTU.
279 eth_dev->data->mtu = ETHER_MTU;
281 /* Invoke PMD device initialization function */
282 diag = (*eth_drv->eth_dev_init)(eth_dev);
286 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
288 (unsigned) pci_dev->id.vendor_id,
289 (unsigned) pci_dev->id.device_id);
290 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
291 rte_free(eth_dev->data->dev_private);
292 rte_eth_dev_release_port(eth_dev);
297 rte_eth_dev_uninit(struct rte_pci_device *pci_dev)
299 const struct eth_driver *eth_drv;
300 struct rte_eth_dev *eth_dev;
301 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
307 /* Create unique Ethernet device name using PCI address */
308 rte_eth_dev_create_unique_device_name(ethdev_name,
309 sizeof(ethdev_name), pci_dev);
311 eth_dev = rte_eth_dev_allocated(ethdev_name);
315 eth_drv = (const struct eth_driver *)pci_dev->driver;
317 /* Invoke PMD device uninit function */
318 if (*eth_drv->eth_dev_uninit) {
319 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
324 /* free ether device */
325 rte_eth_dev_release_port(eth_dev);
327 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
328 rte_free(eth_dev->data->dev_private);
330 eth_dev->pci_dev = NULL;
331 eth_dev->driver = NULL;
332 eth_dev->data = NULL;
338 * Register an Ethernet [Poll Mode] driver.
340 * Function invoked by the initialization function of an Ethernet driver
341 * to simultaneously register itself as a PCI driver and as an Ethernet
343 * Invokes the rte_eal_pci_register() function to register the *pci_drv*
344 * structure embedded in the *eth_drv* structure, after having stored the
345 * address of the rte_eth_dev_init() function in the *devinit* field of
346 * the *pci_drv* structure.
347 * During the PCI probing phase, the rte_eth_dev_init() function is
348 * invoked for each PCI [Ethernet device] matching the embedded PCI
349 * identifiers provided by the driver.
352 rte_eth_driver_register(struct eth_driver *eth_drv)
354 eth_drv->pci_drv.devinit = rte_eth_dev_init;
355 eth_drv->pci_drv.devuninit = rte_eth_dev_uninit;
356 rte_eal_pci_register(ð_drv->pci_drv);
360 rte_eth_dev_is_valid_port(uint8_t port_id)
362 if (port_id >= RTE_MAX_ETHPORTS ||
363 rte_eth_devices[port_id].attached != DEV_ATTACHED)
370 rte_eth_dev_socket_id(uint8_t port_id)
372 if (!rte_eth_dev_is_valid_port(port_id))
374 return rte_eth_devices[port_id].data->numa_node;
378 rte_eth_dev_count(void)
383 static enum rte_eth_dev_type
384 rte_eth_dev_get_device_type(uint8_t port_id)
386 if (!rte_eth_dev_is_valid_port(port_id))
387 return RTE_ETH_DEV_UNKNOWN;
388 return rte_eth_devices[port_id].dev_type;
392 rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
397 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
401 *addr = rte_eth_devices[port_id].pci_dev->addr;
406 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
413 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
417 /* shouldn't check 'rte_eth_devices[i].data',
418 * because it might be overwritten by VDEV PMD */
419 tmp = rte_eth_dev_data[port_id].name;
425 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
430 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
434 *port_id = RTE_MAX_ETHPORTS;
436 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
439 rte_eth_dev_data[i].name, strlen(name))) {
450 rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
453 struct rte_pci_device *pci_dev = NULL;
456 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
460 *port_id = RTE_MAX_ETHPORTS;
462 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
464 pci_dev = rte_eth_devices[i].pci_dev;
467 !rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
478 rte_eth_dev_is_detachable(uint8_t port_id)
482 if (!rte_eth_dev_is_valid_port(port_id)) {
483 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
487 switch (rte_eth_devices[port_id].data->kdrv) {
488 case RTE_KDRV_IGB_UIO:
489 case RTE_KDRV_UIO_GENERIC:
490 case RTE_KDRV_NIC_UIO:
497 dev_flags = rte_eth_devices[port_id].data->dev_flags;
498 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
499 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
505 /* attach the new physical device, then store port_id of the device */
507 rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
509 /* re-construct pci_device_list */
510 if (rte_eal_pci_scan())
512 /* Invoke probe func of the driver can handle the new device. */
513 if (rte_eal_pci_probe_one(addr))
516 if (rte_eth_dev_get_port_by_addr(addr, port_id))
524 /* detach the new physical device, then store pci_addr of the device */
526 rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
528 struct rte_pci_addr freed_addr;
529 struct rte_pci_addr vp;
531 /* get pci address by port id */
532 if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
535 /* Zeroed pci addr means the port comes from virtual device */
536 vp.domain = vp.bus = vp.devid = vp.function = 0;
537 if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
540 /* invoke devuninit func of the pci driver,
541 * also remove the device from pci_device_list */
542 if (rte_eal_pci_detach(&freed_addr))
551 /* attach the new virtual device, then store port_id of the device */
553 rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
555 char *name = NULL, *args = NULL;
558 /* parse vdevargs, then retrieve device name and args */
559 if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
562 /* walk around dev_driver_list to find the driver of the device,
563 * then invoke probe function of the driver.
564 * rte_eal_vdev_init() updates port_id allocated after
567 if (rte_eal_vdev_init(name, args))
570 if (rte_eth_dev_get_port_by_name(name, port_id))
581 /* detach the new virtual device, then store the name of the device */
583 rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
585 char name[RTE_ETH_NAME_MAX_LEN];
587 /* get device name by port id */
588 if (rte_eth_dev_get_name_by_port(port_id, name))
590 /* walk around dev_driver_list to find the driver of the device,
591 * then invoke uninit function of the driver */
592 if (rte_eal_vdev_uninit(name))
595 strncpy(vdevname, name, sizeof(name));
601 /* attach the new device, then store port_id of the device */
603 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
605 struct rte_pci_addr addr;
608 if ((devargs == NULL) || (port_id == NULL)) {
613 if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
614 ret = rte_eth_dev_attach_pdev(&addr, port_id);
618 ret = rte_eth_dev_attach_vdev(devargs, port_id);
625 RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
629 /* detach the device, then store the name of the device */
631 rte_eth_dev_detach(uint8_t port_id, char *name)
633 struct rte_pci_addr addr;
641 /* check whether the driver supports detach feature, or not */
642 if (rte_eth_dev_is_detachable(port_id))
645 if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
646 ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
650 ret = rte_eth_dev_detach_pdev(port_id, &addr);
654 snprintf(name, RTE_ETH_NAME_MAX_LEN,
656 addr.domain, addr.bus,
657 addr.devid, addr.function);
659 ret = rte_eth_dev_detach_vdev(port_id, name);
667 RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
672 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
674 uint16_t old_nb_queues = dev->data->nb_rx_queues;
678 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
679 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
680 sizeof(dev->data->rx_queues[0]) * nb_queues,
681 RTE_CACHE_LINE_SIZE);
682 if (dev->data->rx_queues == NULL) {
683 dev->data->nb_rx_queues = 0;
686 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
689 rxq = dev->data->rx_queues;
691 for (i = nb_queues; i < old_nb_queues; i++)
692 (*dev->dev_ops->rx_queue_release)(rxq[i]);
693 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
694 RTE_CACHE_LINE_SIZE);
697 if (nb_queues > old_nb_queues) {
698 uint16_t new_qs = nb_queues - old_nb_queues;
700 memset(rxq + old_nb_queues, 0,
701 sizeof(rxq[0]) * new_qs);
704 dev->data->rx_queues = rxq;
706 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
709 rxq = dev->data->rx_queues;
711 for (i = nb_queues; i < old_nb_queues; i++)
712 (*dev->dev_ops->rx_queue_release)(rxq[i]);
714 dev->data->nb_rx_queues = nb_queues;
719 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
721 struct rte_eth_dev *dev;
723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
725 dev = &rte_eth_devices[port_id];
726 if (rx_queue_id >= dev->data->nb_rx_queues) {
727 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
733 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
734 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
735 " already started\n",
736 rx_queue_id, port_id);
740 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
745 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
747 struct rte_eth_dev *dev;
749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
751 dev = &rte_eth_devices[port_id];
752 if (rx_queue_id >= dev->data->nb_rx_queues) {
753 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
759 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
760 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
761 " already stopped\n",
762 rx_queue_id, port_id);
766 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
771 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
773 struct rte_eth_dev *dev;
775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
777 dev = &rte_eth_devices[port_id];
778 if (tx_queue_id >= dev->data->nb_tx_queues) {
779 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
785 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
786 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
787 " already started\n",
788 tx_queue_id, port_id);
792 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
797 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
799 struct rte_eth_dev *dev;
801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
803 dev = &rte_eth_devices[port_id];
804 if (tx_queue_id >= dev->data->nb_tx_queues) {
805 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
811 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
812 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
813 " already stopped\n",
814 tx_queue_id, port_id);
818 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
823 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
825 uint16_t old_nb_queues = dev->data->nb_tx_queues;
829 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
830 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
831 sizeof(dev->data->tx_queues[0]) * nb_queues,
832 RTE_CACHE_LINE_SIZE);
833 if (dev->data->tx_queues == NULL) {
834 dev->data->nb_tx_queues = 0;
837 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
840 txq = dev->data->tx_queues;
842 for (i = nb_queues; i < old_nb_queues; i++)
843 (*dev->dev_ops->tx_queue_release)(txq[i]);
844 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
845 RTE_CACHE_LINE_SIZE);
848 if (nb_queues > old_nb_queues) {
849 uint16_t new_qs = nb_queues - old_nb_queues;
851 memset(txq + old_nb_queues, 0,
852 sizeof(txq[0]) * new_qs);
855 dev->data->tx_queues = txq;
857 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
860 txq = dev->data->tx_queues;
862 for (i = nb_queues; i < old_nb_queues; i++)
863 (*dev->dev_ops->tx_queue_release)(txq[i]);
865 dev->data->nb_tx_queues = nb_queues;
870 rte_eth_speed_bitflag(uint32_t speed, int duplex)
873 case ETH_SPEED_NUM_10M:
874 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
875 case ETH_SPEED_NUM_100M:
876 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
877 case ETH_SPEED_NUM_1G:
878 return ETH_LINK_SPEED_1G;
879 case ETH_SPEED_NUM_2_5G:
880 return ETH_LINK_SPEED_2_5G;
881 case ETH_SPEED_NUM_5G:
882 return ETH_LINK_SPEED_5G;
883 case ETH_SPEED_NUM_10G:
884 return ETH_LINK_SPEED_10G;
885 case ETH_SPEED_NUM_20G:
886 return ETH_LINK_SPEED_20G;
887 case ETH_SPEED_NUM_25G:
888 return ETH_LINK_SPEED_25G;
889 case ETH_SPEED_NUM_40G:
890 return ETH_LINK_SPEED_40G;
891 case ETH_SPEED_NUM_50G:
892 return ETH_LINK_SPEED_50G;
893 case ETH_SPEED_NUM_56G:
894 return ETH_LINK_SPEED_56G;
901 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
902 const struct rte_eth_conf *dev_conf)
904 struct rte_eth_dev *dev;
905 struct rte_eth_dev_info dev_info;
908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
910 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
912 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
913 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
917 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
919 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
920 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
924 dev = &rte_eth_devices[port_id];
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
929 if (dev->data->dev_started) {
931 "port %d must be stopped to allow configuration\n", port_id);
935 /* Copy the dev_conf parameter into the dev structure */
936 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
939 * Check that the numbers of RX and TX queues are not greater
940 * than the maximum number of RX and TX queues supported by the
943 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
945 if (nb_rx_q == 0 && nb_tx_q == 0) {
946 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
950 if (nb_rx_q > dev_info.max_rx_queues) {
951 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
952 port_id, nb_rx_q, dev_info.max_rx_queues);
956 if (nb_tx_q > dev_info.max_tx_queues) {
957 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
958 port_id, nb_tx_q, dev_info.max_tx_queues);
963 * If link state interrupt is enabled, check that the
964 * device supports it.
966 if ((dev_conf->intr_conf.lsc == 1) &&
967 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
968 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
969 dev->data->drv_name);
974 * If jumbo frames are enabled, check that the maximum RX packet
975 * length is supported by the configured device.
977 if (dev_conf->rxmode.jumbo_frame == 1) {
978 if (dev_conf->rxmode.max_rx_pkt_len >
979 dev_info.max_rx_pktlen) {
980 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
981 " > max valid value %u\n",
983 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
984 (unsigned)dev_info.max_rx_pktlen);
986 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
987 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
988 " < min valid value %u\n",
990 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
991 (unsigned)ETHER_MIN_LEN);
995 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
996 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
997 /* Use default value */
998 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1003 * Setup new number of RX/TX queues and reconfigure device.
1005 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1007 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1012 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1014 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1016 rte_eth_dev_rx_queue_config(dev, 0);
1020 diag = (*dev->dev_ops->dev_configure)(dev);
1022 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1024 rte_eth_dev_rx_queue_config(dev, 0);
1025 rte_eth_dev_tx_queue_config(dev, 0);
1033 rte_eth_dev_config_restore(uint8_t port_id)
1035 struct rte_eth_dev *dev;
1036 struct rte_eth_dev_info dev_info;
1037 struct ether_addr addr;
1041 dev = &rte_eth_devices[port_id];
1043 rte_eth_dev_info_get(port_id, &dev_info);
1045 if (RTE_ETH_DEV_SRIOV(dev).active)
1046 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1048 /* replay MAC address configuration */
1049 for (i = 0; i < dev_info.max_mac_addrs; i++) {
1050 addr = dev->data->mac_addrs[i];
1052 /* skip zero address */
1053 if (is_zero_ether_addr(&addr))
1056 /* add address to the hardware */
1057 if (*dev->dev_ops->mac_addr_add &&
1058 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
1059 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1061 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1063 /* exit the loop but not return an error */
1068 /* replay promiscuous configuration */
1069 if (rte_eth_promiscuous_get(port_id) == 1)
1070 rte_eth_promiscuous_enable(port_id);
1071 else if (rte_eth_promiscuous_get(port_id) == 0)
1072 rte_eth_promiscuous_disable(port_id);
1074 /* replay all multicast configuration */
1075 if (rte_eth_allmulticast_get(port_id) == 1)
1076 rte_eth_allmulticast_enable(port_id);
1077 else if (rte_eth_allmulticast_get(port_id) == 0)
1078 rte_eth_allmulticast_disable(port_id);
1082 rte_eth_dev_start(uint8_t port_id)
1084 struct rte_eth_dev *dev;
1087 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1089 dev = &rte_eth_devices[port_id];
1091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1093 if (dev->data->dev_started != 0) {
1094 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1095 " already started\n",
1100 diag = (*dev->dev_ops->dev_start)(dev);
1102 dev->data->dev_started = 1;
1106 rte_eth_dev_config_restore(port_id);
1108 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1110 (*dev->dev_ops->link_update)(dev, 0);
1116 rte_eth_dev_stop(uint8_t port_id)
1118 struct rte_eth_dev *dev;
1120 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1121 dev = &rte_eth_devices[port_id];
1123 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1125 if (dev->data->dev_started == 0) {
1126 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1127 " already stopped\n",
1132 dev->data->dev_started = 0;
1133 (*dev->dev_ops->dev_stop)(dev);
1137 rte_eth_dev_set_link_up(uint8_t port_id)
1139 struct rte_eth_dev *dev;
1141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1143 dev = &rte_eth_devices[port_id];
1145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1146 return (*dev->dev_ops->dev_set_link_up)(dev);
1150 rte_eth_dev_set_link_down(uint8_t port_id)
1152 struct rte_eth_dev *dev;
1154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1156 dev = &rte_eth_devices[port_id];
1158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1159 return (*dev->dev_ops->dev_set_link_down)(dev);
1163 rte_eth_dev_close(uint8_t port_id)
1165 struct rte_eth_dev *dev;
1167 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1168 dev = &rte_eth_devices[port_id];
1170 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1171 dev->data->dev_started = 0;
1172 (*dev->dev_ops->dev_close)(dev);
1174 rte_free(dev->data->rx_queues);
1175 dev->data->rx_queues = NULL;
1176 rte_free(dev->data->tx_queues);
1177 dev->data->tx_queues = NULL;
1181 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1182 uint16_t nb_rx_desc, unsigned int socket_id,
1183 const struct rte_eth_rxconf *rx_conf,
1184 struct rte_mempool *mp)
1187 uint32_t mbp_buf_size;
1188 struct rte_eth_dev *dev;
1189 struct rte_eth_dev_info dev_info;
1191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1193 dev = &rte_eth_devices[port_id];
1194 if (rx_queue_id >= dev->data->nb_rx_queues) {
1195 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1199 if (dev->data->dev_started) {
1200 RTE_PMD_DEBUG_TRACE(
1201 "port %d must be stopped to allow configuration\n", port_id);
1205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1209 * Check the size of the mbuf data buffer.
1210 * This value must be provided in the private data of the memory pool.
1211 * First check that the memory pool has a valid private data.
1213 rte_eth_dev_info_get(port_id, &dev_info);
1214 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1215 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1216 mp->name, (int) mp->private_data_size,
1217 (int) sizeof(struct rte_pktmbuf_pool_private));
1220 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1222 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1223 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1224 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1228 (int)(RTE_PKTMBUF_HEADROOM +
1229 dev_info.min_rx_bufsize),
1230 (int)RTE_PKTMBUF_HEADROOM,
1231 (int)dev_info.min_rx_bufsize);
1235 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1236 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1237 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1239 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1240 "should be: <= %hu, = %hu, and a product of %hu\n",
1242 dev_info.rx_desc_lim.nb_max,
1243 dev_info.rx_desc_lim.nb_min,
1244 dev_info.rx_desc_lim.nb_align);
1248 if (rx_conf == NULL)
1249 rx_conf = &dev_info.default_rxconf;
1251 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1252 socket_id, rx_conf, mp);
1254 if (!dev->data->min_rx_buf_size ||
1255 dev->data->min_rx_buf_size > mbp_buf_size)
1256 dev->data->min_rx_buf_size = mbp_buf_size;
1263 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1264 uint16_t nb_tx_desc, unsigned int socket_id,
1265 const struct rte_eth_txconf *tx_conf)
1267 struct rte_eth_dev *dev;
1268 struct rte_eth_dev_info dev_info;
1270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1272 dev = &rte_eth_devices[port_id];
1273 if (tx_queue_id >= dev->data->nb_tx_queues) {
1274 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1278 if (dev->data->dev_started) {
1279 RTE_PMD_DEBUG_TRACE(
1280 "port %d must be stopped to allow configuration\n", port_id);
1284 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1285 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1287 rte_eth_dev_info_get(port_id, &dev_info);
1289 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1290 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1291 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1292 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1293 "should be: <= %hu, = %hu, and a product of %hu\n",
1295 dev_info.tx_desc_lim.nb_max,
1296 dev_info.tx_desc_lim.nb_min,
1297 dev_info.tx_desc_lim.nb_align);
1301 if (tx_conf == NULL)
1302 tx_conf = &dev_info.default_txconf;
1304 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1305 socket_id, tx_conf);
1309 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1310 void *userdata __rte_unused)
1314 for (i = 0; i < unsent; i++)
1315 rte_pktmbuf_free(pkts[i]);
1319 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1322 uint64_t *count = userdata;
1325 for (i = 0; i < unsent; i++)
1326 rte_pktmbuf_free(pkts[i]);
1332 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1333 buffer_tx_error_fn cbfn, void *userdata)
1335 buffer->error_callback = cbfn;
1336 buffer->error_userdata = userdata;
1341 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1346 buffer->size = size;
1347 if (buffer->error_callback == NULL)
1348 rte_eth_tx_buffer_set_err_callback(buffer,
1349 rte_eth_tx_buffer_drop_callback, NULL);
1355 rte_eth_promiscuous_enable(uint8_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1360 dev = &rte_eth_devices[port_id];
1362 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1363 (*dev->dev_ops->promiscuous_enable)(dev);
1364 dev->data->promiscuous = 1;
1368 rte_eth_promiscuous_disable(uint8_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1376 dev->data->promiscuous = 0;
1377 (*dev->dev_ops->promiscuous_disable)(dev);
1381 rte_eth_promiscuous_get(uint8_t port_id)
1383 struct rte_eth_dev *dev;
1385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1387 dev = &rte_eth_devices[port_id];
1388 return dev->data->promiscuous;
1392 rte_eth_allmulticast_enable(uint8_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1400 (*dev->dev_ops->allmulticast_enable)(dev);
1401 dev->data->all_multicast = 1;
1405 rte_eth_allmulticast_disable(uint8_t port_id)
1407 struct rte_eth_dev *dev;
1409 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1410 dev = &rte_eth_devices[port_id];
1412 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1413 dev->data->all_multicast = 0;
1414 (*dev->dev_ops->allmulticast_disable)(dev);
1418 rte_eth_allmulticast_get(uint8_t port_id)
1420 struct rte_eth_dev *dev;
1422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1424 dev = &rte_eth_devices[port_id];
1425 return dev->data->all_multicast;
1429 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1430 struct rte_eth_link *link)
1432 struct rte_eth_link *dst = link;
1433 struct rte_eth_link *src = &(dev->data->dev_link);
1435 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1436 *(uint64_t *)src) == 0)
1443 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1445 struct rte_eth_dev *dev;
1447 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1448 dev = &rte_eth_devices[port_id];
1450 if (dev->data->dev_conf.intr_conf.lsc != 0)
1451 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1453 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1454 (*dev->dev_ops->link_update)(dev, 1);
1455 *eth_link = dev->data->dev_link;
1460 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1462 struct rte_eth_dev *dev;
1464 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1465 dev = &rte_eth_devices[port_id];
1467 if (dev->data->dev_conf.intr_conf.lsc != 0)
1468 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1470 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1471 (*dev->dev_ops->link_update)(dev, 0);
1472 *eth_link = dev->data->dev_link;
1477 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1479 struct rte_eth_dev *dev;
1481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1483 dev = &rte_eth_devices[port_id];
1484 memset(stats, 0, sizeof(*stats));
1486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1487 (*dev->dev_ops->stats_get)(dev, stats);
1488 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1493 rte_eth_stats_reset(uint8_t port_id)
1495 struct rte_eth_dev *dev;
1497 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1498 dev = &rte_eth_devices[port_id];
1500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1501 (*dev->dev_ops->stats_reset)(dev);
1502 dev->data->rx_mbuf_alloc_failed = 0;
1505 /* retrieve ethdev extended statistics */
1507 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstats *xstats,
1510 struct rte_eth_stats eth_stats;
1511 struct rte_eth_dev *dev;
1512 unsigned count = 0, i, q;
1514 uint64_t val, *stats_ptr;
1516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1518 dev = &rte_eth_devices[port_id];
1520 /* Return generic statistics */
1521 count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1522 (dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1524 /* implemented by the driver */
1525 if (dev->dev_ops->xstats_get != NULL) {
1526 /* Retrieve the xstats from the driver at the end of the
1529 xcount = (*dev->dev_ops->xstats_get)(dev,
1530 xstats ? xstats + count : NULL,
1531 (n > count) ? n - count : 0);
1537 if (n < count + xcount)
1538 return count + xcount;
1540 /* now fill the xstats structure */
1542 rte_eth_stats_get(port_id, ð_stats);
1545 for (i = 0; i < RTE_NB_STATS; i++) {
1546 stats_ptr = RTE_PTR_ADD(ð_stats,
1547 rte_stats_strings[i].offset);
1549 snprintf(xstats[count].name, sizeof(xstats[count].name),
1550 "%s", rte_stats_strings[i].name);
1551 xstats[count++].value = val;
1555 for (q = 0; q < dev->data->nb_rx_queues; q++) {
1556 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1557 stats_ptr = RTE_PTR_ADD(ð_stats,
1558 rte_rxq_stats_strings[i].offset +
1559 q * sizeof(uint64_t));
1561 snprintf(xstats[count].name, sizeof(xstats[count].name),
1563 rte_rxq_stats_strings[i].name);
1564 xstats[count++].value = val;
1569 for (q = 0; q < dev->data->nb_tx_queues; q++) {
1570 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1571 stats_ptr = RTE_PTR_ADD(ð_stats,
1572 rte_txq_stats_strings[i].offset +
1573 q * sizeof(uint64_t));
1575 snprintf(xstats[count].name, sizeof(xstats[count].name),
1577 rte_txq_stats_strings[i].name);
1578 xstats[count++].value = val;
1582 return count + xcount;
1585 /* reset ethdev extended statistics */
1587 rte_eth_xstats_reset(uint8_t port_id)
1589 struct rte_eth_dev *dev;
1591 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1592 dev = &rte_eth_devices[port_id];
1594 /* implemented by the driver */
1595 if (dev->dev_ops->xstats_reset != NULL) {
1596 (*dev->dev_ops->xstats_reset)(dev);
1600 /* fallback to default */
1601 rte_eth_stats_reset(port_id);
1605 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1608 struct rte_eth_dev *dev;
1610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1612 dev = &rte_eth_devices[port_id];
1614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1615 return (*dev->dev_ops->queue_stats_mapping_set)
1616 (dev, queue_id, stat_idx, is_rx);
1621 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1624 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1630 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1633 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1639 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1641 struct rte_eth_dev *dev;
1642 const struct rte_eth_desc_lim lim = {
1643 .nb_max = UINT16_MAX,
1648 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1649 dev = &rte_eth_devices[port_id];
1651 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1652 dev_info->rx_desc_lim = lim;
1653 dev_info->tx_desc_lim = lim;
1655 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1656 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1657 dev_info->pci_dev = dev->pci_dev;
1658 dev_info->driver_name = dev->data->drv_name;
1662 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1663 uint32_t *ptypes, int num)
1666 struct rte_eth_dev *dev;
1667 const uint32_t *all_ptypes;
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1670 dev = &rte_eth_devices[port_id];
1671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get,
1673 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1678 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1679 if (all_ptypes[i] & ptype_mask) {
1681 ptypes[j] = all_ptypes[i];
1689 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1691 struct rte_eth_dev *dev;
1693 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1694 dev = &rte_eth_devices[port_id];
1695 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1700 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1702 struct rte_eth_dev *dev;
1704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1706 dev = &rte_eth_devices[port_id];
1707 *mtu = dev->data->mtu;
1712 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1715 struct rte_eth_dev *dev;
1717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1718 dev = &rte_eth_devices[port_id];
1719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1721 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1723 dev->data->mtu = mtu;
1729 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1731 struct rte_eth_dev *dev;
1733 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1734 dev = &rte_eth_devices[port_id];
1735 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1736 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1740 if (vlan_id > 4095) {
1741 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1742 port_id, (unsigned) vlan_id);
1745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1747 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1751 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1753 struct rte_eth_dev *dev;
1755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1756 dev = &rte_eth_devices[port_id];
1757 if (rx_queue_id >= dev->data->nb_rx_queues) {
1758 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1763 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1769 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1770 enum rte_vlan_type vlan_type,
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1776 dev = &rte_eth_devices[port_id];
1777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1779 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1783 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1785 struct rte_eth_dev *dev;
1790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1791 dev = &rte_eth_devices[port_id];
1793 /*check which option changed by application*/
1794 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1795 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1797 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1798 mask |= ETH_VLAN_STRIP_MASK;
1801 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1802 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1804 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1805 mask |= ETH_VLAN_FILTER_MASK;
1808 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1809 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1811 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1812 mask |= ETH_VLAN_EXTEND_MASK;
1819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1820 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1826 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1828 struct rte_eth_dev *dev;
1831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1832 dev = &rte_eth_devices[port_id];
1834 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1835 ret |= ETH_VLAN_STRIP_OFFLOAD;
1837 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1838 ret |= ETH_VLAN_FILTER_OFFLOAD;
1840 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1841 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1847 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1852 dev = &rte_eth_devices[port_id];
1853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1854 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1860 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1862 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1865 dev = &rte_eth_devices[port_id];
1866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1867 memset(fc_conf, 0, sizeof(*fc_conf));
1868 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1872 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1874 struct rte_eth_dev *dev;
1876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1877 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1878 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1882 dev = &rte_eth_devices[port_id];
1883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1884 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1888 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1890 struct rte_eth_dev *dev;
1892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1893 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1894 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1898 dev = &rte_eth_devices[port_id];
1899 /* High water, low water validation are device specific */
1900 if (*dev->dev_ops->priority_flow_ctrl_set)
1901 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1906 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1914 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1915 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1916 RTE_RETA_GROUP_SIZE);
1920 num = reta_size / RTE_RETA_GROUP_SIZE;
1921 for (i = 0; i < num; i++) {
1922 if (reta_conf[i].mask)
1930 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1934 uint16_t i, idx, shift;
1940 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1944 for (i = 0; i < reta_size; i++) {
1945 idx = i / RTE_RETA_GROUP_SIZE;
1946 shift = i % RTE_RETA_GROUP_SIZE;
1947 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1948 (reta_conf[idx].reta[shift] >= max_rxq)) {
1949 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1950 "the maximum rxq index: %u\n", idx, shift,
1951 reta_conf[idx].reta[shift], max_rxq);
1960 rte_eth_dev_rss_reta_update(uint8_t port_id,
1961 struct rte_eth_rss_reta_entry64 *reta_conf,
1964 struct rte_eth_dev *dev;
1967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1968 /* Check mask bits */
1969 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1973 dev = &rte_eth_devices[port_id];
1975 /* Check entry value */
1976 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1977 dev->data->nb_rx_queues);
1981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1982 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1986 rte_eth_dev_rss_reta_query(uint8_t port_id,
1987 struct rte_eth_rss_reta_entry64 *reta_conf,
1990 struct rte_eth_dev *dev;
1993 if (port_id >= nb_ports) {
1994 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
1998 /* Check mask bits */
1999 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2003 dev = &rte_eth_devices[port_id];
2004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2005 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2009 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2011 struct rte_eth_dev *dev;
2012 uint16_t rss_hash_protos;
2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 rss_hash_protos = rss_conf->rss_hf;
2016 if ((rss_hash_protos != 0) &&
2017 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2018 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2022 dev = &rte_eth_devices[port_id];
2023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2024 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2028 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2029 struct rte_eth_rss_conf *rss_conf)
2031 struct rte_eth_dev *dev;
2033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2034 dev = &rte_eth_devices[port_id];
2035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2036 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2040 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2041 struct rte_eth_udp_tunnel *udp_tunnel)
2043 struct rte_eth_dev *dev;
2045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2046 if (udp_tunnel == NULL) {
2047 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2051 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2052 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2056 dev = &rte_eth_devices[port_id];
2057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2058 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2062 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2063 struct rte_eth_udp_tunnel *udp_tunnel)
2065 struct rte_eth_dev *dev;
2067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2068 dev = &rte_eth_devices[port_id];
2070 if (udp_tunnel == NULL) {
2071 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2075 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2076 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2081 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2085 rte_eth_led_on(uint8_t port_id)
2087 struct rte_eth_dev *dev;
2089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2090 dev = &rte_eth_devices[port_id];
2091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2092 return (*dev->dev_ops->dev_led_on)(dev);
2096 rte_eth_led_off(uint8_t port_id)
2098 struct rte_eth_dev *dev;
2100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2101 dev = &rte_eth_devices[port_id];
2102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2103 return (*dev->dev_ops->dev_led_off)(dev);
2107 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2111 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2113 struct rte_eth_dev_info dev_info;
2114 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2117 rte_eth_dev_info_get(port_id, &dev_info);
2119 for (i = 0; i < dev_info.max_mac_addrs; i++)
2120 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2126 static const struct ether_addr null_mac_addr;
2129 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2132 struct rte_eth_dev *dev;
2136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2137 dev = &rte_eth_devices[port_id];
2138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2140 if (is_zero_ether_addr(addr)) {
2141 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2145 if (pool >= ETH_64_POOLS) {
2146 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2150 index = get_mac_addr_index(port_id, addr);
2152 index = get_mac_addr_index(port_id, &null_mac_addr);
2154 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2159 pool_mask = dev->data->mac_pool_sel[index];
2161 /* Check if both MAC address and pool is already there, and do nothing */
2162 if (pool_mask & (1ULL << pool))
2167 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2169 /* Update address in NIC data structure */
2170 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2172 /* Update pool bitmap in NIC data structure */
2173 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2179 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2181 struct rte_eth_dev *dev;
2184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2185 dev = &rte_eth_devices[port_id];
2186 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2188 index = get_mac_addr_index(port_id, addr);
2190 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2192 } else if (index < 0)
2193 return 0; /* Do nothing if address wasn't found */
2196 (*dev->dev_ops->mac_addr_remove)(dev, index);
2198 /* Update address in NIC data structure */
2199 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2201 /* reset pool bitmap */
2202 dev->data->mac_pool_sel[index] = 0;
2208 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2210 struct rte_eth_dev *dev;
2212 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2214 if (!is_valid_assigned_ether_addr(addr))
2217 dev = &rte_eth_devices[port_id];
2218 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2220 /* Update default address in NIC data structure */
2221 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2223 (*dev->dev_ops->mac_addr_set)(dev, addr);
2229 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2230 uint16_t rx_mode, uint8_t on)
2233 struct rte_eth_dev *dev;
2234 struct rte_eth_dev_info dev_info;
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2238 dev = &rte_eth_devices[port_id];
2239 rte_eth_dev_info_get(port_id, &dev_info);
2241 num_vfs = dev_info.max_vfs;
2243 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2248 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2252 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2256 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2260 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2262 struct rte_eth_dev_info dev_info;
2263 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2266 rte_eth_dev_info_get(port_id, &dev_info);
2267 if (!dev->data->hash_mac_addrs)
2270 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2271 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2272 ETHER_ADDR_LEN) == 0)
2279 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2284 struct rte_eth_dev *dev;
2286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2288 dev = &rte_eth_devices[port_id];
2289 if (is_zero_ether_addr(addr)) {
2290 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2295 index = get_hash_mac_addr_index(port_id, addr);
2296 /* Check if it's already there, and do nothing */
2297 if ((index >= 0) && (on))
2302 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2303 "set in UTA\n", port_id);
2307 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2309 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2316 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2318 /* Update address in NIC data structure */
2320 ether_addr_copy(addr,
2321 &dev->data->hash_mac_addrs[index]);
2323 ether_addr_copy(&null_mac_addr,
2324 &dev->data->hash_mac_addrs[index]);
2331 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2333 struct rte_eth_dev *dev;
2335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2337 dev = &rte_eth_devices[port_id];
2339 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2340 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2344 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2347 struct rte_eth_dev *dev;
2348 struct rte_eth_dev_info dev_info;
2350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2353 rte_eth_dev_info_get(port_id, &dev_info);
2355 num_vfs = dev_info.max_vfs;
2357 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2362 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2366 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2369 struct rte_eth_dev *dev;
2370 struct rte_eth_dev_info dev_info;
2372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2374 dev = &rte_eth_devices[port_id];
2375 rte_eth_dev_info_get(port_id, &dev_info);
2377 num_vfs = dev_info.max_vfs;
2379 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2384 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2388 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2389 uint64_t vf_mask, uint8_t vlan_on)
2391 struct rte_eth_dev *dev;
2393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2395 dev = &rte_eth_devices[port_id];
2397 if (vlan_id > ETHER_MAX_VLAN_ID) {
2398 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2404 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2409 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2413 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2416 struct rte_eth_dev *dev;
2417 struct rte_eth_dev_info dev_info;
2418 struct rte_eth_link link;
2420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2422 dev = &rte_eth_devices[port_id];
2423 rte_eth_dev_info_get(port_id, &dev_info);
2424 link = dev->data->dev_link;
2426 if (queue_idx > dev_info.max_tx_queues) {
2427 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2428 "invalid queue id=%d\n", port_id, queue_idx);
2432 if (tx_rate > link.link_speed) {
2433 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2434 "bigger than link speed= %d\n",
2435 tx_rate, link.link_speed);
2439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2440 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2443 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2446 struct rte_eth_dev *dev;
2447 struct rte_eth_dev_info dev_info;
2448 struct rte_eth_link link;
2453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2455 dev = &rte_eth_devices[port_id];
2456 rte_eth_dev_info_get(port_id, &dev_info);
2457 link = dev->data->dev_link;
2459 if (vf > dev_info.max_vfs) {
2460 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2461 "invalid vf id=%d\n", port_id, vf);
2465 if (tx_rate > link.link_speed) {
2466 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2467 "bigger than link speed= %d\n",
2468 tx_rate, link.link_speed);
2472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2473 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2477 rte_eth_mirror_rule_set(uint8_t port_id,
2478 struct rte_eth_mirror_conf *mirror_conf,
2479 uint8_t rule_id, uint8_t on)
2481 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 if (mirror_conf->rule_type == 0) {
2485 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2489 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2490 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2495 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2496 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2497 (mirror_conf->pool_mask == 0)) {
2498 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2502 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2503 mirror_conf->vlan.vlan_mask == 0) {
2504 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2508 dev = &rte_eth_devices[port_id];
2509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2511 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2515 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2517 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2521 dev = &rte_eth_devices[port_id];
2522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2524 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2528 rte_eth_dev_callback_register(uint8_t port_id,
2529 enum rte_eth_event_type event,
2530 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2532 struct rte_eth_dev *dev;
2533 struct rte_eth_dev_callback *user_cb;
2538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2540 dev = &rte_eth_devices[port_id];
2541 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2543 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2544 if (user_cb->cb_fn == cb_fn &&
2545 user_cb->cb_arg == cb_arg &&
2546 user_cb->event == event) {
2551 /* create a new callback. */
2552 if (user_cb == NULL)
2553 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2554 sizeof(struct rte_eth_dev_callback), 0);
2555 if (user_cb != NULL) {
2556 user_cb->cb_fn = cb_fn;
2557 user_cb->cb_arg = cb_arg;
2558 user_cb->event = event;
2559 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2562 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2563 return (user_cb == NULL) ? -ENOMEM : 0;
2567 rte_eth_dev_callback_unregister(uint8_t port_id,
2568 enum rte_eth_event_type event,
2569 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2572 struct rte_eth_dev *dev;
2573 struct rte_eth_dev_callback *cb, *next;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2580 dev = &rte_eth_devices[port_id];
2581 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2584 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2586 next = TAILQ_NEXT(cb, next);
2588 if (cb->cb_fn != cb_fn || cb->event != event ||
2589 (cb->cb_arg != (void *)-1 &&
2590 cb->cb_arg != cb_arg))
2594 * if this callback is not executing right now,
2597 if (cb->active == 0) {
2598 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2605 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2610 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2611 enum rte_eth_event_type event)
2613 struct rte_eth_dev_callback *cb_lst;
2614 struct rte_eth_dev_callback dev_cb;
2616 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2617 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2618 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2622 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2623 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2625 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2628 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2632 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2635 struct rte_eth_dev *dev;
2636 struct rte_intr_handle *intr_handle;
2640 if (!rte_eth_dev_is_valid_port(port_id)) {
2641 RTE_PMD_DEBUG_TRACE("Invalid port_id=%u\n", port_id);
2645 dev = &rte_eth_devices[port_id];
2646 intr_handle = &dev->pci_dev->intr_handle;
2647 if (!intr_handle->intr_vec) {
2648 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2652 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2653 vec = intr_handle->intr_vec[qid];
2654 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2655 if (rc && rc != -EEXIST) {
2656 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2657 " op %d epfd %d vec %u\n",
2658 port_id, qid, op, epfd, vec);
2665 const struct rte_memzone *
2666 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2667 uint16_t queue_id, size_t size, unsigned align,
2670 char z_name[RTE_MEMZONE_NAMESIZE];
2671 const struct rte_memzone *mz;
2673 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2674 dev->driver->pci_drv.name, ring_name,
2675 dev->data->port_id, queue_id);
2677 mz = rte_memzone_lookup(z_name);
2681 if (rte_xen_dom0_supported())
2682 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2683 0, align, RTE_PGSIZE_2M);
2685 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2690 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2691 int epfd, int op, void *data)
2694 struct rte_eth_dev *dev;
2695 struct rte_intr_handle *intr_handle;
2698 if (!rte_eth_dev_is_valid_port(port_id)) {
2699 RTE_PMD_DEBUG_TRACE("Invalid port_id=%u\n", port_id);
2703 dev = &rte_eth_devices[port_id];
2704 if (queue_id >= dev->data->nb_rx_queues) {
2705 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2709 intr_handle = &dev->pci_dev->intr_handle;
2710 if (!intr_handle->intr_vec) {
2711 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2715 vec = intr_handle->intr_vec[queue_id];
2716 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2717 if (rc && rc != -EEXIST) {
2718 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2719 " op %d epfd %d vec %u\n",
2720 port_id, queue_id, op, epfd, vec);
2728 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2731 struct rte_eth_dev *dev;
2733 if (!rte_eth_dev_is_valid_port(port_id)) {
2734 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
2738 dev = &rte_eth_devices[port_id];
2740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2741 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2745 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2748 struct rte_eth_dev *dev;
2750 if (!rte_eth_dev_is_valid_port(port_id)) {
2751 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
2755 dev = &rte_eth_devices[port_id];
2757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2758 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2761 #ifdef RTE_NIC_BYPASS
2762 int rte_eth_dev_bypass_init(uint8_t port_id)
2764 struct rte_eth_dev *dev;
2766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2768 dev = &rte_eth_devices[port_id];
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2770 (*dev->dev_ops->bypass_init)(dev);
2775 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2777 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 dev = &rte_eth_devices[port_id];
2782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2783 (*dev->dev_ops->bypass_state_show)(dev, state);
2788 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2796 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2801 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2807 dev = &rte_eth_devices[port_id];
2808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2809 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2814 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2820 dev = &rte_eth_devices[port_id];
2822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2823 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2828 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2830 struct rte_eth_dev *dev;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2834 dev = &rte_eth_devices[port_id];
2836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2837 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2842 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2844 struct rte_eth_dev *dev;
2846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2848 dev = &rte_eth_devices[port_id];
2850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2851 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2856 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2858 struct rte_eth_dev *dev;
2860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2862 dev = &rte_eth_devices[port_id];
2864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2865 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2870 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2872 struct rte_eth_dev *dev;
2874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 dev = &rte_eth_devices[port_id];
2878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2879 (*dev->dev_ops->bypass_wd_reset)(dev);
2885 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2887 struct rte_eth_dev *dev;
2889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 dev = &rte_eth_devices[port_id];
2892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2893 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2894 RTE_ETH_FILTER_NOP, NULL);
2898 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2899 enum rte_filter_op filter_op, void *arg)
2901 struct rte_eth_dev *dev;
2903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2905 dev = &rte_eth_devices[port_id];
2906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2907 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2911 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2912 rte_rx_callback_fn fn, void *user_param)
2914 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2915 rte_errno = ENOTSUP;
2918 /* check input parameters */
2919 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2920 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2925 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2933 cb->param = user_param;
2935 /* Add the callbacks in fifo order. */
2936 struct rte_eth_rxtx_callback *tail =
2937 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2940 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2952 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2953 rte_tx_callback_fn fn, void *user_param)
2955 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2956 rte_errno = ENOTSUP;
2959 /* check input parameters */
2960 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2961 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2966 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2974 cb->param = user_param;
2976 /* Add the callbacks in fifo order. */
2977 struct rte_eth_rxtx_callback *tail =
2978 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2981 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2993 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2994 struct rte_eth_rxtx_callback *user_cb)
2996 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2999 /* Check input parameters. */
3000 if (!rte_eth_dev_is_valid_port(port_id) || user_cb == NULL ||
3001 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3005 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3006 struct rte_eth_rxtx_callback *cb = dev->post_rx_burst_cbs[queue_id];
3007 struct rte_eth_rxtx_callback *prev_cb;
3009 /* Reset head pointer and remove user cb if first in the list. */
3010 if (cb == user_cb) {
3011 dev->post_rx_burst_cbs[queue_id] = user_cb->next;
3015 /* Remove the user cb from the callback list. */
3020 if (cb == user_cb) {
3021 prev_cb->next = user_cb->next;
3025 } while (cb != NULL);
3027 /* Callback wasn't found. */
3032 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3033 struct rte_eth_rxtx_callback *user_cb)
3035 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3038 /* Check input parameters. */
3039 if (!rte_eth_dev_is_valid_port(port_id) || user_cb == NULL ||
3040 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3044 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3045 struct rte_eth_rxtx_callback *cb = dev->pre_tx_burst_cbs[queue_id];
3046 struct rte_eth_rxtx_callback *prev_cb;
3048 /* Reset head pointer and remove user cb if first in the list. */
3049 if (cb == user_cb) {
3050 dev->pre_tx_burst_cbs[queue_id] = user_cb->next;
3054 /* Remove the user cb from the callback list. */
3059 if (cb == user_cb) {
3060 prev_cb->next = user_cb->next;
3064 } while (cb != NULL);
3066 /* Callback wasn't found. */
3071 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3072 struct rte_eth_rxq_info *qinfo)
3074 struct rte_eth_dev *dev;
3076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3081 dev = &rte_eth_devices[port_id];
3082 if (queue_id >= dev->data->nb_rx_queues) {
3083 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3089 memset(qinfo, 0, sizeof(*qinfo));
3090 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3095 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3096 struct rte_eth_txq_info *qinfo)
3098 struct rte_eth_dev *dev;
3100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3105 dev = &rte_eth_devices[port_id];
3106 if (queue_id >= dev->data->nb_tx_queues) {
3107 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3113 memset(qinfo, 0, sizeof(*qinfo));
3114 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3119 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3120 struct ether_addr *mc_addr_set,
3121 uint32_t nb_mc_addr)
3123 struct rte_eth_dev *dev;
3125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3127 dev = &rte_eth_devices[port_id];
3128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3129 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3133 rte_eth_timesync_enable(uint8_t port_id)
3135 struct rte_eth_dev *dev;
3137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3138 dev = &rte_eth_devices[port_id];
3140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3141 return (*dev->dev_ops->timesync_enable)(dev);
3145 rte_eth_timesync_disable(uint8_t port_id)
3147 struct rte_eth_dev *dev;
3149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3150 dev = &rte_eth_devices[port_id];
3152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3153 return (*dev->dev_ops->timesync_disable)(dev);
3157 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3160 struct rte_eth_dev *dev;
3162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3163 dev = &rte_eth_devices[port_id];
3165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3166 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3170 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3172 struct rte_eth_dev *dev;
3174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3175 dev = &rte_eth_devices[port_id];
3177 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3178 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3182 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3184 struct rte_eth_dev *dev;
3186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3187 dev = &rte_eth_devices[port_id];
3189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3190 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3194 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3196 struct rte_eth_dev *dev;
3198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3199 dev = &rte_eth_devices[port_id];
3201 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3202 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3206 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3208 struct rte_eth_dev *dev;
3210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3211 dev = &rte_eth_devices[port_id];
3213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3214 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3218 rte_eth_dev_get_reg_length(uint8_t port_id)
3220 struct rte_eth_dev *dev;
3222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3224 dev = &rte_eth_devices[port_id];
3225 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg_length, -ENOTSUP);
3226 return (*dev->dev_ops->get_reg_length)(dev);
3230 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3232 struct rte_eth_dev *dev;
3234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3236 dev = &rte_eth_devices[port_id];
3237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3238 return (*dev->dev_ops->get_reg)(dev, info);
3242 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3244 struct rte_eth_dev *dev;
3246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3248 dev = &rte_eth_devices[port_id];
3249 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3250 return (*dev->dev_ops->get_eeprom_length)(dev);
3254 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3256 struct rte_eth_dev *dev;
3258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3260 dev = &rte_eth_devices[port_id];
3261 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3262 return (*dev->dev_ops->get_eeprom)(dev, info);
3266 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3268 struct rte_eth_dev *dev;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272 dev = &rte_eth_devices[port_id];
3273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3274 return (*dev->dev_ops->set_eeprom)(dev, info);
3278 rte_eth_dev_get_dcb_info(uint8_t port_id,
3279 struct rte_eth_dcb_info *dcb_info)
3281 struct rte_eth_dev *dev;
3283 if (!rte_eth_dev_is_valid_port(port_id)) {
3284 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
3288 dev = &rte_eth_devices[port_id];
3289 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3292 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3296 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3298 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3299 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3304 eth_dev->data->dev_flags = 0;
3305 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3306 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3307 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3308 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3310 eth_dev->data->kdrv = pci_dev->kdrv;
3311 eth_dev->data->numa_node = pci_dev->numa_node;
3312 eth_dev->data->drv_name = pci_dev->driver->name;
3316 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3317 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3319 struct rte_eth_dev *dev;
3321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3322 if (l2_tunnel == NULL) {
3323 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3327 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3328 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3332 dev = &rte_eth_devices[port_id];
3333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3335 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3339 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3340 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3344 struct rte_eth_dev *dev;
3346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3348 if (l2_tunnel == NULL) {
3349 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3353 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3354 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3359 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3363 dev = &rte_eth_devices[port_id];
3364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3366 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);