1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static int ethdev_logtype;
45 #define ethdev_log(level, fmt, ...) \
46 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
50 static uint8_t eth_dev_last_created_port;
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 rte_eth_dev_allocated(const char *name)
234 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
235 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
236 strcmp(rte_eth_devices[i].data->name, name) == 0)
237 return &rte_eth_devices[i];
243 rte_eth_dev_find_free_port(void)
247 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
248 /* Using shared name field to find a free port. */
249 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
250 RTE_ASSERT(rte_eth_devices[i].state ==
255 return RTE_MAX_ETHPORTS;
258 static struct rte_eth_dev *
259 eth_dev_get(uint16_t port_id)
261 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
263 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
264 eth_dev->state = RTE_ETH_DEV_ATTACHED;
266 eth_dev_last_created_port = port_id;
272 rte_eth_dev_allocate(const char *name)
275 struct rte_eth_dev *eth_dev = NULL;
277 rte_eth_dev_shared_data_prepare();
279 /* Synchronize port creation between primary and secondary threads. */
280 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
282 port_id = rte_eth_dev_find_free_port();
283 if (port_id == RTE_MAX_ETHPORTS) {
284 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
288 if (rte_eth_dev_allocated(name) != NULL) {
290 "Ethernet Device with name %s already allocated!",
295 eth_dev = eth_dev_get(port_id);
296 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
297 eth_dev->data->port_id = port_id;
298 eth_dev->data->mtu = ETHER_MTU;
301 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
304 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
310 * Attach to a port already registered by the primary process, which
311 * makes sure that the same device would have the same port id both
312 * in the primary and secondary process.
315 rte_eth_dev_attach_secondary(const char *name)
318 struct rte_eth_dev *eth_dev = NULL;
320 rte_eth_dev_shared_data_prepare();
322 /* Synchronize port attachment to primary port creation and release. */
323 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
325 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
326 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
329 if (i == RTE_MAX_ETHPORTS) {
331 "device %s is not driven by the primary process\n",
334 eth_dev = eth_dev_get(i);
335 RTE_ASSERT(eth_dev->data->port_id == i);
338 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
343 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
348 rte_eth_dev_shared_data_prepare();
350 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
352 eth_dev->state = RTE_ETH_DEV_UNUSED;
354 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
358 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
364 rte_eth_dev_is_valid_port(uint16_t port_id)
366 if (port_id >= RTE_MAX_ETHPORTS ||
367 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
374 rte_eth_is_valid_owner_id(uint64_t owner_id)
376 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
377 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
378 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
384 uint64_t __rte_experimental
385 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
387 while (port_id < RTE_MAX_ETHPORTS &&
388 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
389 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
390 rte_eth_devices[port_id].data->owner.id != owner_id))
393 if (port_id >= RTE_MAX_ETHPORTS)
394 return RTE_MAX_ETHPORTS;
399 int __rte_experimental
400 rte_eth_dev_owner_new(uint64_t *owner_id)
402 rte_eth_dev_shared_data_prepare();
404 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
406 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
408 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
413 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
414 const struct rte_eth_dev_owner *new_owner)
416 struct rte_eth_dev_owner *port_owner;
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
421 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
422 !rte_eth_is_valid_owner_id(old_owner_id))
425 port_owner = &rte_eth_devices[port_id].data->owner;
426 if (port_owner->id != old_owner_id) {
427 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
428 " by %s_%016lX.\n", port_id,
429 port_owner->name, port_owner->id);
433 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
435 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
436 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
439 port_owner->id = new_owner->id;
441 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
442 new_owner->name, new_owner->id);
447 int __rte_experimental
448 rte_eth_dev_owner_set(const uint16_t port_id,
449 const struct rte_eth_dev_owner *owner)
453 rte_eth_dev_shared_data_prepare();
455 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
457 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
459 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
463 int __rte_experimental
464 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
466 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
467 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
470 rte_eth_dev_shared_data_prepare();
472 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
474 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
476 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
480 void __rte_experimental
481 rte_eth_dev_owner_delete(const uint64_t owner_id)
485 rte_eth_dev_shared_data_prepare();
487 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
489 if (rte_eth_is_valid_owner_id(owner_id)) {
490 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
491 memset(&rte_eth_devices[port_id].data->owner, 0,
492 sizeof(struct rte_eth_dev_owner));
493 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
494 " have removed.\n", owner_id);
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
505 rte_eth_dev_shared_data_prepare();
507 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
509 if (!rte_eth_dev_is_valid_port(port_id)) {
510 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
513 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
517 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 rte_eth_dev_socket_id(uint16_t port_id)
524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
525 return rte_eth_devices[port_id].data->numa_node;
529 rte_eth_dev_get_sec_ctx(uint16_t port_id)
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
532 return rte_eth_devices[port_id].security_ctx;
536 rte_eth_dev_count(void)
538 return rte_eth_dev_count_avail();
542 rte_eth_dev_count_avail(void)
549 RTE_ETH_FOREACH_DEV(p)
556 rte_eth_dev_count_total(void)
558 uint16_t port, count = 0;
560 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
561 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
568 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
575 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
579 /* shouldn't check 'rte_eth_devices[i].data',
580 * because it might be overwritten by VDEV PMD */
581 tmp = rte_eth_dev_shared_data->data[port_id].name;
587 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
592 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
596 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
597 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
598 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
608 eth_err(uint16_t port_id, int ret)
612 if (rte_eth_dev_is_removed(port_id))
617 /* attach the new device, then store port_id of the device */
619 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
621 int current = rte_eth_dev_count_total();
622 struct rte_devargs da;
625 memset(&da, 0, sizeof(da));
627 if ((devargs == NULL) || (port_id == NULL)) {
633 if (rte_devargs_parse(&da, "%s", devargs))
636 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
640 /* no point looking at the port count if no port exists */
641 if (!rte_eth_dev_count_total()) {
642 ethdev_log(ERR, "No port found for device (%s)", da.name);
647 /* if nothing happened, there is a bug here, since some driver told us
648 * it did attach a device, but did not create a port.
649 * FIXME: race condition in case of plug-out of another device
651 if (current == rte_eth_dev_count_total()) {
656 *port_id = eth_dev_last_created_port;
664 /* detach the device, then store the name of the device */
666 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
668 struct rte_device *dev;
673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
675 dev_flags = rte_eth_devices[port_id].data->dev_flags;
676 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
678 "Port %" PRIu16 " is bonded, cannot detach", port_id);
682 dev = rte_eth_devices[port_id].device;
686 bus = rte_bus_find_by_device(dev);
690 ret = rte_eal_hotplug_remove(bus->name, dev->name);
694 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
699 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
701 uint16_t old_nb_queues = dev->data->nb_rx_queues;
705 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
706 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
707 sizeof(dev->data->rx_queues[0]) * nb_queues,
708 RTE_CACHE_LINE_SIZE);
709 if (dev->data->rx_queues == NULL) {
710 dev->data->nb_rx_queues = 0;
713 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
716 rxq = dev->data->rx_queues;
718 for (i = nb_queues; i < old_nb_queues; i++)
719 (*dev->dev_ops->rx_queue_release)(rxq[i]);
720 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
721 RTE_CACHE_LINE_SIZE);
724 if (nb_queues > old_nb_queues) {
725 uint16_t new_qs = nb_queues - old_nb_queues;
727 memset(rxq + old_nb_queues, 0,
728 sizeof(rxq[0]) * new_qs);
731 dev->data->rx_queues = rxq;
733 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
736 rxq = dev->data->rx_queues;
738 for (i = nb_queues; i < old_nb_queues; i++)
739 (*dev->dev_ops->rx_queue_release)(rxq[i]);
741 rte_free(dev->data->rx_queues);
742 dev->data->rx_queues = NULL;
744 dev->data->nb_rx_queues = nb_queues;
749 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
751 struct rte_eth_dev *dev;
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
755 dev = &rte_eth_devices[port_id];
756 if (!dev->data->dev_started) {
758 "port %d must be started before start any queue\n", port_id);
762 if (rx_queue_id >= dev->data->nb_rx_queues) {
763 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
769 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
770 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
771 " already started\n",
772 rx_queue_id, port_id);
776 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
782 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
784 struct rte_eth_dev *dev;
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 dev = &rte_eth_devices[port_id];
789 if (rx_queue_id >= dev->data->nb_rx_queues) {
790 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
796 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
797 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
798 " already stopped\n",
799 rx_queue_id, port_id);
803 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
808 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
810 struct rte_eth_dev *dev;
812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 dev = &rte_eth_devices[port_id];
815 if (!dev->data->dev_started) {
817 "port %d must be started before start any queue\n", port_id);
821 if (tx_queue_id >= dev->data->nb_tx_queues) {
822 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
828 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
829 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
830 " already started\n",
831 tx_queue_id, port_id);
835 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
841 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
843 struct rte_eth_dev *dev;
845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
847 dev = &rte_eth_devices[port_id];
848 if (tx_queue_id >= dev->data->nb_tx_queues) {
849 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
855 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
856 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
857 " already stopped\n",
858 tx_queue_id, port_id);
862 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
867 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
869 uint16_t old_nb_queues = dev->data->nb_tx_queues;
873 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
874 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
875 sizeof(dev->data->tx_queues[0]) * nb_queues,
876 RTE_CACHE_LINE_SIZE);
877 if (dev->data->tx_queues == NULL) {
878 dev->data->nb_tx_queues = 0;
881 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
884 txq = dev->data->tx_queues;
886 for (i = nb_queues; i < old_nb_queues; i++)
887 (*dev->dev_ops->tx_queue_release)(txq[i]);
888 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
889 RTE_CACHE_LINE_SIZE);
892 if (nb_queues > old_nb_queues) {
893 uint16_t new_qs = nb_queues - old_nb_queues;
895 memset(txq + old_nb_queues, 0,
896 sizeof(txq[0]) * new_qs);
899 dev->data->tx_queues = txq;
901 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
904 txq = dev->data->tx_queues;
906 for (i = nb_queues; i < old_nb_queues; i++)
907 (*dev->dev_ops->tx_queue_release)(txq[i]);
909 rte_free(dev->data->tx_queues);
910 dev->data->tx_queues = NULL;
912 dev->data->nb_tx_queues = nb_queues;
917 rte_eth_speed_bitflag(uint32_t speed, int duplex)
920 case ETH_SPEED_NUM_10M:
921 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
922 case ETH_SPEED_NUM_100M:
923 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
924 case ETH_SPEED_NUM_1G:
925 return ETH_LINK_SPEED_1G;
926 case ETH_SPEED_NUM_2_5G:
927 return ETH_LINK_SPEED_2_5G;
928 case ETH_SPEED_NUM_5G:
929 return ETH_LINK_SPEED_5G;
930 case ETH_SPEED_NUM_10G:
931 return ETH_LINK_SPEED_10G;
932 case ETH_SPEED_NUM_20G:
933 return ETH_LINK_SPEED_20G;
934 case ETH_SPEED_NUM_25G:
935 return ETH_LINK_SPEED_25G;
936 case ETH_SPEED_NUM_40G:
937 return ETH_LINK_SPEED_40G;
938 case ETH_SPEED_NUM_50G:
939 return ETH_LINK_SPEED_50G;
940 case ETH_SPEED_NUM_56G:
941 return ETH_LINK_SPEED_56G;
942 case ETH_SPEED_NUM_100G:
943 return ETH_LINK_SPEED_100G;
950 * A conversion function from rxmode bitfield API.
953 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
954 uint64_t *rx_offloads)
956 uint64_t offloads = 0;
958 if (rxmode->header_split == 1)
959 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
960 if (rxmode->hw_ip_checksum == 1)
961 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
962 if (rxmode->hw_vlan_filter == 1)
963 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
964 if (rxmode->hw_vlan_strip == 1)
965 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
966 if (rxmode->hw_vlan_extend == 1)
967 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
968 if (rxmode->jumbo_frame == 1)
969 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
970 if (rxmode->hw_strip_crc == 1)
971 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
972 if (rxmode->enable_scatter == 1)
973 offloads |= DEV_RX_OFFLOAD_SCATTER;
974 if (rxmode->enable_lro == 1)
975 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
976 if (rxmode->hw_timestamp == 1)
977 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
978 if (rxmode->security == 1)
979 offloads |= DEV_RX_OFFLOAD_SECURITY;
981 *rx_offloads = offloads;
984 const char * __rte_experimental
985 rte_eth_dev_rx_offload_name(uint64_t offload)
987 const char *name = "UNKNOWN";
990 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
991 if (offload == rte_rx_offload_names[i].offload) {
992 name = rte_rx_offload_names[i].name;
1000 const char * __rte_experimental
1001 rte_eth_dev_tx_offload_name(uint64_t offload)
1003 const char *name = "UNKNOWN";
1006 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1007 if (offload == rte_tx_offload_names[i].offload) {
1008 name = rte_tx_offload_names[i].name;
1017 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1018 const struct rte_eth_conf *dev_conf)
1020 struct rte_eth_dev *dev;
1021 struct rte_eth_dev_info dev_info;
1022 struct rte_eth_conf local_conf = *dev_conf;
1025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1027 dev = &rte_eth_devices[port_id];
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1030 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1032 /* If number of queues specified by application for both Rx and Tx is
1033 * zero, use driver preferred values. This cannot be done individually
1034 * as it is valid for either Tx or Rx (but not both) to be zero.
1035 * If driver does not provide any preferred valued, fall back on
1038 if (nb_rx_q == 0 && nb_tx_q == 0) {
1039 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1041 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1042 nb_tx_q = dev_info.default_txportconf.nb_queues;
1044 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1047 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1048 RTE_PMD_DEBUG_TRACE(
1049 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1050 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1054 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1055 RTE_PMD_DEBUG_TRACE(
1056 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1057 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1064 if (dev->data->dev_started) {
1065 RTE_PMD_DEBUG_TRACE(
1066 "port %d must be stopped to allow configuration\n", port_id);
1071 * Convert between the offloads API to enable PMDs to support
1074 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1075 rte_eth_convert_rx_offload_bitfield(
1076 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1078 /* Copy the dev_conf parameter into the dev structure */
1079 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1082 * Check that the numbers of RX and TX queues are not greater
1083 * than the maximum number of RX and TX queues supported by the
1084 * configured device.
1086 if (nb_rx_q > dev_info.max_rx_queues) {
1087 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1088 port_id, nb_rx_q, dev_info.max_rx_queues);
1092 if (nb_tx_q > dev_info.max_tx_queues) {
1093 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1094 port_id, nb_tx_q, dev_info.max_tx_queues);
1098 /* Check that the device supports requested interrupts */
1099 if ((dev_conf->intr_conf.lsc == 1) &&
1100 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1101 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1102 dev->device->driver->name);
1105 if ((dev_conf->intr_conf.rmv == 1) &&
1106 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1107 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1108 dev->device->driver->name);
1113 * If jumbo frames are enabled, check that the maximum RX packet
1114 * length is supported by the configured device.
1116 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1117 if (dev_conf->rxmode.max_rx_pkt_len >
1118 dev_info.max_rx_pktlen) {
1119 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1120 " > max valid value %u\n",
1122 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1123 (unsigned)dev_info.max_rx_pktlen);
1125 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1127 " < min valid value %u\n",
1129 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1130 (unsigned)ETHER_MIN_LEN);
1134 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1135 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1136 /* Use default value */
1137 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1141 /* Check that device supports requested rss hash functions. */
1142 if ((dev_info.flow_type_rss_offloads |
1143 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1144 dev_info.flow_type_rss_offloads) {
1145 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1146 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1148 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1149 dev_info.flow_type_rss_offloads);
1154 * Setup new number of RX/TX queues and reconfigure device.
1156 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1158 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1163 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1165 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1167 rte_eth_dev_rx_queue_config(dev, 0);
1171 diag = (*dev->dev_ops->dev_configure)(dev);
1173 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1175 rte_eth_dev_rx_queue_config(dev, 0);
1176 rte_eth_dev_tx_queue_config(dev, 0);
1177 return eth_err(port_id, diag);
1180 /* Initialize Rx profiling if enabled at compilation time. */
1181 diag = __rte_eth_profile_rx_init(port_id, dev);
1183 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1186 rte_eth_dev_tx_queue_config(dev, 0);
1187 return eth_err(port_id, diag);
1194 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow reset\n",
1199 dev->data->port_id);
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1206 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1210 rte_eth_dev_config_restore(uint16_t port_id)
1212 struct rte_eth_dev *dev;
1213 struct rte_eth_dev_info dev_info;
1214 struct ether_addr *addr;
1219 dev = &rte_eth_devices[port_id];
1221 rte_eth_dev_info_get(port_id, &dev_info);
1223 /* replay MAC address configuration including default MAC */
1224 addr = &dev->data->mac_addrs[0];
1225 if (*dev->dev_ops->mac_addr_set != NULL)
1226 (*dev->dev_ops->mac_addr_set)(dev, addr);
1227 else if (*dev->dev_ops->mac_addr_add != NULL)
1228 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1230 if (*dev->dev_ops->mac_addr_add != NULL) {
1231 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1232 addr = &dev->data->mac_addrs[i];
1234 /* skip zero address */
1235 if (is_zero_ether_addr(addr))
1239 pool_mask = dev->data->mac_pool_sel[i];
1242 if (pool_mask & 1ULL)
1243 (*dev->dev_ops->mac_addr_add)(dev,
1247 } while (pool_mask);
1251 /* replay promiscuous configuration */
1252 if (rte_eth_promiscuous_get(port_id) == 1)
1253 rte_eth_promiscuous_enable(port_id);
1254 else if (rte_eth_promiscuous_get(port_id) == 0)
1255 rte_eth_promiscuous_disable(port_id);
1257 /* replay all multicast configuration */
1258 if (rte_eth_allmulticast_get(port_id) == 1)
1259 rte_eth_allmulticast_enable(port_id);
1260 else if (rte_eth_allmulticast_get(port_id) == 0)
1261 rte_eth_allmulticast_disable(port_id);
1265 rte_eth_dev_start(uint16_t port_id)
1267 struct rte_eth_dev *dev;
1270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1272 dev = &rte_eth_devices[port_id];
1274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1276 if (dev->data->dev_started != 0) {
1277 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1278 " already started\n",
1283 diag = (*dev->dev_ops->dev_start)(dev);
1285 dev->data->dev_started = 1;
1287 return eth_err(port_id, diag);
1289 rte_eth_dev_config_restore(port_id);
1291 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1293 (*dev->dev_ops->link_update)(dev, 0);
1299 rte_eth_dev_stop(uint16_t port_id)
1301 struct rte_eth_dev *dev;
1303 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1304 dev = &rte_eth_devices[port_id];
1306 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1308 if (dev->data->dev_started == 0) {
1309 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1310 " already stopped\n",
1315 dev->data->dev_started = 0;
1316 (*dev->dev_ops->dev_stop)(dev);
1320 rte_eth_dev_set_link_up(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1326 dev = &rte_eth_devices[port_id];
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1329 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1333 rte_eth_dev_set_link_down(uint16_t port_id)
1335 struct rte_eth_dev *dev;
1337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1342 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1346 rte_eth_dev_close(uint16_t port_id)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1354 dev->data->dev_started = 0;
1355 (*dev->dev_ops->dev_close)(dev);
1357 dev->data->nb_rx_queues = 0;
1358 rte_free(dev->data->rx_queues);
1359 dev->data->rx_queues = NULL;
1360 dev->data->nb_tx_queues = 0;
1361 rte_free(dev->data->tx_queues);
1362 dev->data->tx_queues = NULL;
1366 rte_eth_dev_reset(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1376 rte_eth_dev_stop(port_id);
1377 ret = dev->dev_ops->dev_reset(dev);
1379 return eth_err(port_id, ret);
1382 int __rte_experimental
1383 rte_eth_dev_is_removed(uint16_t port_id)
1385 struct rte_eth_dev *dev;
1388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1390 dev = &rte_eth_devices[port_id];
1392 if (dev->state == RTE_ETH_DEV_REMOVED)
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1397 ret = dev->dev_ops->is_removed(dev);
1399 /* Device is physically removed. */
1400 dev->state = RTE_ETH_DEV_REMOVED;
1406 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1407 uint16_t nb_rx_desc, unsigned int socket_id,
1408 const struct rte_eth_rxconf *rx_conf,
1409 struct rte_mempool *mp)
1412 uint32_t mbp_buf_size;
1413 struct rte_eth_dev *dev;
1414 struct rte_eth_dev_info dev_info;
1415 struct rte_eth_rxconf local_conf;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1420 dev = &rte_eth_devices[port_id];
1421 if (rx_queue_id >= dev->data->nb_rx_queues) {
1422 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1430 * Check the size of the mbuf data buffer.
1431 * This value must be provided in the private data of the memory pool.
1432 * First check that the memory pool has a valid private data.
1434 rte_eth_dev_info_get(port_id, &dev_info);
1435 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1436 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1437 mp->name, (int) mp->private_data_size,
1438 (int) sizeof(struct rte_pktmbuf_pool_private));
1441 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1443 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1444 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1445 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1449 (int)(RTE_PKTMBUF_HEADROOM +
1450 dev_info.min_rx_bufsize),
1451 (int)RTE_PKTMBUF_HEADROOM,
1452 (int)dev_info.min_rx_bufsize);
1456 /* Use default specified by driver, if nb_rx_desc is zero */
1457 if (nb_rx_desc == 0) {
1458 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1459 /* If driver default is also zero, fall back on EAL default */
1460 if (nb_rx_desc == 0)
1461 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1464 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1465 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1466 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1468 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1469 "should be: <= %hu, = %hu, and a product of %hu\n",
1471 dev_info.rx_desc_lim.nb_max,
1472 dev_info.rx_desc_lim.nb_min,
1473 dev_info.rx_desc_lim.nb_align);
1477 if (dev->data->dev_started &&
1478 !(dev_info.dev_capa &
1479 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1482 if (dev->data->rx_queue_state[rx_queue_id] !=
1483 RTE_ETH_QUEUE_STATE_STOPPED)
1486 rxq = dev->data->rx_queues;
1487 if (rxq[rx_queue_id]) {
1488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1490 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1491 rxq[rx_queue_id] = NULL;
1494 if (rx_conf == NULL)
1495 rx_conf = &dev_info.default_rxconf;
1497 local_conf = *rx_conf;
1498 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1500 * Reflect port offloads to queue offloads in order for
1501 * offloads to not be discarded.
1503 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1504 &local_conf.offloads);
1507 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1508 socket_id, &local_conf, mp);
1510 if (!dev->data->min_rx_buf_size ||
1511 dev->data->min_rx_buf_size > mbp_buf_size)
1512 dev->data->min_rx_buf_size = mbp_buf_size;
1515 return eth_err(port_id, ret);
1519 * A conversion function from txq_flags API.
1522 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1524 uint64_t offloads = 0;
1526 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1527 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1528 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1529 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1530 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1531 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1532 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1533 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1534 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1535 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1536 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1537 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1538 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1540 *tx_offloads = offloads;
1544 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1545 uint16_t nb_tx_desc, unsigned int socket_id,
1546 const struct rte_eth_txconf *tx_conf)
1548 struct rte_eth_dev *dev;
1549 struct rte_eth_dev_info dev_info;
1550 struct rte_eth_txconf local_conf;
1553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1555 dev = &rte_eth_devices[port_id];
1556 if (tx_queue_id >= dev->data->nb_tx_queues) {
1557 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1561 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1564 rte_eth_dev_info_get(port_id, &dev_info);
1566 /* Use default specified by driver, if nb_tx_desc is zero */
1567 if (nb_tx_desc == 0) {
1568 nb_tx_desc = dev_info.default_txportconf.ring_size;
1569 /* If driver default is zero, fall back on EAL default */
1570 if (nb_tx_desc == 0)
1571 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1573 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1574 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1575 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1576 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1577 "should be: <= %hu, = %hu, and a product of %hu\n",
1579 dev_info.tx_desc_lim.nb_max,
1580 dev_info.tx_desc_lim.nb_min,
1581 dev_info.tx_desc_lim.nb_align);
1585 if (dev->data->dev_started &&
1586 !(dev_info.dev_capa &
1587 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1590 if (dev->data->tx_queue_state[tx_queue_id] !=
1591 RTE_ETH_QUEUE_STATE_STOPPED)
1594 txq = dev->data->tx_queues;
1595 if (txq[tx_queue_id]) {
1596 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1598 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1599 txq[tx_queue_id] = NULL;
1602 if (tx_conf == NULL)
1603 tx_conf = &dev_info.default_txconf;
1606 * Convert between the offloads API to enable PMDs to support
1609 local_conf = *tx_conf;
1610 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1611 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1612 &local_conf.offloads);
1615 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1616 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1620 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1621 void *userdata __rte_unused)
1625 for (i = 0; i < unsent; i++)
1626 rte_pktmbuf_free(pkts[i]);
1630 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1633 uint64_t *count = userdata;
1636 for (i = 0; i < unsent; i++)
1637 rte_pktmbuf_free(pkts[i]);
1643 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1644 buffer_tx_error_fn cbfn, void *userdata)
1646 buffer->error_callback = cbfn;
1647 buffer->error_userdata = userdata;
1652 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1659 buffer->size = size;
1660 if (buffer->error_callback == NULL) {
1661 ret = rte_eth_tx_buffer_set_err_callback(
1662 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1669 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1671 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1674 /* Validate Input Data. Bail if not valid or not supported. */
1675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1676 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1678 /* Call driver to free pending mbufs. */
1679 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1681 return eth_err(port_id, ret);
1685 rte_eth_promiscuous_enable(uint16_t port_id)
1687 struct rte_eth_dev *dev;
1689 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1690 dev = &rte_eth_devices[port_id];
1692 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1693 (*dev->dev_ops->promiscuous_enable)(dev);
1694 dev->data->promiscuous = 1;
1698 rte_eth_promiscuous_disable(uint16_t port_id)
1700 struct rte_eth_dev *dev;
1702 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1703 dev = &rte_eth_devices[port_id];
1705 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1706 dev->data->promiscuous = 0;
1707 (*dev->dev_ops->promiscuous_disable)(dev);
1711 rte_eth_promiscuous_get(uint16_t port_id)
1713 struct rte_eth_dev *dev;
1715 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1717 dev = &rte_eth_devices[port_id];
1718 return dev->data->promiscuous;
1722 rte_eth_allmulticast_enable(uint16_t port_id)
1724 struct rte_eth_dev *dev;
1726 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1727 dev = &rte_eth_devices[port_id];
1729 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1730 (*dev->dev_ops->allmulticast_enable)(dev);
1731 dev->data->all_multicast = 1;
1735 rte_eth_allmulticast_disable(uint16_t port_id)
1737 struct rte_eth_dev *dev;
1739 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1740 dev = &rte_eth_devices[port_id];
1742 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1743 dev->data->all_multicast = 0;
1744 (*dev->dev_ops->allmulticast_disable)(dev);
1748 rte_eth_allmulticast_get(uint16_t port_id)
1750 struct rte_eth_dev *dev;
1752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1754 dev = &rte_eth_devices[port_id];
1755 return dev->data->all_multicast;
1759 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1761 struct rte_eth_dev *dev;
1763 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1764 dev = &rte_eth_devices[port_id];
1766 if (dev->data->dev_conf.intr_conf.lsc &&
1767 dev->data->dev_started)
1768 rte_eth_linkstatus_get(dev, eth_link);
1770 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1771 (*dev->dev_ops->link_update)(dev, 1);
1772 *eth_link = dev->data->dev_link;
1777 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1779 struct rte_eth_dev *dev;
1781 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1782 dev = &rte_eth_devices[port_id];
1784 if (dev->data->dev_conf.intr_conf.lsc &&
1785 dev->data->dev_started)
1786 rte_eth_linkstatus_get(dev, eth_link);
1788 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1789 (*dev->dev_ops->link_update)(dev, 0);
1790 *eth_link = dev->data->dev_link;
1795 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1797 struct rte_eth_dev *dev;
1799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1801 dev = &rte_eth_devices[port_id];
1802 memset(stats, 0, sizeof(*stats));
1804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1805 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1806 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1810 rte_eth_stats_reset(uint16_t port_id)
1812 struct rte_eth_dev *dev;
1814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1815 dev = &rte_eth_devices[port_id];
1817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1818 (*dev->dev_ops->stats_reset)(dev);
1819 dev->data->rx_mbuf_alloc_failed = 0;
1825 get_xstats_basic_count(struct rte_eth_dev *dev)
1827 uint16_t nb_rxqs, nb_txqs;
1830 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1831 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1833 count = RTE_NB_STATS;
1834 count += nb_rxqs * RTE_NB_RXQ_STATS;
1835 count += nb_txqs * RTE_NB_TXQ_STATS;
1841 get_xstats_count(uint16_t port_id)
1843 struct rte_eth_dev *dev;
1846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1847 dev = &rte_eth_devices[port_id];
1848 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1849 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1852 return eth_err(port_id, count);
1854 if (dev->dev_ops->xstats_get_names != NULL) {
1855 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1857 return eth_err(port_id, count);
1862 count += get_xstats_basic_count(dev);
1868 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1871 int cnt_xstats, idx_xstat;
1873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1876 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1881 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1886 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1887 if (cnt_xstats < 0) {
1888 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1892 /* Get id-name lookup table */
1893 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1895 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1896 port_id, xstats_names, cnt_xstats, NULL)) {
1897 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1901 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1902 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1911 /* retrieve basic stats names */
1913 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1914 struct rte_eth_xstat_name *xstats_names)
1916 int cnt_used_entries = 0;
1917 uint32_t idx, id_queue;
1920 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1921 snprintf(xstats_names[cnt_used_entries].name,
1922 sizeof(xstats_names[0].name),
1923 "%s", rte_stats_strings[idx].name);
1926 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1927 for (id_queue = 0; id_queue < num_q; id_queue++) {
1928 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1929 snprintf(xstats_names[cnt_used_entries].name,
1930 sizeof(xstats_names[0].name),
1932 id_queue, rte_rxq_stats_strings[idx].name);
1937 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1938 for (id_queue = 0; id_queue < num_q; id_queue++) {
1939 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1940 snprintf(xstats_names[cnt_used_entries].name,
1941 sizeof(xstats_names[0].name),
1943 id_queue, rte_txq_stats_strings[idx].name);
1947 return cnt_used_entries;
1950 /* retrieve ethdev extended statistics names */
1952 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1953 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1956 struct rte_eth_xstat_name *xstats_names_copy;
1957 unsigned int no_basic_stat_requested = 1;
1958 unsigned int no_ext_stat_requested = 1;
1959 unsigned int expected_entries;
1960 unsigned int basic_count;
1961 struct rte_eth_dev *dev;
1965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1966 dev = &rte_eth_devices[port_id];
1968 basic_count = get_xstats_basic_count(dev);
1969 ret = get_xstats_count(port_id);
1972 expected_entries = (unsigned int)ret;
1974 /* Return max number of stats if no ids given */
1977 return expected_entries;
1978 else if (xstats_names && size < expected_entries)
1979 return expected_entries;
1982 if (ids && !xstats_names)
1985 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1986 uint64_t ids_copy[size];
1988 for (i = 0; i < size; i++) {
1989 if (ids[i] < basic_count) {
1990 no_basic_stat_requested = 0;
1995 * Convert ids to xstats ids that PMD knows.
1996 * ids known by user are basic + extended stats.
1998 ids_copy[i] = ids[i] - basic_count;
2001 if (no_basic_stat_requested)
2002 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2003 xstats_names, ids_copy, size);
2006 /* Retrieve all stats */
2008 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2010 if (num_stats < 0 || num_stats > (int)expected_entries)
2013 return expected_entries;
2016 xstats_names_copy = calloc(expected_entries,
2017 sizeof(struct rte_eth_xstat_name));
2019 if (!xstats_names_copy) {
2020 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2025 for (i = 0; i < size; i++) {
2026 if (ids[i] >= basic_count) {
2027 no_ext_stat_requested = 0;
2033 /* Fill xstats_names_copy structure */
2034 if (ids && no_ext_stat_requested) {
2035 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2037 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2040 free(xstats_names_copy);
2046 for (i = 0; i < size; i++) {
2047 if (ids[i] >= expected_entries) {
2048 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2049 free(xstats_names_copy);
2052 xstats_names[i] = xstats_names_copy[ids[i]];
2055 free(xstats_names_copy);
2060 rte_eth_xstats_get_names(uint16_t port_id,
2061 struct rte_eth_xstat_name *xstats_names,
2064 struct rte_eth_dev *dev;
2065 int cnt_used_entries;
2066 int cnt_expected_entries;
2067 int cnt_driver_entries;
2069 cnt_expected_entries = get_xstats_count(port_id);
2070 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2071 (int)size < cnt_expected_entries)
2072 return cnt_expected_entries;
2074 /* port_id checked in get_xstats_count() */
2075 dev = &rte_eth_devices[port_id];
2077 cnt_used_entries = rte_eth_basic_stats_get_names(
2080 if (dev->dev_ops->xstats_get_names != NULL) {
2081 /* If there are any driver-specific xstats, append them
2084 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2086 xstats_names + cnt_used_entries,
2087 size - cnt_used_entries);
2088 if (cnt_driver_entries < 0)
2089 return eth_err(port_id, cnt_driver_entries);
2090 cnt_used_entries += cnt_driver_entries;
2093 return cnt_used_entries;
2098 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2100 struct rte_eth_dev *dev;
2101 struct rte_eth_stats eth_stats;
2102 unsigned int count = 0, i, q;
2103 uint64_t val, *stats_ptr;
2104 uint16_t nb_rxqs, nb_txqs;
2107 ret = rte_eth_stats_get(port_id, ð_stats);
2111 dev = &rte_eth_devices[port_id];
2113 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2114 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2117 for (i = 0; i < RTE_NB_STATS; i++) {
2118 stats_ptr = RTE_PTR_ADD(ð_stats,
2119 rte_stats_strings[i].offset);
2121 xstats[count++].value = val;
2125 for (q = 0; q < nb_rxqs; q++) {
2126 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2127 stats_ptr = RTE_PTR_ADD(ð_stats,
2128 rte_rxq_stats_strings[i].offset +
2129 q * sizeof(uint64_t));
2131 xstats[count++].value = val;
2136 for (q = 0; q < nb_txqs; q++) {
2137 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2138 stats_ptr = RTE_PTR_ADD(ð_stats,
2139 rte_txq_stats_strings[i].offset +
2140 q * sizeof(uint64_t));
2142 xstats[count++].value = val;
2148 /* retrieve ethdev extended statistics */
2150 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2151 uint64_t *values, unsigned int size)
2153 unsigned int no_basic_stat_requested = 1;
2154 unsigned int no_ext_stat_requested = 1;
2155 unsigned int num_xstats_filled;
2156 unsigned int basic_count;
2157 uint16_t expected_entries;
2158 struct rte_eth_dev *dev;
2162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2163 ret = get_xstats_count(port_id);
2166 expected_entries = (uint16_t)ret;
2167 struct rte_eth_xstat xstats[expected_entries];
2168 dev = &rte_eth_devices[port_id];
2169 basic_count = get_xstats_basic_count(dev);
2171 /* Return max number of stats if no ids given */
2174 return expected_entries;
2175 else if (values && size < expected_entries)
2176 return expected_entries;
2182 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2183 unsigned int basic_count = get_xstats_basic_count(dev);
2184 uint64_t ids_copy[size];
2186 for (i = 0; i < size; i++) {
2187 if (ids[i] < basic_count) {
2188 no_basic_stat_requested = 0;
2193 * Convert ids to xstats ids that PMD knows.
2194 * ids known by user are basic + extended stats.
2196 ids_copy[i] = ids[i] - basic_count;
2199 if (no_basic_stat_requested)
2200 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2205 for (i = 0; i < size; i++) {
2206 if (ids[i] >= basic_count) {
2207 no_ext_stat_requested = 0;
2213 /* Fill the xstats structure */
2214 if (ids && no_ext_stat_requested)
2215 ret = rte_eth_basic_stats_get(port_id, xstats);
2217 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2221 num_xstats_filled = (unsigned int)ret;
2223 /* Return all stats */
2225 for (i = 0; i < num_xstats_filled; i++)
2226 values[i] = xstats[i].value;
2227 return expected_entries;
2231 for (i = 0; i < size; i++) {
2232 if (ids[i] >= expected_entries) {
2233 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2236 values[i] = xstats[ids[i]].value;
2242 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2245 struct rte_eth_dev *dev;
2246 unsigned int count = 0, i;
2247 signed int xcount = 0;
2248 uint16_t nb_rxqs, nb_txqs;
2251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2253 dev = &rte_eth_devices[port_id];
2255 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2256 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2258 /* Return generic statistics */
2259 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2260 (nb_txqs * RTE_NB_TXQ_STATS);
2262 /* implemented by the driver */
2263 if (dev->dev_ops->xstats_get != NULL) {
2264 /* Retrieve the xstats from the driver at the end of the
2267 xcount = (*dev->dev_ops->xstats_get)(dev,
2268 xstats ? xstats + count : NULL,
2269 (n > count) ? n - count : 0);
2272 return eth_err(port_id, xcount);
2275 if (n < count + xcount || xstats == NULL)
2276 return count + xcount;
2278 /* now fill the xstats structure */
2279 ret = rte_eth_basic_stats_get(port_id, xstats);
2284 for (i = 0; i < count; i++)
2286 /* add an offset to driver-specific stats */
2287 for ( ; i < count + xcount; i++)
2288 xstats[i].id += count;
2290 return count + xcount;
2293 /* reset ethdev extended statistics */
2295 rte_eth_xstats_reset(uint16_t port_id)
2297 struct rte_eth_dev *dev;
2299 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2300 dev = &rte_eth_devices[port_id];
2302 /* implemented by the driver */
2303 if (dev->dev_ops->xstats_reset != NULL) {
2304 (*dev->dev_ops->xstats_reset)(dev);
2308 /* fallback to default */
2309 rte_eth_stats_reset(port_id);
2313 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2316 struct rte_eth_dev *dev;
2318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2320 dev = &rte_eth_devices[port_id];
2322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2323 return (*dev->dev_ops->queue_stats_mapping_set)
2324 (dev, queue_id, stat_idx, is_rx);
2329 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2332 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2333 stat_idx, STAT_QMAP_TX));
2338 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2341 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2342 stat_idx, STAT_QMAP_RX));
2346 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2348 struct rte_eth_dev *dev;
2350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2351 dev = &rte_eth_devices[port_id];
2353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2354 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2355 fw_version, fw_size));
2359 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2361 struct rte_eth_dev *dev;
2362 const struct rte_eth_desc_lim lim = {
2363 .nb_max = UINT16_MAX,
2368 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2369 dev = &rte_eth_devices[port_id];
2371 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2372 dev_info->rx_desc_lim = lim;
2373 dev_info->tx_desc_lim = lim;
2374 dev_info->device = dev->device;
2376 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2377 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2378 dev_info->driver_name = dev->device->driver->name;
2379 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2380 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2384 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2385 uint32_t *ptypes, int num)
2388 struct rte_eth_dev *dev;
2389 const uint32_t *all_ptypes;
2391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2392 dev = &rte_eth_devices[port_id];
2393 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2394 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2399 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2400 if (all_ptypes[i] & ptype_mask) {
2402 ptypes[j] = all_ptypes[i];
2410 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2412 struct rte_eth_dev *dev;
2414 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2415 dev = &rte_eth_devices[port_id];
2416 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2421 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2423 struct rte_eth_dev *dev;
2425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 dev = &rte_eth_devices[port_id];
2428 *mtu = dev->data->mtu;
2433 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2436 struct rte_eth_dev *dev;
2438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2439 dev = &rte_eth_devices[port_id];
2440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2442 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2444 dev->data->mtu = mtu;
2446 return eth_err(port_id, ret);
2450 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2452 struct rte_eth_dev *dev;
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2456 dev = &rte_eth_devices[port_id];
2457 if (!(dev->data->dev_conf.rxmode.offloads &
2458 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2459 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2463 if (vlan_id > 4095) {
2464 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2465 port_id, (unsigned) vlan_id);
2468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2470 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2472 struct rte_vlan_filter_conf *vfc;
2476 vfc = &dev->data->vlan_filter_conf;
2477 vidx = vlan_id / 64;
2478 vbit = vlan_id % 64;
2481 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2483 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2486 return eth_err(port_id, ret);
2490 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2493 struct rte_eth_dev *dev;
2495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2496 dev = &rte_eth_devices[port_id];
2497 if (rx_queue_id >= dev->data->nb_rx_queues) {
2498 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2503 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2509 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2510 enum rte_vlan_type vlan_type,
2513 struct rte_eth_dev *dev;
2515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2516 dev = &rte_eth_devices[port_id];
2517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2519 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2524 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2526 struct rte_eth_dev *dev;
2530 uint64_t orig_offloads;
2532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2533 dev = &rte_eth_devices[port_id];
2535 /* save original values in case of failure */
2536 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2538 /*check which option changed by application*/
2539 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2540 org = !!(dev->data->dev_conf.rxmode.offloads &
2541 DEV_RX_OFFLOAD_VLAN_STRIP);
2544 dev->data->dev_conf.rxmode.offloads |=
2545 DEV_RX_OFFLOAD_VLAN_STRIP;
2547 dev->data->dev_conf.rxmode.offloads &=
2548 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2549 mask |= ETH_VLAN_STRIP_MASK;
2552 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2553 org = !!(dev->data->dev_conf.rxmode.offloads &
2554 DEV_RX_OFFLOAD_VLAN_FILTER);
2557 dev->data->dev_conf.rxmode.offloads |=
2558 DEV_RX_OFFLOAD_VLAN_FILTER;
2560 dev->data->dev_conf.rxmode.offloads &=
2561 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2562 mask |= ETH_VLAN_FILTER_MASK;
2565 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2566 org = !!(dev->data->dev_conf.rxmode.offloads &
2567 DEV_RX_OFFLOAD_VLAN_EXTEND);
2570 dev->data->dev_conf.rxmode.offloads |=
2571 DEV_RX_OFFLOAD_VLAN_EXTEND;
2573 dev->data->dev_conf.rxmode.offloads &=
2574 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2575 mask |= ETH_VLAN_EXTEND_MASK;
2582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2583 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2585 /* hit an error restore original values */
2586 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2589 return eth_err(port_id, ret);
2593 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2595 struct rte_eth_dev *dev;
2598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2599 dev = &rte_eth_devices[port_id];
2601 if (dev->data->dev_conf.rxmode.offloads &
2602 DEV_RX_OFFLOAD_VLAN_STRIP)
2603 ret |= ETH_VLAN_STRIP_OFFLOAD;
2605 if (dev->data->dev_conf.rxmode.offloads &
2606 DEV_RX_OFFLOAD_VLAN_FILTER)
2607 ret |= ETH_VLAN_FILTER_OFFLOAD;
2609 if (dev->data->dev_conf.rxmode.offloads &
2610 DEV_RX_OFFLOAD_VLAN_EXTEND)
2611 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2617 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2619 struct rte_eth_dev *dev;
2621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2622 dev = &rte_eth_devices[port_id];
2623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2625 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2629 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2631 struct rte_eth_dev *dev;
2633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2634 dev = &rte_eth_devices[port_id];
2635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2636 memset(fc_conf, 0, sizeof(*fc_conf));
2637 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2641 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2643 struct rte_eth_dev *dev;
2645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2646 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2647 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2651 dev = &rte_eth_devices[port_id];
2652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2653 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2657 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2658 struct rte_eth_pfc_conf *pfc_conf)
2660 struct rte_eth_dev *dev;
2662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2663 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2664 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2668 dev = &rte_eth_devices[port_id];
2669 /* High water, low water validation are device specific */
2670 if (*dev->dev_ops->priority_flow_ctrl_set)
2671 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2677 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2685 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2686 for (i = 0; i < num; i++) {
2687 if (reta_conf[i].mask)
2695 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2699 uint16_t i, idx, shift;
2705 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2709 for (i = 0; i < reta_size; i++) {
2710 idx = i / RTE_RETA_GROUP_SIZE;
2711 shift = i % RTE_RETA_GROUP_SIZE;
2712 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2713 (reta_conf[idx].reta[shift] >= max_rxq)) {
2714 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2715 "the maximum rxq index: %u\n", idx, shift,
2716 reta_conf[idx].reta[shift], max_rxq);
2725 rte_eth_dev_rss_reta_update(uint16_t port_id,
2726 struct rte_eth_rss_reta_entry64 *reta_conf,
2729 struct rte_eth_dev *dev;
2732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2733 /* Check mask bits */
2734 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2738 dev = &rte_eth_devices[port_id];
2740 /* Check entry value */
2741 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2742 dev->data->nb_rx_queues);
2746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2747 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2752 rte_eth_dev_rss_reta_query(uint16_t port_id,
2753 struct rte_eth_rss_reta_entry64 *reta_conf,
2756 struct rte_eth_dev *dev;
2759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2761 /* Check mask bits */
2762 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2766 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2768 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2773 rte_eth_dev_rss_hash_update(uint16_t port_id,
2774 struct rte_eth_rss_conf *rss_conf)
2776 struct rte_eth_dev *dev;
2777 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2781 rte_eth_dev_info_get(port_id, &dev_info);
2782 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2783 dev_info.flow_type_rss_offloads) {
2784 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2785 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2788 dev_info.flow_type_rss_offloads);
2791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2792 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2797 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2798 struct rte_eth_rss_conf *rss_conf)
2800 struct rte_eth_dev *dev;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2803 dev = &rte_eth_devices[port_id];
2804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2805 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2810 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2811 struct rte_eth_udp_tunnel *udp_tunnel)
2813 struct rte_eth_dev *dev;
2815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2816 if (udp_tunnel == NULL) {
2817 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2821 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2822 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2826 dev = &rte_eth_devices[port_id];
2827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2828 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2833 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2834 struct rte_eth_udp_tunnel *udp_tunnel)
2836 struct rte_eth_dev *dev;
2838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2839 dev = &rte_eth_devices[port_id];
2841 if (udp_tunnel == NULL) {
2842 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2846 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2847 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2852 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2857 rte_eth_led_on(uint16_t port_id)
2859 struct rte_eth_dev *dev;
2861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2862 dev = &rte_eth_devices[port_id];
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2864 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2868 rte_eth_led_off(uint16_t port_id)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 dev = &rte_eth_devices[port_id];
2874 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2875 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2879 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2883 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2885 struct rte_eth_dev_info dev_info;
2886 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2890 rte_eth_dev_info_get(port_id, &dev_info);
2892 for (i = 0; i < dev_info.max_mac_addrs; i++)
2893 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2899 static const struct ether_addr null_mac_addr;
2902 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2905 struct rte_eth_dev *dev;
2910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2911 dev = &rte_eth_devices[port_id];
2912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2914 if (is_zero_ether_addr(addr)) {
2915 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2919 if (pool >= ETH_64_POOLS) {
2920 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2924 index = get_mac_addr_index(port_id, addr);
2926 index = get_mac_addr_index(port_id, &null_mac_addr);
2928 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2933 pool_mask = dev->data->mac_pool_sel[index];
2935 /* Check if both MAC address and pool is already there, and do nothing */
2936 if (pool_mask & (1ULL << pool))
2941 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2944 /* Update address in NIC data structure */
2945 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2947 /* Update pool bitmap in NIC data structure */
2948 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2951 return eth_err(port_id, ret);
2955 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2957 struct rte_eth_dev *dev;
2960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2961 dev = &rte_eth_devices[port_id];
2962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2964 index = get_mac_addr_index(port_id, addr);
2966 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2968 } else if (index < 0)
2969 return 0; /* Do nothing if address wasn't found */
2972 (*dev->dev_ops->mac_addr_remove)(dev, index);
2974 /* Update address in NIC data structure */
2975 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2977 /* reset pool bitmap */
2978 dev->data->mac_pool_sel[index] = 0;
2984 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2986 struct rte_eth_dev *dev;
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2991 if (!is_valid_assigned_ether_addr(addr))
2994 dev = &rte_eth_devices[port_id];
2995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2997 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3001 /* Update default address in NIC data structure */
3002 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3009 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3013 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3015 struct rte_eth_dev_info dev_info;
3016 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3019 rte_eth_dev_info_get(port_id, &dev_info);
3020 if (!dev->data->hash_mac_addrs)
3023 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3024 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3025 ETHER_ADDR_LEN) == 0)
3032 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3037 struct rte_eth_dev *dev;
3039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3041 dev = &rte_eth_devices[port_id];
3042 if (is_zero_ether_addr(addr)) {
3043 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3048 index = get_hash_mac_addr_index(port_id, addr);
3049 /* Check if it's already there, and do nothing */
3050 if ((index >= 0) && on)
3055 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3056 "set in UTA\n", port_id);
3060 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3062 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3069 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3071 /* Update address in NIC data structure */
3073 ether_addr_copy(addr,
3074 &dev->data->hash_mac_addrs[index]);
3076 ether_addr_copy(&null_mac_addr,
3077 &dev->data->hash_mac_addrs[index]);
3080 return eth_err(port_id, ret);
3084 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3086 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3093 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3097 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3100 struct rte_eth_dev *dev;
3101 struct rte_eth_dev_info dev_info;
3102 struct rte_eth_link link;
3104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3106 dev = &rte_eth_devices[port_id];
3107 rte_eth_dev_info_get(port_id, &dev_info);
3108 link = dev->data->dev_link;
3110 if (queue_idx > dev_info.max_tx_queues) {
3111 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3112 "invalid queue id=%d\n", port_id, queue_idx);
3116 if (tx_rate > link.link_speed) {
3117 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3118 "bigger than link speed= %d\n",
3119 tx_rate, link.link_speed);
3123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3124 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3125 queue_idx, tx_rate));
3129 rte_eth_mirror_rule_set(uint16_t port_id,
3130 struct rte_eth_mirror_conf *mirror_conf,
3131 uint8_t rule_id, uint8_t on)
3133 struct rte_eth_dev *dev;
3135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3136 if (mirror_conf->rule_type == 0) {
3137 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3141 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3142 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3147 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3148 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3149 (mirror_conf->pool_mask == 0)) {
3150 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3154 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3155 mirror_conf->vlan.vlan_mask == 0) {
3156 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3160 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3163 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3164 mirror_conf, rule_id, on));
3168 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3170 struct rte_eth_dev *dev;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3177 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3181 RTE_INIT(eth_dev_init_cb_lists)
3185 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3186 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3190 rte_eth_dev_callback_register(uint16_t port_id,
3191 enum rte_eth_event_type event,
3192 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3194 struct rte_eth_dev *dev;
3195 struct rte_eth_dev_callback *user_cb;
3196 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3202 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3203 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3207 if (port_id == RTE_ETH_ALL) {
3209 last_port = RTE_MAX_ETHPORTS - 1;
3211 next_port = last_port = port_id;
3214 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3217 dev = &rte_eth_devices[next_port];
3219 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3220 if (user_cb->cb_fn == cb_fn &&
3221 user_cb->cb_arg == cb_arg &&
3222 user_cb->event == event) {
3227 /* create a new callback. */
3228 if (user_cb == NULL) {
3229 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3230 sizeof(struct rte_eth_dev_callback), 0);
3231 if (user_cb != NULL) {
3232 user_cb->cb_fn = cb_fn;
3233 user_cb->cb_arg = cb_arg;
3234 user_cb->event = event;
3235 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3238 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3239 rte_eth_dev_callback_unregister(port_id, event,
3245 } while (++next_port <= last_port);
3247 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3252 rte_eth_dev_callback_unregister(uint16_t port_id,
3253 enum rte_eth_event_type event,
3254 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3257 struct rte_eth_dev *dev;
3258 struct rte_eth_dev_callback *cb, *next;
3259 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3265 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3266 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3270 if (port_id == RTE_ETH_ALL) {
3272 last_port = RTE_MAX_ETHPORTS - 1;
3274 next_port = last_port = port_id;
3277 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3280 dev = &rte_eth_devices[next_port];
3282 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3285 next = TAILQ_NEXT(cb, next);
3287 if (cb->cb_fn != cb_fn || cb->event != event ||
3288 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3292 * if this callback is not executing right now,
3295 if (cb->active == 0) {
3296 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3302 } while (++next_port <= last_port);
3304 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3309 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3310 enum rte_eth_event_type event, void *ret_param)
3312 struct rte_eth_dev_callback *cb_lst;
3313 struct rte_eth_dev_callback dev_cb;
3316 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3317 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3318 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3322 if (ret_param != NULL)
3323 dev_cb.ret_param = ret_param;
3325 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3326 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3327 dev_cb.cb_arg, dev_cb.ret_param);
3328 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3331 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3336 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3339 struct rte_eth_dev *dev;
3340 struct rte_intr_handle *intr_handle;
3344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3346 dev = &rte_eth_devices[port_id];
3348 if (!dev->intr_handle) {
3349 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3353 intr_handle = dev->intr_handle;
3354 if (!intr_handle->intr_vec) {
3355 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3359 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3360 vec = intr_handle->intr_vec[qid];
3361 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3362 if (rc && rc != -EEXIST) {
3363 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3364 " op %d epfd %d vec %u\n",
3365 port_id, qid, op, epfd, vec);
3372 const struct rte_memzone *
3373 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3374 uint16_t queue_id, size_t size, unsigned align,
3377 char z_name[RTE_MEMZONE_NAMESIZE];
3378 const struct rte_memzone *mz;
3380 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3381 dev->device->driver->name, ring_name,
3382 dev->data->port_id, queue_id);
3384 mz = rte_memzone_lookup(z_name);
3388 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3389 RTE_MEMZONE_IOVA_CONTIG, align);
3393 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3394 int epfd, int op, void *data)
3397 struct rte_eth_dev *dev;
3398 struct rte_intr_handle *intr_handle;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403 dev = &rte_eth_devices[port_id];
3404 if (queue_id >= dev->data->nb_rx_queues) {
3405 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3409 if (!dev->intr_handle) {
3410 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3414 intr_handle = dev->intr_handle;
3415 if (!intr_handle->intr_vec) {
3416 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3420 vec = intr_handle->intr_vec[queue_id];
3421 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3422 if (rc && rc != -EEXIST) {
3423 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3424 " op %d epfd %d vec %u\n",
3425 port_id, queue_id, op, epfd, vec);
3433 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3436 struct rte_eth_dev *dev;
3438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3440 dev = &rte_eth_devices[port_id];
3442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3443 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3448 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3451 struct rte_eth_dev *dev;
3453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3455 dev = &rte_eth_devices[port_id];
3457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3458 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3464 rte_eth_dev_filter_supported(uint16_t port_id,
3465 enum rte_filter_type filter_type)
3467 struct rte_eth_dev *dev;
3469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3471 dev = &rte_eth_devices[port_id];
3472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3473 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3474 RTE_ETH_FILTER_NOP, NULL);
3478 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3479 enum rte_filter_op filter_op, void *arg)
3481 struct rte_eth_dev *dev;
3483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3485 dev = &rte_eth_devices[port_id];
3486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3487 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3491 const struct rte_eth_rxtx_callback *
3492 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3493 rte_rx_callback_fn fn, void *user_param)
3495 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3496 rte_errno = ENOTSUP;
3499 /* check input parameters */
3500 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3501 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3505 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3513 cb->param = user_param;
3515 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3516 /* Add the callbacks in fifo order. */
3517 struct rte_eth_rxtx_callback *tail =
3518 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3521 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3528 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3533 const struct rte_eth_rxtx_callback *
3534 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3535 rte_rx_callback_fn fn, void *user_param)
3537 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3538 rte_errno = ENOTSUP;
3541 /* check input parameters */
3542 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3543 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3548 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3556 cb->param = user_param;
3558 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3559 /* Add the callbacks at fisrt position*/
3560 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3562 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3563 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3568 const struct rte_eth_rxtx_callback *
3569 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3570 rte_tx_callback_fn fn, void *user_param)
3572 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3573 rte_errno = ENOTSUP;
3576 /* check input parameters */
3577 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3578 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3583 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3591 cb->param = user_param;
3593 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3594 /* Add the callbacks in fifo order. */
3595 struct rte_eth_rxtx_callback *tail =
3596 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3599 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3606 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3612 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3613 const struct rte_eth_rxtx_callback *user_cb)
3615 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3618 /* Check input parameters. */
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3620 if (user_cb == NULL ||
3621 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3624 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3625 struct rte_eth_rxtx_callback *cb;
3626 struct rte_eth_rxtx_callback **prev_cb;
3629 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3630 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3631 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3633 if (cb == user_cb) {
3634 /* Remove the user cb from the callback list. */
3635 *prev_cb = cb->next;
3640 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3646 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3647 const struct rte_eth_rxtx_callback *user_cb)
3649 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3652 /* Check input parameters. */
3653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3654 if (user_cb == NULL ||
3655 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3658 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3660 struct rte_eth_rxtx_callback *cb;
3661 struct rte_eth_rxtx_callback **prev_cb;
3663 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3664 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3665 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3667 if (cb == user_cb) {
3668 /* Remove the user cb from the callback list. */
3669 *prev_cb = cb->next;
3674 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3680 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3681 struct rte_eth_rxq_info *qinfo)
3683 struct rte_eth_dev *dev;
3685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3690 dev = &rte_eth_devices[port_id];
3691 if (queue_id >= dev->data->nb_rx_queues) {
3692 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3698 memset(qinfo, 0, sizeof(*qinfo));
3699 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3704 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3705 struct rte_eth_txq_info *qinfo)
3707 struct rte_eth_dev *dev;
3709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3714 dev = &rte_eth_devices[port_id];
3715 if (queue_id >= dev->data->nb_tx_queues) {
3716 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3722 memset(qinfo, 0, sizeof(*qinfo));
3723 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3728 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3729 struct ether_addr *mc_addr_set,
3730 uint32_t nb_mc_addr)
3732 struct rte_eth_dev *dev;
3734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3736 dev = &rte_eth_devices[port_id];
3737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3738 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3739 mc_addr_set, nb_mc_addr));
3743 rte_eth_timesync_enable(uint16_t port_id)
3745 struct rte_eth_dev *dev;
3747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3748 dev = &rte_eth_devices[port_id];
3750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3751 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3755 rte_eth_timesync_disable(uint16_t port_id)
3757 struct rte_eth_dev *dev;
3759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3760 dev = &rte_eth_devices[port_id];
3762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3763 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3767 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3770 struct rte_eth_dev *dev;
3772 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3773 dev = &rte_eth_devices[port_id];
3775 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3776 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3777 (dev, timestamp, flags));
3781 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3782 struct timespec *timestamp)
3784 struct rte_eth_dev *dev;
3786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3787 dev = &rte_eth_devices[port_id];
3789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3790 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3795 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3797 struct rte_eth_dev *dev;
3799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3800 dev = &rte_eth_devices[port_id];
3802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3803 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3808 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3810 struct rte_eth_dev *dev;
3812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3813 dev = &rte_eth_devices[port_id];
3815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3816 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3821 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3823 struct rte_eth_dev *dev;
3825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3826 dev = &rte_eth_devices[port_id];
3828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3829 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3834 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3836 struct rte_eth_dev *dev;
3838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3840 dev = &rte_eth_devices[port_id];
3841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3842 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3846 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3848 struct rte_eth_dev *dev;
3850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3852 dev = &rte_eth_devices[port_id];
3853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3854 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3858 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3860 struct rte_eth_dev *dev;
3862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3864 dev = &rte_eth_devices[port_id];
3865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3866 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3870 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3872 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3876 dev = &rte_eth_devices[port_id];
3877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3878 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3882 rte_eth_dev_get_dcb_info(uint16_t port_id,
3883 struct rte_eth_dcb_info *dcb_info)
3885 struct rte_eth_dev *dev;
3887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3889 dev = &rte_eth_devices[port_id];
3890 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3893 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3897 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3898 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3900 struct rte_eth_dev *dev;
3902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3903 if (l2_tunnel == NULL) {
3904 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3908 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3909 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3913 dev = &rte_eth_devices[port_id];
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3916 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3921 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3922 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3930 if (l2_tunnel == NULL) {
3931 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3935 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3936 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3941 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3945 dev = &rte_eth_devices[port_id];
3946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3948 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3949 l2_tunnel, mask, en));
3953 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3954 const struct rte_eth_desc_lim *desc_lim)
3956 if (desc_lim->nb_align != 0)
3957 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3959 if (desc_lim->nb_max != 0)
3960 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3962 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3966 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3967 uint16_t *nb_rx_desc,
3968 uint16_t *nb_tx_desc)
3970 struct rte_eth_dev *dev;
3971 struct rte_eth_dev_info dev_info;
3973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3975 dev = &rte_eth_devices[port_id];
3976 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3978 rte_eth_dev_info_get(port_id, &dev_info);
3980 if (nb_rx_desc != NULL)
3981 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3983 if (nb_tx_desc != NULL)
3984 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3990 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3992 struct rte_eth_dev *dev;
3994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3999 dev = &rte_eth_devices[port_id];
4001 if (*dev->dev_ops->pool_ops_supported == NULL)
4002 return 1; /* all pools are supported */
4004 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4007 RTE_INIT(ethdev_init_log);
4009 ethdev_init_log(void)
4011 ethdev_logtype = rte_log_register("lib.ethdev");
4012 if (ethdev_logtype >= 0)
4013 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);