1 # SPDX-License-Identifier: BSD-3-Clause
2 # Copyright(c) 2017-2020 Intel Corporation
4 headers = files('rte_ip.h',
21 sources = files('rte_arp.c', 'rte_ether.c', 'rte_net.c', 'rte_net_crc.c')
24 if dpdk_conf.has('RTE_ARCH_X86_64')
25 net_crc_sse42_cpu_support = (
26 cc.get_define('__PCLMUL__', args: machine_args) != '')
27 net_crc_sse42_cc_support = (
28 cc.has_argument('-mpclmul') and cc.has_argument('-maes'))
30 build_static_net_crc_sse42_lib = 0
32 if net_crc_sse42_cpu_support == true
33 sources += files('net_crc_sse.c')
34 cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
35 elif net_crc_sse42_cc_support == true
36 build_static_net_crc_sse42_lib = 1
37 net_crc_sse42_lib_cflags = ['-mpclmul', '-maes']
38 cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
41 if build_static_net_crc_sse42_lib == 1
42 net_crc_sse42_lib = static_library(
45 dependencies: static_rte_eal,
47 net_crc_sse42_lib_cflags])
48 objs += net_crc_sse42_lib.extract_objects('net_crc_sse.c')
50 elif (dpdk_conf.has('RTE_ARCH_ARM64') and
51 cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != '')
52 sources += files('net_crc_neon.c')
53 cflags += ['-DCC_ARM64_NEON_PMULL_SUPPORT']