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32 ***************************************************************************/
34 #include "e1000_api.h"
37 * e1000_calculate_checksum - Calculate checksum for buffer
38 * @buffer: pointer to EEPROM
39 * @length: size of EEPROM to calculate a checksum for
41 * Calculates the checksum for some buffer on a specified length. The
42 * checksum calculated is returned.
44 u8 e1000_calculate_checksum(u8 *buffer, u32 length)
49 DEBUGFUNC("e1000_calculate_checksum");
54 for (i = 0; i < length; i++)
57 return (u8) (0 - sum);
61 * e1000_mng_enable_host_if_generic - Checks host interface is enabled
62 * @hw: pointer to the HW structure
64 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
66 * This function checks whether the HOST IF is enabled for command operation
67 * and also checks whether the previous command is completed. It busy waits
68 * in case of previous command is not completed.
70 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
73 s32 ret_val = E1000_SUCCESS;
76 DEBUGFUNC("e1000_mng_enable_host_if_generic");
78 if (!(hw->mac.arc_subsystem_valid)) {
79 DEBUGOUT("ARC subsystem not valid.\n");
80 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
84 /* Check that the host interface is enabled. */
85 hicr = E1000_READ_REG(hw, E1000_HICR);
86 if ((hicr & E1000_HICR_EN) == 0) {
87 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
88 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
91 /* check the previous command is completed */
92 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
93 hicr = E1000_READ_REG(hw, E1000_HICR);
94 if (!(hicr & E1000_HICR_C))
99 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
100 DEBUGOUT("Previous command timeout failed .\n");
101 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
110 * e1000_check_mng_mode_generic - Generic check management mode
111 * @hw: pointer to the HW structure
113 * Reads the firmware semaphore register and returns TRUE (>0) if
114 * manageability is enabled, else FALSE (0).
116 bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
118 u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);
120 DEBUGFUNC("e1000_check_mng_mode_generic");
123 return (fwsm & E1000_FWSM_MODE_MASK) ==
124 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
128 * e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on Tx
129 * @hw: pointer to the HW structure
131 * Enables packet filtering on transmit packets if manageability is enabled
132 * and host interface is enabled.
134 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
136 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
137 u32 *buffer = (u32 *)&hw->mng_cookie;
139 s32 ret_val, hdr_csum, csum;
142 DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
144 hw->mac.tx_pkt_filtering = TRUE;
146 /* No manageability, no filtering */
147 if (!hw->mac.ops.check_mng_mode(hw)) {
148 hw->mac.tx_pkt_filtering = FALSE;
153 * If we can't read from the host interface for whatever
154 * reason, disable filtering.
156 ret_val = hw->mac.ops.mng_enable_host_if(hw);
157 if (ret_val != E1000_SUCCESS) {
158 hw->mac.tx_pkt_filtering = FALSE;
162 /* Read in the header. Length and offset are in dwords. */
163 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
164 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
165 for (i = 0; i < len; i++)
166 *(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,
168 hdr_csum = hdr->checksum;
170 csum = e1000_calculate_checksum((u8 *)hdr,
171 E1000_MNG_DHCP_COOKIE_LENGTH);
173 * If either the checksums or signature don't match, then
174 * the cookie area isn't considered valid, in which case we
175 * take the safe route of assuming Tx filtering is enabled.
177 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
178 hw->mac.tx_pkt_filtering = TRUE;
182 /* Cookie area is valid, make the final check for filtering. */
183 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) {
184 hw->mac.tx_pkt_filtering = FALSE;
189 return hw->mac.tx_pkt_filtering;
193 * e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
194 * @hw: pointer to the HW structure
195 * @buffer: pointer to the host interface
196 * @length: size of the buffer
198 * Writes the DHCP information to the host interface.
200 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
203 struct e1000_host_mng_command_header hdr;
207 DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
209 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
210 hdr.command_length = length;
215 /* Enable the host interface */
216 ret_val = hw->mac.ops.mng_enable_host_if(hw);
220 /* Populate the host interface with the contents of "buffer". */
221 ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
222 sizeof(hdr), &(hdr.checksum));
226 /* Write the manageability command header */
227 ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
231 /* Tell the ARC a new command is pending. */
232 hicr = E1000_READ_REG(hw, E1000_HICR);
233 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
240 * e1000_mng_write_cmd_header_generic - Writes manageability command header
241 * @hw: pointer to the HW structure
242 * @hdr: pointer to the host interface command header
244 * Writes the command header after does the checksum calculation.
246 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
247 struct e1000_host_mng_command_header *hdr)
249 u16 i, length = sizeof(struct e1000_host_mng_command_header);
251 DEBUGFUNC("e1000_mng_write_cmd_header_generic");
253 /* Write the whole command header structure with new checksum. */
255 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
258 /* Write the relevant command block into the ram area. */
259 for (i = 0; i < length; i++) {
260 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
262 E1000_WRITE_FLUSH(hw);
265 return E1000_SUCCESS;
269 * e1000_mng_host_if_write_generic - Write to the manageability host interface
270 * @hw: pointer to the HW structure
271 * @buffer: pointer to the host interface buffer
272 * @length: size of the buffer
273 * @offset: location in the buffer to write to
274 * @sum: sum of the data (not checksum)
276 * This function writes the buffer content at the offset given on the host if.
277 * It also does alignment considerations to do the writes in most efficient
278 * way. Also fills up the sum of the buffer in *buffer parameter.
280 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
281 u16 length, u16 offset, u8 *sum)
286 s32 ret_val = E1000_SUCCESS;
287 u16 remaining, i, j, prev_bytes;
289 DEBUGFUNC("e1000_mng_host_if_write_generic");
291 /* sum = only sum of the data and it is not checksum */
293 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
294 ret_val = -E1000_ERR_PARAM;
299 prev_bytes = offset & 0x3;
303 data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
304 for (j = prev_bytes; j < sizeof(u32); j++) {
305 *(tmp + j) = *bufptr++;
308 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
309 length -= j - prev_bytes;
313 remaining = length & 0x3;
316 /* Calculate length in DWORDs */
320 * The device driver writes the relevant command block into the
323 for (i = 0; i < length; i++) {
324 for (j = 0; j < sizeof(u32); j++) {
325 *(tmp + j) = *bufptr++;
329 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
333 for (j = 0; j < sizeof(u32); j++) {
335 *(tmp + j) = *bufptr++;
341 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
349 * e1000_enable_mng_pass_thru - Check if management passthrough is needed
350 * @hw: pointer to the HW structure
352 * Verifies the hardware needs to leave interface enabled so that frames can
353 * be directed to and from the management interface.
355 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
359 bool ret_val = FALSE;
361 DEBUGFUNC("e1000_enable_mng_pass_thru");
363 if (!hw->mac.asf_firmware_present)
366 manc = E1000_READ_REG(hw, E1000_MANC);
368 if (!(manc & E1000_MANC_RCV_TCO_EN))
371 if (hw->mac.has_fwsm) {
372 fwsm = E1000_READ_REG(hw, E1000_FWSM);
373 factps = E1000_READ_REG(hw, E1000_FACTPS);
375 if (!(factps & E1000_FACTPS_MNGCG) &&
376 ((fwsm & E1000_FWSM_MODE_MASK) ==
377 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
381 } else if ((manc & E1000_MANC_SMBUS_EN) &&
382 !(manc & E1000_MANC_ASF_EN)) {
392 * e1000_host_interface_command - Writes buffer to host interface
393 * @hw: pointer to the HW structure
394 * @buffer: contains a command to write
395 * @length: the byte length of the buffer, must be multiple of 4 bytes
397 * Writes a buffer to the Host Interface. Upon success, returns E1000_SUCCESS
398 * else returns E1000_ERR_HOST_INTERFACE_COMMAND.
400 s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
403 s32 ret_val = E1000_SUCCESS;
405 DEBUGFUNC("e1000_host_interface_command");
407 if (!(hw->mac.arc_subsystem_valid)) {
408 DEBUGOUT("Hardware doesn't support host interface command.\n");
412 if (!hw->mac.asf_firmware_present) {
413 DEBUGOUT("Firmware is not present.\n");
417 if (length == 0 || length & 0x3 ||
418 length > E1000_HI_MAX_BLOCK_BYTE_LENGTH) {
419 DEBUGOUT("Buffer length failure.\n");
420 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
424 /* Check that the host interface is enabled. */
425 hicr = E1000_READ_REG(hw, E1000_HICR);
426 if ((hicr & E1000_HICR_EN) == 0) {
427 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
428 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
432 /* Calculate length in DWORDs */
436 * The device driver writes the relevant command block
439 for (i = 0; i < length; i++)
440 E1000_WRITE_REG_ARRAY_DWORD(hw,
443 *((u32 *)buffer + i));
445 /* Setting this bit tells the ARC that a new command is pending. */
446 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
448 for (i = 0; i < E1000_HI_COMMAND_TIMEOUT; i++) {
449 hicr = E1000_READ_REG(hw, E1000_HICR);
450 if (!(hicr & E1000_HICR_C))
455 /* Check command successful completion. */
456 if (i == E1000_HI_COMMAND_TIMEOUT ||
457 (!(E1000_READ_REG(hw, E1000_HICR) & E1000_HICR_SV))) {
458 DEBUGOUT("Command has failed with no status valid.\n");
459 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
463 for (i = 0; i < length; i++)
464 *((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,