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35 #ifndef _E1000_OSDEP_H_
36 #define _E1000_OSDEP_H_
42 #include <rte_common.h>
43 #include <rte_cycles.h>
45 #include <rte_debug.h>
47 #include "../e1000_logs.h"
49 #define DELAY(x) rte_delay_us(x)
50 #define usec_delay(x) DELAY(x)
51 #define msec_delay(x) DELAY(1000*(x))
52 #define msec_delay_irq(x) DELAY(1000*(x))
54 #define DEBUGFUNC(F) DEBUGOUT(F);
55 #define DEBUGOUT(S, args...) PMD_DRV_LOG(DEBUG, S, ##args)
56 #define DEBUGOUT1(S, args...) DEBUGOUT(S, ##args)
57 #define DEBUGOUT2(S, args...) DEBUGOUT(S, ##args)
58 #define DEBUGOUT3(S, args...) DEBUGOUT(S, ##args)
59 #define DEBUGOUT6(S, args...) DEBUGOUT(S, ##args)
60 #define DEBUGOUT7(S, args...) DEBUGOUT(S, ##args)
65 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
67 /* Mutex used in the shared code */
68 #define E1000_MUTEX uintptr_t
69 #define E1000_MUTEX_INIT(mutex) (*(mutex) = 0)
70 #define E1000_MUTEX_LOCK(mutex) (*(mutex) = 1)
71 #define E1000_MUTEX_UNLOCK(mutex) (*(mutex) = 0)
87 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
89 #define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
91 #define E1000_PCI_REG_WRITE(reg, value) do { \
92 E1000_PCI_REG((reg)) = (value); \
95 #define E1000_PCI_REG_ADDR(hw, reg) \
96 ((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
98 #define E1000_PCI_REG_ARRAY_ADDR(hw, reg, index) \
99 E1000_PCI_REG_ADDR((hw), (reg) + ((index) << 2))
101 static inline uint32_t e1000_read_addr(volatile void* addr)
103 return E1000_PCI_REG(addr);
106 /* Register READ/WRITE macros */
108 #define E1000_READ_REG(hw, reg) \
109 e1000_read_addr(E1000_PCI_REG_ADDR((hw), (reg)))
111 #define E1000_WRITE_REG(hw, reg, value) \
112 E1000_PCI_REG_WRITE(E1000_PCI_REG_ADDR((hw), (reg)), (value))
114 #define E1000_READ_REG_ARRAY(hw, reg, index) \
115 E1000_PCI_REG(E1000_PCI_REG_ARRAY_ADDR((hw), (reg), (index)))
117 #define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
118 E1000_PCI_REG_WRITE(E1000_PCI_REG_ARRAY_ADDR((hw), (reg), (index)), (value))
120 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
121 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
123 #define E1000_ACCESS_PANIC(x, hw, reg, value) \
124 rte_panic("%s:%u\t" RTE_STR(x) "(%p, 0x%x, 0x%x)", \
125 __FILE__, __LINE__, (hw), (reg), (unsigned int)(value))
128 * To be able to do IO write, we need to map IO BAR
129 * (bar 2/4 depending on device).
130 * Right now mapping multiple BARs is not supported by DPDK.
131 * Fortunatelly we need it only for legacy hw support.
134 #define E1000_WRITE_REG_IO(hw, reg, value) \
135 E1000_WRITE_REG(hw, reg, value)
141 #define E1000_READ_FLASH_REG(hw, reg) \
142 (E1000_ACCESS_PANIC(E1000_READ_FLASH_REG, hw, reg, 0), 0)
144 #define E1000_READ_FLASH_REG16(hw, reg) \
145 (E1000_ACCESS_PANIC(E1000_READ_FLASH_REG16, hw, reg, 0), 0)
147 #define E1000_WRITE_FLASH_REG(hw, reg, value) \
148 E1000_ACCESS_PANIC(E1000_WRITE_FLASH_REG, hw, reg, value)
150 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
151 E1000_ACCESS_PANIC(E1000_WRITE_FLASH_REG16, hw, reg, value)
153 #define STATIC static
156 #define ETH_ADDR_LEN 6
162 #endif /* _E1000_OSDEP_H_ */