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34 #ifndef _I40E_ETHDEV_H_
35 #define _I40E_ETHDEV_H_
37 #include <rte_eth_ctrl.h>
39 #define I40E_AQ_LEN 32
40 #define I40E_AQ_BUF_SZ 4096
41 /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
42 #define I40E_MAX_Q_PER_TC 64
43 #define I40E_NUM_DESC_DEFAULT 512
44 #define I40E_NUM_DESC_ALIGN 32
45 #define I40E_BUF_SIZE_MIN 1024
46 #define I40E_FRAME_SIZE_MAX 9728
47 #define I40E_QUEUE_BASE_ADDR_UNIT 128
48 /* number of VSIs and queue default setting */
49 #define I40E_MAX_QP_NUM_PER_VF 16
50 #define I40E_DEFAULT_QP_NUM_FDIR 1
51 #define I40E_UINT32_BIT_SIZE (CHAR_BIT * sizeof(uint32_t))
52 #define I40E_VFTA_SIZE (4096 / I40E_UINT32_BIT_SIZE)
53 /* Default TC traffic in case DCB is not enabled */
54 #define I40E_DEFAULT_TCMAP 0x1
55 #define I40E_FDIR_QUEUE_ID 0
57 /* Always assign pool 0 to main VSI, VMDQ will start from 1 */
58 #define I40E_VMDQ_POOL_BASE 1
60 #define I40E_DEFAULT_RX_FREE_THRESH 32
61 #define I40E_DEFAULT_RX_PTHRESH 8
62 #define I40E_DEFAULT_RX_HTHRESH 8
63 #define I40E_DEFAULT_RX_WTHRESH 0
65 #define I40E_DEFAULT_TX_FREE_THRESH 32
66 #define I40E_DEFAULT_TX_PTHRESH 32
67 #define I40E_DEFAULT_TX_HTHRESH 0
68 #define I40E_DEFAULT_TX_WTHRESH 0
69 #define I40E_DEFAULT_TX_RSBIT_THRESH 32
71 /* Bit shift and mask */
72 #define I40E_4_BIT_WIDTH (CHAR_BIT / 2)
73 #define I40E_4_BIT_MASK RTE_LEN2MASK(I40E_4_BIT_WIDTH, uint8_t)
74 #define I40E_8_BIT_WIDTH CHAR_BIT
75 #define I40E_8_BIT_MASK UINT8_MAX
76 #define I40E_16_BIT_WIDTH (CHAR_BIT * 2)
77 #define I40E_16_BIT_MASK UINT16_MAX
78 #define I40E_32_BIT_WIDTH (CHAR_BIT * 4)
79 #define I40E_32_BIT_MASK UINT32_MAX
80 #define I40E_48_BIT_WIDTH (CHAR_BIT * 6)
81 #define I40E_48_BIT_MASK RTE_LEN2MASK(I40E_48_BIT_WIDTH, uint64_t)
84 #define I40E_FLAG_RSS (1ULL << 0)
85 #define I40E_FLAG_DCB (1ULL << 1)
86 #define I40E_FLAG_VMDQ (1ULL << 2)
87 #define I40E_FLAG_SRIOV (1ULL << 3)
88 #define I40E_FLAG_HEADER_SPLIT_DISABLED (1ULL << 4)
89 #define I40E_FLAG_HEADER_SPLIT_ENABLED (1ULL << 5)
90 #define I40E_FLAG_FDIR (1ULL << 6)
91 #define I40E_FLAG_VXLAN (1ULL << 7)
92 #define I40E_FLAG_ALL (I40E_FLAG_RSS | \
96 I40E_FLAG_HEADER_SPLIT_DISABLED | \
97 I40E_FLAG_HEADER_SPLIT_ENABLED | \
101 #define I40E_RSS_OFFLOAD_ALL ( \
102 ETH_RSS_NONF_IPV4_UDP | \
103 ETH_RSS_NONF_IPV4_TCP | \
104 ETH_RSS_NONF_IPV4_SCTP | \
105 ETH_RSS_NONF_IPV4_OTHER | \
106 ETH_RSS_FRAG_IPV4 | \
107 ETH_RSS_NONF_IPV6_UDP | \
108 ETH_RSS_NONF_IPV6_TCP | \
109 ETH_RSS_NONF_IPV6_SCTP | \
110 ETH_RSS_NONF_IPV6_OTHER | \
111 ETH_RSS_FRAG_IPV6 | \
114 /* All bits of RSS hash enable */
115 #define I40E_RSS_HENA_ALL ( \
116 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
117 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
118 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
119 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
120 (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4) | \
121 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
122 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
123 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
124 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
125 (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6) | \
126 (1ULL << I40E_FILTER_PCTYPE_FCOE_OX) | \
127 (1ULL << I40E_FILTER_PCTYPE_FCOE_RX) | \
128 (1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
129 (1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
134 * MAC filter structure
136 struct i40e_mac_filter_info {
137 enum rte_mac_filter_type filter_type;
138 struct ether_addr mac_addr;
141 TAILQ_HEAD(i40e_mac_filter_list, i40e_mac_filter);
143 /* MAC filter list structure */
144 struct i40e_mac_filter {
145 TAILQ_ENTRY(i40e_mac_filter) next;
146 struct i40e_mac_filter_info mac_info;
149 TAILQ_HEAD(i40e_vsi_list_head, i40e_vsi_list);
153 /* VSI list structure */
154 struct i40e_vsi_list {
155 TAILQ_ENTRY(i40e_vsi_list) list;
156 struct i40e_vsi *vsi;
159 struct i40e_rx_queue;
160 struct i40e_tx_queue;
162 /* Structure that defines a VEB */
164 struct i40e_vsi_list_head head;
165 struct i40e_vsi *associate_vsi; /* Associate VSI who owns the VEB */
166 uint16_t seid; /* The seid of VEB itself */
167 uint16_t uplink_seid; /* The uplink seid of this VEB */
169 struct i40e_eth_stats stats;
172 /* i40e MACVLAN filter structure */
173 struct i40e_macvlan_filter {
174 struct ether_addr macaddr;
175 enum rte_mac_filter_type filter_type;
180 * Structure that defines a VSI, associated with a adapter.
183 struct i40e_adapter *adapter; /* Backreference to associated adapter */
184 struct i40e_aqc_vsi_properties_data info; /* VSI properties */
186 struct i40e_eth_stats eth_stats_offset;
187 struct i40e_eth_stats eth_stats;
189 * When drivers loaded, only a default main VSI exists. In case new VSI
190 * needs to add, HW needs to know the layout that VSIs are organized.
191 * Besides that, VSI isan element and can't switch packets, which needs
192 * to add new component VEB to perform switching. So, a new VSI needs
193 * to specify the the uplink VSI (Parent VSI) before created. The
194 * uplink VSI will check whether it had a VEB to switch packets. If no,
195 * it will try to create one. Then, uplink VSI will move the new VSI
196 * into its' sib_vsi_list to manage all the downlink VSI.
197 * sib_vsi_list: the VSI list that shared the same uplink VSI.
198 * parent_vsi : the uplink VSI. It's NULL for main VSI.
199 * veb : the VEB associates with the VSI.
201 struct i40e_vsi_list sib_vsi_list; /* sibling vsi list */
202 struct i40e_vsi *parent_vsi;
203 struct i40e_veb *veb; /* Associated veb, could be null */
205 enum i40e_vsi_type type; /* VSI types */
206 uint16_t vlan_num; /* Total VLAN number */
207 uint16_t mac_num; /* Total mac number */
208 uint32_t vfta[I40E_VFTA_SIZE]; /* VLAN bitmap */
209 struct i40e_mac_filter_list mac_list; /* macvlan filter list */
210 /* specific VSI-defined parameters, SRIOV stored the vf_id */
212 uint16_t seid; /* The seid of VSI itself */
213 uint16_t uplink_seid; /* The uplink seid of this VSI */
214 uint16_t nb_qps; /* Number of queue pairs VSI can occupy */
215 uint16_t max_macaddrs; /* Maximum number of MAC addresses */
216 uint16_t base_queue; /* The first queue index of this VSI */
218 * The offset to visit VSI related register, assigned by HW when
222 uint16_t msix_intr; /* The MSIX interrupt binds to VSI */
223 uint8_t enabled_tc; /* The traffic class enabled */
227 LIST_ENTRY(pool_entry) next;
232 LIST_HEAD(res_list, pool_entry);
234 struct i40e_res_pool_info {
235 uint32_t base; /* Resource start index */
236 uint32_t num_alloc; /* Allocated resource number */
237 uint32_t num_free; /* Total available resource number */
238 struct res_list alloc_list; /* Allocated resource list */
239 struct res_list free_list; /* Available resource list */
243 I40E_VF_INACTIVE = 0,
250 * Structure to store private data for PF host.
254 struct i40e_vsi *vsi;
255 enum I40E_VF_STATE state; /* The number of queue pairs availiable */
256 uint16_t vf_idx; /* VF index in pf->vfs */
257 uint16_t lan_nb_qps; /* Actual queues allocated */
258 uint16_t reset_cnt; /* Total vf reset times */
262 * Structure to store private data for VMDQ instance
264 struct i40e_vmdq_info {
266 struct i40e_vsi *vsi;
270 * A structure used to define fields of a FDIR related info.
272 struct i40e_fdir_info {
273 struct i40e_vsi *fdir_vsi; /* pointer to fdir VSI structure */
274 uint16_t match_counter_index; /* Statistic counter index used for fdir*/
275 struct i40e_tx_queue *txq;
276 struct i40e_rx_queue *rxq;
277 void *prg_pkt; /* memory for fdir program packet */
278 uint64_t dma_addr; /* physic address of packet memory*/
282 * Structure to store private data specific for PF instance.
285 struct i40e_adapter *adapter; /* The adapter this PF associate to */
286 struct i40e_vsi *main_vsi; /* pointer to main VSI structure */
287 uint16_t mac_seid; /* The seid of the MAC of this PF */
288 uint16_t main_vsi_seid; /* The seid of the main VSI */
289 uint16_t max_num_vsi;
290 struct i40e_res_pool_info qp_pool; /*Queue pair pool */
291 struct i40e_res_pool_info msix_pool; /* MSIX interrupt pool */
293 struct i40e_hw_port_stats stats_offset;
294 struct i40e_hw_port_stats stats;
297 struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
298 struct ether_addr dev_addr; /* PF device mac address */
299 uint64_t flags; /* PF featuer flags */
300 /* All kinds of queue pair setting for different VSIs */
301 struct i40e_pf_vf *vfs;
303 /* Each of below queue pairs should be power of 2 since it's the
304 precondition after TC configuration applied */
305 uint16_t lan_nb_qps; /* The number of queue pairs of LAN */
306 uint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */
307 uint16_t vf_nb_qps; /* The number of queue pairs of VF */
308 uint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */
309 uint16_t hash_lut_size; /* The size of hash lookup table */
310 /* store VXLAN UDP ports */
311 uint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
312 uint16_t vxlan_bitmap; /* Vxlan bit mask */
314 /* VMDQ related info */
315 uint16_t max_nb_vmdq_vsi; /* Max number of VMDQ VSIs supported */
316 uint16_t nb_cfg_vmdq_vsi; /* number of VMDQ VSIs configured */
317 struct i40e_vmdq_info *vmdq;
319 struct i40e_fdir_info fdir; /* flow director info */
323 PFMSG_LINK_CHANGE = 0x1,
324 PFMSG_RESET_IMPENDING = 0x2,
325 PFMSG_DRIVER_CLOSE = 0x4,
328 struct i40e_vsi_vlan_pvid_info {
329 uint16_t on; /* Enable or disable pvid */
331 uint16_t pvid; /* Valid in case 'on' is set to set pvid */
333 /* Valid in case 'on' is cleared. 'tagged' will reject tagged packets,
334 * while 'untagged' will reject untagged packets.
342 struct i40e_vf_rx_queues {
343 uint64_t rx_dma_addr;
344 uint32_t rx_ring_len;
348 struct i40e_vf_tx_queues {
349 uint64_t tx_dma_addr;
350 uint32_t tx_ring_len;
354 * Structure to store private data specific for VF instance.
357 struct i40e_adapter *adapter; /* The adapter this VF associate to */
358 struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
359 uint16_t num_queue_pairs;
360 uint16_t max_pkt_len; /* Maximum packet length */
361 bool promisc_unicast_enabled;
362 bool promisc_multicast_enabled;
364 uint32_t version_major; /* Major version number */
365 uint32_t version_minor; /* Minor version number */
366 uint16_t promisc_flags; /* Promiscuous setting */
367 uint32_t vlan[I40E_VFTA_SIZE]; /* VLAN bit map */
373 volatile uint32_t pend_cmd; /* pending command not finished yet */
374 u16 pend_msg; /* flags indicates events from pf not handled yet */
377 struct i40e_virtchnl_vf_resource *vf_res; /* All VSIs */
378 struct i40e_virtchnl_vsi_resource *vsi_res; /* LAN VSI */
383 * Structure to store private data for each PF/VF instance.
385 struct i40e_adapter {
386 /* Common for both PF and VF */
388 struct rte_eth_dev *eth_dev;
390 /* Specific for PF or VF */
397 int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);
398 int i40e_vsi_release(struct i40e_vsi *vsi);
399 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf,
400 enum i40e_vsi_type type,
401 struct i40e_vsi *uplink_vsi,
402 uint16_t user_param);
403 int i40e_switch_rx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
404 int i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
405 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, uint16_t vlan);
406 int i40e_vsi_delete_vlan(struct i40e_vsi *vsi, uint16_t vlan);
407 int i40e_vsi_add_mac(struct i40e_vsi *vsi, struct i40e_mac_filter_info *filter);
408 int i40e_vsi_delete_mac(struct i40e_vsi *vsi, struct ether_addr *addr);
409 void i40e_update_vsi_stats(struct i40e_vsi *vsi);
410 void i40e_pf_disable_irq0(struct i40e_hw *hw);
411 void i40e_pf_enable_irq0(struct i40e_hw *hw);
412 int i40e_dev_link_update(struct rte_eth_dev *dev,
413 __rte_unused int wait_to_complete);
414 void i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi);
415 void i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi);
416 int i40e_vsi_vlan_pvid_set(struct i40e_vsi *vsi,
417 struct i40e_vsi_vlan_pvid_info *info);
418 int i40e_vsi_config_vlan_stripping(struct i40e_vsi *vsi, bool on);
419 uint64_t i40e_config_hena(uint64_t flags);
420 uint64_t i40e_parse_hena(uint64_t flags);
421 enum i40e_status_code i40e_fdir_setup_tx_resources(struct i40e_pf *pf);
422 enum i40e_status_code i40e_fdir_setup_rx_resources(struct i40e_pf *pf);
423 int i40e_fdir_setup(struct i40e_pf *pf);
424 const struct rte_memzone *i40e_memzone_reserve(const char *name,
427 int i40e_fdir_configure(struct rte_eth_dev *dev);
429 /* I40E_DEV_PRIVATE_TO */
430 #define I40E_DEV_PRIVATE_TO_PF(adapter) \
431 (&((struct i40e_adapter *)adapter)->pf)
432 #define I40E_DEV_PRIVATE_TO_HW(adapter) \
433 (&((struct i40e_adapter *)adapter)->hw)
434 #define I40E_DEV_PRIVATE_TO_ADAPTER(adapter) \
435 ((struct i40e_adapter *)adapter)
437 /* I40EVF_DEV_PRIVATE_TO */
438 #define I40EVF_DEV_PRIVATE_TO_VF(adapter) \
439 (&((struct i40e_adapter *)adapter)->vf)
441 static inline struct i40e_vsi *
442 i40e_get_vsi_from_adapter(struct i40e_adapter *adapter)
449 hw = I40E_DEV_PRIVATE_TO_HW(adapter);
450 if (hw->mac.type == I40E_MAC_VF) {
451 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(adapter);
454 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(adapter);
458 #define I40E_DEV_PRIVATE_TO_MAIN_VSI(adapter) \
459 i40e_get_vsi_from_adapter((struct i40e_adapter *)adapter)
462 #define I40E_VSI_TO_HW(vsi) \
463 (&(((struct i40e_vsi *)vsi)->adapter->hw))
464 #define I40E_VSI_TO_PF(vsi) \
465 (&(((struct i40e_vsi *)vsi)->adapter->pf))
466 #define I40E_VSI_TO_DEV_DATA(vsi) \
467 (((struct i40e_vsi *)vsi)->adapter->pf.dev_data)
468 #define I40E_VSI_TO_ETH_DEV(vsi) \
469 (((struct i40e_vsi *)vsi)->adapter->eth_dev)
472 #define I40E_PF_TO_HW(pf) \
473 (&(((struct i40e_pf *)pf)->adapter->hw))
474 #define I40E_PF_TO_ADAPTER(pf) \
475 ((struct i40e_adapter *)pf->adapter)
478 #define I40E_VF_TO_HW(vf) \
479 (&(((struct i40e_vf *)vf)->adapter->hw))
482 i40e_init_adminq_parameter(struct i40e_hw *hw)
484 hw->aq.num_arq_entries = I40E_AQ_LEN;
485 hw->aq.num_asq_entries = I40E_AQ_LEN;
486 hw->aq.arq_buf_size = I40E_AQ_BUF_SZ;
487 hw->aq.asq_buf_size = I40E_AQ_BUF_SZ;
490 #endif /* _I40E_ETHDEV_H_ */