4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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34 #include <sys/queue.h>
42 #include <rte_byteorder.h>
43 #include <rte_common.h>
44 #include <rte_cycles.h>
46 #include <rte_interrupts.h>
48 #include <rte_debug.h>
50 #include <rte_atomic.h>
51 #include <rte_branch_prediction.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
54 #include <rte_tailq.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_malloc.h>
63 #include "i40e_logs.h"
64 #include "i40e/i40e_prototype.h"
65 #include "i40e/i40e_adminq_cmd.h"
66 #include "i40e/i40e_type.h"
68 #include "i40e_rxtx.h"
69 #include "i40e_ethdev.h"
71 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
73 /* busy wait delay in msec */
74 #define I40EVF_BUSY_WAIT_DELAY 10
75 #define I40EVF_BUSY_WAIT_COUNT 50
76 #define MAX_RESET_WAIT_CNT 20
78 struct i40evf_arq_msg_info {
79 enum i40e_virtchnl_ops ops;
80 enum i40e_status_code result;
87 enum i40e_virtchnl_ops ops;
89 uint32_t in_args_size;
91 /* Input & output type. pass in buffer size and pass out
92 * actual return result
97 enum i40evf_aq_result {
98 I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
99 I40EVF_MSG_NON, /* Read nothing from admin queue */
100 I40EVF_MSG_SYS, /* Read system msg from admin queue */
101 I40EVF_MSG_CMD, /* Read async command result */
104 /* A share buffer to store the command result from PF driver */
105 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
107 static int i40evf_dev_configure(struct rte_eth_dev *dev);
108 static int i40evf_dev_start(struct rte_eth_dev *dev);
109 static void i40evf_dev_stop(struct rte_eth_dev *dev);
110 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
111 struct rte_eth_dev_info *dev_info);
112 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
113 __rte_unused int wait_to_complete);
114 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
115 struct rte_eth_stats *stats);
116 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
117 uint16_t vlan_id, int on);
118 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
119 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
121 static void i40evf_dev_close(struct rte_eth_dev *dev);
122 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
123 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
124 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
125 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
126 static int i40evf_get_link_status(struct rte_eth_dev *dev,
127 struct rte_eth_link *link);
128 static int i40evf_init_vlan(struct rte_eth_dev *dev);
129 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
130 uint16_t rx_queue_id);
131 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
132 uint16_t rx_queue_id);
133 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
134 uint16_t tx_queue_id);
135 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
136 uint16_t tx_queue_id);
137 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
138 struct rte_eth_rss_reta_entry64 *reta_conf,
140 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
141 struct rte_eth_rss_reta_entry64 *reta_conf,
143 static int i40evf_config_rss(struct i40e_vf *vf);
144 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
145 struct rte_eth_rss_conf *rss_conf);
146 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
147 struct rte_eth_rss_conf *rss_conf);
149 /* Default hash key buffer for RSS */
150 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
152 static struct eth_dev_ops i40evf_eth_dev_ops = {
153 .dev_configure = i40evf_dev_configure,
154 .dev_start = i40evf_dev_start,
155 .dev_stop = i40evf_dev_stop,
156 .promiscuous_enable = i40evf_dev_promiscuous_enable,
157 .promiscuous_disable = i40evf_dev_promiscuous_disable,
158 .allmulticast_enable = i40evf_dev_allmulticast_enable,
159 .allmulticast_disable = i40evf_dev_allmulticast_disable,
160 .link_update = i40evf_dev_link_update,
161 .stats_get = i40evf_dev_stats_get,
162 .dev_close = i40evf_dev_close,
163 .dev_infos_get = i40evf_dev_info_get,
164 .vlan_filter_set = i40evf_vlan_filter_set,
165 .vlan_offload_set = i40evf_vlan_offload_set,
166 .vlan_pvid_set = i40evf_vlan_pvid_set,
167 .rx_queue_start = i40evf_dev_rx_queue_start,
168 .rx_queue_stop = i40evf_dev_rx_queue_stop,
169 .tx_queue_start = i40evf_dev_tx_queue_start,
170 .tx_queue_stop = i40evf_dev_tx_queue_stop,
171 .rx_queue_setup = i40e_dev_rx_queue_setup,
172 .rx_queue_release = i40e_dev_rx_queue_release,
173 .tx_queue_setup = i40e_dev_tx_queue_setup,
174 .tx_queue_release = i40e_dev_tx_queue_release,
175 .reta_update = i40evf_dev_rss_reta_update,
176 .reta_query = i40evf_dev_rss_reta_query,
177 .rss_hash_update = i40evf_dev_rss_hash_update,
178 .rss_hash_conf_get = i40evf_dev_rss_hash_conf_get,
182 i40evf_set_mac_type(struct i40e_hw *hw)
184 int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
186 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
187 switch (hw->device_id) {
189 case I40E_DEV_ID_VF_HV:
190 hw->mac.type = I40E_MAC_VF;
191 status = I40E_SUCCESS;
202 * Parse admin queue message.
207 * > 0: read cmd result
209 static enum i40evf_aq_result
210 i40evf_parse_pfmsg(struct i40e_vf *vf,
211 struct i40e_arq_event_info *event,
212 struct i40evf_arq_msg_info *data)
214 enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
215 rte_le_to_cpu_32(event->desc.cookie_high);
216 enum i40e_status_code retval = (enum i40e_status_code)\
217 rte_le_to_cpu_32(event->desc.cookie_low);
218 enum i40evf_aq_result ret = I40EVF_MSG_CMD;
221 if (opcode == I40E_VIRTCHNL_OP_EVENT) {
222 struct i40e_virtchnl_pf_event *vpe =
223 (struct i40e_virtchnl_pf_event *)event->msg_buf;
225 /* Initialize ret to sys event */
226 ret = I40EVF_MSG_SYS;
227 switch (vpe->event) {
228 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
230 vpe->event_data.link_event.link_status;
231 vf->pend_msg |= PFMSG_LINK_CHANGE;
232 PMD_DRV_LOG(INFO, "Link status update:%s",
233 vf->link_up ? "up" : "down");
235 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
237 vf->pend_msg |= PFMSG_RESET_IMPENDING;
238 PMD_DRV_LOG(INFO, "vf is reseting");
240 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
241 vf->dev_closed = true;
242 vf->pend_msg |= PFMSG_DRIVER_CLOSE;
243 PMD_DRV_LOG(INFO, "PF driver closed");
246 PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
247 __func__, vpe->event);
250 /* async reply msg on command issued by vf previously */
251 ret = I40EVF_MSG_CMD;
252 /* Actual data length read from PF */
253 data->msg_len = event->msg_len;
255 /* fill the ops and result to notify VF */
256 data->result = retval;
263 * Read data in admin queue to get msg from pf driver
265 static enum i40evf_aq_result
266 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
268 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
269 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
270 struct i40e_arq_event_info event;
272 enum i40evf_aq_result result = I40EVF_MSG_NON;
274 event.buf_len = data->buf_len;
275 event.msg_buf = data->msg;
276 ret = i40e_clean_arq_element(hw, &event, NULL);
277 /* Can't read any msg from adminQ */
279 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
280 result = I40EVF_MSG_NON;
282 result = I40EVF_MSG_ERR;
286 /* Parse the event */
287 result = i40evf_parse_pfmsg(vf, &event, data);
293 * Polling read until command result return from pf driver or meet error.
296 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
297 struct i40evf_arq_msg_info *data)
300 enum i40evf_aq_result ret;
302 #define MAX_TRY_TIMES 10
303 #define ASQ_DELAY_MS 50
305 /* Delay some time first */
306 rte_delay_ms(ASQ_DELAY_MS);
307 ret = i40evf_read_pfmsg(dev, data);
308 if (ret == I40EVF_MSG_CMD)
310 else if (ret == I40EVF_MSG_ERR)
313 /* If don't read msg or read sys event, continue */
314 } while(i++ < MAX_TRY_TIMES);
320 * clear current command. Only call in case execute
321 * _atomic_set_cmd successfully.
324 _clear_cmd(struct i40e_vf *vf)
327 vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
331 * Check there is pending cmd in execution. If none, set new command.
334 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
336 int ret = rte_atomic32_cmpset(&vf->pend_cmd,
337 I40E_VIRTCHNL_OP_UNKNOWN, ops);
340 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
346 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
348 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
349 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
351 struct i40evf_arq_msg_info info;
353 if (_atomic_set_cmd(vf, args->ops))
356 info.msg = args->out_buffer;
357 info.buf_len = args->out_size;
358 info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
359 info.result = I40E_SUCCESS;
361 err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
362 args->in_args, args->in_args_size, NULL);
364 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
368 err = i40evf_wait_cmd_done(dev, &info);
369 /* read message and it's expected one */
370 if (!err && args->ops == info.ops)
373 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
374 else if (args->ops != info.ops)
375 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
376 args->ops, info.ops);
378 return (err | info.result);
382 * Check API version with sync wait until version read or fail from admin queue
385 i40evf_check_api_version(struct rte_eth_dev *dev)
387 struct i40e_virtchnl_version_info version, *pver;
389 struct vf_cmd_info args;
390 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
392 version.major = I40E_VIRTCHNL_VERSION_MAJOR;
393 version.minor = I40E_VIRTCHNL_VERSION_MINOR;
395 args.ops = I40E_VIRTCHNL_OP_VERSION;
396 args.in_args = (uint8_t *)&version;
397 args.in_args_size = sizeof(version);
398 args.out_buffer = cmd_result_buffer;
399 args.out_size = I40E_AQ_BUF_SZ;
401 err = i40evf_execute_vf_cmd(dev, &args);
403 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
407 pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
408 vf->version_major = pver->major;
409 vf->version_minor = pver->minor;
410 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
411 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
412 else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
413 (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR))
414 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
416 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
417 vf->version_major, vf->version_minor,
418 I40E_VIRTCHNL_VERSION_MAJOR,
419 I40E_VIRTCHNL_VERSION_MINOR);
427 i40evf_get_vf_resource(struct rte_eth_dev *dev)
429 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
430 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
432 struct vf_cmd_info args;
435 args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
437 args.in_args_size = 0;
438 args.out_buffer = cmd_result_buffer;
439 args.out_size = I40E_AQ_BUF_SZ;
441 err = i40evf_execute_vf_cmd(dev, &args);
444 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
448 len = sizeof(struct i40e_virtchnl_vf_resource) +
449 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
451 (void)rte_memcpy(vf->vf_res, args.out_buffer,
452 RTE_MIN(args.out_size, len));
453 i40e_vf_parse_hw_config(hw, vf->vf_res);
459 i40evf_config_promisc(struct rte_eth_dev *dev,
461 bool enable_multicast)
463 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
465 struct vf_cmd_info args;
466 struct i40e_virtchnl_promisc_info promisc;
469 promisc.vsi_id = vf->vsi_res->vsi_id;
472 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
474 if (enable_multicast)
475 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
477 args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
478 args.in_args = (uint8_t *)&promisc;
479 args.in_args_size = sizeof(promisc);
480 args.out_buffer = cmd_result_buffer;
481 args.out_size = I40E_AQ_BUF_SZ;
483 err = i40evf_execute_vf_cmd(dev, &args);
486 PMD_DRV_LOG(ERR, "fail to execute command "
487 "CONFIG_PROMISCUOUS_MODE");
491 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
493 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
494 bool enable_vlan_strip)
496 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
498 struct vf_cmd_info args;
499 struct i40e_virtchnl_vlan_offload_info offload;
501 offload.vsi_id = vf->vsi_res->vsi_id;
502 offload.enable_vlan_strip = enable_vlan_strip;
504 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
505 args.in_args = (uint8_t *)&offload;
506 args.in_args_size = sizeof(offload);
507 args.out_buffer = cmd_result_buffer;
508 args.out_size = I40E_AQ_BUF_SZ;
510 err = i40evf_execute_vf_cmd(dev, &args);
512 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
518 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
519 struct i40e_vsi_vlan_pvid_info *info)
521 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
523 struct vf_cmd_info args;
524 struct i40e_virtchnl_pvid_info tpid_info;
526 if (dev == NULL || info == NULL) {
527 PMD_DRV_LOG(ERR, "invalid parameters");
528 return I40E_ERR_PARAM;
531 memset(&tpid_info, 0, sizeof(tpid_info));
532 tpid_info.vsi_id = vf->vsi_res->vsi_id;
533 (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
535 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
536 args.in_args = (uint8_t *)&tpid_info;
537 args.in_args_size = sizeof(tpid_info);
538 args.out_buffer = cmd_result_buffer;
539 args.out_size = I40E_AQ_BUF_SZ;
541 err = i40evf_execute_vf_cmd(dev, &args);
543 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
549 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
553 struct i40e_tx_queue *txq)
555 txq_info->vsi_id = vsi_id;
556 txq_info->queue_id = queue_id;
557 if (queue_id < nb_txq) {
558 txq_info->ring_len = txq->nb_tx_desc;
559 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
564 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
568 uint32_t max_pkt_size,
569 struct i40e_rx_queue *rxq)
571 rxq_info->vsi_id = vsi_id;
572 rxq_info->queue_id = queue_id;
573 rxq_info->max_pkt_size = max_pkt_size;
574 if (queue_id < nb_rxq) {
575 struct rte_pktmbuf_pool_private *mbp_priv;
577 rxq_info->ring_len = rxq->nb_rx_desc;
578 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
579 mbp_priv = rte_mempool_get_priv(rxq->mp);
580 rxq_info->databuffer_size =
581 mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
585 /* It configures VSI queues to co-work with Linux PF host */
587 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
589 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
590 struct i40e_rx_queue **rxq =
591 (struct i40e_rx_queue **)dev->data->rx_queues;
592 struct i40e_tx_queue **txq =
593 (struct i40e_tx_queue **)dev->data->tx_queues;
594 struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
595 struct i40e_virtchnl_queue_pair_info *vc_qpi;
596 struct vf_cmd_info args;
597 uint16_t i, nb_qp = vf->num_queue_pairs;
598 const uint32_t size =
599 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
603 memset(buff, 0, sizeof(buff));
604 vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
605 vc_vqci->vsi_id = vf->vsi_res->vsi_id;
606 vc_vqci->num_queue_pairs = nb_qp;
608 for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
609 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
610 vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
611 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
612 vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
613 vf->max_pkt_len, rxq[i]);
615 memset(&args, 0, sizeof(args));
616 args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
617 args.in_args = (uint8_t *)vc_vqci;
618 args.in_args_size = size;
619 args.out_buffer = cmd_result_buffer;
620 args.out_size = I40E_AQ_BUF_SZ;
621 ret = i40evf_execute_vf_cmd(dev, &args);
623 PMD_DRV_LOG(ERR, "Failed to execute command of "
624 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
629 /* It configures VSI queues to co-work with DPDK PF host */
631 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
633 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
634 struct i40e_rx_queue **rxq =
635 (struct i40e_rx_queue **)dev->data->rx_queues;
636 struct i40e_tx_queue **txq =
637 (struct i40e_tx_queue **)dev->data->tx_queues;
638 struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
639 struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
640 struct vf_cmd_info args;
641 uint16_t i, nb_qp = vf->num_queue_pairs;
642 const uint32_t size =
643 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
647 memset(buff, 0, sizeof(buff));
648 vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
649 vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
650 vc_vqcei->num_queue_pairs = nb_qp;
651 vc_qpei = vc_vqcei->qpair;
652 for (i = 0; i < nb_qp; i++, vc_qpei++) {
653 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
654 vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
655 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
656 vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
657 vf->max_pkt_len, rxq[i]);
658 if (i < dev->data->nb_rx_queues)
660 * It adds extra info for configuring VSI queues, which
661 * is needed to enable the configurable crc stripping
664 vc_qpei->rxq_ext.crcstrip =
665 dev->data->dev_conf.rxmode.hw_strip_crc;
667 memset(&args, 0, sizeof(args));
669 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
670 args.in_args = (uint8_t *)vc_vqcei;
671 args.in_args_size = size;
672 args.out_buffer = cmd_result_buffer;
673 args.out_size = I40E_AQ_BUF_SZ;
674 ret = i40evf_execute_vf_cmd(dev, &args);
676 PMD_DRV_LOG(ERR, "Failed to execute command of "
677 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
683 i40evf_configure_queues(struct rte_eth_dev *dev)
685 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
687 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
688 /* To support DPDK PF host */
689 return i40evf_configure_vsi_queues_ext(dev);
691 /* To support Linux PF host */
692 return i40evf_configure_vsi_queues(dev);
696 i40evf_config_irq_map(struct rte_eth_dev *dev)
698 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
699 struct vf_cmd_info args;
700 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
701 sizeof(struct i40e_virtchnl_vector_map)];
702 struct i40e_virtchnl_irq_map_info *map_info;
704 map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
705 map_info->num_vectors = 1;
706 map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
707 map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
708 map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
709 /* Alway use default dynamic MSIX interrupt */
710 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
711 /* Don't map any tx queue */
712 map_info->vecmap[0].txq_map = 0;
713 map_info->vecmap[0].rxq_map = 0;
714 for (i = 0; i < dev->data->nb_rx_queues; i++)
715 map_info->vecmap[0].rxq_map |= 1 << i;
717 args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
718 args.in_args = (u8 *)cmd_buffer;
719 args.in_args_size = sizeof(cmd_buffer);
720 args.out_buffer = cmd_result_buffer;
721 args.out_size = I40E_AQ_BUF_SZ;
722 err = i40evf_execute_vf_cmd(dev, &args);
724 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
730 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
733 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
734 struct i40e_virtchnl_queue_select queue_select;
736 struct vf_cmd_info args;
737 memset(&queue_select, 0, sizeof(queue_select));
738 queue_select.vsi_id = vf->vsi_res->vsi_id;
741 queue_select.rx_queues |= 1 << qid;
743 queue_select.tx_queues |= 1 << qid;
746 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
748 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
749 args.in_args = (u8 *)&queue_select;
750 args.in_args_size = sizeof(queue_select);
751 args.out_buffer = cmd_result_buffer;
752 args.out_size = I40E_AQ_BUF_SZ;
753 err = i40evf_execute_vf_cmd(dev, &args);
755 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
756 isrx ? "RX" : "TX", qid, on ? "on" : "off");
762 i40evf_start_queues(struct rte_eth_dev *dev)
764 struct rte_eth_dev_data *dev_data = dev->data;
766 struct i40e_rx_queue *rxq;
767 struct i40e_tx_queue *txq;
769 for (i = 0; i < dev->data->nb_rx_queues; i++) {
770 rxq = dev_data->rx_queues[i];
771 if (rxq->rx_deferred_start)
773 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
774 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
779 for (i = 0; i < dev->data->nb_tx_queues; i++) {
780 txq = dev_data->tx_queues[i];
781 if (txq->tx_deferred_start)
783 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
784 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
793 i40evf_stop_queues(struct rte_eth_dev *dev)
797 /* Stop TX queues first */
798 for (i = 0; i < dev->data->nb_tx_queues; i++) {
799 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
800 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
805 /* Then stop RX queues */
806 for (i = 0; i < dev->data->nb_rx_queues; i++) {
807 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
808 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
817 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
819 struct i40e_virtchnl_ether_addr_list *list;
820 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
821 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
822 sizeof(struct i40e_virtchnl_ether_addr)];
824 struct vf_cmd_info args;
826 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
827 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
828 addr->addr_bytes[0], addr->addr_bytes[1],
829 addr->addr_bytes[2], addr->addr_bytes[3],
830 addr->addr_bytes[4], addr->addr_bytes[5]);
834 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
835 list->vsi_id = vf->vsi_res->vsi_id;
836 list->num_elements = 1;
837 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
838 sizeof(addr->addr_bytes));
840 args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
841 args.in_args = cmd_buffer;
842 args.in_args_size = sizeof(cmd_buffer);
843 args.out_buffer = cmd_result_buffer;
844 args.out_size = I40E_AQ_BUF_SZ;
845 err = i40evf_execute_vf_cmd(dev, &args);
847 PMD_DRV_LOG(ERR, "fail to execute command "
848 "OP_ADD_ETHER_ADDRESS");
854 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
856 struct i40e_virtchnl_ether_addr_list *list;
857 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
858 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
859 sizeof(struct i40e_virtchnl_ether_addr)];
861 struct vf_cmd_info args;
863 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
864 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
865 addr->addr_bytes[0], addr->addr_bytes[1],
866 addr->addr_bytes[2], addr->addr_bytes[3],
867 addr->addr_bytes[4], addr->addr_bytes[5]);
871 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
872 list->vsi_id = vf->vsi_res->vsi_id;
873 list->num_elements = 1;
874 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
875 sizeof(addr->addr_bytes));
877 args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
878 args.in_args = cmd_buffer;
879 args.in_args_size = sizeof(cmd_buffer);
880 args.out_buffer = cmd_result_buffer;
881 args.out_size = I40E_AQ_BUF_SZ;
882 err = i40evf_execute_vf_cmd(dev, &args);
884 PMD_DRV_LOG(ERR, "fail to execute command "
885 "OP_DEL_ETHER_ADDRESS");
891 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
893 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
894 struct i40e_virtchnl_queue_select q_stats;
895 struct i40e_eth_stats *pstats;
897 struct vf_cmd_info args;
899 memset(&q_stats, 0, sizeof(q_stats));
900 q_stats.vsi_id = vf->vsi_res->vsi_id;
901 args.ops = I40E_VIRTCHNL_OP_GET_STATS;
902 args.in_args = (u8 *)&q_stats;
903 args.in_args_size = sizeof(q_stats);
904 args.out_buffer = cmd_result_buffer;
905 args.out_size = I40E_AQ_BUF_SZ;
907 err = i40evf_execute_vf_cmd(dev, &args);
909 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
912 pstats = (struct i40e_eth_stats *)args.out_buffer;
913 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
914 pstats->rx_broadcast;
915 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
917 stats->ierrors = pstats->rx_discards;
918 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
919 stats->ibytes = pstats->rx_bytes;
920 stats->obytes = pstats->tx_bytes;
926 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
928 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
929 struct i40e_virtchnl_vlan_filter_list *vlan_list;
930 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
933 struct vf_cmd_info args;
935 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
936 vlan_list->vsi_id = vf->vsi_res->vsi_id;
937 vlan_list->num_elements = 1;
938 vlan_list->vlan_id[0] = vlanid;
940 args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
941 args.in_args = (u8 *)&cmd_buffer;
942 args.in_args_size = sizeof(cmd_buffer);
943 args.out_buffer = cmd_result_buffer;
944 args.out_size = I40E_AQ_BUF_SZ;
945 err = i40evf_execute_vf_cmd(dev, &args);
947 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
953 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
955 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
956 struct i40e_virtchnl_vlan_filter_list *vlan_list;
957 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
960 struct vf_cmd_info args;
962 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
963 vlan_list->vsi_id = vf->vsi_res->vsi_id;
964 vlan_list->num_elements = 1;
965 vlan_list->vlan_id[0] = vlanid;
967 args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
968 args.in_args = (u8 *)&cmd_buffer;
969 args.in_args_size = sizeof(cmd_buffer);
970 args.out_buffer = cmd_result_buffer;
971 args.out_size = I40E_AQ_BUF_SZ;
972 err = i40evf_execute_vf_cmd(dev, &args);
974 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
980 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
983 struct vf_cmd_info args;
984 struct rte_eth_link *new_link;
986 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
988 args.in_args_size = 0;
989 args.out_buffer = cmd_result_buffer;
990 args.out_size = I40E_AQ_BUF_SZ;
991 err = i40evf_execute_vf_cmd(dev, &args);
993 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
997 new_link = (struct rte_eth_link *)args.out_buffer;
998 (void)rte_memcpy(link, new_link, sizeof(*link));
1003 static struct rte_pci_id pci_id_i40evf_map[] = {
1004 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1005 #include "rte_pci_dev_ids.h"
1006 { .vendor_id = 0, /* sentinel */ },
1010 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1011 struct rte_eth_link *link)
1013 struct rte_eth_link *dst = &(dev->data->dev_link);
1014 struct rte_eth_link *src = link;
1016 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1017 *(uint64_t *)src) == 0)
1024 i40evf_reset_vf(struct i40e_hw *hw)
1028 if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1029 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1033 * After issuing vf reset command to pf, pf won't necessarily
1034 * reset vf, it depends on what state it exactly is. If it's not
1035 * initialized yet, it won't have vf reset since it's in a certain
1036 * state. If not, it will try to reset. Even vf is reset, pf will
1037 * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1038 * it to ACTIVE. In this duration, vf may not catch the moment that
1039 * COMPLETE is set. So, for vf, we'll try to wait a long time.
1043 for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1044 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1045 I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1046 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1047 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1053 if (i >= MAX_RESET_WAIT_CNT) {
1054 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1062 i40evf_init_vf(struct rte_eth_dev *dev)
1065 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1066 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1068 vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1069 vf->dev_data = dev->data;
1070 err = i40evf_set_mac_type(hw);
1072 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1076 i40e_init_adminq_parameter(hw);
1077 err = i40e_init_adminq(hw);
1079 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1084 /* Reset VF and wait until it's complete */
1085 if (i40evf_reset_vf(hw)) {
1086 PMD_INIT_LOG(ERR, "reset NIC failed");
1090 /* VF reset, shutdown admin queue and initialize again */
1091 if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1092 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1096 i40e_init_adminq_parameter(hw);
1097 if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1098 PMD_INIT_LOG(ERR, "init_adminq failed");
1101 if (i40evf_check_api_version(dev) != 0) {
1102 PMD_INIT_LOG(ERR, "check_api version failed");
1105 bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1106 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1107 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1109 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1113 if (i40evf_get_vf_resource(dev) != 0) {
1114 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1118 /* got VF config message back from PF, now we can parse it */
1119 for (i = 0; i < vf->vf_res->num_vsis; i++) {
1120 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1121 vf->vsi_res = &vf->vf_res->vsi_res[i];
1125 PMD_INIT_LOG(ERR, "no LAN VSI found");
1129 vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1130 vf->vsi.type = vf->vsi_res->vsi_type;
1131 vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1133 /* check mac addr, if it's not valid, genrate one */
1134 if (I40E_SUCCESS != i40e_validate_mac_addr(\
1135 vf->vsi_res->default_mac_addr))
1136 eth_random_addr(vf->vsi_res->default_mac_addr);
1138 ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1139 (struct ether_addr *)hw->mac.addr);
1144 rte_free(vf->vf_res);
1146 i40e_shutdown_adminq(hw); /* ignore error */
1152 i40evf_dev_init(__rte_unused struct eth_driver *eth_drv,
1153 struct rte_eth_dev *eth_dev)
1155 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1156 eth_dev->data->dev_private);
1158 PMD_INIT_FUNC_TRACE();
1160 /* assign ops func pointer */
1161 eth_dev->dev_ops = &i40evf_eth_dev_ops;
1162 eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1163 eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1166 * For secondary processes, we don't initialise any further as primary
1167 * has already done this work.
1169 if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1170 if (eth_dev->data->scattered_rx)
1171 eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1175 hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1176 hw->device_id = eth_dev->pci_dev->id.device_id;
1177 hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1178 hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1179 hw->bus.device = eth_dev->pci_dev->addr.devid;
1180 hw->bus.func = eth_dev->pci_dev->addr.function;
1181 hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1183 if(i40evf_init_vf(eth_dev) != 0) {
1184 PMD_INIT_LOG(ERR, "Init vf failed");
1189 eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1191 if (eth_dev->data->mac_addrs == NULL) {
1192 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1193 "store MAC addresses", ETHER_ADDR_LEN);
1196 ether_addr_copy((struct ether_addr *)hw->mac.addr,
1197 (struct ether_addr *)eth_dev->data->mac_addrs);
1203 * virtual function driver struct
1205 static struct eth_driver rte_i40evf_pmd = {
1207 .name = "rte_i40evf_pmd",
1208 .id_table = pci_id_i40evf_map,
1209 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1211 .eth_dev_init = i40evf_dev_init,
1212 .dev_private_size = sizeof(struct i40e_vf),
1216 * VF Driver initialization routine.
1217 * Invoked one at EAL init time.
1218 * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1221 rte_i40evf_pmd_init(const char *name __rte_unused,
1222 const char *params __rte_unused)
1224 PMD_INIT_FUNC_TRACE();
1226 rte_eth_driver_register(&rte_i40evf_pmd);
1231 static struct rte_driver rte_i40evf_driver = {
1233 .init = rte_i40evf_pmd_init,
1236 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1239 i40evf_dev_configure(struct rte_eth_dev *dev)
1241 return i40evf_init_vlan(dev);
1245 i40evf_init_vlan(struct rte_eth_dev *dev)
1247 struct rte_eth_dev_data *data = dev->data;
1250 /* Apply vlan offload setting */
1251 i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1253 /* Apply pvid setting */
1254 ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1255 data->dev_conf.txmode.hw_vlan_insert_pvid);
1260 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1262 bool enable_vlan_strip = 0;
1263 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1264 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1266 /* Linux pf host doesn't support vlan offload yet */
1267 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1268 /* Vlan stripping setting */
1269 if (mask & ETH_VLAN_STRIP_MASK) {
1270 /* Enable or disable VLAN stripping */
1271 if (dev_conf->rxmode.hw_vlan_strip)
1272 enable_vlan_strip = 1;
1274 enable_vlan_strip = 0;
1276 i40evf_config_vlan_offload(dev, enable_vlan_strip);
1282 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1284 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1285 struct i40e_vsi_vlan_pvid_info info;
1286 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1288 memset(&info, 0, sizeof(info));
1291 /* Linux pf host don't support vlan offload yet */
1292 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1294 info.config.pvid = pvid;
1296 info.config.reject.tagged =
1297 dev_conf->txmode.hw_vlan_reject_tagged;
1298 info.config.reject.untagged =
1299 dev_conf->txmode.hw_vlan_reject_untagged;
1301 return i40evf_config_vlan_pvid(dev, &info);
1308 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1310 struct i40e_rx_queue *rxq;
1312 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1314 PMD_INIT_FUNC_TRACE();
1316 if (rx_queue_id < dev->data->nb_rx_queues) {
1317 rxq = dev->data->rx_queues[rx_queue_id];
1319 err = i40e_alloc_rx_queue_mbufs(rxq);
1321 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1327 /* Init the RX tail register. */
1328 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1329 I40EVF_WRITE_FLUSH(hw);
1331 /* Ready to switch the queue on */
1332 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1335 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1343 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1345 struct i40e_rx_queue *rxq;
1348 if (rx_queue_id < dev->data->nb_rx_queues) {
1349 rxq = dev->data->rx_queues[rx_queue_id];
1351 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1354 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1359 i40e_rx_queue_release_mbufs(rxq);
1360 i40e_reset_rx_queue(rxq);
1367 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1371 PMD_INIT_FUNC_TRACE();
1373 if (tx_queue_id < dev->data->nb_tx_queues) {
1375 /* Ready to switch the queue on */
1376 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1379 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1387 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1389 struct i40e_tx_queue *txq;
1392 if (tx_queue_id < dev->data->nb_tx_queues) {
1393 txq = dev->data->tx_queues[tx_queue_id];
1395 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1398 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of",
1403 i40e_tx_queue_release_mbufs(txq);
1404 i40e_reset_tx_queue(txq);
1411 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1416 ret = i40evf_add_vlan(dev, vlan_id);
1418 ret = i40evf_del_vlan(dev,vlan_id);
1424 i40evf_rx_init(struct rte_eth_dev *dev)
1426 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1428 struct i40e_rx_queue **rxq =
1429 (struct i40e_rx_queue **)dev->data->rx_queues;
1430 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1432 i40evf_config_rss(vf);
1433 for (i = 0; i < dev->data->nb_rx_queues; i++) {
1434 rxq[i]->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(i);
1435 I40E_PCI_REG_WRITE(rxq[i]->qrx_tail, rxq[i]->nb_rx_desc - 1);
1438 /* Flush the operation to write registers */
1439 I40EVF_WRITE_FLUSH(hw);
1445 i40evf_tx_init(struct rte_eth_dev *dev)
1448 struct i40e_tx_queue **txq =
1449 (struct i40e_tx_queue **)dev->data->tx_queues;
1450 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1452 for (i = 0; i < dev->data->nb_tx_queues; i++)
1453 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1457 i40evf_enable_queues_intr(struct i40e_hw *hw)
1459 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1460 I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1461 I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1465 i40evf_disable_queues_intr(struct i40e_hw *hw)
1467 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1472 i40evf_dev_start(struct rte_eth_dev *dev)
1474 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1475 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1476 struct ether_addr mac_addr;
1478 PMD_INIT_FUNC_TRACE();
1480 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1481 if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
1482 if (vf->max_pkt_len <= ETHER_MAX_LEN ||
1483 vf->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1484 PMD_DRV_LOG(ERR, "maximum packet length must "
1485 "be larger than %u and smaller than %u,"
1486 "as jumbo frame is enabled",
1487 (uint32_t)ETHER_MAX_LEN,
1488 (uint32_t)I40E_FRAME_SIZE_MAX);
1489 return I40E_ERR_CONFIG;
1492 if (vf->max_pkt_len < ETHER_MIN_LEN ||
1493 vf->max_pkt_len > ETHER_MAX_LEN) {
1494 PMD_DRV_LOG(ERR, "maximum packet length must be "
1495 "larger than %u and smaller than %u, "
1496 "as jumbo frame is disabled",
1497 (uint32_t)ETHER_MIN_LEN,
1498 (uint32_t)ETHER_MAX_LEN);
1499 return I40E_ERR_CONFIG;
1503 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1504 dev->data->nb_tx_queues);
1506 if (i40evf_rx_init(dev) != 0){
1507 PMD_DRV_LOG(ERR, "failed to do RX init");
1511 i40evf_tx_init(dev);
1513 if (i40evf_configure_queues(dev) != 0) {
1514 PMD_DRV_LOG(ERR, "configure queues failed");
1517 if (i40evf_config_irq_map(dev)) {
1518 PMD_DRV_LOG(ERR, "config_irq_map failed");
1523 (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1524 sizeof(mac_addr.addr_bytes));
1525 if (i40evf_add_mac_addr(dev, &mac_addr)) {
1526 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1530 if (i40evf_start_queues(dev) != 0) {
1531 PMD_DRV_LOG(ERR, "enable queues failed");
1535 i40evf_enable_queues_intr(hw);
1539 i40evf_del_mac_addr(dev, &mac_addr);
1545 i40evf_dev_stop(struct rte_eth_dev *dev)
1547 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1549 PMD_INIT_FUNC_TRACE();
1551 i40evf_disable_queues_intr(hw);
1552 i40evf_stop_queues(dev);
1556 i40evf_dev_link_update(struct rte_eth_dev *dev,
1557 __rte_unused int wait_to_complete)
1559 struct rte_eth_link new_link;
1560 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1562 * DPDK pf host provide interfacet to acquire link status
1563 * while Linux driver does not
1565 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1566 i40evf_get_link_status(dev, &new_link);
1568 /* Always assume it's up, for Linux driver PF host */
1569 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1570 new_link.link_speed = ETH_LINK_SPEED_10000;
1571 new_link.link_status = 1;
1573 i40evf_dev_atomic_write_link_status(dev, &new_link);
1579 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1581 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1584 /* If enabled, just return */
1585 if (vf->promisc_unicast_enabled)
1588 ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1590 vf->promisc_unicast_enabled = TRUE;
1594 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1596 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1599 /* If disabled, just return */
1600 if (!vf->promisc_unicast_enabled)
1603 ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1605 vf->promisc_unicast_enabled = FALSE;
1609 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1611 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1614 /* If enabled, just return */
1615 if (vf->promisc_multicast_enabled)
1618 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1620 vf->promisc_multicast_enabled = TRUE;
1624 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1626 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1629 /* If enabled, just return */
1630 if (!vf->promisc_multicast_enabled)
1633 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1635 vf->promisc_multicast_enabled = FALSE;
1639 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1641 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1643 memset(dev_info, 0, sizeof(*dev_info));
1644 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1645 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1646 dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1647 dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1648 dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1650 dev_info->default_rxconf = (struct rte_eth_rxconf) {
1652 .pthresh = I40E_DEFAULT_RX_PTHRESH,
1653 .hthresh = I40E_DEFAULT_RX_HTHRESH,
1654 .wthresh = I40E_DEFAULT_RX_WTHRESH,
1656 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1660 dev_info->default_txconf = (struct rte_eth_txconf) {
1662 .pthresh = I40E_DEFAULT_TX_PTHRESH,
1663 .hthresh = I40E_DEFAULT_TX_HTHRESH,
1664 .wthresh = I40E_DEFAULT_TX_WTHRESH,
1666 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1667 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1668 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1669 ETH_TXQ_FLAGS_NOOFFLOADS,
1674 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1676 memset(stats, 0, sizeof(*stats));
1677 if (i40evf_get_statics(dev, stats))
1678 PMD_DRV_LOG(ERR, "Get statics failed");
1682 i40evf_dev_close(struct rte_eth_dev *dev)
1684 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1686 i40evf_dev_stop(dev);
1687 i40evf_reset_vf(hw);
1688 i40e_shutdown_adminq(hw);
1692 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1693 struct rte_eth_rss_reta_entry64 *reta_conf,
1696 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1699 uint16_t idx, shift;
1702 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1703 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1704 "(%d) doesn't match the number of hardware can "
1705 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1709 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1710 idx = i / RTE_RETA_GROUP_SIZE;
1711 shift = i % RTE_RETA_GROUP_SIZE;
1712 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1716 if (mask == I40E_4_BIT_MASK)
1719 l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1721 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1722 if (mask & (0x1 << j))
1723 lut |= reta_conf[idx].reta[shift + j] <<
1726 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1728 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1735 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1736 struct rte_eth_rss_reta_entry64 *reta_conf,
1739 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1742 uint16_t idx, shift;
1745 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1746 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1747 "(%d) doesn't match the number of hardware can "
1748 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1752 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1753 idx = i / RTE_RETA_GROUP_SIZE;
1754 shift = i % RTE_RETA_GROUP_SIZE;
1755 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1760 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1761 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1762 if (mask & (0x1 << j))
1763 reta_conf[idx].reta[shift] =
1764 ((lut >> (CHAR_BIT * j)) &
1773 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1776 uint8_t hash_key_len;
1777 uint64_t rss_hf, hena;
1779 hash_key = (uint32_t *)(rss_conf->rss_key);
1780 hash_key_len = rss_conf->rss_key_len;
1781 if (hash_key != NULL && hash_key_len >=
1782 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1785 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1786 I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1789 rss_hf = rss_conf->rss_hf;
1790 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1791 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1792 hena &= ~I40E_RSS_HENA_ALL;
1793 hena |= i40e_config_hena(rss_hf);
1794 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1795 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1796 I40EVF_WRITE_FLUSH(hw);
1802 i40evf_disable_rss(struct i40e_vf *vf)
1804 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1807 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1808 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1809 hena &= ~I40E_RSS_HENA_ALL;
1810 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1811 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1812 I40EVF_WRITE_FLUSH(hw);
1816 i40evf_config_rss(struct i40e_vf *vf)
1818 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1819 struct rte_eth_rss_conf rss_conf;
1820 uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1822 if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1823 i40evf_disable_rss(vf);
1824 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1828 /* Fill out the look up table */
1829 for (i = 0, j = 0; i < nb_q; i++, j++) {
1830 if (j >= vf->num_queue_pairs)
1832 lut = (lut << 8) | j;
1834 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1837 rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1838 if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1839 i40evf_disable_rss(vf);
1840 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1844 if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1845 /* Calculate the default hash key */
1846 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1847 rss_key_default[i] = (uint32_t)rte_rand();
1848 rss_conf.rss_key = (uint8_t *)rss_key_default;
1849 rss_conf.rss_key_len = nb_q;
1852 return i40evf_hw_rss_hash_set(hw, &rss_conf);
1856 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1857 struct rte_eth_rss_conf *rss_conf)
1859 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1860 uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1863 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1864 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1865 if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1866 if (rss_hf != 0) /* Enable RSS */
1872 if (rss_hf == 0) /* Disable RSS */
1875 return i40evf_hw_rss_hash_set(hw, rss_conf);
1879 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1880 struct rte_eth_rss_conf *rss_conf)
1882 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1883 uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
1888 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1889 hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
1890 rss_conf->rss_key_len = i * sizeof(uint32_t);
1892 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1893 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1894 rss_conf->rss_hf = i40e_parse_hena(hena);