4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/queue.h>
42 #include <rte_byteorder.h>
43 #include <rte_common.h>
44 #include <rte_cycles.h>
46 #include <rte_interrupts.h>
48 #include <rte_debug.h>
50 #include <rte_atomic.h>
51 #include <rte_branch_prediction.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
54 #include <rte_tailq.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_malloc.h>
63 #include "i40e_logs.h"
64 #include "i40e/i40e_prototype.h"
65 #include "i40e/i40e_adminq_cmd.h"
66 #include "i40e/i40e_type.h"
68 #include "i40e_rxtx.h"
69 #include "i40e_ethdev.h"
71 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
73 /* busy wait delay in msec */
74 #define I40EVF_BUSY_WAIT_DELAY 10
75 #define I40EVF_BUSY_WAIT_COUNT 50
76 #define MAX_RESET_WAIT_CNT 20
78 struct i40evf_arq_msg_info {
79 enum i40e_virtchnl_ops ops;
80 enum i40e_status_code result;
87 enum i40e_virtchnl_ops ops;
89 uint32_t in_args_size;
91 /* Input & output type. pass in buffer size and pass out
92 * actual return result
97 enum i40evf_aq_result {
98 I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
99 I40EVF_MSG_NON, /* Read nothing from admin queue */
100 I40EVF_MSG_SYS, /* Read system msg from admin queue */
101 I40EVF_MSG_CMD, /* Read async command result */
104 /* A share buffer to store the command result from PF driver */
105 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
107 static int i40evf_dev_configure(struct rte_eth_dev *dev);
108 static int i40evf_dev_start(struct rte_eth_dev *dev);
109 static void i40evf_dev_stop(struct rte_eth_dev *dev);
110 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
111 struct rte_eth_dev_info *dev_info);
112 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
113 __rte_unused int wait_to_complete);
114 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
115 struct rte_eth_stats *stats);
116 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
117 uint16_t vlan_id, int on);
118 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
119 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
121 static void i40evf_dev_close(struct rte_eth_dev *dev);
122 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
123 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
124 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
125 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
126 static int i40evf_get_link_status(struct rte_eth_dev *dev,
127 struct rte_eth_link *link);
128 static int i40evf_init_vlan(struct rte_eth_dev *dev);
129 static int i40evf_config_rss(struct i40e_vf *vf);
130 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
131 struct rte_eth_rss_conf *rss_conf);
132 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
133 struct rte_eth_rss_conf *rss_conf);
134 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *, uint16_t);
135 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *, uint16_t);
136 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *, uint16_t);
137 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *, uint16_t);
139 /* Default hash key buffer for RSS */
140 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
142 static struct eth_dev_ops i40evf_eth_dev_ops = {
143 .dev_configure = i40evf_dev_configure,
144 .dev_start = i40evf_dev_start,
145 .dev_stop = i40evf_dev_stop,
146 .promiscuous_enable = i40evf_dev_promiscuous_enable,
147 .promiscuous_disable = i40evf_dev_promiscuous_disable,
148 .allmulticast_enable = i40evf_dev_allmulticast_enable,
149 .allmulticast_disable = i40evf_dev_allmulticast_disable,
150 .link_update = i40evf_dev_link_update,
151 .stats_get = i40evf_dev_stats_get,
152 .dev_close = i40evf_dev_close,
153 .dev_infos_get = i40evf_dev_info_get,
154 .vlan_filter_set = i40evf_vlan_filter_set,
155 .vlan_offload_set = i40evf_vlan_offload_set,
156 .vlan_pvid_set = i40evf_vlan_pvid_set,
157 .rx_queue_start = i40evf_dev_rx_queue_start,
158 .rx_queue_stop = i40evf_dev_rx_queue_stop,
159 .tx_queue_start = i40evf_dev_tx_queue_start,
160 .tx_queue_stop = i40evf_dev_tx_queue_stop,
161 .rx_queue_setup = i40e_dev_rx_queue_setup,
162 .rx_queue_release = i40e_dev_rx_queue_release,
163 .tx_queue_setup = i40e_dev_tx_queue_setup,
164 .tx_queue_release = i40e_dev_tx_queue_release,
165 .rss_hash_update = i40evf_dev_rss_hash_update,
166 .rss_hash_conf_get = i40evf_dev_rss_hash_conf_get,
170 i40evf_set_mac_type(struct i40e_hw *hw)
172 int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
174 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
175 switch (hw->device_id) {
177 case I40E_DEV_ID_VF_HV:
178 hw->mac.type = I40E_MAC_VF;
179 status = I40E_SUCCESS;
190 * Parse admin queue message.
195 * > 0: read cmd result
197 static enum i40evf_aq_result
198 i40evf_parse_pfmsg(struct i40e_vf *vf,
199 struct i40e_arq_event_info *event,
200 struct i40evf_arq_msg_info *data)
202 enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
203 rte_le_to_cpu_32(event->desc.cookie_high);
204 enum i40e_status_code retval = (enum i40e_status_code)\
205 rte_le_to_cpu_32(event->desc.cookie_low);
206 enum i40evf_aq_result ret = I40EVF_MSG_CMD;
209 if (opcode == I40E_VIRTCHNL_OP_EVENT) {
210 struct i40e_virtchnl_pf_event *vpe =
211 (struct i40e_virtchnl_pf_event *)event->msg_buf;
213 /* Initialize ret to sys event */
214 ret = I40EVF_MSG_SYS;
215 switch (vpe->event) {
216 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
218 vpe->event_data.link_event.link_status;
219 vf->pend_msg |= PFMSG_LINK_CHANGE;
220 PMD_DRV_LOG(INFO, "Link status update:%s",
221 vf->link_up ? "up" : "down");
223 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
225 vf->pend_msg |= PFMSG_RESET_IMPENDING;
226 PMD_DRV_LOG(INFO, "vf is reseting");
228 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
229 vf->dev_closed = true;
230 vf->pend_msg |= PFMSG_DRIVER_CLOSE;
231 PMD_DRV_LOG(INFO, "PF driver closed");
234 PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
235 __func__, vpe->event);
238 /* async reply msg on command issued by vf previously */
239 ret = I40EVF_MSG_CMD;
240 /* Actual data length read from PF */
241 data->msg_len = event->msg_len;
243 /* fill the ops and result to notify VF */
244 data->result = retval;
251 * Read data in admin queue to get msg from pf driver
253 static enum i40evf_aq_result
254 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
256 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
257 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
258 struct i40e_arq_event_info event;
260 enum i40evf_aq_result result = I40EVF_MSG_NON;
262 event.buf_len = data->buf_len;
263 event.msg_buf = data->msg;
264 ret = i40e_clean_arq_element(hw, &event, NULL);
265 /* Can't read any msg from adminQ */
267 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
268 result = I40EVF_MSG_NON;
270 result = I40EVF_MSG_ERR;
274 /* Parse the event */
275 result = i40evf_parse_pfmsg(vf, &event, data);
281 * Polling read until command result return from pf driver or meet error.
284 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
285 struct i40evf_arq_msg_info *data)
288 enum i40evf_aq_result ret;
290 #define MAX_TRY_TIMES 10
291 #define ASQ_DELAY_MS 50
293 /* Delay some time first */
294 rte_delay_ms(ASQ_DELAY_MS);
295 ret = i40evf_read_pfmsg(dev, data);
296 if (ret == I40EVF_MSG_CMD)
298 else if (ret == I40EVF_MSG_ERR)
301 /* If don't read msg or read sys event, continue */
302 } while(i++ < MAX_TRY_TIMES);
308 * clear current command. Only call in case execute
309 * _atomic_set_cmd successfully.
312 _clear_cmd(struct i40e_vf *vf)
315 vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
319 * Check there is pending cmd in execution. If none, set new command.
322 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
324 int ret = rte_atomic32_cmpset(&vf->pend_cmd,
325 I40E_VIRTCHNL_OP_UNKNOWN, ops);
328 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
334 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
336 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
337 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
339 struct i40evf_arq_msg_info info;
341 if (_atomic_set_cmd(vf, args->ops))
344 info.msg = args->out_buffer;
345 info.buf_len = args->out_size;
346 info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
347 info.result = I40E_SUCCESS;
349 err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
350 args->in_args, args->in_args_size, NULL);
352 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
356 err = i40evf_wait_cmd_done(dev, &info);
357 /* read message and it's expected one */
358 if (!err && args->ops == info.ops)
361 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
362 else if (args->ops != info.ops)
363 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
364 args->ops, info.ops);
366 return (err | info.result);
370 * Check API version with sync wait until version read or fail from admin queue
373 i40evf_check_api_version(struct rte_eth_dev *dev)
375 struct i40e_virtchnl_version_info version, *pver;
377 struct vf_cmd_info args;
378 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
380 version.major = I40E_VIRTCHNL_VERSION_MAJOR;
381 version.minor = I40E_VIRTCHNL_VERSION_MINOR;
383 args.ops = I40E_VIRTCHNL_OP_VERSION;
384 args.in_args = (uint8_t *)&version;
385 args.in_args_size = sizeof(version);
386 args.out_buffer = cmd_result_buffer;
387 args.out_size = I40E_AQ_BUF_SZ;
389 err = i40evf_execute_vf_cmd(dev, &args);
391 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
395 pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
396 /* We are talking with DPDK host */
397 if (pver->major == I40E_DPDK_VERSION_MAJOR) {
398 vf->host_is_dpdk = TRUE;
399 PMD_DRV_LOG(INFO, "Detect PF host is DPDK app");
401 /* It's linux host driver */
402 else if ((pver->major != version.major) ||
403 (pver->minor != version.minor)) {
404 PMD_INIT_LOG(ERR, "pf/vf API version mismatch. "
405 "(%u.%u)-(%u.%u)", pver->major, pver->minor,
406 version.major, version.minor);
414 i40evf_get_vf_resource(struct rte_eth_dev *dev)
416 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
417 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
419 struct vf_cmd_info args;
422 args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
424 args.in_args_size = 0;
425 args.out_buffer = cmd_result_buffer;
426 args.out_size = I40E_AQ_BUF_SZ;
428 err = i40evf_execute_vf_cmd(dev, &args);
431 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
435 len = sizeof(struct i40e_virtchnl_vf_resource) +
436 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
438 (void)rte_memcpy(vf->vf_res, args.out_buffer,
439 RTE_MIN(args.out_size, len));
440 i40e_vf_parse_hw_config(hw, vf->vf_res);
446 i40evf_config_promisc(struct rte_eth_dev *dev,
448 bool enable_multicast)
450 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
452 struct vf_cmd_info args;
453 struct i40e_virtchnl_promisc_info promisc;
456 promisc.vsi_id = vf->vsi_res->vsi_id;
459 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
461 if (enable_multicast)
462 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
464 args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
465 args.in_args = (uint8_t *)&promisc;
466 args.in_args_size = sizeof(promisc);
467 args.out_buffer = cmd_result_buffer;
468 args.out_size = I40E_AQ_BUF_SZ;
470 err = i40evf_execute_vf_cmd(dev, &args);
473 PMD_DRV_LOG(ERR, "fail to execute command "
474 "CONFIG_PROMISCUOUS_MODE");
478 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
480 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
481 bool enable_vlan_strip)
483 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
485 struct vf_cmd_info args;
486 struct i40e_virtchnl_vlan_offload_info offload;
488 offload.vsi_id = vf->vsi_res->vsi_id;
489 offload.enable_vlan_strip = enable_vlan_strip;
491 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
492 args.in_args = (uint8_t *)&offload;
493 args.in_args_size = sizeof(offload);
494 args.out_buffer = cmd_result_buffer;
495 args.out_size = I40E_AQ_BUF_SZ;
497 err = i40evf_execute_vf_cmd(dev, &args);
499 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
505 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
506 struct i40e_vsi_vlan_pvid_info *info)
508 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
510 struct vf_cmd_info args;
511 struct i40e_virtchnl_pvid_info tpid_info;
513 if (dev == NULL || info == NULL) {
514 PMD_DRV_LOG(ERR, "invalid parameters");
515 return I40E_ERR_PARAM;
518 memset(&tpid_info, 0, sizeof(tpid_info));
519 tpid_info.vsi_id = vf->vsi_res->vsi_id;
520 (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
522 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
523 args.in_args = (uint8_t *)&tpid_info;
524 args.in_args_size = sizeof(tpid_info);
525 args.out_buffer = cmd_result_buffer;
526 args.out_size = I40E_AQ_BUF_SZ;
528 err = i40evf_execute_vf_cmd(dev, &args);
530 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
536 i40evf_configure_queues(struct rte_eth_dev *dev)
538 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
539 struct i40e_virtchnl_vsi_queue_config_info *queue_info;
540 struct i40e_virtchnl_queue_pair_info *queue_cfg;
541 struct i40e_rx_queue **rxq =
542 (struct i40e_rx_queue **)dev->data->rx_queues;
543 struct i40e_tx_queue **txq =
544 (struct i40e_tx_queue **)dev->data->tx_queues;
545 int i, len, nb_qpairs, num_rxq, num_txq;
547 struct vf_cmd_info args;
548 struct rte_pktmbuf_pool_private *mbp_priv;
550 nb_qpairs = vf->num_queue_pairs;
551 len = sizeof(*queue_info) + sizeof(*queue_cfg) * nb_qpairs;
552 queue_info = rte_zmalloc("queue_info", len, 0);
553 if (queue_info == NULL) {
554 PMD_INIT_LOG(ERR, "failed alloc memory for queue_info");
557 queue_info->vsi_id = vf->vsi_res->vsi_id;
558 queue_info->num_queue_pairs = nb_qpairs;
559 queue_cfg = queue_info->qpair;
561 num_rxq = dev->data->nb_rx_queues;
562 num_txq = dev->data->nb_tx_queues;
564 * PF host driver required to configure queues in pairs, which means
565 * rxq_num should equals to txq_num. The actual usage won't always
566 * work that way. The solution is fills 0 with HW ring option in case
567 * they are not equal.
569 for (i = 0; i < nb_qpairs; i++) {
571 queue_cfg->txq.vsi_id = queue_info->vsi_id;
572 queue_cfg->txq.queue_id = i;
574 queue_cfg->txq.ring_len = txq[i]->nb_tx_desc;
575 queue_cfg->txq.dma_ring_addr = txq[i]->tx_ring_phys_addr;
577 queue_cfg->txq.ring_len = 0;
578 queue_cfg->txq.dma_ring_addr = 0;
582 queue_cfg->rxq.vsi_id = queue_info->vsi_id;
583 queue_cfg->rxq.queue_id = i;
584 queue_cfg->rxq.max_pkt_size = vf->max_pkt_len;
586 mbp_priv = rte_mempool_get_priv(rxq[i]->mp);
587 queue_cfg->rxq.databuffer_size = mbp_priv->mbuf_data_room_size -
588 RTE_PKTMBUF_HEADROOM;;
589 queue_cfg->rxq.ring_len = rxq[i]->nb_rx_desc;
590 queue_cfg->rxq.dma_ring_addr = rxq[i]->rx_ring_phys_addr;;
592 queue_cfg->rxq.ring_len = 0;
593 queue_cfg->rxq.dma_ring_addr = 0;
594 queue_cfg->rxq.databuffer_size = 0;
599 args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
600 args.in_args = (u8 *)queue_info;
601 args.in_args_size = len;
602 args.out_buffer = cmd_result_buffer;
603 args.out_size = I40E_AQ_BUF_SZ;
604 err = i40evf_execute_vf_cmd(dev, &args);
606 PMD_DRV_LOG(ERR, "fail to execute command "
607 "OP_CONFIG_VSI_QUEUES");
608 rte_free(queue_info);
614 i40evf_config_irq_map(struct rte_eth_dev *dev)
616 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
617 struct vf_cmd_info args;
618 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
619 sizeof(struct i40e_virtchnl_vector_map)];
620 struct i40e_virtchnl_irq_map_info *map_info;
622 map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
623 map_info->num_vectors = 1;
624 map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
625 map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
626 map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
627 /* Alway use default dynamic MSIX interrupt */
628 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
629 /* Don't map any tx queue */
630 map_info->vecmap[0].txq_map = 0;
631 map_info->vecmap[0].rxq_map = 0;
632 for (i = 0; i < dev->data->nb_rx_queues; i++)
633 map_info->vecmap[0].rxq_map |= 1 << i;
635 args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
636 args.in_args = (u8 *)cmd_buffer;
637 args.in_args_size = sizeof(cmd_buffer);
638 args.out_buffer = cmd_result_buffer;
639 args.out_size = I40E_AQ_BUF_SZ;
640 err = i40evf_execute_vf_cmd(dev, &args);
642 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
648 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
651 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
652 struct i40e_virtchnl_queue_select queue_select;
654 struct vf_cmd_info args;
655 memset(&queue_select, 0, sizeof(queue_select));
656 queue_select.vsi_id = vf->vsi_res->vsi_id;
659 queue_select.rx_queues |= 1 << qid;
661 queue_select.tx_queues |= 1 << qid;
664 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
666 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
667 args.in_args = (u8 *)&queue_select;
668 args.in_args_size = sizeof(queue_select);
669 args.out_buffer = cmd_result_buffer;
670 args.out_size = I40E_AQ_BUF_SZ;
671 err = i40evf_execute_vf_cmd(dev, &args);
673 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
674 isrx ? "RX" : "TX", qid, on ? "on" : "off");
680 i40evf_start_queues(struct rte_eth_dev *dev)
682 struct rte_eth_dev_data *dev_data = dev->data;
684 struct i40e_rx_queue *rxq;
685 struct i40e_tx_queue *txq;
687 for (i = 0; i < dev->data->nb_rx_queues; i++) {
688 rxq = dev_data->rx_queues[i];
689 if (rxq->rx_deferred_start)
691 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
692 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
697 for (i = 0; i < dev->data->nb_tx_queues; i++) {
698 txq = dev_data->tx_queues[i];
699 if (txq->tx_deferred_start)
701 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
702 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
711 i40evf_stop_queues(struct rte_eth_dev *dev)
715 /* Stop TX queues first */
716 for (i = 0; i < dev->data->nb_tx_queues; i++) {
717 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
718 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
723 /* Then stop RX queues */
724 for (i = 0; i < dev->data->nb_rx_queues; i++) {
725 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
726 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
735 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
737 struct i40e_virtchnl_ether_addr_list *list;
738 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
739 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
740 sizeof(struct i40e_virtchnl_ether_addr)];
742 struct vf_cmd_info args;
744 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
745 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
746 addr->addr_bytes[0], addr->addr_bytes[1],
747 addr->addr_bytes[2], addr->addr_bytes[3],
748 addr->addr_bytes[4], addr->addr_bytes[5]);
752 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
753 list->vsi_id = vf->vsi_res->vsi_id;
754 list->num_elements = 1;
755 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
756 sizeof(addr->addr_bytes));
758 args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
759 args.in_args = cmd_buffer;
760 args.in_args_size = sizeof(cmd_buffer);
761 args.out_buffer = cmd_result_buffer;
762 args.out_size = I40E_AQ_BUF_SZ;
763 err = i40evf_execute_vf_cmd(dev, &args);
765 PMD_DRV_LOG(ERR, "fail to execute command "
766 "OP_ADD_ETHER_ADDRESS");
772 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
774 struct i40e_virtchnl_ether_addr_list *list;
775 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
776 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
777 sizeof(struct i40e_virtchnl_ether_addr)];
779 struct vf_cmd_info args;
781 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
782 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
783 addr->addr_bytes[0], addr->addr_bytes[1],
784 addr->addr_bytes[2], addr->addr_bytes[3],
785 addr->addr_bytes[4], addr->addr_bytes[5]);
789 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
790 list->vsi_id = vf->vsi_res->vsi_id;
791 list->num_elements = 1;
792 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
793 sizeof(addr->addr_bytes));
795 args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
796 args.in_args = cmd_buffer;
797 args.in_args_size = sizeof(cmd_buffer);
798 args.out_buffer = cmd_result_buffer;
799 args.out_size = I40E_AQ_BUF_SZ;
800 err = i40evf_execute_vf_cmd(dev, &args);
802 PMD_DRV_LOG(ERR, "fail to execute command "
803 "OP_DEL_ETHER_ADDRESS");
809 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
811 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
812 struct i40e_virtchnl_queue_select q_stats;
813 struct i40e_eth_stats *pstats;
815 struct vf_cmd_info args;
817 memset(&q_stats, 0, sizeof(q_stats));
818 q_stats.vsi_id = vf->vsi_res->vsi_id;
819 args.ops = I40E_VIRTCHNL_OP_GET_STATS;
820 args.in_args = (u8 *)&q_stats;
821 args.in_args_size = sizeof(q_stats);
822 args.out_buffer = cmd_result_buffer;
823 args.out_size = I40E_AQ_BUF_SZ;
825 err = i40evf_execute_vf_cmd(dev, &args);
827 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
830 pstats = (struct i40e_eth_stats *)args.out_buffer;
831 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
832 pstats->rx_broadcast;
833 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
835 stats->ierrors = pstats->rx_discards;
836 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
837 stats->ibytes = pstats->rx_bytes;
838 stats->obytes = pstats->tx_bytes;
844 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
846 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
847 struct i40e_virtchnl_vlan_filter_list *vlan_list;
848 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
851 struct vf_cmd_info args;
853 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
854 vlan_list->vsi_id = vf->vsi_res->vsi_id;
855 vlan_list->num_elements = 1;
856 vlan_list->vlan_id[0] = vlanid;
858 args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
859 args.in_args = (u8 *)&cmd_buffer;
860 args.in_args_size = sizeof(cmd_buffer);
861 args.out_buffer = cmd_result_buffer;
862 args.out_size = I40E_AQ_BUF_SZ;
863 err = i40evf_execute_vf_cmd(dev, &args);
865 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
871 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
873 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
874 struct i40e_virtchnl_vlan_filter_list *vlan_list;
875 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
878 struct vf_cmd_info args;
880 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
881 vlan_list->vsi_id = vf->vsi_res->vsi_id;
882 vlan_list->num_elements = 1;
883 vlan_list->vlan_id[0] = vlanid;
885 args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
886 args.in_args = (u8 *)&cmd_buffer;
887 args.in_args_size = sizeof(cmd_buffer);
888 args.out_buffer = cmd_result_buffer;
889 args.out_size = I40E_AQ_BUF_SZ;
890 err = i40evf_execute_vf_cmd(dev, &args);
892 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
898 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
901 struct vf_cmd_info args;
902 struct rte_eth_link *new_link;
904 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
906 args.in_args_size = 0;
907 args.out_buffer = cmd_result_buffer;
908 args.out_size = I40E_AQ_BUF_SZ;
909 err = i40evf_execute_vf_cmd(dev, &args);
911 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
915 new_link = (struct rte_eth_link *)args.out_buffer;
916 (void)rte_memcpy(link, new_link, sizeof(*link));
921 static struct rte_pci_id pci_id_i40evf_map[] = {
922 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
923 #include "rte_pci_dev_ids.h"
924 { .vendor_id = 0, /* sentinel */ },
928 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
929 struct rte_eth_link *link)
931 struct rte_eth_link *dst = &(dev->data->dev_link);
932 struct rte_eth_link *src = link;
934 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
935 *(uint64_t *)src) == 0)
942 i40evf_reset_vf(struct i40e_hw *hw)
946 if (i40e_vf_reset(hw) != I40E_SUCCESS) {
947 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
951 * After issuing vf reset command to pf, pf won't necessarily
952 * reset vf, it depends on what state it exactly is. If it's not
953 * initialized yet, it won't have vf reset since it's in a certain
954 * state. If not, it will try to reset. Even vf is reset, pf will
955 * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
956 * it to ACTIVE. In this duration, vf may not catch the moment that
957 * COMPLETE is set. So, for vf, we'll try to wait a long time.
961 for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
962 reset = rd32(hw, I40E_VFGEN_RSTAT) &
963 I40E_VFGEN_RSTAT_VFR_STATE_MASK;
964 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
965 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
971 if (i >= MAX_RESET_WAIT_CNT) {
972 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
980 i40evf_init_vf(struct rte_eth_dev *dev)
983 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
984 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
986 vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
987 vf->dev_data = dev->data;
988 err = i40evf_set_mac_type(hw);
990 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
994 i40e_init_adminq_parameter(hw);
995 err = i40e_init_adminq(hw);
997 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1002 /* Reset VF and wait until it's complete */
1003 if (i40evf_reset_vf(hw)) {
1004 PMD_INIT_LOG(ERR, "reset NIC failed");
1008 /* VF reset, shutdown admin queue and initialize again */
1009 if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1010 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1014 i40e_init_adminq_parameter(hw);
1015 if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1016 PMD_INIT_LOG(ERR, "init_adminq failed");
1019 if (i40evf_check_api_version(dev) != 0) {
1020 PMD_INIT_LOG(ERR, "check_api version failed");
1023 bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1024 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1025 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1027 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1031 if (i40evf_get_vf_resource(dev) != 0) {
1032 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1036 /* got VF config message back from PF, now we can parse it */
1037 for (i = 0; i < vf->vf_res->num_vsis; i++) {
1038 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1039 vf->vsi_res = &vf->vf_res->vsi_res[i];
1043 PMD_INIT_LOG(ERR, "no LAN VSI found");
1047 vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1048 vf->vsi.type = vf->vsi_res->vsi_type;
1049 vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1051 /* check mac addr, if it's not valid, genrate one */
1052 if (I40E_SUCCESS != i40e_validate_mac_addr(\
1053 vf->vsi_res->default_mac_addr))
1054 eth_random_addr(vf->vsi_res->default_mac_addr);
1056 ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1057 (struct ether_addr *)hw->mac.addr);
1062 rte_free(vf->vf_res);
1064 i40e_shutdown_adminq(hw); /* ignore error */
1070 i40evf_dev_init(__rte_unused struct eth_driver *eth_drv,
1071 struct rte_eth_dev *eth_dev)
1073 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1074 eth_dev->data->dev_private);
1076 PMD_INIT_FUNC_TRACE();
1078 /* assign ops func pointer */
1079 eth_dev->dev_ops = &i40evf_eth_dev_ops;
1080 eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1081 eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1084 * For secondary processes, we don't initialise any further as primary
1085 * has already done this work.
1087 if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1088 if (eth_dev->data->scattered_rx)
1089 eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1093 hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1094 hw->device_id = eth_dev->pci_dev->id.device_id;
1095 hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1096 hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1097 hw->bus.device = eth_dev->pci_dev->addr.devid;
1098 hw->bus.func = eth_dev->pci_dev->addr.function;
1099 hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1101 if(i40evf_init_vf(eth_dev) != 0) {
1102 PMD_INIT_LOG(ERR, "Init vf failed");
1107 eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1109 if (eth_dev->data->mac_addrs == NULL) {
1110 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1111 "store MAC addresses", ETHER_ADDR_LEN);
1114 ether_addr_copy((struct ether_addr *)hw->mac.addr,
1115 (struct ether_addr *)eth_dev->data->mac_addrs);
1121 * virtual function driver struct
1123 static struct eth_driver rte_i40evf_pmd = {
1125 .name = "rte_i40evf_pmd",
1126 .id_table = pci_id_i40evf_map,
1127 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1129 .eth_dev_init = i40evf_dev_init,
1130 .dev_private_size = sizeof(struct i40e_vf),
1134 * VF Driver initialization routine.
1135 * Invoked one at EAL init time.
1136 * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1139 rte_i40evf_pmd_init(const char *name __rte_unused,
1140 const char *params __rte_unused)
1142 PMD_INIT_FUNC_TRACE();
1144 rte_eth_driver_register(&rte_i40evf_pmd);
1149 static struct rte_driver rte_i40evf_driver = {
1151 .init = rte_i40evf_pmd_init,
1154 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1157 i40evf_dev_configure(struct rte_eth_dev *dev)
1159 return i40evf_init_vlan(dev);
1163 i40evf_init_vlan(struct rte_eth_dev *dev)
1165 struct rte_eth_dev_data *data = dev->data;
1168 /* Apply vlan offload setting */
1169 i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1171 /* Apply pvid setting */
1172 ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1173 data->dev_conf.txmode.hw_vlan_insert_pvid);
1178 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1180 bool enable_vlan_strip = 0;
1181 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1182 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1184 /* Linux pf host doesn't support vlan offload yet */
1185 if (vf->host_is_dpdk) {
1186 /* Vlan stripping setting */
1187 if (mask & ETH_VLAN_STRIP_MASK) {
1188 /* Enable or disable VLAN stripping */
1189 if (dev_conf->rxmode.hw_vlan_strip)
1190 enable_vlan_strip = 1;
1192 enable_vlan_strip = 0;
1194 i40evf_config_vlan_offload(dev, enable_vlan_strip);
1200 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1202 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1203 struct i40e_vsi_vlan_pvid_info info;
1204 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1206 memset(&info, 0, sizeof(info));
1209 /* Linux pf host don't support vlan offload yet */
1210 if (vf->host_is_dpdk) {
1212 info.config.pvid = pvid;
1214 info.config.reject.tagged =
1215 dev_conf->txmode.hw_vlan_reject_tagged;
1216 info.config.reject.untagged =
1217 dev_conf->txmode.hw_vlan_reject_untagged;
1219 return i40evf_config_vlan_pvid(dev, &info);
1226 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1228 struct i40e_rx_queue *rxq;
1230 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1232 PMD_INIT_FUNC_TRACE();
1234 if (rx_queue_id < dev->data->nb_rx_queues) {
1235 rxq = dev->data->rx_queues[rx_queue_id];
1237 err = i40e_alloc_rx_queue_mbufs(rxq);
1239 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1245 /* Init the RX tail register. */
1246 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1247 I40EVF_WRITE_FLUSH(hw);
1249 /* Ready to switch the queue on */
1250 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1253 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1261 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1263 struct i40e_rx_queue *rxq;
1266 if (rx_queue_id < dev->data->nb_rx_queues) {
1267 rxq = dev->data->rx_queues[rx_queue_id];
1269 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1272 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1277 i40e_rx_queue_release_mbufs(rxq);
1278 i40e_reset_rx_queue(rxq);
1285 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1289 PMD_INIT_FUNC_TRACE();
1291 if (tx_queue_id < dev->data->nb_tx_queues) {
1293 /* Ready to switch the queue on */
1294 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1297 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1305 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1307 struct i40e_tx_queue *txq;
1310 if (tx_queue_id < dev->data->nb_tx_queues) {
1311 txq = dev->data->tx_queues[tx_queue_id];
1313 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1316 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of",
1321 i40e_tx_queue_release_mbufs(txq);
1322 i40e_reset_tx_queue(txq);
1329 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1334 ret = i40evf_add_vlan(dev, vlan_id);
1336 ret = i40evf_del_vlan(dev,vlan_id);
1342 i40evf_rx_init(struct rte_eth_dev *dev)
1344 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1346 struct i40e_rx_queue **rxq =
1347 (struct i40e_rx_queue **)dev->data->rx_queues;
1348 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1350 i40evf_config_rss(vf);
1351 for (i = 0; i < dev->data->nb_rx_queues; i++) {
1352 rxq[i]->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(i);
1353 I40E_PCI_REG_WRITE(rxq[i]->qrx_tail, rxq[i]->nb_rx_desc - 1);
1356 /* Flush the operation to write registers */
1357 I40EVF_WRITE_FLUSH(hw);
1363 i40evf_tx_init(struct rte_eth_dev *dev)
1366 struct i40e_tx_queue **txq =
1367 (struct i40e_tx_queue **)dev->data->tx_queues;
1368 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1370 for (i = 0; i < dev->data->nb_tx_queues; i++)
1371 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1375 i40evf_enable_queues_intr(struct i40e_hw *hw)
1377 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1378 I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1379 I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1383 i40evf_disable_queues_intr(struct i40e_hw *hw)
1385 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1390 i40evf_dev_start(struct rte_eth_dev *dev)
1392 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1393 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1394 struct ether_addr mac_addr;
1396 PMD_INIT_FUNC_TRACE();
1398 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1399 if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
1400 if (vf->max_pkt_len <= ETHER_MAX_LEN ||
1401 vf->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1402 PMD_DRV_LOG(ERR, "maximum packet length must "
1403 "be larger than %u and smaller than %u,"
1404 "as jumbo frame is enabled",
1405 (uint32_t)ETHER_MAX_LEN,
1406 (uint32_t)I40E_FRAME_SIZE_MAX);
1407 return I40E_ERR_CONFIG;
1410 if (vf->max_pkt_len < ETHER_MIN_LEN ||
1411 vf->max_pkt_len > ETHER_MAX_LEN) {
1412 PMD_DRV_LOG(ERR, "maximum packet length must be "
1413 "larger than %u and smaller than %u, "
1414 "as jumbo frame is disabled",
1415 (uint32_t)ETHER_MIN_LEN,
1416 (uint32_t)ETHER_MAX_LEN);
1417 return I40E_ERR_CONFIG;
1421 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1422 dev->data->nb_tx_queues);
1424 if (i40evf_rx_init(dev) != 0){
1425 PMD_DRV_LOG(ERR, "failed to do RX init");
1429 i40evf_tx_init(dev);
1431 if (i40evf_configure_queues(dev) != 0) {
1432 PMD_DRV_LOG(ERR, "configure queues failed");
1435 if (i40evf_config_irq_map(dev)) {
1436 PMD_DRV_LOG(ERR, "config_irq_map failed");
1441 (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1442 sizeof(mac_addr.addr_bytes));
1443 if (i40evf_add_mac_addr(dev, &mac_addr)) {
1444 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1448 if (i40evf_start_queues(dev) != 0) {
1449 PMD_DRV_LOG(ERR, "enable queues failed");
1453 i40evf_enable_queues_intr(hw);
1457 i40evf_del_mac_addr(dev, &mac_addr);
1463 i40evf_dev_stop(struct rte_eth_dev *dev)
1465 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1467 PMD_INIT_FUNC_TRACE();
1469 i40evf_disable_queues_intr(hw);
1470 i40evf_stop_queues(dev);
1474 i40evf_dev_link_update(struct rte_eth_dev *dev,
1475 __rte_unused int wait_to_complete)
1477 struct rte_eth_link new_link;
1478 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1480 * DPDK pf host provide interfacet to acquire link status
1481 * while Linux driver does not
1483 if (vf->host_is_dpdk)
1484 i40evf_get_link_status(dev, &new_link);
1486 /* Always assume it's up, for Linux driver PF host */
1487 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1488 new_link.link_speed = ETH_LINK_SPEED_10000;
1489 new_link.link_status = 1;
1491 i40evf_dev_atomic_write_link_status(dev, &new_link);
1497 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1499 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1502 /* If enabled, just return */
1503 if (vf->promisc_unicast_enabled)
1506 ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1508 vf->promisc_unicast_enabled = TRUE;
1512 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1514 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1517 /* If disabled, just return */
1518 if (!vf->promisc_unicast_enabled)
1521 ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1523 vf->promisc_unicast_enabled = FALSE;
1527 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1529 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1532 /* If enabled, just return */
1533 if (vf->promisc_multicast_enabled)
1536 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1538 vf->promisc_multicast_enabled = TRUE;
1542 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1544 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1547 /* If enabled, just return */
1548 if (!vf->promisc_multicast_enabled)
1551 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1553 vf->promisc_multicast_enabled = FALSE;
1557 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1559 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1561 memset(dev_info, 0, sizeof(*dev_info));
1562 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1563 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1564 dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1565 dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1569 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1571 memset(stats, 0, sizeof(*stats));
1572 if (i40evf_get_statics(dev, stats))
1573 PMD_DRV_LOG(ERR, "Get statics failed");
1577 i40evf_dev_close(struct rte_eth_dev *dev)
1579 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1581 i40evf_dev_stop(dev);
1582 i40evf_reset_vf(hw);
1583 i40e_shutdown_adminq(hw);
1587 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1590 uint8_t hash_key_len;
1591 uint64_t rss_hf, hena;
1593 hash_key = (uint32_t *)(rss_conf->rss_key);
1594 hash_key_len = rss_conf->rss_key_len;
1595 if (hash_key != NULL && hash_key_len >=
1596 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1599 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1600 I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1603 rss_hf = rss_conf->rss_hf;
1604 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1605 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1606 hena &= ~I40E_RSS_HENA_ALL;
1607 hena |= i40e_config_hena(rss_hf);
1608 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1609 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1610 I40EVF_WRITE_FLUSH(hw);
1616 i40evf_disable_rss(struct i40e_vf *vf)
1618 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1621 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1622 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1623 hena &= ~I40E_RSS_HENA_ALL;
1624 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1625 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1626 I40EVF_WRITE_FLUSH(hw);
1630 i40evf_config_rss(struct i40e_vf *vf)
1632 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1633 struct rte_eth_rss_conf rss_conf;
1634 uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1636 if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1637 i40evf_disable_rss(vf);
1638 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1642 /* Fill out the look up table */
1643 for (i = 0, j = 0; i < nb_q; i++, j++) {
1644 if (j >= vf->num_queue_pairs)
1646 lut = (lut << 8) | j;
1648 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1651 rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1652 if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1653 i40evf_disable_rss(vf);
1654 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1658 if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1659 /* Calculate the default hash key */
1660 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1661 rss_key_default[i] = (uint32_t)rte_rand();
1662 rss_conf.rss_key = (uint8_t *)rss_key_default;
1663 rss_conf.rss_key_len = nb_q;
1666 return i40evf_hw_rss_hash_set(hw, &rss_conf);
1670 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1671 struct rte_eth_rss_conf *rss_conf)
1673 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1674 uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1677 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1678 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1679 if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1680 if (rss_hf != 0) /* Enable RSS */
1686 if (rss_hf == 0) /* Disable RSS */
1689 return i40evf_hw_rss_hash_set(hw, rss_conf);
1693 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1694 struct rte_eth_rss_conf *rss_conf)
1696 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1697 uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
1702 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1703 hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
1704 rss_conf->rss_key_len = i * sizeof(uint32_t);
1706 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1707 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1708 rss_conf->rss_hf = i40e_parse_hena(hena);