lib/librte_pmd_i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "i40e/i40e_prototype.h"
  53 #include "i40e/i40e_adminq_cmd.h"
  54 #include "i40e/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58
  59 static int
  60 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  61                            struct i40e_virtchnl_queue_select *qsel,
  62                            bool on);
  63
  64 /**
  65  * Bind PF queues with VSI and VF.
  66  **/
  67 static int
  68 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  69 {
  70         int i;
  71         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  72         uint16_t vsi_id = vf->vsi->vsi_id;
  73         uint16_t vf_id  = vf->vf_idx;
  74         uint16_t nb_qps = vf->vsi->nb_qps;
  75         uint16_t qbase  = vf->vsi->base_queue;
  76         uint16_t q1, q2;
  77         uint32_t val;
  78
  79         /*
  80          * VF should use scatter range queues. So, it needn't
  81          * to set QBASE in this register.
  82          */
  83         I40E_WRITE_REG(hw, I40E_VSILAN_QBASE(vsi_id),
  84              I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  85
  86         /* Set to enable VFLAN_QTABLE[] registers valid */
  87         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  88                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  89
  90         /* map PF queues to VF */
  91         for (i = 0; i < nb_qps; i++) {
  92                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  93                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  94         }
  95
  96         /* map PF queues to VSI */
  97         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
  98                 if (2 * i > nb_qps - 1)
  99                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 100                 else
 101                         q1 = qbase + 2 * i;
 102
 103                 if (2 * i + 1 > nb_qps - 1)
 104                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 105                 else
 106                         q2 = qbase + 2 * i + 1;
 107
 108                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 109                 I40E_WRITE_REG(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 110         }
 111         I40E_WRITE_FLUSH(hw);
 112
 113         return I40E_SUCCESS;
 114 }
 115
 116
 117 /**
 118  * Proceed VF reset operation.
 119  */
 120 int
 121 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 122 {
 123         uint32_t val, i;
 124         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 125         uint16_t vf_id, abs_vf_id, vf_msix_num;
 126         int ret;
 127         struct i40e_virtchnl_queue_select qsel;
 128
 129         if (vf == NULL)
 130                 return -EINVAL;
 131
 132         vf_id = vf->vf_idx;
 133         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 134
 135         /* Notify VF that we are in VFR progress */
 136         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_INPROGRESS);
 137
 138         /*
 139          * If require a SW VF reset, a VFLR interrupt will be generated,
 140          * this function will be called again. To avoid it,
 141          * disable interrupt first.
 142          */
 143         if (do_hw_reset) {
 144                 vf->state = I40E_VF_INRESET;
 145                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 146                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 147                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 148                 I40E_WRITE_FLUSH(hw);
 149         }
 150
 151 #define VFRESET_MAX_WAIT_CNT 100
 152         /* Wait until VF reset is done */
 153         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 154                 rte_delay_us(10);
 155                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 156                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 157                         break;
 158         }
 159
 160         if (i >= VFRESET_MAX_WAIT_CNT) {
 161                 PMD_DRV_LOG(ERR, "VF reset timeout\n");
 162                 return -ETIMEDOUT;
 163         }
 164
 165         /* This is not first time to do reset, do cleanup job first */
 166         if (vf->vsi) {
 167                 /* Disable queues */
 168                 memset(&qsel, 0, sizeof(qsel));
 169                 for (i = 0; i < vf->vsi->nb_qps; i++)
 170                         qsel.rx_queues |= 1 << i;
 171                 qsel.tx_queues = qsel.rx_queues;
 172                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 173                 if (ret != I40E_SUCCESS) {
 174                         PMD_DRV_LOG(ERR, "Disable VF queues failed\n");
 175                         return -EFAULT;
 176                 }
 177
 178                 /* Disable VF interrupt setting */
 179                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 180                 for (i = 0; i < vf_msix_num; i++) {
 181                         if (!i)
 182                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 183                         else
 184                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 185                                                         (vf_id)) + (i - 1));
 186                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 187                 }
 188                 I40E_WRITE_FLUSH(hw);
 189
 190                 /* remove VSI */
 191                 ret = i40e_vsi_release(vf->vsi);
 192                 if (ret != I40E_SUCCESS) {
 193                         PMD_DRV_LOG(ERR, "Release VSI failed\n");
 194                         return -EFAULT;
 195                 }
 196         }
 197
 198 #define I40E_VF_PCI_ADDR  0xAA
 199 #define I40E_VF_PEND_MASK 0x20
 200         /* Check the pending transactions of this VF */
 201         /* Use absolute VF id, refer to datasheet for details */
 202         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 203                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 204         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 205                 rte_delay_us(1);
 206                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 207                 if ((val & I40E_VF_PEND_MASK) == 0)
 208                         break;
 209         }
 210
 211         if (i >= VFRESET_MAX_WAIT_CNT) {
 212                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout\n");
 213                 return -ETIMEDOUT;
 214         }
 215
 216         /* Reset done, Set COMPLETE flag and clear reset bit */
 217         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_COMPLETED);
 218         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 219         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 220         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 221         vf->reset_cnt++;
 222         I40E_WRITE_FLUSH(hw);
 223
 224         /* Allocate resource again */
 225         vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 226                         vf->pf->main_vsi, vf->vf_idx);
 227         if (vf->vsi == NULL) {
 228                 PMD_DRV_LOG(ERR, "Add vsi failed\n");
 229                 return -EFAULT;
 230         }
 231
 232         ret = i40e_pf_vf_queues_mapping(vf);
 233         if (ret != I40E_SUCCESS) {
 234                 PMD_DRV_LOG(ERR, "queue mapping error\n");
 235                 i40e_vsi_release(vf->vsi);
 236                 return -EFAULT;
 237         }
 238
 239         return ret;
 240 }
 241
 242 static int
 243 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 244                             uint32_t opcode,
 245                             uint32_t retval,
 246                             uint8_t *msg,
 247                             uint16_t msglen)
 248 {
 249         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 250         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 251         int ret;
 252
 253         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 254                                                 msg, msglen, NULL);
 255         if (ret) {
 256                 PMD_DRV_LOG(ERR, "Fail to send message to VF, err %u\n",
 257                         hw->aq.asq_last_status);
 258                 printf("Fail to send message to VF, err %u\n",
 259                                         hw->aq.asq_last_status);
 260         }
 261
 262         return ret;
 263 }
 264
 265 static void
 266 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf)
 267 {
 268         struct i40e_virtchnl_version_info info;
 269
 270         info.major = I40E_DPDK_VERSION_MAJOR;
 271         info.minor = I40E_DPDK_VERSION_MINOR;
 272         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 273                 I40E_SUCCESS, (uint8_t *)&info, sizeof(info));
 274 }
 275
 276 static int
 277 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 278 {
 279         i40e_pf_host_vf_reset(vf, 1);
 280
 281         /* No feedback will be sent to VF for VFLR */
 282         return I40E_SUCCESS;
 283 }
 284
 285 static int
 286 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf)
 287 {
 288         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 289         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 290         uint32_t len = 0;
 291         int ret = I40E_SUCCESS;
 292
 293         /* only have 1 VSI by default */
 294         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 295                                 I40E_DEFAULT_VF_VSI_NUM *
 296                 sizeof(struct i40e_virtchnl_vsi_resource);
 297
 298         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 299         if (vf_res == NULL) {
 300                 PMD_DRV_LOG(ERR, "failed to allocate mem\n");
 301                 ret = I40E_ERR_NO_MEMORY;
 302                 vf_res = NULL;
 303                 len = 0;
 304                 goto send_msg;
 305         }
 306
 307         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 308                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 309         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 310         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 311         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 312
 313         /* Change below setting if PF host can support more VSIs for VF */
 314         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 315         /* As assume Vf only has single VSI now, always return 0 */
 316         vf_res->vsi_res[0].vsi_id = 0;
 317         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 318
 319 send_msg:
 320         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 321                                         ret, (uint8_t *)vf_res, len);
 322         rte_free(vf_res);
 323
 324         return ret;
 325 }
 326
 327 static int
 328 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 329                             struct i40e_pf_vf *vf,
 330                             struct i40e_virtchnl_rxq_info *rxq)
 331 {
 332         int err = I40E_SUCCESS;
 333         struct i40e_hmc_obj_rxq rx_ctx;
 334         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 335
 336         /* Clear the context structure first */
 337         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 338         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 339         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 340         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 341         rx_ctx.qlen = rxq->ring_len;
 342 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 343         rx_ctx.dsize = 1;
 344 #endif
 345
 346         if (rxq->splithdr_enabled) {
 347                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 348                 rx_ctx.dtype = i40e_header_split_enabled;
 349         } else {
 350                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 351                 rx_ctx.dtype = i40e_header_split_none;
 352         }
 353         rx_ctx.rxmax = rxq->max_pkt_size;
 354         rx_ctx.tphrdesc_ena = 1;
 355         rx_ctx.tphwdesc_ena = 1;
 356         rx_ctx.tphdata_ena = 1;
 357         rx_ctx.tphhead_ena = 1;
 358         rx_ctx.lrxqthresh = 2;
 359         rx_ctx.crcstrip = 1;
 360         rx_ctx.l2tsel = 1;
 361         rx_ctx.prefena = 1;
 362
 363         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 364         if (err != I40E_SUCCESS)
 365                 return err;
 366         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 367
 368         return err;
 369 }
 370
 371 static int
 372 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 373                             struct i40e_pf_vf *vf,
 374                             struct i40e_virtchnl_txq_info *txq)
 375 {
 376         int err = I40E_SUCCESS;
 377         struct i40e_hmc_obj_txq tx_ctx;
 378         uint32_t qtx_ctl;
 379         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 380
 381
 382         /* clear the context structure first */
 383         memset(&tx_ctx, 0, sizeof(tx_ctx));
 384         tx_ctx.new_context = 1;
 385         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 386         tx_ctx.qlen = txq->ring_len;
 387         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 388         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 389         if (err != I40E_SUCCESS)
 390                 return err;
 391
 392         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 393         if (err != I40E_SUCCESS)
 394                 return err;
 395
 396         /* bind queue with VF function, since TX/QX will appear in pair,
 397          * so only has QTX_CTL to set.
 398          */
 399         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 400                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 401                                 I40E_QTX_CTL_PF_INDX_MASK) |
 402                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 403                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 404                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 405         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 406         I40E_WRITE_FLUSH(hw);
 407
 408         return I40E_SUCCESS;
 409 }
 410
 411 static int
 412 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 413                                            uint8_t *msg,
 414                                            uint16_t msglen)
 415 {
 416         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 417         struct i40e_vsi *vsi = vf->vsi;
 418         int ret = I40E_SUCCESS;
 419         struct i40e_virtchnl_vsi_queue_config_info *qconfig =
 420             (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 421         int i;
 422         struct i40e_virtchnl_queue_pair_info *qpair;
 423
 424         if (msg == NULL || msglen <= sizeof(*qconfig) ||
 425                 qconfig->num_queue_pairs > vsi->nb_qps) {
 426                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong\n");
 427                 ret = I40E_ERR_PARAM;
 428                 goto send_msg;
 429         }
 430
 431         qpair = qconfig->qpair;
 432         for (i = 0; i < qconfig->num_queue_pairs; i++) {
 433                 if (qpair[i].rxq.queue_id > vsi->nb_qps - 1 ||
 434                         qpair[i].txq.queue_id > vsi->nb_qps - 1) {
 435                         ret = I40E_ERR_PARAM;
 436                         goto send_msg;
 437                 }
 438
 439                 /* Apply VF RX queue setting to HMC */
 440                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &qpair[i].rxq)
 441                         != I40E_SUCCESS) {
 442                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 443                         ret = I40E_ERR_PARAM;
 444                         goto send_msg;
 445                 }
 446
 447                 /* Apply VF TX queue setting to HMC */
 448                 if (i40e_pf_host_hmc_config_txq(hw, vf, &qpair[i].txq)
 449                         != I40E_SUCCESS) {
 450                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 451                         ret = I40E_ERR_PARAM;
 452                         goto send_msg;
 453                 }
 454         }
 455
 456 send_msg:
 457         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 458                                                         ret, NULL, 0);
 459         return ret;
 460 }
 461
 462 static int
 463 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 464                                         uint8_t *msg, uint16_t msglen)
 465 {
 466         int ret = I40E_SUCCESS;
 467         struct i40e_virtchnl_irq_map_info *irqmap =
 468             (struct i40e_virtchnl_irq_map_info *)msg;
 469
 470         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 471                 PMD_DRV_LOG(ERR, "buffer too short\n");
 472                 ret = I40E_ERR_PARAM;
 473                 goto send_msg;
 474         }
 475
 476         /* Assume VF only have 1 vector to bind all queues */
 477         if (irqmap->num_vectors != 1) {
 478                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector\n");
 479                 ret = I40E_ERR_PARAM;
 480                 goto send_msg;
 481         }
 482
 483         if (irqmap->vecmap[0].vector_id == 0) {
 484                 PMD_DRV_LOG(ERR, "DPDK host don't support use IRQ0\n");
 485                 ret = I40E_ERR_PARAM;
 486                 goto send_msg;
 487         }
 488         /* This MSIX intr store the intr in VF range */
 489         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 490
 491         /* Don't care how the TX/RX queue mapping with this vector.
 492          * Link all VF RX queues together. Only did mapping work.
 493          * VF can disable/enable the intr by itself.
 494          */
 495         i40e_vsi_queues_bind_intr(vf->vsi);
 496 send_msg:
 497         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 498                                                         ret, NULL, 0);
 499
 500         return ret;
 501 }
 502
 503 static int
 504 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 505                            struct i40e_virtchnl_queue_select *qsel,
 506                            bool on)
 507 {
 508         int ret = I40E_SUCCESS;
 509         int i;
 510         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 511         uint16_t baseq = vf->vsi->base_queue;
 512
 513         if (qsel->rx_queues + qsel->tx_queues == 0)
 514                 return I40E_ERR_PARAM;
 515
 516         /* always enable RX first and disable last */
 517         /* Enable RX if it's enable */
 518         if (on) {
 519                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 520                         if (qsel->rx_queues & (1 << i)) {
 521                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 522                                 if (ret != I40E_SUCCESS)
 523                                         return ret;
 524                         }
 525         }
 526
 527         /* Enable/Disable TX */
 528         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 529                 if (qsel->tx_queues & (1 << i)) {
 530                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 531                         if (ret != I40E_SUCCESS)
 532                                 return ret;
 533                 }
 534
 535         /* disable RX last if it's disable */
 536         if (!on) {
 537                 /* disable RX */
 538                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 539                         if (qsel->rx_queues & (1 << i)) {
 540                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 541                                 if (ret != I40E_SUCCESS)
 542                                         return ret;
 543                         }
 544         }
 545
 546         return ret;
 547 }
 548
 549 static int
 550 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 551                                        uint8_t *msg,
 552                                        uint16_t msglen)
 553 {
 554         int ret = I40E_SUCCESS;
 555         struct i40e_virtchnl_queue_select *q_sel =
 556                 (struct i40e_virtchnl_queue_select *)msg;
 557
 558         if (msg == NULL || msglen != sizeof(*q_sel)) {
 559                 ret = I40E_ERR_PARAM;
 560                 goto send_msg;
 561         }
 562         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 563
 564 send_msg:
 565         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 566                                                         ret, NULL, 0);
 567
 568         return ret;
 569 }
 570
 571 static int
 572 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 573                                         uint8_t *msg,
 574                                         uint16_t msglen)
 575 {
 576         int ret = I40E_SUCCESS;
 577         struct i40e_virtchnl_queue_select *q_sel =
 578                 (struct i40e_virtchnl_queue_select *)msg;
 579
 580         if (msg == NULL || msglen != sizeof(*q_sel)) {
 581                 ret = I40E_ERR_PARAM;
 582                 goto send_msg;
 583         }
 584         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 585
 586 send_msg:
 587         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 588                                                         ret, NULL, 0);
 589
 590         return ret;
 591 }
 592
 593
 594 static int
 595 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 596                                            uint8_t *msg,
 597                                            uint16_t msglen)
 598 {
 599         int ret = I40E_SUCCESS;
 600         struct i40e_virtchnl_ether_addr_list *addr_list =
 601                         (struct i40e_virtchnl_ether_addr_list *)msg;
 602         int i;
 603         struct ether_addr *mac;
 604
 605         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 606                 PMD_DRV_LOG(ERR, "add_ether_address argument too short\n");
 607                 ret = I40E_ERR_PARAM;
 608                 goto send_msg;
 609         }
 610
 611         for (i = 0; i < addr_list->num_elements; i++) {
 612                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 613                 if(!is_valid_assigned_ether_addr(mac) ||
 614                         i40e_vsi_add_mac(vf->vsi, mac)) {
 615                         ret = I40E_ERR_INVALID_MAC_ADDR;
 616                         goto send_msg;
 617                 }
 618         }
 619
 620 send_msg:
 621         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 622                                                         ret, NULL, 0);
 623
 624         return ret;
 625 }
 626
 627 static int
 628 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 629                                            uint8_t *msg,
 630                                            uint16_t msglen)
 631 {
 632         int ret = I40E_SUCCESS;
 633         struct i40e_virtchnl_ether_addr_list *addr_list =
 634                 (struct i40e_virtchnl_ether_addr_list *)msg;
 635         int i;
 636         struct ether_addr *mac;
 637
 638         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 639                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short\n");
 640                 ret = I40E_ERR_PARAM;
 641                 goto send_msg;
 642         }
 643
 644         for (i = 0; i < addr_list->num_elements; i++) {
 645                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 646                 if(!is_valid_assigned_ether_addr(mac) ||
 647                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 648                         ret = I40E_ERR_INVALID_MAC_ADDR;
 649                         goto send_msg;
 650                 }
 651         }
 652
 653 send_msg:
 654         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 655                                                         ret, NULL, 0);
 656
 657         return ret;
 658 }
 659
 660
 661 static int
 662 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 663                                 uint8_t *msg, uint16_t msglen)
 664 {
 665         int ret = I40E_SUCCESS;
 666         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 667                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 668         int i;
 669         uint16_t *vid;
 670
 671         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 672                 PMD_DRV_LOG(ERR, "add_vlan argument too short\n");
 673                 ret = I40E_ERR_PARAM;
 674                 goto send_msg;
 675         }
 676
 677         vid = vlan_filter_list->vlan_id;
 678
 679         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 680                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 681                 if(ret != I40E_SUCCESS)
 682                         goto send_msg;
 683         }
 684
 685 send_msg:
 686         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 687                                                 ret, NULL, 0);
 688
 689         return ret;
 690 }
 691
 692 static int
 693 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 694                                   uint8_t *msg,
 695                                   uint16_t msglen)
 696 {
 697         int ret = I40E_SUCCESS;
 698         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 699                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 700         int i;
 701         uint16_t *vid;
 702
 703         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 704                 PMD_DRV_LOG(ERR, "delete_vlan argument too short\n");
 705                 ret = I40E_ERR_PARAM;
 706                 goto send_msg;
 707         }
 708
 709         vid = vlan_filter_list->vlan_id;
 710         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 711                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 712                 if(ret != I40E_SUCCESS)
 713                         goto send_msg;
 714         }
 715
 716 send_msg:
 717         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 718                                                 ret, NULL, 0);
 719
 720         return ret;
 721 }
 722
 723 static int
 724 i40e_pf_host_process_cmd_config_promisc_mode(
 725                                         struct i40e_pf_vf *vf,
 726                                         uint8_t *msg,
 727                                         uint16_t msglen)
 728 {
 729         int ret = I40E_SUCCESS;
 730         struct i40e_virtchnl_promisc_info *promisc =
 731                                 (struct i40e_virtchnl_promisc_info *)msg;
 732         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 733         bool unicast = FALSE, multicast = FALSE;
 734
 735         if (msg == NULL || msglen != sizeof(*promisc)) {
 736                 ret = I40E_ERR_PARAM;
 737                 goto send_msg;
 738         }
 739
 740         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 741                 unicast = TRUE;
 742         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 743                         vf->vsi->seid, unicast, NULL);
 744         if (ret != I40E_SUCCESS)
 745                 goto send_msg;
 746
 747         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 748                 multicast = TRUE;
 749         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 750                                                 multicast, NULL);
 751
 752 send_msg:
 753         i40e_pf_host_send_msg_to_vf(vf,
 754                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 755
 756         return ret;
 757 }
 758
 759 static int
 760 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf)
 761 {
 762         i40e_update_vsi_stats(vf->vsi);
 763
 764         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 765                 I40E_SUCCESS, (uint8_t *)&vf->vsi->eth_stats,
 766                                 sizeof(vf->vsi->eth_stats));
 767
 768         return I40E_SUCCESS;
 769 }
 770
 771 static void
 772 i40e_pf_host_process_cmd_get_link_status(struct i40e_pf_vf *vf)
 773 {
 774         struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vf->pf->main_vsi);
 775
 776         /* Update link status first to acquire latest link change */
 777         i40e_dev_link_update(dev, 1);
 778         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_LINK_STAT,
 779                 I40E_SUCCESS, (uint8_t *)&dev->data->dev_link,
 780                                 sizeof(struct rte_eth_link));
 781 }
 782
 783 static int
 784 i40e_pf_host_process_cmd_cfg_vlan_offload(
 785                                         struct i40e_pf_vf *vf,
 786                                         uint8_t *msg,
 787                                         uint16_t msglen)
 788 {
 789         int ret = I40E_SUCCESS;
 790         struct i40e_virtchnl_vlan_offload_info *offload =
 791                         (struct i40e_virtchnl_vlan_offload_info *)msg;
 792
 793         if (msg == NULL || msglen != sizeof(*offload)) {
 794                 ret = I40E_ERR_PARAM;
 795                 goto send_msg;
 796         }
 797
 798         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
 799                                                 !!offload->enable_vlan_strip);
 800         if (ret != 0)
 801                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping\n");
 802
 803 send_msg:
 804         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 805                                         ret, NULL, 0);
 806
 807         return ret;
 808 }
 809
 810 static int
 811 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
 812                                         uint8_t *msg,
 813                                         uint16_t msglen)
 814 {
 815         int ret = I40E_SUCCESS;
 816         struct i40e_virtchnl_pvid_info  *tpid_info =
 817                         (struct i40e_virtchnl_pvid_info *)msg;
 818
 819         if (msg == NULL || msglen != sizeof(*tpid_info)) {
 820                 ret = I40E_ERR_PARAM;
 821                 goto send_msg;
 822         }
 823
 824         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
 825
 826 send_msg:
 827         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
 828                                         ret, NULL, 0);
 829
 830         return ret;
 831 }
 832
 833 void
 834 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 835                            uint16_t abs_vf_id, uint32_t opcode,
 836                            __rte_unused uint32_t retval,
 837                            uint8_t *msg,
 838                            uint16_t msglen)
 839 {
 840         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 841         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 842         struct i40e_pf_vf *vf;
 843         /* AdminQ will pass absolute VF id, transfer to internal vf id */
 844         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
 845
 846         if (!dev || vf_id > pf->vf_num - 1 || !pf->vfs) {
 847                 PMD_DRV_LOG(ERR, "invalid argument\n");
 848                 return;
 849         }
 850
 851         vf = &pf->vfs[vf_id];
 852         if (!vf->vsi) {
 853                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found\n");
 854                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 855                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
 856                 return;
 857         }
 858
 859         switch (opcode) {
 860         case I40E_VIRTCHNL_OP_VERSION :
 861                 PMD_DRV_LOG(INFO, "OP_VERSION received\n");
 862                 i40e_pf_host_process_cmd_version(vf);
 863                 break;
 864         case I40E_VIRTCHNL_OP_RESET_VF :
 865                 PMD_DRV_LOG(INFO, "OP_RESET_VF received\n");
 866                 i40e_pf_host_process_cmd_reset_vf(vf);
 867                 break;
 868         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
 869                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received\n");
 870                 i40e_pf_host_process_cmd_get_vf_resource(vf);
 871                 break;
 872         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
 873                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received\n");
 874                 i40e_pf_host_process_cmd_config_vsi_queues(vf,
 875                                                 msg, msglen);
 876                 break;
 877         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
 878                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received\n");
 879                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen);
 880                 break;
 881         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
 882                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received\n");
 883                 i40e_pf_host_process_cmd_enable_queues(vf,
 884                                                 msg, msglen);
 885                 break;
 886         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
 887                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received\n");
 888                 i40e_pf_host_process_cmd_disable_queues(vf,
 889                                                 msg, msglen);
 890                 break;
 891         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
 892                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received\n");
 893                 i40e_pf_host_process_cmd_add_ether_address(vf,
 894                                                 msg, msglen);
 895                 break;
 896         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
 897                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received\n");
 898                 i40e_pf_host_process_cmd_del_ether_address(vf,
 899                                                 msg, msglen);
 900                 break;
 901         case I40E_VIRTCHNL_OP_ADD_VLAN:
 902                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received\n");
 903                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen);
 904                 break;
 905         case I40E_VIRTCHNL_OP_DEL_VLAN:
 906                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received\n");
 907                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen);
 908                 break;
 909         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
 910                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received\n");
 911                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg, msglen);
 912                 break;
 913         case I40E_VIRTCHNL_OP_GET_STATS:
 914                 PMD_DRV_LOG(INFO, "OP_GET_STATS received\n");
 915                 i40e_pf_host_process_cmd_get_stats(vf);
 916                 break;
 917         case I40E_VIRTCHNL_OP_GET_LINK_STAT:
 918                 PMD_DRV_LOG(INFO, "OP_GET_LINK_STAT received\n");
 919                 i40e_pf_host_process_cmd_get_link_status(vf);
 920                 break;
 921         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
 922                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received\n");
 923                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg, msglen);
 924                 break;
 925         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
 926                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received\n");
 927                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen);
 928                 break;
 929          /* Don't add command supported below, which will
 930          *  return an error code.
 931          */
 932         case I40E_VIRTCHNL_OP_FCOE:
 933                 PMD_DRV_LOG(ERR, "OP_FCOE received, not supported\n");
 934         default:
 935                 PMD_DRV_LOG(ERR, "%u received, not supported\n",
 936                                                         opcode);
 937                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 938                                 I40E_ERR_PARAM, NULL, 0);
 939                 break;
 940         }
 941 }
 942
 943 int
 944 i40e_pf_host_init(struct rte_eth_dev *dev)
 945 {
 946         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 947         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
 948         int ret, i;
 949         uint32_t val;
 950
 951         PMD_INIT_FUNC_TRACE();
 952
 953         /**
 954          * return if SRIOV not enabled, VF number not configured or
 955          * no queue assigned.
 956          */
 957         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
 958                 return I40E_SUCCESS;
 959
 960         /* Allocate memory to store VF structure */
 961         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
 962         if(pf->vfs == NULL)
 963                 return -ENOMEM;
 964
 965         /* Disable irq0 for VFR event */
 966         i40e_pf_disable_irq0(hw);
 967
 968         /* Disable VF link status interrupt */
 969         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
 970         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
 971         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
 972         I40E_WRITE_FLUSH(hw);
 973
 974         for (i = 0; i < pf->vf_num; i++) {
 975                 pf->vfs[i].pf = pf;
 976                 pf->vfs[i].state = I40E_VF_INACTIVE;
 977                 pf->vfs[i].vf_idx = i;
 978                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
 979                 if (ret != I40E_SUCCESS)
 980                         goto fail;
 981         }
 982
 983         /* restore irq0 */
 984         i40e_pf_enable_irq0(hw);
 985
 986         return I40E_SUCCESS;
 987
 988 fail:
 989         rte_free(pf->vfs);
 990         i40e_pf_enable_irq0(hw);
 991
 992         return ret;
 993 }