lib/librte_pmd_i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "i40e/i40e_prototype.h"
  53 #include "i40e/i40e_adminq_cmd.h"
  54 #include "i40e/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58
  59 static int
  60 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  61                            struct i40e_virtchnl_queue_select *qsel,
  62                            bool on);
  63
  64 /**
  65  * Bind PF queues with VSI and VF.
  66  **/
  67 static int
  68 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  69 {
  70         int i;
  71         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  72         uint16_t vsi_id = vf->vsi->vsi_id;
  73         uint16_t vf_id  = vf->vf_idx;
  74         uint16_t nb_qps = vf->vsi->nb_qps;
  75         uint16_t qbase  = vf->vsi->base_queue;
  76         uint16_t q1, q2;
  77         uint32_t val;
  78
  79         /*
  80          * VF should use scatter range queues. So, it needn't
  81          * to set QBASE in this register.
  82          */
  83         I40E_WRITE_REG(hw, I40E_VSILAN_QBASE(vsi_id),
  84              I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  85
  86         /* Set to enable VFLAN_QTABLE[] registers valid */
  87         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  88                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  89
  90         /* map PF queues to VF */
  91         for (i = 0; i < nb_qps; i++) {
  92                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  93                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  94         }
  95
  96         /* map PF queues to VSI */
  97         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
  98                 if (2 * i > nb_qps - 1)
  99                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 100                 else
 101                         q1 = qbase + 2 * i;
 102
 103                 if (2 * i + 1 > nb_qps - 1)
 104                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 105                 else
 106                         q2 = qbase + 2 * i + 1;
 107
 108                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 109                 I40E_WRITE_REG(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 110         }
 111         I40E_WRITE_FLUSH(hw);
 112
 113         return I40E_SUCCESS;
 114 }
 115
 116
 117 /**
 118  * Proceed VF reset operation.
 119  */
 120 int
 121 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 122 {
 123         uint32_t val, i;
 124         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 125         uint16_t vf_id, abs_vf_id, vf_msix_num;
 126         int ret;
 127         struct i40e_virtchnl_queue_select qsel;
 128
 129         if (vf == NULL)
 130                 return -EINVAL;
 131
 132         vf_id = vf->vf_idx;
 133         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 134
 135         /* Notify VF that we are in VFR progress */
 136         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_INPROGRESS);
 137
 138         /*
 139          * If require a SW VF reset, a VFLR interrupt will be generated,
 140          * this function will be called again. To avoid it,
 141          * disable interrupt first.
 142          */
 143         if (do_hw_reset) {
 144                 vf->state = I40E_VF_INRESET;
 145                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 146                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 147                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 148                 I40E_WRITE_FLUSH(hw);
 149         }
 150
 151 #define VFRESET_MAX_WAIT_CNT 100
 152         /* Wait until VF reset is done */
 153         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 154                 rte_delay_us(10);
 155                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 156                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 157                         break;
 158         }
 159
 160         if (i >= VFRESET_MAX_WAIT_CNT) {
 161                 PMD_DRV_LOG(ERR, "VF reset timeout");
 162                 return -ETIMEDOUT;
 163         }
 164
 165         /* This is not first time to do reset, do cleanup job first */
 166         if (vf->vsi) {
 167                 /* Disable queues */
 168                 memset(&qsel, 0, sizeof(qsel));
 169                 for (i = 0; i < vf->vsi->nb_qps; i++)
 170                         qsel.rx_queues |= 1 << i;
 171                 qsel.tx_queues = qsel.rx_queues;
 172                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 173                 if (ret != I40E_SUCCESS) {
 174                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 175                         return -EFAULT;
 176                 }
 177
 178                 /* Disable VF interrupt setting */
 179                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 180                 for (i = 0; i < vf_msix_num; i++) {
 181                         if (!i)
 182                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 183                         else
 184                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 185                                                         (vf_id)) + (i - 1));
 186                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 187                 }
 188                 I40E_WRITE_FLUSH(hw);
 189
 190                 /* remove VSI */
 191                 ret = i40e_vsi_release(vf->vsi);
 192                 if (ret != I40E_SUCCESS) {
 193                         PMD_DRV_LOG(ERR, "Release VSI failed");
 194                         return -EFAULT;
 195                 }
 196         }
 197
 198 #define I40E_VF_PCI_ADDR  0xAA
 199 #define I40E_VF_PEND_MASK 0x20
 200         /* Check the pending transactions of this VF */
 201         /* Use absolute VF id, refer to datasheet for details */
 202         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 203                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 204         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 205                 rte_delay_us(1);
 206                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 207                 if ((val & I40E_VF_PEND_MASK) == 0)
 208                         break;
 209         }
 210
 211         if (i >= VFRESET_MAX_WAIT_CNT) {
 212                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 213                 return -ETIMEDOUT;
 214         }
 215
 216         /* Reset done, Set COMPLETE flag and clear reset bit */
 217         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_COMPLETED);
 218         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 219         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 220         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 221         vf->reset_cnt++;
 222         I40E_WRITE_FLUSH(hw);
 223
 224         /* Allocate resource again */
 225         vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 226                         vf->pf->main_vsi, vf->vf_idx);
 227         if (vf->vsi == NULL) {
 228                 PMD_DRV_LOG(ERR, "Add vsi failed");
 229                 return -EFAULT;
 230         }
 231
 232         ret = i40e_pf_vf_queues_mapping(vf);
 233         if (ret != I40E_SUCCESS) {
 234                 PMD_DRV_LOG(ERR, "queue mapping error");
 235                 i40e_vsi_release(vf->vsi);
 236                 return -EFAULT;
 237         }
 238
 239         return ret;
 240 }
 241
 242 static int
 243 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 244                             uint32_t opcode,
 245                             uint32_t retval,
 246                             uint8_t *msg,
 247                             uint16_t msglen)
 248 {
 249         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 250         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 251         int ret;
 252
 253         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 254                                                 msg, msglen, NULL);
 255         if (ret) {
 256                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 257                              hw->aq.asq_last_status);
 258         }
 259
 260         return ret;
 261 }
 262
 263 static void
 264 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf)
 265 {
 266         struct i40e_virtchnl_version_info info;
 267
 268         info.major = I40E_DPDK_VERSION_MAJOR;
 269         info.minor = I40E_DPDK_VERSION_MINOR;
 270         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 271                 I40E_SUCCESS, (uint8_t *)&info, sizeof(info));
 272 }
 273
 274 static int
 275 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 276 {
 277         i40e_pf_host_vf_reset(vf, 1);
 278
 279         /* No feedback will be sent to VF for VFLR */
 280         return I40E_SUCCESS;
 281 }
 282
 283 static int
 284 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf)
 285 {
 286         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 287         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 288         uint32_t len = 0;
 289         int ret = I40E_SUCCESS;
 290
 291         /* only have 1 VSI by default */
 292         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 293                                 I40E_DEFAULT_VF_VSI_NUM *
 294                 sizeof(struct i40e_virtchnl_vsi_resource);
 295
 296         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 297         if (vf_res == NULL) {
 298                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 299                 ret = I40E_ERR_NO_MEMORY;
 300                 vf_res = NULL;
 301                 len = 0;
 302                 goto send_msg;
 303         }
 304
 305         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 306                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 307         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 308         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 309         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 310
 311         /* Change below setting if PF host can support more VSIs for VF */
 312         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 313         /* As assume Vf only has single VSI now, always return 0 */
 314         vf_res->vsi_res[0].vsi_id = 0;
 315         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 316
 317 send_msg:
 318         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 319                                         ret, (uint8_t *)vf_res, len);
 320         rte_free(vf_res);
 321
 322         return ret;
 323 }
 324
 325 static int
 326 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 327                             struct i40e_pf_vf *vf,
 328                             struct i40e_virtchnl_rxq_info *rxq)
 329 {
 330         int err = I40E_SUCCESS;
 331         struct i40e_hmc_obj_rxq rx_ctx;
 332         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 333
 334         /* Clear the context structure first */
 335         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 336         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 337         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 338         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 339         rx_ctx.qlen = rxq->ring_len;
 340 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 341         rx_ctx.dsize = 1;
 342 #endif
 343
 344         if (rxq->splithdr_enabled) {
 345                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 346                 rx_ctx.dtype = i40e_header_split_enabled;
 347         } else {
 348                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 349                 rx_ctx.dtype = i40e_header_split_none;
 350         }
 351         rx_ctx.rxmax = rxq->max_pkt_size;
 352         rx_ctx.tphrdesc_ena = 1;
 353         rx_ctx.tphwdesc_ena = 1;
 354         rx_ctx.tphdata_ena = 1;
 355         rx_ctx.tphhead_ena = 1;
 356         rx_ctx.lrxqthresh = 2;
 357         rx_ctx.crcstrip = 1;
 358         rx_ctx.l2tsel = 1;
 359         rx_ctx.prefena = 1;
 360
 361         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 362         if (err != I40E_SUCCESS)
 363                 return err;
 364         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 365
 366         return err;
 367 }
 368
 369 static int
 370 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 371                             struct i40e_pf_vf *vf,
 372                             struct i40e_virtchnl_txq_info *txq)
 373 {
 374         int err = I40E_SUCCESS;
 375         struct i40e_hmc_obj_txq tx_ctx;
 376         uint32_t qtx_ctl;
 377         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 378
 379
 380         /* clear the context structure first */
 381         memset(&tx_ctx, 0, sizeof(tx_ctx));
 382         tx_ctx.new_context = 1;
 383         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 384         tx_ctx.qlen = txq->ring_len;
 385         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 386         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 387         if (err != I40E_SUCCESS)
 388                 return err;
 389
 390         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 391         if (err != I40E_SUCCESS)
 392                 return err;
 393
 394         /* bind queue with VF function, since TX/QX will appear in pair,
 395          * so only has QTX_CTL to set.
 396          */
 397         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 398                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 399                                 I40E_QTX_CTL_PF_INDX_MASK) |
 400                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 401                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 402                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 403         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 404         I40E_WRITE_FLUSH(hw);
 405
 406         return I40E_SUCCESS;
 407 }
 408
 409 static int
 410 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 411                                            uint8_t *msg,
 412                                            uint16_t msglen)
 413 {
 414         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 415         struct i40e_vsi *vsi = vf->vsi;
 416         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 417                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 418         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 419         int i, ret = I40E_SUCCESS;
 420
 421         if (msg == NULL || msglen <= sizeof(*vc_vqci) ||
 422                 vc_vqci->num_queue_pairs > vsi->nb_qps) {
 423                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong");
 424                 ret = I40E_ERR_PARAM;
 425                 goto send_msg;
 426         }
 427
 428         vc_qpi = vc_vqci->qpair;
 429         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 430                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 431                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 432                         ret = I40E_ERR_PARAM;
 433                         goto send_msg;
 434                 }
 435
 436                 /* Apply VF RX queue setting to HMC */
 437                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq)
 438                         != I40E_SUCCESS) {
 439                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 440                         ret = I40E_ERR_PARAM;
 441                         goto send_msg;
 442                 }
 443
 444                 /* Apply VF TX queue setting to HMC */
 445                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpi[i].txq)
 446                         != I40E_SUCCESS) {
 447                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 448                         ret = I40E_ERR_PARAM;
 449                         goto send_msg;
 450                 }
 451         }
 452
 453 send_msg:
 454         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 455                                                         ret, NULL, 0);
 456
 457         return ret;
 458 }
 459
 460 static int
 461 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 462                                         uint8_t *msg, uint16_t msglen)
 463 {
 464         int ret = I40E_SUCCESS;
 465         struct i40e_virtchnl_irq_map_info *irqmap =
 466             (struct i40e_virtchnl_irq_map_info *)msg;
 467
 468         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 469                 PMD_DRV_LOG(ERR, "buffer too short");
 470                 ret = I40E_ERR_PARAM;
 471                 goto send_msg;
 472         }
 473
 474         /* Assume VF only have 1 vector to bind all queues */
 475         if (irqmap->num_vectors != 1) {
 476                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector");
 477                 ret = I40E_ERR_PARAM;
 478                 goto send_msg;
 479         }
 480
 481         if (irqmap->vecmap[0].vector_id == 0) {
 482                 PMD_DRV_LOG(ERR, "DPDK host don't support use IRQ0");
 483                 ret = I40E_ERR_PARAM;
 484                 goto send_msg;
 485         }
 486         /* This MSIX intr store the intr in VF range */
 487         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 488
 489         /* Don't care how the TX/RX queue mapping with this vector.
 490          * Link all VF RX queues together. Only did mapping work.
 491          * VF can disable/enable the intr by itself.
 492          */
 493         i40e_vsi_queues_bind_intr(vf->vsi);
 494 send_msg:
 495         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 496                                                         ret, NULL, 0);
 497
 498         return ret;
 499 }
 500
 501 static int
 502 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 503                            struct i40e_virtchnl_queue_select *qsel,
 504                            bool on)
 505 {
 506         int ret = I40E_SUCCESS;
 507         int i;
 508         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 509         uint16_t baseq = vf->vsi->base_queue;
 510
 511         if (qsel->rx_queues + qsel->tx_queues == 0)
 512                 return I40E_ERR_PARAM;
 513
 514         /* always enable RX first and disable last */
 515         /* Enable RX if it's enable */
 516         if (on) {
 517                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 518                         if (qsel->rx_queues & (1 << i)) {
 519                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 520                                 if (ret != I40E_SUCCESS)
 521                                         return ret;
 522                         }
 523         }
 524
 525         /* Enable/Disable TX */
 526         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 527                 if (qsel->tx_queues & (1 << i)) {
 528                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 529                         if (ret != I40E_SUCCESS)
 530                                 return ret;
 531                 }
 532
 533         /* disable RX last if it's disable */
 534         if (!on) {
 535                 /* disable RX */
 536                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 537                         if (qsel->rx_queues & (1 << i)) {
 538                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 539                                 if (ret != I40E_SUCCESS)
 540                                         return ret;
 541                         }
 542         }
 543
 544         return ret;
 545 }
 546
 547 static int
 548 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 549                                        uint8_t *msg,
 550                                        uint16_t msglen)
 551 {
 552         int ret = I40E_SUCCESS;
 553         struct i40e_virtchnl_queue_select *q_sel =
 554                 (struct i40e_virtchnl_queue_select *)msg;
 555
 556         if (msg == NULL || msglen != sizeof(*q_sel)) {
 557                 ret = I40E_ERR_PARAM;
 558                 goto send_msg;
 559         }
 560         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 561
 562 send_msg:
 563         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 564                                                         ret, NULL, 0);
 565
 566         return ret;
 567 }
 568
 569 static int
 570 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 571                                         uint8_t *msg,
 572                                         uint16_t msglen)
 573 {
 574         int ret = I40E_SUCCESS;
 575         struct i40e_virtchnl_queue_select *q_sel =
 576                 (struct i40e_virtchnl_queue_select *)msg;
 577
 578         if (msg == NULL || msglen != sizeof(*q_sel)) {
 579                 ret = I40E_ERR_PARAM;
 580                 goto send_msg;
 581         }
 582         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 583
 584 send_msg:
 585         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 586                                                         ret, NULL, 0);
 587
 588         return ret;
 589 }
 590
 591
 592 static int
 593 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 594                                            uint8_t *msg,
 595                                            uint16_t msglen)
 596 {
 597         int ret = I40E_SUCCESS;
 598         struct i40e_virtchnl_ether_addr_list *addr_list =
 599                         (struct i40e_virtchnl_ether_addr_list *)msg;
 600         struct i40e_mac_filter_info filter;
 601         int i;
 602         struct ether_addr *mac;
 603
 604         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 605
 606         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 607                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 608                 ret = I40E_ERR_PARAM;
 609                 goto send_msg;
 610         }
 611
 612         for (i = 0; i < addr_list->num_elements; i++) {
 613                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 614                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 615                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 616                 if(!is_valid_assigned_ether_addr(mac) ||
 617                         i40e_vsi_add_mac(vf->vsi, &filter)) {
 618                         ret = I40E_ERR_INVALID_MAC_ADDR;
 619                         goto send_msg;
 620                 }
 621         }
 622
 623 send_msg:
 624         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 625                                                         ret, NULL, 0);
 626
 627         return ret;
 628 }
 629
 630 static int
 631 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 632                                            uint8_t *msg,
 633                                            uint16_t msglen)
 634 {
 635         int ret = I40E_SUCCESS;
 636         struct i40e_virtchnl_ether_addr_list *addr_list =
 637                 (struct i40e_virtchnl_ether_addr_list *)msg;
 638         int i;
 639         struct ether_addr *mac;
 640
 641         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 642                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 643                 ret = I40E_ERR_PARAM;
 644                 goto send_msg;
 645         }
 646
 647         for (i = 0; i < addr_list->num_elements; i++) {
 648                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 649                 if(!is_valid_assigned_ether_addr(mac) ||
 650                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 651                         ret = I40E_ERR_INVALID_MAC_ADDR;
 652                         goto send_msg;
 653                 }
 654         }
 655
 656 send_msg:
 657         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 658                                                         ret, NULL, 0);
 659
 660         return ret;
 661 }
 662
 663 static int
 664 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 665                                 uint8_t *msg, uint16_t msglen)
 666 {
 667         int ret = I40E_SUCCESS;
 668         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 669                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 670         int i;
 671         uint16_t *vid;
 672
 673         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 674                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 675                 ret = I40E_ERR_PARAM;
 676                 goto send_msg;
 677         }
 678
 679         vid = vlan_filter_list->vlan_id;
 680
 681         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 682                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 683                 if(ret != I40E_SUCCESS)
 684                         goto send_msg;
 685         }
 686
 687 send_msg:
 688         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 689                                                 ret, NULL, 0);
 690
 691         return ret;
 692 }
 693
 694 static int
 695 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 696                                   uint8_t *msg,
 697                                   uint16_t msglen)
 698 {
 699         int ret = I40E_SUCCESS;
 700         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 701                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 702         int i;
 703         uint16_t *vid;
 704
 705         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 706                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
 707                 ret = I40E_ERR_PARAM;
 708                 goto send_msg;
 709         }
 710
 711         vid = vlan_filter_list->vlan_id;
 712         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 713                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 714                 if(ret != I40E_SUCCESS)
 715                         goto send_msg;
 716         }
 717
 718 send_msg:
 719         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 720                                                 ret, NULL, 0);
 721
 722         return ret;
 723 }
 724
 725 static int
 726 i40e_pf_host_process_cmd_config_promisc_mode(
 727                                         struct i40e_pf_vf *vf,
 728                                         uint8_t *msg,
 729                                         uint16_t msglen)
 730 {
 731         int ret = I40E_SUCCESS;
 732         struct i40e_virtchnl_promisc_info *promisc =
 733                                 (struct i40e_virtchnl_promisc_info *)msg;
 734         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 735         bool unicast = FALSE, multicast = FALSE;
 736
 737         if (msg == NULL || msglen != sizeof(*promisc)) {
 738                 ret = I40E_ERR_PARAM;
 739                 goto send_msg;
 740         }
 741
 742         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 743                 unicast = TRUE;
 744         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 745                         vf->vsi->seid, unicast, NULL);
 746         if (ret != I40E_SUCCESS)
 747                 goto send_msg;
 748
 749         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 750                 multicast = TRUE;
 751         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 752                                                 multicast, NULL);
 753
 754 send_msg:
 755         i40e_pf_host_send_msg_to_vf(vf,
 756                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 757
 758         return ret;
 759 }
 760
 761 static int
 762 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf)
 763 {
 764         i40e_update_vsi_stats(vf->vsi);
 765
 766         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 767                 I40E_SUCCESS, (uint8_t *)&vf->vsi->eth_stats,
 768                                 sizeof(vf->vsi->eth_stats));
 769
 770         return I40E_SUCCESS;
 771 }
 772
 773 static void
 774 i40e_pf_host_process_cmd_get_link_status(struct i40e_pf_vf *vf)
 775 {
 776         struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vf->pf->main_vsi);
 777
 778         /* Update link status first to acquire latest link change */
 779         i40e_dev_link_update(dev, 1);
 780         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_LINK_STAT,
 781                 I40E_SUCCESS, (uint8_t *)&dev->data->dev_link,
 782                                 sizeof(struct rte_eth_link));
 783 }
 784
 785 static int
 786 i40e_pf_host_process_cmd_cfg_vlan_offload(
 787                                         struct i40e_pf_vf *vf,
 788                                         uint8_t *msg,
 789                                         uint16_t msglen)
 790 {
 791         int ret = I40E_SUCCESS;
 792         struct i40e_virtchnl_vlan_offload_info *offload =
 793                         (struct i40e_virtchnl_vlan_offload_info *)msg;
 794
 795         if (msg == NULL || msglen != sizeof(*offload)) {
 796                 ret = I40E_ERR_PARAM;
 797                 goto send_msg;
 798         }
 799
 800         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
 801                                                 !!offload->enable_vlan_strip);
 802         if (ret != 0)
 803                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
 804
 805 send_msg:
 806         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 807                                         ret, NULL, 0);
 808
 809         return ret;
 810 }
 811
 812 static int
 813 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
 814                                         uint8_t *msg,
 815                                         uint16_t msglen)
 816 {
 817         int ret = I40E_SUCCESS;
 818         struct i40e_virtchnl_pvid_info  *tpid_info =
 819                         (struct i40e_virtchnl_pvid_info *)msg;
 820
 821         if (msg == NULL || msglen != sizeof(*tpid_info)) {
 822                 ret = I40E_ERR_PARAM;
 823                 goto send_msg;
 824         }
 825
 826         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
 827
 828 send_msg:
 829         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
 830                                         ret, NULL, 0);
 831
 832         return ret;
 833 }
 834
 835 void
 836 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 837                            uint16_t abs_vf_id, uint32_t opcode,
 838                            __rte_unused uint32_t retval,
 839                            uint8_t *msg,
 840                            uint16_t msglen)
 841 {
 842         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 843         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 844         struct i40e_pf_vf *vf;
 845         /* AdminQ will pass absolute VF id, transfer to internal vf id */
 846         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
 847
 848         if (!dev || vf_id > pf->vf_num - 1 || !pf->vfs) {
 849                 PMD_DRV_LOG(ERR, "invalid argument");
 850                 return;
 851         }
 852
 853         vf = &pf->vfs[vf_id];
 854         if (!vf->vsi) {
 855                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
 856                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 857                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
 858                 return;
 859         }
 860
 861         switch (opcode) {
 862         case I40E_VIRTCHNL_OP_VERSION :
 863                 PMD_DRV_LOG(INFO, "OP_VERSION received");
 864                 i40e_pf_host_process_cmd_version(vf);
 865                 break;
 866         case I40E_VIRTCHNL_OP_RESET_VF :
 867                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
 868                 i40e_pf_host_process_cmd_reset_vf(vf);
 869                 break;
 870         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
 871                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
 872                 i40e_pf_host_process_cmd_get_vf_resource(vf);
 873                 break;
 874         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
 875                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
 876                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg, msglen);
 877                 break;
 878         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
 879                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
 880                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen);
 881                 break;
 882         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
 883                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
 884                 i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
 885                 break;
 886         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
 887                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
 888                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen);
 889                 break;
 890         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
 891                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
 892                 i40e_pf_host_process_cmd_add_ether_address(vf, msg, msglen);
 893                 break;
 894         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
 895                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
 896                 i40e_pf_host_process_cmd_del_ether_address(vf, msg, msglen);
 897                 break;
 898         case I40E_VIRTCHNL_OP_ADD_VLAN:
 899                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
 900                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen);
 901                 break;
 902         case I40E_VIRTCHNL_OP_DEL_VLAN:
 903                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
 904                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen);
 905                 break;
 906         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
 907                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
 908                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg, msglen);
 909                 break;
 910         case I40E_VIRTCHNL_OP_GET_STATS:
 911                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
 912                 i40e_pf_host_process_cmd_get_stats(vf);
 913                 break;
 914         case I40E_VIRTCHNL_OP_GET_LINK_STAT:
 915                 PMD_DRV_LOG(INFO, "OP_GET_LINK_STAT received");
 916                 i40e_pf_host_process_cmd_get_link_status(vf);
 917                 break;
 918         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
 919                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
 920                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg, msglen);
 921                 break;
 922         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
 923                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
 924                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen);
 925                 break;
 926          /* Don't add command supported below, which will
 927          *  return an error code.
 928          */
 929         case I40E_VIRTCHNL_OP_FCOE:
 930                 PMD_DRV_LOG(ERR, "OP_FCOE received, not supported");
 931         default:
 932                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
 933                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
 934                                                                 NULL, 0);
 935                 break;
 936         }
 937 }
 938
 939 int
 940 i40e_pf_host_init(struct rte_eth_dev *dev)
 941 {
 942         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 943         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
 944         int ret, i;
 945         uint32_t val;
 946
 947         PMD_INIT_FUNC_TRACE();
 948
 949         /**
 950          * return if SRIOV not enabled, VF number not configured or
 951          * no queue assigned.
 952          */
 953         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
 954                 return I40E_SUCCESS;
 955
 956         /* Allocate memory to store VF structure */
 957         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
 958         if(pf->vfs == NULL)
 959                 return -ENOMEM;
 960
 961         /* Disable irq0 for VFR event */
 962         i40e_pf_disable_irq0(hw);
 963
 964         /* Disable VF link status interrupt */
 965         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
 966         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
 967         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
 968         I40E_WRITE_FLUSH(hw);
 969
 970         for (i = 0; i < pf->vf_num; i++) {
 971                 pf->vfs[i].pf = pf;
 972                 pf->vfs[i].state = I40E_VF_INACTIVE;
 973                 pf->vfs[i].vf_idx = i;
 974                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
 975                 if (ret != I40E_SUCCESS)
 976                         goto fail;
 977         }
 978
 979         /* restore irq0 */
 980         i40e_pf_enable_irq0(hw);
 981
 982         return I40E_SUCCESS;
 983
 984 fail:
 985         rte_free(pf->vfs);
 986         i40e_pf_enable_irq0(hw);
 987
 988         return ret;
 989 }