1 /*******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
38 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
39 * @hw: pointer to hardware structure
40 * @map: pointer to u8 arr for returning map
42 * Read the rtrup2tc HW register and resolve its content into map
44 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
46 if (hw->mac.ops.get_rtrup2tc)
47 hw->mac.ops.get_rtrup2tc(hw, map);
51 * ixgbe_init_shared_code - Initialize the shared code
52 * @hw: pointer to hardware structure
54 * This will assign function pointers and assign the MAC type and PHY code.
55 * Does not touch the hardware. This function must be called prior to any
56 * other function in the shared code. The ixgbe_hw structure should be
57 * memset to 0 prior to calling this function. The following fields in
58 * hw structure should be filled in prior to calling this function:
59 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
60 * subsystem_vendor_id, and revision_id
62 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
66 DEBUGFUNC("ixgbe_init_shared_code");
71 ixgbe_set_mac_type(hw);
73 switch (hw->mac.type) {
74 case ixgbe_mac_82598EB:
75 status = ixgbe_init_ops_82598(hw);
77 case ixgbe_mac_82599EB:
78 status = ixgbe_init_ops_82599(hw);
81 status = ixgbe_init_ops_X540(hw);
84 status = ixgbe_init_ops_X550(hw);
86 case ixgbe_mac_X550EM_x:
87 status = ixgbe_init_ops_X550EM(hw);
89 case ixgbe_mac_82599_vf:
90 case ixgbe_mac_X540_vf:
91 case ixgbe_mac_X550_vf:
92 case ixgbe_mac_X550EM_x_vf:
93 status = ixgbe_init_ops_vf(hw);
96 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
104 * ixgbe_set_mac_type - Sets MAC type
105 * @hw: pointer to the HW structure
107 * This function sets the mac type of the adapter based on the
108 * vendor ID and device ID stored in the hw structure.
110 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
112 s32 ret_val = IXGBE_SUCCESS;
114 DEBUGFUNC("ixgbe_set_mac_type\n");
116 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
117 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
118 "Unsupported vendor id: %x", hw->vendor_id);
119 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
122 switch (hw->device_id) {
123 case IXGBE_DEV_ID_82598:
124 case IXGBE_DEV_ID_82598_BX:
125 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
126 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
127 case IXGBE_DEV_ID_82598AT:
128 case IXGBE_DEV_ID_82598AT2:
129 case IXGBE_DEV_ID_82598EB_CX4:
130 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
131 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
132 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
133 case IXGBE_DEV_ID_82598EB_XF_LR:
134 case IXGBE_DEV_ID_82598EB_SFP_LOM:
135 hw->mac.type = ixgbe_mac_82598EB;
137 case IXGBE_DEV_ID_82599_KX4:
138 case IXGBE_DEV_ID_82599_KX4_MEZZ:
139 case IXGBE_DEV_ID_82599_XAUI_LOM:
140 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
141 case IXGBE_DEV_ID_82599_KR:
142 case IXGBE_DEV_ID_82599_SFP:
143 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
144 case IXGBE_DEV_ID_82599_SFP_FCOE:
145 case IXGBE_DEV_ID_82599_SFP_EM:
146 case IXGBE_DEV_ID_82599_SFP_SF2:
147 case IXGBE_DEV_ID_82599_SFP_SF_QP:
148 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
149 case IXGBE_DEV_ID_82599EN_SFP:
150 case IXGBE_DEV_ID_82599_CX4:
151 case IXGBE_DEV_ID_82599_LS:
152 case IXGBE_DEV_ID_82599_T3_LOM:
153 hw->mac.type = ixgbe_mac_82599EB;
155 case IXGBE_DEV_ID_82599_VF:
156 case IXGBE_DEV_ID_82599_VF_HV:
157 hw->mac.type = ixgbe_mac_82599_vf;
159 case IXGBE_DEV_ID_X540_VF:
160 case IXGBE_DEV_ID_X540_VF_HV:
161 hw->mac.type = ixgbe_mac_X540_vf;
163 case IXGBE_DEV_ID_X540T:
164 case IXGBE_DEV_ID_X540T1:
165 hw->mac.type = ixgbe_mac_X540;
167 case IXGBE_DEV_ID_X550T:
168 hw->mac.type = ixgbe_mac_X550;
170 case IXGBE_DEV_ID_X550EM_X:
171 case IXGBE_DEV_ID_X550EM_X_KX4:
172 case IXGBE_DEV_ID_X550EM_X_KR:
173 case IXGBE_DEV_ID_X550EM_X_SFP:
174 hw->mac.type = ixgbe_mac_X550EM_x;
176 case IXGBE_DEV_ID_X550_VF:
177 case IXGBE_DEV_ID_X550_VF_HV:
178 hw->mac.type = ixgbe_mac_X550_vf;
180 case IXGBE_DEV_ID_X550EM_X_VF:
181 case IXGBE_DEV_ID_X550EM_X_VF_HV:
182 hw->mac.type = ixgbe_mac_X550EM_x_vf;
185 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
186 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
187 "Unsupported device id: %x",
192 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
193 hw->mac.type, ret_val);
198 * ixgbe_init_hw - Initialize the hardware
199 * @hw: pointer to hardware structure
201 * Initialize the hardware by resetting and then starting the hardware
203 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
205 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
206 IXGBE_NOT_IMPLEMENTED);
210 * ixgbe_reset_hw - Performs a hardware reset
211 * @hw: pointer to hardware structure
213 * Resets the hardware by resetting the transmit and receive units, masks and
214 * clears all interrupts, performs a PHY reset, and performs a MAC reset
216 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
218 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
219 IXGBE_NOT_IMPLEMENTED);
223 * ixgbe_start_hw - Prepares hardware for Rx/Tx
224 * @hw: pointer to hardware structure
226 * Starts the hardware by filling the bus info structure and media type,
227 * clears all on chip counters, initializes receive address registers,
228 * multicast table, VLAN filter table, calls routine to setup link and
229 * flow control settings, and leaves transmit and receive units disabled
232 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
234 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
235 IXGBE_NOT_IMPLEMENTED);
239 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
240 * which is disabled by default in ixgbe_start_hw();
242 * @hw: pointer to hardware structure
244 * Enable relaxed ordering;
246 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
248 if (hw->mac.ops.enable_relaxed_ordering)
249 hw->mac.ops.enable_relaxed_ordering(hw);
253 * ixgbe_clear_hw_cntrs - Clear hardware counters
254 * @hw: pointer to hardware structure
256 * Clears all hardware statistics counters by reading them from the hardware
257 * Statistics counters are clear on read.
259 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
261 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
262 IXGBE_NOT_IMPLEMENTED);
266 * ixgbe_get_media_type - Get media type
267 * @hw: pointer to hardware structure
269 * Returns the media type (fiber, copper, backplane)
271 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
273 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
274 ixgbe_media_type_unknown);
278 * ixgbe_get_mac_addr - Get MAC address
279 * @hw: pointer to hardware structure
280 * @mac_addr: Adapter MAC address
282 * Reads the adapter's MAC address from the first Receive Address Register
283 * (RAR0) A reset of the adapter must have been performed prior to calling
284 * this function in order for the MAC address to have been loaded from the
287 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
289 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
290 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
294 * ixgbe_get_san_mac_addr - Get SAN MAC address
295 * @hw: pointer to hardware structure
296 * @san_mac_addr: SAN MAC address
298 * Reads the SAN MAC address from the EEPROM, if it's available. This is
299 * per-port, so set_lan_id() must be called before reading the addresses.
301 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
303 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
304 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
308 * ixgbe_set_san_mac_addr - Write a SAN MAC address
309 * @hw: pointer to hardware structure
310 * @san_mac_addr: SAN MAC address
312 * Writes A SAN MAC address to the EEPROM.
314 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
316 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
317 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
321 * ixgbe_get_device_caps - Get additional device capabilities
322 * @hw: pointer to hardware structure
323 * @device_caps: the EEPROM word for device capabilities
325 * Reads the extra device capabilities from the EEPROM
327 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
329 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
330 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
334 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
335 * @hw: pointer to hardware structure
336 * @wwnn_prefix: the alternative WWNN prefix
337 * @wwpn_prefix: the alternative WWPN prefix
339 * This function will read the EEPROM from the alternative SAN MAC address
340 * block to check the support for the alternative WWNN/WWPN prefix support.
342 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
345 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
346 (hw, wwnn_prefix, wwpn_prefix),
347 IXGBE_NOT_IMPLEMENTED);
351 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
352 * @hw: pointer to hardware structure
353 * @bs: the fcoe boot status
355 * This function will read the FCOE boot status from the iSCSI FCOE block
357 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
359 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
361 IXGBE_NOT_IMPLEMENTED);
365 * ixgbe_get_bus_info - Set PCI bus info
366 * @hw: pointer to hardware structure
368 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
370 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
372 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
373 IXGBE_NOT_IMPLEMENTED);
377 * ixgbe_get_num_of_tx_queues - Get Tx queues
378 * @hw: pointer to hardware structure
380 * Returns the number of transmit queues for the given adapter.
382 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
384 return hw->mac.max_tx_queues;
388 * ixgbe_get_num_of_rx_queues - Get Rx queues
389 * @hw: pointer to hardware structure
391 * Returns the number of receive queues for the given adapter.
393 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
395 return hw->mac.max_rx_queues;
399 * ixgbe_stop_adapter - Disable Rx/Tx units
400 * @hw: pointer to hardware structure
402 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
403 * disables transmit and receive units. The adapter_stopped flag is used by
404 * the shared code and drivers to determine if the adapter is in a stopped
405 * state and should not touch the hardware.
407 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
409 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
410 IXGBE_NOT_IMPLEMENTED);
414 * ixgbe_read_pba_string - Reads part number string from EEPROM
415 * @hw: pointer to hardware structure
416 * @pba_num: stores the part number string from the EEPROM
417 * @pba_num_size: part number string buffer length
419 * Reads the part number string from the EEPROM.
421 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
423 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
427 * ixgbe_read_pba_num - Reads part number from EEPROM
428 * @hw: pointer to hardware structure
429 * @pba_num: stores the part number from the EEPROM
431 * Reads the part number from the EEPROM.
433 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
435 return ixgbe_read_pba_num_generic(hw, pba_num);
439 * ixgbe_identify_phy - Get PHY type
440 * @hw: pointer to hardware structure
442 * Determines the physical layer module found on the current adapter.
444 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
446 s32 status = IXGBE_SUCCESS;
448 if (hw->phy.type == ixgbe_phy_unknown) {
449 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
450 IXGBE_NOT_IMPLEMENTED);
457 * ixgbe_reset_phy - Perform a PHY reset
458 * @hw: pointer to hardware structure
460 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
462 s32 status = IXGBE_SUCCESS;
464 if (hw->phy.type == ixgbe_phy_unknown) {
465 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
466 status = IXGBE_ERR_PHY;
469 if (status == IXGBE_SUCCESS) {
470 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
471 IXGBE_NOT_IMPLEMENTED);
477 * ixgbe_get_phy_firmware_version -
478 * @hw: pointer to hardware structure
479 * @firmware_version: pointer to firmware version
481 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
483 s32 status = IXGBE_SUCCESS;
485 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
486 (hw, firmware_version),
487 IXGBE_NOT_IMPLEMENTED);
492 * ixgbe_read_phy_reg - Read PHY register
493 * @hw: pointer to hardware structure
494 * @reg_addr: 32 bit address of PHY register to read
495 * @phy_data: Pointer to read data from PHY register
497 * Reads a value from a specified PHY register
499 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
503 ixgbe_identify_phy(hw);
505 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
506 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
510 * ixgbe_write_phy_reg - Write PHY register
511 * @hw: pointer to hardware structure
512 * @reg_addr: 32 bit PHY register to write
513 * @phy_data: Data to write to the PHY register
515 * Writes a value to specified PHY register
517 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
521 ixgbe_identify_phy(hw);
523 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
524 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
528 * ixgbe_setup_phy_link - Restart PHY autoneg
529 * @hw: pointer to hardware structure
531 * Restart autonegotiation and PHY and waits for completion.
533 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
535 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
536 IXGBE_NOT_IMPLEMENTED);
540 * ixgbe_setup_internal_phy - Configure integrated PHY
541 * @hw: pointer to hardware structure
543 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
544 * Returns success if not implemented, since nothing needs to be done in this
547 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
549 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
554 * ixgbe_check_phy_link - Determine link and speed status
555 * @hw: pointer to hardware structure
557 * Reads a PHY register to determine if link is up and the current speed for
560 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
563 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
564 link_up), IXGBE_NOT_IMPLEMENTED);
568 * ixgbe_setup_phy_link_speed - Set auto advertise
569 * @hw: pointer to hardware structure
570 * @speed: new link speed
572 * Sets the auto advertised capabilities
574 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
575 bool autoneg_wait_to_complete)
577 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
578 autoneg_wait_to_complete),
579 IXGBE_NOT_IMPLEMENTED);
583 * ixgbe_set_phy_power - Control the phy power state
584 * @hw: pointer to hardware structure
585 * @on: true for on, false for off
587 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
589 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
590 IXGBE_NOT_IMPLEMENTED);
594 * ixgbe_check_link - Get link and speed status
595 * @hw: pointer to hardware structure
597 * Reads the links register to determine if link is up and the current speed
599 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
600 bool *link_up, bool link_up_wait_to_complete)
602 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
603 link_up, link_up_wait_to_complete),
604 IXGBE_NOT_IMPLEMENTED);
608 * ixgbe_disable_tx_laser - Disable Tx laser
609 * @hw: pointer to hardware structure
611 * If the driver needs to disable the laser on SFI optics.
613 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
615 if (hw->mac.ops.disable_tx_laser)
616 hw->mac.ops.disable_tx_laser(hw);
620 * ixgbe_enable_tx_laser - Enable Tx laser
621 * @hw: pointer to hardware structure
623 * If the driver needs to enable the laser on SFI optics.
625 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
627 if (hw->mac.ops.enable_tx_laser)
628 hw->mac.ops.enable_tx_laser(hw);
632 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
633 * @hw: pointer to hardware structure
635 * When the driver changes the link speeds that it can support then
636 * flap the tx laser to alert the link partner to start autotry
637 * process on its end.
639 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
641 if (hw->mac.ops.flap_tx_laser)
642 hw->mac.ops.flap_tx_laser(hw);
646 * ixgbe_setup_link - Set link speed
647 * @hw: pointer to hardware structure
648 * @speed: new link speed
650 * Configures link settings. Restarts the link.
651 * Performs autonegotiation if needed.
653 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
654 bool autoneg_wait_to_complete)
656 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
657 autoneg_wait_to_complete),
658 IXGBE_NOT_IMPLEMENTED);
662 * ixgbe_get_link_capabilities - Returns link capabilities
663 * @hw: pointer to hardware structure
665 * Determines the link capabilities of the current configuration.
667 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
670 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
671 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
675 * ixgbe_led_on - Turn on LEDs
676 * @hw: pointer to hardware structure
677 * @index: led number to turn on
679 * Turns on the software controllable LEDs.
681 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
683 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
684 IXGBE_NOT_IMPLEMENTED);
688 * ixgbe_led_off - Turn off LEDs
689 * @hw: pointer to hardware structure
690 * @index: led number to turn off
692 * Turns off the software controllable LEDs.
694 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
696 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
697 IXGBE_NOT_IMPLEMENTED);
701 * ixgbe_blink_led_start - Blink LEDs
702 * @hw: pointer to hardware structure
703 * @index: led number to blink
705 * Blink LED based on index.
707 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
709 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
710 IXGBE_NOT_IMPLEMENTED);
714 * ixgbe_blink_led_stop - Stop blinking LEDs
715 * @hw: pointer to hardware structure
717 * Stop blinking LED based on index.
719 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
721 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
722 IXGBE_NOT_IMPLEMENTED);
726 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
727 * @hw: pointer to hardware structure
729 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
730 * ixgbe_hw struct in order to set up EEPROM access.
732 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
734 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
735 IXGBE_NOT_IMPLEMENTED);
740 * ixgbe_write_eeprom - Write word to EEPROM
741 * @hw: pointer to hardware structure
742 * @offset: offset within the EEPROM to be written to
743 * @data: 16 bit word to be written to the EEPROM
745 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
746 * called after this function, the EEPROM will most likely contain an
749 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
751 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
752 IXGBE_NOT_IMPLEMENTED);
756 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
757 * @hw: pointer to hardware structure
758 * @offset: offset within the EEPROM to be written to
759 * @data: 16 bit word(s) to be written to the EEPROM
760 * @words: number of words
762 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
763 * called after this function, the EEPROM will most likely contain an
766 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
769 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
770 (hw, offset, words, data),
771 IXGBE_NOT_IMPLEMENTED);
775 * ixgbe_read_eeprom - Read word from EEPROM
776 * @hw: pointer to hardware structure
777 * @offset: offset within the EEPROM to be read
778 * @data: read 16 bit value from EEPROM
780 * Reads 16 bit value from EEPROM
782 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
784 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
785 IXGBE_NOT_IMPLEMENTED);
789 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
790 * @hw: pointer to hardware structure
791 * @offset: offset within the EEPROM to be read
792 * @data: read 16 bit word(s) from EEPROM
793 * @words: number of words
795 * Reads 16 bit word(s) from EEPROM
797 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
798 u16 words, u16 *data)
800 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
801 (hw, offset, words, data),
802 IXGBE_NOT_IMPLEMENTED);
806 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
807 * @hw: pointer to hardware structure
808 * @checksum_val: calculated checksum
810 * Performs checksum calculation and validates the EEPROM checksum
812 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
814 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
815 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
819 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
820 * @hw: pointer to hardware structure
822 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
824 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
825 IXGBE_NOT_IMPLEMENTED);
829 * ixgbe_insert_mac_addr - Find a RAR for this mac address
830 * @hw: pointer to hardware structure
831 * @addr: Address to put into receive address register
832 * @vmdq: VMDq pool to assign
834 * Puts an ethernet address into a receive address register, or
835 * finds the rar that it is aleady in; adds to the pool list
837 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
839 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
841 IXGBE_NOT_IMPLEMENTED);
845 * ixgbe_set_rar - Set Rx address register
846 * @hw: pointer to hardware structure
847 * @index: Receive address register to write
848 * @addr: Address to put into receive address register
850 * @enable_addr: set flag that address is active
852 * Puts an ethernet address into a receive address register.
854 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
857 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
858 enable_addr), IXGBE_NOT_IMPLEMENTED);
862 * ixgbe_clear_rar - Clear Rx address register
863 * @hw: pointer to hardware structure
864 * @index: Receive address register to write
866 * Puts an ethernet address into a receive address register.
868 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
870 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
871 IXGBE_NOT_IMPLEMENTED);
875 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
876 * @hw: pointer to hardware structure
877 * @rar: receive address register index to associate with VMDq index
878 * @vmdq: VMDq set or pool index
880 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
882 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
883 IXGBE_NOT_IMPLEMENTED);
888 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
889 * @hw: pointer to hardware structure
890 * @vmdq: VMDq default pool index
892 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
894 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
895 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
899 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
900 * @hw: pointer to hardware structure
901 * @rar: receive address register index to disassociate with VMDq index
902 * @vmdq: VMDq set or pool index
904 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
906 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
907 IXGBE_NOT_IMPLEMENTED);
911 * ixgbe_init_rx_addrs - Initializes receive address filters.
912 * @hw: pointer to hardware structure
914 * Places the MAC address in receive address register 0 and clears the rest
915 * of the receive address registers. Clears the multicast table. Assumes
916 * the receiver is in reset when the routine is called.
918 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
920 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
921 IXGBE_NOT_IMPLEMENTED);
925 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
926 * @hw: pointer to hardware structure
928 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
930 return hw->mac.num_rar_entries;
934 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
935 * @hw: pointer to hardware structure
936 * @addr_list: the list of new multicast addresses
937 * @addr_count: number of addresses
938 * @func: iterator function to walk the multicast address list
940 * The given list replaces any existing list. Clears the secondary addrs from
941 * receive address registers. Uses unused receive address registers for the
942 * first secondary addresses, and falls back to promiscuous mode as needed.
944 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
945 u32 addr_count, ixgbe_mc_addr_itr func)
947 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
948 addr_list, addr_count, func),
949 IXGBE_NOT_IMPLEMENTED);
953 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
954 * @hw: pointer to hardware structure
955 * @mc_addr_list: the list of new multicast addresses
956 * @mc_addr_count: number of addresses
957 * @func: iterator function to walk the multicast address list
959 * The given list replaces any existing list. Clears the MC addrs from receive
960 * address registers and the multicast table. Uses unused receive address
961 * registers for the first multicast addresses, and hashes the rest into the
964 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
965 u32 mc_addr_count, ixgbe_mc_addr_itr func,
968 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
969 mc_addr_list, mc_addr_count, func, clear),
970 IXGBE_NOT_IMPLEMENTED);
974 * ixgbe_enable_mc - Enable multicast address in RAR
975 * @hw: pointer to hardware structure
977 * Enables multicast address in RAR and the use of the multicast hash table.
979 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
981 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
982 IXGBE_NOT_IMPLEMENTED);
986 * ixgbe_disable_mc - Disable multicast address in RAR
987 * @hw: pointer to hardware structure
989 * Disables multicast address in RAR and the use of the multicast hash table.
991 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
993 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
994 IXGBE_NOT_IMPLEMENTED);
998 * ixgbe_clear_vfta - Clear VLAN filter table
999 * @hw: pointer to hardware structure
1001 * Clears the VLAN filer table, and the VMDq index associated with the filter
1003 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1005 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1006 IXGBE_NOT_IMPLEMENTED);
1010 * ixgbe_set_vfta - Set VLAN filter table
1011 * @hw: pointer to hardware structure
1012 * @vlan: VLAN id to write to VLAN filter
1013 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1014 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1016 * Turn on/off specified VLAN in the VLAN filter table.
1018 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1020 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1021 vlan_on), IXGBE_NOT_IMPLEMENTED);
1025 * ixgbe_set_vlvf - Set VLAN Pool Filter
1026 * @hw: pointer to hardware structure
1027 * @vlan: VLAN id to write to VLAN filter
1028 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1029 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1030 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1033 * Turn on/off specified bit in VLVF table.
1035 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1038 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1039 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1043 * ixgbe_fc_enable - Enable flow control
1044 * @hw: pointer to hardware structure
1046 * Configures the flow control settings based on SW configuration.
1048 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1050 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1051 IXGBE_NOT_IMPLEMENTED);
1055 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1056 * @hw: pointer to hardware structure
1057 * @maj: driver major number to be sent to firmware
1058 * @min: driver minor number to be sent to firmware
1059 * @build: driver build number to be sent to firmware
1060 * @ver: driver version number to be sent to firmware
1062 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1065 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1066 build, ver), IXGBE_NOT_IMPLEMENTED);
1071 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1072 * @hw: pointer to hardware structure
1074 * Updates the temperatures in mac.thermal_sensor_data
1076 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1078 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1079 IXGBE_NOT_IMPLEMENTED);
1083 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1084 * @hw: pointer to hardware structure
1086 * Inits the thermal sensor thresholds according to the NVM map
1088 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1090 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1091 IXGBE_NOT_IMPLEMENTED);
1095 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1096 * @hw: pointer to hardware structure
1098 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1099 * When disabling dmac, dmac enable dmac bit is cleared.
1101 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1103 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1104 IXGBE_NOT_IMPLEMENTED);
1108 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1109 * @hw: pointer to hardware structure
1111 * Disables dmac, updates per TC settings, and then enable dmac.
1113 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1115 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1116 IXGBE_NOT_IMPLEMENTED);
1120 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1121 * @hw: pointer to hardware structure
1123 * Configure DMA coalescing threshold per TC and set high priority bit for
1124 * FCOE TC. The dmac enable bit must be cleared before configuring.
1126 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1128 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1129 IXGBE_NOT_IMPLEMENTED);
1133 * ixgbe_setup_eee - Enable/disable EEE support
1134 * @hw: pointer to the HW structure
1135 * @enable_eee: boolean flag to enable EEE
1137 * Enable/disable EEE based on enable_ee flag.
1138 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1142 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1144 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1145 IXGBE_NOT_IMPLEMENTED);
1149 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1150 * @hw: pointer to hardware structure
1151 * @enbale: enable or disable source address pruning
1152 * @pool: Rx pool - Rx pool to toggle source address pruning
1154 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1157 if (hw->mac.ops.set_source_address_pruning)
1158 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1162 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1163 * @hw: pointer to hardware structure
1164 * @enable: enable or disable switch for Ethertype anti-spoofing
1165 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1168 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1170 if (hw->mac.ops.set_ethertype_anti_spoofing)
1171 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1175 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1176 * @hw: pointer to hardware structure
1177 * @reg_addr: 32 bit address of PHY register to read
1178 * @device_type: type of device you want to communicate with
1179 * @phy_data: Pointer to read data from PHY register
1181 * Reads a value from a specified PHY register
1183 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1184 u32 device_type, u32 *phy_data)
1186 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1187 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1191 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1192 * @hw: pointer to hardware structure
1193 * @reg_addr: 32 bit PHY register to write
1194 * @device_type: type of device you want to communicate with
1195 * @phy_data: Data to write to the PHY register
1197 * Writes a value to specified PHY register
1199 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1200 u32 device_type, u32 phy_data)
1202 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1203 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1207 * ixgbe_disable_mdd - Disable malicious driver detection
1208 * @hw: pointer to hardware structure
1211 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1213 if (hw->mac.ops.disable_mdd)
1214 hw->mac.ops.disable_mdd(hw);
1218 * ixgbe_enable_mdd - Enable malicious driver detection
1219 * @hw: pointer to hardware structure
1222 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1224 if (hw->mac.ops.enable_mdd)
1225 hw->mac.ops.enable_mdd(hw);
1229 * ixgbe_mdd_event - Handle malicious driver detection event
1230 * @hw: pointer to hardware structure
1231 * @vf_bitmap: vf bitmap of malicious vfs
1234 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1236 if (hw->mac.ops.mdd_event)
1237 hw->mac.ops.mdd_event(hw, vf_bitmap);
1241 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1243 * @hw: pointer to hardware structure
1247 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1249 if (hw->mac.ops.restore_mdd_vf)
1250 hw->mac.ops.restore_mdd_vf(hw, vf);
1254 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1255 * @hw: pointer to hardware structure
1256 * @reg: analog register to read
1259 * Performs write operation to analog register specified.
1261 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1263 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1264 val), IXGBE_NOT_IMPLEMENTED);
1268 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1269 * @hw: pointer to hardware structure
1270 * @reg: analog register to write
1271 * @val: value to write
1273 * Performs write operation to Atlas analog register specified.
1275 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1277 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1278 val), IXGBE_NOT_IMPLEMENTED);
1282 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1283 * @hw: pointer to hardware structure
1285 * Initializes the Unicast Table Arrays to zero on device load. This
1286 * is part of the Rx init addr execution path.
1288 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1290 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1291 IXGBE_NOT_IMPLEMENTED);
1295 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1296 * @hw: pointer to hardware structure
1297 * @byte_offset: byte offset to read
1298 * @dev_addr: I2C bus address to read from
1301 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1303 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1306 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1307 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1311 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1312 * @hw: pointer to the hardware structure
1313 * @addr: I2C bus address to read from
1314 * @reg: I2C device register to read from
1315 * @val: pointer to location to receive read value
1317 * Returns an error code on error.
1319 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1321 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1322 reg, val), IXGBE_NOT_IMPLEMENTED);
1326 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1327 * @hw: pointer to hardware structure
1328 * @byte_offset: byte offset to write
1329 * @dev_addr: I2C bus address to write to
1330 * @data: value to write
1332 * Performs byte write operation to SFP module's EEPROM over I2C interface
1333 * at a specified device address.
1335 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1338 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1339 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1343 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1344 * @hw: pointer to the hardware structure
1345 * @addr: I2C bus address to write to
1346 * @reg: I2C device register to write to
1347 * @val: value to write
1349 * Returns an error code on error.
1351 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1353 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1354 reg, val), IXGBE_NOT_IMPLEMENTED);
1358 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1359 * @hw: pointer to hardware structure
1360 * @byte_offset: EEPROM byte offset to write
1361 * @eeprom_data: value to write
1363 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1365 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1366 u8 byte_offset, u8 eeprom_data)
1368 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1369 (hw, byte_offset, eeprom_data),
1370 IXGBE_NOT_IMPLEMENTED);
1374 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1375 * @hw: pointer to hardware structure
1376 * @byte_offset: EEPROM byte offset to read
1377 * @eeprom_data: value read
1379 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1381 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1383 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1384 (hw, byte_offset, eeprom_data),
1385 IXGBE_NOT_IMPLEMENTED);
1389 * ixgbe_get_supported_physical_layer - Returns physical layer type
1390 * @hw: pointer to hardware structure
1392 * Determines physical layer capabilities of the current configuration.
1394 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1396 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1397 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1401 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1402 * @hw: pointer to hardware structure
1403 * @regval: bitfield to write to the Rx DMA register
1405 * Enables the Rx DMA unit of the device.
1407 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1409 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1410 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1414 * ixgbe_disable_sec_rx_path - Stops the receive data path
1415 * @hw: pointer to hardware structure
1417 * Stops the receive data path.
1419 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1421 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1422 (hw), IXGBE_NOT_IMPLEMENTED);
1426 * ixgbe_enable_sec_rx_path - Enables the receive data path
1427 * @hw: pointer to hardware structure
1429 * Enables the receive data path.
1431 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1433 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1434 (hw), IXGBE_NOT_IMPLEMENTED);
1438 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1439 * @hw: pointer to hardware structure
1440 * @mask: Mask to specify which semaphore to acquire
1442 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1443 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1445 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1447 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1448 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1452 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1453 * @hw: pointer to hardware structure
1454 * @mask: Mask to specify which semaphore to release
1456 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1457 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1459 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1461 if (hw->mac.ops.release_swfw_sync)
1462 hw->mac.ops.release_swfw_sync(hw, mask);
1466 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1468 if (hw->mac.ops.disable_rx)
1469 hw->mac.ops.disable_rx(hw);
1472 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1474 if (hw->mac.ops.enable_rx)
1475 hw->mac.ops.enable_rx(hw);