1 /*******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
38 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
39 * @hw: pointer to hardware structure
40 * @map: pointer to u8 arr for returning map
42 * Read the rtrup2tc HW register and resolve its content into map
44 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
46 if (hw->mac.ops.get_rtrup2tc)
47 hw->mac.ops.get_rtrup2tc(hw, map);
51 * ixgbe_init_shared_code - Initialize the shared code
52 * @hw: pointer to hardware structure
54 * This will assign function pointers and assign the MAC type and PHY code.
55 * Does not touch the hardware. This function must be called prior to any
56 * other function in the shared code. The ixgbe_hw structure should be
57 * memset to 0 prior to calling this function. The following fields in
58 * hw structure should be filled in prior to calling this function:
59 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
60 * subsystem_vendor_id, and revision_id
62 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
66 DEBUGFUNC("ixgbe_init_shared_code");
71 ixgbe_set_mac_type(hw);
73 switch (hw->mac.type) {
74 case ixgbe_mac_82598EB:
75 status = ixgbe_init_ops_82598(hw);
77 case ixgbe_mac_82599EB:
78 status = ixgbe_init_ops_82599(hw);
81 status = ixgbe_init_ops_X540(hw);
84 status = ixgbe_init_ops_X550(hw);
86 case ixgbe_mac_X550EM_x:
87 status = ixgbe_init_ops_X550EM(hw);
89 case ixgbe_mac_82599_vf:
90 case ixgbe_mac_X540_vf:
91 case ixgbe_mac_X550_vf:
92 case ixgbe_mac_X550EM_x_vf:
93 status = ixgbe_init_ops_vf(hw);
96 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
104 * ixgbe_set_mac_type - Sets MAC type
105 * @hw: pointer to the HW structure
107 * This function sets the mac type of the adapter based on the
108 * vendor ID and device ID stored in the hw structure.
110 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
112 s32 ret_val = IXGBE_SUCCESS;
114 DEBUGFUNC("ixgbe_set_mac_type\n");
116 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
117 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
118 "Unsupported vendor id: %x", hw->vendor_id);
119 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
122 switch (hw->device_id) {
123 case IXGBE_DEV_ID_82598:
124 case IXGBE_DEV_ID_82598_BX:
125 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
126 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
127 case IXGBE_DEV_ID_82598AT:
128 case IXGBE_DEV_ID_82598AT2:
129 case IXGBE_DEV_ID_82598EB_CX4:
130 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
131 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
132 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
133 case IXGBE_DEV_ID_82598EB_XF_LR:
134 case IXGBE_DEV_ID_82598EB_SFP_LOM:
135 hw->mac.type = ixgbe_mac_82598EB;
137 case IXGBE_DEV_ID_82599_KX4:
138 case IXGBE_DEV_ID_82599_KX4_MEZZ:
139 case IXGBE_DEV_ID_82599_XAUI_LOM:
140 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
141 case IXGBE_DEV_ID_82599_KR:
142 case IXGBE_DEV_ID_82599_SFP:
143 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
144 case IXGBE_DEV_ID_82599_SFP_FCOE:
145 case IXGBE_DEV_ID_82599_SFP_EM:
146 case IXGBE_DEV_ID_82599_SFP_SF2:
147 case IXGBE_DEV_ID_82599_SFP_SF_QP:
148 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
149 case IXGBE_DEV_ID_82599EN_SFP:
150 case IXGBE_DEV_ID_82599_CX4:
151 case IXGBE_DEV_ID_82599_LS:
152 case IXGBE_DEV_ID_82599_T3_LOM:
153 hw->mac.type = ixgbe_mac_82599EB;
155 case IXGBE_DEV_ID_82599_VF:
156 case IXGBE_DEV_ID_82599_VF_HV:
157 hw->mac.type = ixgbe_mac_82599_vf;
159 case IXGBE_DEV_ID_X540_VF:
160 case IXGBE_DEV_ID_X540_VF_HV:
161 hw->mac.type = ixgbe_mac_X540_vf;
163 case IXGBE_DEV_ID_X540T:
164 case IXGBE_DEV_ID_X540T1:
165 hw->mac.type = ixgbe_mac_X540;
167 case IXGBE_DEV_ID_X550T:
168 hw->mac.type = ixgbe_mac_X550;
170 case IXGBE_DEV_ID_X550EM_X:
171 case IXGBE_DEV_ID_X550EM_X_KX4:
172 case IXGBE_DEV_ID_X550EM_X_KR:
173 case IXGBE_DEV_ID_X550EM_X_SFP:
174 hw->mac.type = ixgbe_mac_X550EM_x;
176 case IXGBE_DEV_ID_X550_VF:
177 case IXGBE_DEV_ID_X550_VF_HV:
178 hw->mac.type = ixgbe_mac_X550_vf;
180 case IXGBE_DEV_ID_X550EM_X_VF:
181 case IXGBE_DEV_ID_X550EM_X_VF_HV:
182 hw->mac.type = ixgbe_mac_X550EM_x_vf;
185 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
186 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
187 "Unsupported device id: %x",
192 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
193 hw->mac.type, ret_val);
198 * ixgbe_init_hw - Initialize the hardware
199 * @hw: pointer to hardware structure
201 * Initialize the hardware by resetting and then starting the hardware
203 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
205 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
206 IXGBE_NOT_IMPLEMENTED);
210 * ixgbe_reset_hw - Performs a hardware reset
211 * @hw: pointer to hardware structure
213 * Resets the hardware by resetting the transmit and receive units, masks and
214 * clears all interrupts, performs a PHY reset, and performs a MAC reset
216 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
218 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
219 IXGBE_NOT_IMPLEMENTED);
223 * ixgbe_start_hw - Prepares hardware for Rx/Tx
224 * @hw: pointer to hardware structure
226 * Starts the hardware by filling the bus info structure and media type,
227 * clears all on chip counters, initializes receive address registers,
228 * multicast table, VLAN filter table, calls routine to setup link and
229 * flow control settings, and leaves transmit and receive units disabled
232 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
234 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
235 IXGBE_NOT_IMPLEMENTED);
239 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
240 * which is disabled by default in ixgbe_start_hw();
242 * @hw: pointer to hardware structure
244 * Enable relaxed ordering;
246 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
248 if (hw->mac.ops.enable_relaxed_ordering)
249 hw->mac.ops.enable_relaxed_ordering(hw);
253 * ixgbe_clear_hw_cntrs - Clear hardware counters
254 * @hw: pointer to hardware structure
256 * Clears all hardware statistics counters by reading them from the hardware
257 * Statistics counters are clear on read.
259 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
261 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
262 IXGBE_NOT_IMPLEMENTED);
266 * ixgbe_get_media_type - Get media type
267 * @hw: pointer to hardware structure
269 * Returns the media type (fiber, copper, backplane)
271 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
273 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
274 ixgbe_media_type_unknown);
278 * ixgbe_get_mac_addr - Get MAC address
279 * @hw: pointer to hardware structure
280 * @mac_addr: Adapter MAC address
282 * Reads the adapter's MAC address from the first Receive Address Register
283 * (RAR0) A reset of the adapter must have been performed prior to calling
284 * this function in order for the MAC address to have been loaded from the
287 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
289 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
290 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
294 * ixgbe_get_san_mac_addr - Get SAN MAC address
295 * @hw: pointer to hardware structure
296 * @san_mac_addr: SAN MAC address
298 * Reads the SAN MAC address from the EEPROM, if it's available. This is
299 * per-port, so set_lan_id() must be called before reading the addresses.
301 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
303 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
304 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
308 * ixgbe_set_san_mac_addr - Write a SAN MAC address
309 * @hw: pointer to hardware structure
310 * @san_mac_addr: SAN MAC address
312 * Writes A SAN MAC address to the EEPROM.
314 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
316 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
317 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
321 * ixgbe_get_device_caps - Get additional device capabilities
322 * @hw: pointer to hardware structure
323 * @device_caps: the EEPROM word for device capabilities
325 * Reads the extra device capabilities from the EEPROM
327 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
329 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
330 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
334 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
335 * @hw: pointer to hardware structure
336 * @wwnn_prefix: the alternative WWNN prefix
337 * @wwpn_prefix: the alternative WWPN prefix
339 * This function will read the EEPROM from the alternative SAN MAC address
340 * block to check the support for the alternative WWNN/WWPN prefix support.
342 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
345 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
346 (hw, wwnn_prefix, wwpn_prefix),
347 IXGBE_NOT_IMPLEMENTED);
351 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
352 * @hw: pointer to hardware structure
353 * @bs: the fcoe boot status
355 * This function will read the FCOE boot status from the iSCSI FCOE block
357 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
359 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
361 IXGBE_NOT_IMPLEMENTED);
365 * ixgbe_get_bus_info - Set PCI bus info
366 * @hw: pointer to hardware structure
368 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
370 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
372 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
373 IXGBE_NOT_IMPLEMENTED);
377 * ixgbe_get_num_of_tx_queues - Get Tx queues
378 * @hw: pointer to hardware structure
380 * Returns the number of transmit queues for the given adapter.
382 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
384 return hw->mac.max_tx_queues;
388 * ixgbe_get_num_of_rx_queues - Get Rx queues
389 * @hw: pointer to hardware structure
391 * Returns the number of receive queues for the given adapter.
393 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
395 return hw->mac.max_rx_queues;
399 * ixgbe_stop_adapter - Disable Rx/Tx units
400 * @hw: pointer to hardware structure
402 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
403 * disables transmit and receive units. The adapter_stopped flag is used by
404 * the shared code and drivers to determine if the adapter is in a stopped
405 * state and should not touch the hardware.
407 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
409 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
410 IXGBE_NOT_IMPLEMENTED);
414 * ixgbe_read_pba_string - Reads part number string from EEPROM
415 * @hw: pointer to hardware structure
416 * @pba_num: stores the part number string from the EEPROM
417 * @pba_num_size: part number string buffer length
419 * Reads the part number string from the EEPROM.
421 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
423 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
427 * ixgbe_read_pba_num - Reads part number from EEPROM
428 * @hw: pointer to hardware structure
429 * @pba_num: stores the part number from the EEPROM
431 * Reads the part number from the EEPROM.
433 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
435 return ixgbe_read_pba_num_generic(hw, pba_num);
439 * ixgbe_identify_phy - Get PHY type
440 * @hw: pointer to hardware structure
442 * Determines the physical layer module found on the current adapter.
444 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
446 s32 status = IXGBE_SUCCESS;
448 if (hw->phy.type == ixgbe_phy_unknown) {
449 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
450 IXGBE_NOT_IMPLEMENTED);
457 * ixgbe_reset_phy - Perform a PHY reset
458 * @hw: pointer to hardware structure
460 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
462 s32 status = IXGBE_SUCCESS;
464 if (hw->phy.type == ixgbe_phy_unknown) {
465 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
466 status = IXGBE_ERR_PHY;
469 if (status == IXGBE_SUCCESS) {
470 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
471 IXGBE_NOT_IMPLEMENTED);
477 * ixgbe_get_phy_firmware_version -
478 * @hw: pointer to hardware structure
479 * @firmware_version: pointer to firmware version
481 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
483 s32 status = IXGBE_SUCCESS;
485 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
486 (hw, firmware_version),
487 IXGBE_NOT_IMPLEMENTED);
492 * ixgbe_read_phy_reg - Read PHY register
493 * @hw: pointer to hardware structure
494 * @reg_addr: 32 bit address of PHY register to read
495 * @phy_data: Pointer to read data from PHY register
497 * Reads a value from a specified PHY register
499 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
503 ixgbe_identify_phy(hw);
505 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
506 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
510 * ixgbe_write_phy_reg - Write PHY register
511 * @hw: pointer to hardware structure
512 * @reg_addr: 32 bit PHY register to write
513 * @phy_data: Data to write to the PHY register
515 * Writes a value to specified PHY register
517 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
521 ixgbe_identify_phy(hw);
523 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
524 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
528 * ixgbe_setup_phy_link - Restart PHY autoneg
529 * @hw: pointer to hardware structure
531 * Restart autonegotiation and PHY and waits for completion.
533 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
535 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
536 IXGBE_NOT_IMPLEMENTED);
540 * ixgbe_check_phy_link - Determine link and speed status
541 * @hw: pointer to hardware structure
543 * Reads a PHY register to determine if link is up and the current speed for
546 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
549 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
550 link_up), IXGBE_NOT_IMPLEMENTED);
554 * ixgbe_setup_phy_link_speed - Set auto advertise
555 * @hw: pointer to hardware structure
556 * @speed: new link speed
558 * Sets the auto advertised capabilities
560 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
561 bool autoneg_wait_to_complete)
563 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
564 autoneg_wait_to_complete),
565 IXGBE_NOT_IMPLEMENTED);
569 * ixgbe_set_phy_power - Control the phy power state
570 * @hw: pointer to hardware structure
571 * @on: true for on, false for off
573 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
575 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
576 IXGBE_NOT_IMPLEMENTED);
580 * ixgbe_check_link - Get link and speed status
581 * @hw: pointer to hardware structure
583 * Reads the links register to determine if link is up and the current speed
585 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
586 bool *link_up, bool link_up_wait_to_complete)
588 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
589 link_up, link_up_wait_to_complete),
590 IXGBE_NOT_IMPLEMENTED);
594 * ixgbe_disable_tx_laser - Disable Tx laser
595 * @hw: pointer to hardware structure
597 * If the driver needs to disable the laser on SFI optics.
599 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
601 if (hw->mac.ops.disable_tx_laser)
602 hw->mac.ops.disable_tx_laser(hw);
606 * ixgbe_enable_tx_laser - Enable Tx laser
607 * @hw: pointer to hardware structure
609 * If the driver needs to enable the laser on SFI optics.
611 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
613 if (hw->mac.ops.enable_tx_laser)
614 hw->mac.ops.enable_tx_laser(hw);
618 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
619 * @hw: pointer to hardware structure
621 * When the driver changes the link speeds that it can support then
622 * flap the tx laser to alert the link partner to start autotry
623 * process on its end.
625 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
627 if (hw->mac.ops.flap_tx_laser)
628 hw->mac.ops.flap_tx_laser(hw);
632 * ixgbe_setup_link - Set link speed
633 * @hw: pointer to hardware structure
634 * @speed: new link speed
636 * Configures link settings. Restarts the link.
637 * Performs autonegotiation if needed.
639 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
640 bool autoneg_wait_to_complete)
642 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
643 autoneg_wait_to_complete),
644 IXGBE_NOT_IMPLEMENTED);
648 * ixgbe_get_link_capabilities - Returns link capabilities
649 * @hw: pointer to hardware structure
651 * Determines the link capabilities of the current configuration.
653 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
656 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
657 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
661 * ixgbe_led_on - Turn on LEDs
662 * @hw: pointer to hardware structure
663 * @index: led number to turn on
665 * Turns on the software controllable LEDs.
667 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
669 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
670 IXGBE_NOT_IMPLEMENTED);
674 * ixgbe_led_off - Turn off LEDs
675 * @hw: pointer to hardware structure
676 * @index: led number to turn off
678 * Turns off the software controllable LEDs.
680 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
682 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
683 IXGBE_NOT_IMPLEMENTED);
687 * ixgbe_blink_led_start - Blink LEDs
688 * @hw: pointer to hardware structure
689 * @index: led number to blink
691 * Blink LED based on index.
693 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
695 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
696 IXGBE_NOT_IMPLEMENTED);
700 * ixgbe_blink_led_stop - Stop blinking LEDs
701 * @hw: pointer to hardware structure
703 * Stop blinking LED based on index.
705 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
707 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
708 IXGBE_NOT_IMPLEMENTED);
712 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
713 * @hw: pointer to hardware structure
715 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
716 * ixgbe_hw struct in order to set up EEPROM access.
718 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
720 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
721 IXGBE_NOT_IMPLEMENTED);
726 * ixgbe_write_eeprom - Write word to EEPROM
727 * @hw: pointer to hardware structure
728 * @offset: offset within the EEPROM to be written to
729 * @data: 16 bit word to be written to the EEPROM
731 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
732 * called after this function, the EEPROM will most likely contain an
735 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
737 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
738 IXGBE_NOT_IMPLEMENTED);
742 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
743 * @hw: pointer to hardware structure
744 * @offset: offset within the EEPROM to be written to
745 * @data: 16 bit word(s) to be written to the EEPROM
746 * @words: number of words
748 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
749 * called after this function, the EEPROM will most likely contain an
752 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
755 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
756 (hw, offset, words, data),
757 IXGBE_NOT_IMPLEMENTED);
761 * ixgbe_read_eeprom - Read word from EEPROM
762 * @hw: pointer to hardware structure
763 * @offset: offset within the EEPROM to be read
764 * @data: read 16 bit value from EEPROM
766 * Reads 16 bit value from EEPROM
768 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
770 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
771 IXGBE_NOT_IMPLEMENTED);
775 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
776 * @hw: pointer to hardware structure
777 * @offset: offset within the EEPROM to be read
778 * @data: read 16 bit word(s) from EEPROM
779 * @words: number of words
781 * Reads 16 bit word(s) from EEPROM
783 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
784 u16 words, u16 *data)
786 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
787 (hw, offset, words, data),
788 IXGBE_NOT_IMPLEMENTED);
792 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
793 * @hw: pointer to hardware structure
794 * @checksum_val: calculated checksum
796 * Performs checksum calculation and validates the EEPROM checksum
798 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
800 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
801 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
805 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
806 * @hw: pointer to hardware structure
808 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
810 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
811 IXGBE_NOT_IMPLEMENTED);
815 * ixgbe_insert_mac_addr - Find a RAR for this mac address
816 * @hw: pointer to hardware structure
817 * @addr: Address to put into receive address register
818 * @vmdq: VMDq pool to assign
820 * Puts an ethernet address into a receive address register, or
821 * finds the rar that it is aleady in; adds to the pool list
823 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
825 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
827 IXGBE_NOT_IMPLEMENTED);
831 * ixgbe_set_rar - Set Rx address register
832 * @hw: pointer to hardware structure
833 * @index: Receive address register to write
834 * @addr: Address to put into receive address register
836 * @enable_addr: set flag that address is active
838 * Puts an ethernet address into a receive address register.
840 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
843 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
844 enable_addr), IXGBE_NOT_IMPLEMENTED);
848 * ixgbe_clear_rar - Clear Rx address register
849 * @hw: pointer to hardware structure
850 * @index: Receive address register to write
852 * Puts an ethernet address into a receive address register.
854 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
856 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
857 IXGBE_NOT_IMPLEMENTED);
861 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
862 * @hw: pointer to hardware structure
863 * @rar: receive address register index to associate with VMDq index
864 * @vmdq: VMDq set or pool index
866 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
868 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
869 IXGBE_NOT_IMPLEMENTED);
874 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
875 * @hw: pointer to hardware structure
876 * @vmdq: VMDq default pool index
878 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
880 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
881 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
885 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
886 * @hw: pointer to hardware structure
887 * @rar: receive address register index to disassociate with VMDq index
888 * @vmdq: VMDq set or pool index
890 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
892 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
893 IXGBE_NOT_IMPLEMENTED);
897 * ixgbe_init_rx_addrs - Initializes receive address filters.
898 * @hw: pointer to hardware structure
900 * Places the MAC address in receive address register 0 and clears the rest
901 * of the receive address registers. Clears the multicast table. Assumes
902 * the receiver is in reset when the routine is called.
904 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
906 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
907 IXGBE_NOT_IMPLEMENTED);
911 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
912 * @hw: pointer to hardware structure
914 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
916 return hw->mac.num_rar_entries;
920 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
921 * @hw: pointer to hardware structure
922 * @addr_list: the list of new multicast addresses
923 * @addr_count: number of addresses
924 * @func: iterator function to walk the multicast address list
926 * The given list replaces any existing list. Clears the secondary addrs from
927 * receive address registers. Uses unused receive address registers for the
928 * first secondary addresses, and falls back to promiscuous mode as needed.
930 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
931 u32 addr_count, ixgbe_mc_addr_itr func)
933 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
934 addr_list, addr_count, func),
935 IXGBE_NOT_IMPLEMENTED);
939 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
940 * @hw: pointer to hardware structure
941 * @mc_addr_list: the list of new multicast addresses
942 * @mc_addr_count: number of addresses
943 * @func: iterator function to walk the multicast address list
945 * The given list replaces any existing list. Clears the MC addrs from receive
946 * address registers and the multicast table. Uses unused receive address
947 * registers for the first multicast addresses, and hashes the rest into the
950 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
951 u32 mc_addr_count, ixgbe_mc_addr_itr func,
954 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
955 mc_addr_list, mc_addr_count, func, clear),
956 IXGBE_NOT_IMPLEMENTED);
960 * ixgbe_enable_mc - Enable multicast address in RAR
961 * @hw: pointer to hardware structure
963 * Enables multicast address in RAR and the use of the multicast hash table.
965 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
967 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
968 IXGBE_NOT_IMPLEMENTED);
972 * ixgbe_disable_mc - Disable multicast address in RAR
973 * @hw: pointer to hardware structure
975 * Disables multicast address in RAR and the use of the multicast hash table.
977 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
979 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
980 IXGBE_NOT_IMPLEMENTED);
984 * ixgbe_clear_vfta - Clear VLAN filter table
985 * @hw: pointer to hardware structure
987 * Clears the VLAN filer table, and the VMDq index associated with the filter
989 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
991 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
992 IXGBE_NOT_IMPLEMENTED);
996 * ixgbe_set_vfta - Set VLAN filter table
997 * @hw: pointer to hardware structure
998 * @vlan: VLAN id to write to VLAN filter
999 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1000 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1002 * Turn on/off specified VLAN in the VLAN filter table.
1004 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1006 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1007 vlan_on), IXGBE_NOT_IMPLEMENTED);
1011 * ixgbe_set_vlvf - Set VLAN Pool Filter
1012 * @hw: pointer to hardware structure
1013 * @vlan: VLAN id to write to VLAN filter
1014 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1015 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1016 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1019 * Turn on/off specified bit in VLVF table.
1021 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1024 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1025 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1029 * ixgbe_fc_enable - Enable flow control
1030 * @hw: pointer to hardware structure
1032 * Configures the flow control settings based on SW configuration.
1034 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1036 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1037 IXGBE_NOT_IMPLEMENTED);
1041 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1042 * @hw: pointer to hardware structure
1043 * @maj: driver major number to be sent to firmware
1044 * @min: driver minor number to be sent to firmware
1045 * @build: driver build number to be sent to firmware
1046 * @ver: driver version number to be sent to firmware
1048 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1051 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1052 build, ver), IXGBE_NOT_IMPLEMENTED);
1057 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1058 * @hw: pointer to hardware structure
1060 * Updates the temperatures in mac.thermal_sensor_data
1062 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1064 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1065 IXGBE_NOT_IMPLEMENTED);
1069 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1070 * @hw: pointer to hardware structure
1072 * Inits the thermal sensor thresholds according to the NVM map
1074 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1076 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1077 IXGBE_NOT_IMPLEMENTED);
1081 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1082 * @hw: pointer to hardware structure
1084 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1085 * When disabling dmac, dmac enable dmac bit is cleared.
1087 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1089 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1090 IXGBE_NOT_IMPLEMENTED);
1094 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1095 * @hw: pointer to hardware structure
1097 * Disables dmac, updates per TC settings, and then enable dmac.
1099 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1101 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1102 IXGBE_NOT_IMPLEMENTED);
1106 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1107 * @hw: pointer to hardware structure
1109 * Configure DMA coalescing threshold per TC and set high priority bit for
1110 * FCOE TC. The dmac enable bit must be cleared before configuring.
1112 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1114 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1115 IXGBE_NOT_IMPLEMENTED);
1119 * ixgbe_setup_eee - Enable/disable EEE support
1120 * @hw: pointer to the HW structure
1121 * @enable_eee: boolean flag to enable EEE
1123 * Enable/disable EEE based on enable_ee flag.
1124 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1128 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1130 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1131 IXGBE_NOT_IMPLEMENTED);
1135 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1136 * @hw: pointer to hardware structure
1137 * @enbale: enable or disable source address pruning
1138 * @pool: Rx pool - Rx pool to toggle source address pruning
1140 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1143 if (hw->mac.ops.set_source_address_pruning)
1144 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1148 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1149 * @hw: pointer to hardware structure
1150 * @enable: enable or disable switch for Ethertype anti-spoofing
1151 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1154 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1156 if (hw->mac.ops.set_ethertype_anti_spoofing)
1157 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1161 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1162 * @hw: pointer to hardware structure
1163 * @reg_addr: 32 bit address of PHY register to read
1164 * @device_type: type of device you want to communicate with
1165 * @phy_data: Pointer to read data from PHY register
1167 * Reads a value from a specified PHY register
1169 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1170 u32 device_type, u32 *phy_data)
1172 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1173 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1177 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1178 * @hw: pointer to hardware structure
1179 * @reg_addr: 32 bit PHY register to write
1180 * @device_type: type of device you want to communicate with
1181 * @phy_data: Data to write to the PHY register
1183 * Writes a value to specified PHY register
1185 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1186 u32 device_type, u32 phy_data)
1188 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1189 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1193 * ixgbe_disable_mdd - Disable malicious driver detection
1194 * @hw: pointer to hardware structure
1197 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1199 if (hw->mac.ops.disable_mdd)
1200 hw->mac.ops.disable_mdd(hw);
1204 * ixgbe_enable_mdd - Enable malicious driver detection
1205 * @hw: pointer to hardware structure
1208 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1210 if (hw->mac.ops.enable_mdd)
1211 hw->mac.ops.enable_mdd(hw);
1215 * ixgbe_mdd_event - Handle malicious driver detection event
1216 * @hw: pointer to hardware structure
1217 * @vf_bitmap: vf bitmap of malicious vfs
1220 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1222 if (hw->mac.ops.mdd_event)
1223 hw->mac.ops.mdd_event(hw, vf_bitmap);
1227 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1229 * @hw: pointer to hardware structure
1233 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1235 if (hw->mac.ops.restore_mdd_vf)
1236 hw->mac.ops.restore_mdd_vf(hw, vf);
1240 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1241 * @hw: pointer to hardware structure
1242 * @reg: analog register to read
1245 * Performs write operation to analog register specified.
1247 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1249 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1250 val), IXGBE_NOT_IMPLEMENTED);
1254 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1255 * @hw: pointer to hardware structure
1256 * @reg: analog register to write
1257 * @val: value to write
1259 * Performs write operation to Atlas analog register specified.
1261 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1263 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1264 val), IXGBE_NOT_IMPLEMENTED);
1268 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1269 * @hw: pointer to hardware structure
1271 * Initializes the Unicast Table Arrays to zero on device load. This
1272 * is part of the Rx init addr execution path.
1274 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1276 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1277 IXGBE_NOT_IMPLEMENTED);
1281 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1282 * @hw: pointer to hardware structure
1283 * @byte_offset: byte offset to read
1284 * @dev_addr: I2C bus address to read from
1287 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1289 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1292 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1293 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1297 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1298 * @hw: pointer to the hardware structure
1299 * @addr: I2C bus address to read from
1300 * @reg: I2C device register to read from
1301 * @val: pointer to location to receive read value
1303 * Returns an error code on error.
1305 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1307 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1308 reg, val), IXGBE_NOT_IMPLEMENTED);
1312 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1313 * @hw: pointer to hardware structure
1314 * @byte_offset: byte offset to write
1315 * @dev_addr: I2C bus address to write to
1316 * @data: value to write
1318 * Performs byte write operation to SFP module's EEPROM over I2C interface
1319 * at a specified device address.
1321 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1324 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1325 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1329 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1330 * @hw: pointer to the hardware structure
1331 * @addr: I2C bus address to write to
1332 * @reg: I2C device register to write to
1333 * @val: value to write
1335 * Returns an error code on error.
1337 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1339 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1340 reg, val), IXGBE_NOT_IMPLEMENTED);
1344 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1345 * @hw: pointer to hardware structure
1346 * @byte_offset: EEPROM byte offset to write
1347 * @eeprom_data: value to write
1349 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1351 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1352 u8 byte_offset, u8 eeprom_data)
1354 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1355 (hw, byte_offset, eeprom_data),
1356 IXGBE_NOT_IMPLEMENTED);
1360 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1361 * @hw: pointer to hardware structure
1362 * @byte_offset: EEPROM byte offset to read
1363 * @eeprom_data: value read
1365 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1367 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1369 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1370 (hw, byte_offset, eeprom_data),
1371 IXGBE_NOT_IMPLEMENTED);
1375 * ixgbe_get_supported_physical_layer - Returns physical layer type
1376 * @hw: pointer to hardware structure
1378 * Determines physical layer capabilities of the current configuration.
1380 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1382 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1383 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1387 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1388 * @hw: pointer to hardware structure
1389 * @regval: bitfield to write to the Rx DMA register
1391 * Enables the Rx DMA unit of the device.
1393 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1395 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1396 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1400 * ixgbe_disable_sec_rx_path - Stops the receive data path
1401 * @hw: pointer to hardware structure
1403 * Stops the receive data path.
1405 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1407 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1408 (hw), IXGBE_NOT_IMPLEMENTED);
1412 * ixgbe_enable_sec_rx_path - Enables the receive data path
1413 * @hw: pointer to hardware structure
1415 * Enables the receive data path.
1417 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1419 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1420 (hw), IXGBE_NOT_IMPLEMENTED);
1424 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1425 * @hw: pointer to hardware structure
1426 * @mask: Mask to specify which semaphore to acquire
1428 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1429 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1431 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1433 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1434 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1438 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1439 * @hw: pointer to hardware structure
1440 * @mask: Mask to specify which semaphore to release
1442 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1443 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1445 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1447 if (hw->mac.ops.release_swfw_sync)
1448 hw->mac.ops.release_swfw_sync(hw, mask);
1452 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1454 if (hw->mac.ops.disable_rx)
1455 hw->mac.ops.disable_rx(hw);
1458 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1460 if (hw->mac.ops.enable_rx)
1461 hw->mac.ops.enable_rx(hw);