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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
36 #ident "$Id: ixgbe_api.c,v 1.187 2012/11/08 10:11:52 jtkirshe Exp $"
39 * ixgbe_init_shared_code - Initialize the shared code
40 * @hw: pointer to hardware structure
42 * This will assign function pointers and assign the MAC type and PHY code.
43 * Does not touch the hardware. This function must be called prior to any
44 * other function in the shared code. The ixgbe_hw structure should be
45 * memset to 0 prior to calling this function. The following fields in
46 * hw structure should be filled in prior to calling this function:
47 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
48 * subsystem_vendor_id, and revision_id
50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
54 DEBUGFUNC("ixgbe_init_shared_code");
59 ixgbe_set_mac_type(hw);
61 switch (hw->mac.type) {
62 case ixgbe_mac_82598EB:
63 status = ixgbe_init_ops_82598(hw);
65 case ixgbe_mac_82599EB:
66 status = ixgbe_init_ops_82599(hw);
68 case ixgbe_mac_82599_vf:
69 case ixgbe_mac_X540_vf:
70 status = ixgbe_init_ops_vf(hw);
73 status = ixgbe_init_ops_X540(hw);
76 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
84 * ixgbe_set_mac_type - Sets MAC type
85 * @hw: pointer to the HW structure
87 * This function sets the mac type of the adapter based on the
88 * vendor ID and device ID stored in the hw structure.
90 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
92 s32 ret_val = IXGBE_SUCCESS;
94 DEBUGFUNC("ixgbe_set_mac_type\n");
96 switch (hw->device_id) {
97 case IXGBE_DEV_ID_82598:
98 case IXGBE_DEV_ID_82598_BX:
99 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
100 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
101 case IXGBE_DEV_ID_82598AT:
102 case IXGBE_DEV_ID_82598AT2:
103 case IXGBE_DEV_ID_82598EB_CX4:
104 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
105 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
106 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
107 case IXGBE_DEV_ID_82598EB_XF_LR:
108 case IXGBE_DEV_ID_82598EB_SFP_LOM:
109 hw->mac.type = ixgbe_mac_82598EB;
111 case IXGBE_DEV_ID_82599_KX4:
112 case IXGBE_DEV_ID_82599_KX4_MEZZ:
113 case IXGBE_DEV_ID_82599_XAUI_LOM:
114 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
115 case IXGBE_DEV_ID_82599_KR:
116 case IXGBE_DEV_ID_82599_SFP:
117 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
118 case IXGBE_DEV_ID_82599_SFP_FCOE:
119 case IXGBE_DEV_ID_82599_SFP_EM:
120 case IXGBE_DEV_ID_82599_SFP_SF2:
121 case IXGBE_DEV_ID_82599_SFP_SF_QP:
122 case IXGBE_DEV_ID_82599EN_SFP:
123 case IXGBE_DEV_ID_82599_CX4:
124 case IXGBE_DEV_ID_82599_T3_LOM:
125 hw->mac.type = ixgbe_mac_82599EB;
127 case IXGBE_DEV_ID_82599_VF:
128 case IXGBE_DEV_ID_82599_VF_HV:
129 hw->mac.type = ixgbe_mac_82599_vf;
131 case IXGBE_DEV_ID_X540_VF:
132 case IXGBE_DEV_ID_X540_VF_HV:
133 hw->mac.type = ixgbe_mac_X540_vf;
135 case IXGBE_DEV_ID_X540T:
136 case IXGBE_DEV_ID_X540T1:
137 hw->mac.type = ixgbe_mac_X540;
140 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
144 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
145 hw->mac.type, ret_val);
150 * ixgbe_init_hw - Initialize the hardware
151 * @hw: pointer to hardware structure
153 * Initialize the hardware by resetting and then starting the hardware
155 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
157 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
158 IXGBE_NOT_IMPLEMENTED);
162 * ixgbe_reset_hw - Performs a hardware reset
163 * @hw: pointer to hardware structure
165 * Resets the hardware by resetting the transmit and receive units, masks and
166 * clears all interrupts, performs a PHY reset, and performs a MAC reset
168 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
170 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
171 IXGBE_NOT_IMPLEMENTED);
175 * ixgbe_start_hw - Prepares hardware for Rx/Tx
176 * @hw: pointer to hardware structure
178 * Starts the hardware by filling the bus info structure and media type,
179 * clears all on chip counters, initializes receive address registers,
180 * multicast table, VLAN filter table, calls routine to setup link and
181 * flow control settings, and leaves transmit and receive units disabled
184 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
186 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
187 IXGBE_NOT_IMPLEMENTED);
191 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
192 * which is disabled by default in ixgbe_start_hw();
194 * @hw: pointer to hardware structure
196 * Enable relaxed ordering;
198 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
200 if (hw->mac.ops.enable_relaxed_ordering)
201 hw->mac.ops.enable_relaxed_ordering(hw);
205 * ixgbe_clear_hw_cntrs - Clear hardware counters
206 * @hw: pointer to hardware structure
208 * Clears all hardware statistics counters by reading them from the hardware
209 * Statistics counters are clear on read.
211 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
213 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
214 IXGBE_NOT_IMPLEMENTED);
218 * ixgbe_get_media_type - Get media type
219 * @hw: pointer to hardware structure
221 * Returns the media type (fiber, copper, backplane)
223 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
225 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
226 ixgbe_media_type_unknown);
230 * ixgbe_get_mac_addr - Get MAC address
231 * @hw: pointer to hardware structure
232 * @mac_addr: Adapter MAC address
234 * Reads the adapter's MAC address from the first Receive Address Register
235 * (RAR0) A reset of the adapter must have been performed prior to calling
236 * this function in order for the MAC address to have been loaded from the
239 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
241 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
242 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
246 * ixgbe_get_san_mac_addr - Get SAN MAC address
247 * @hw: pointer to hardware structure
248 * @san_mac_addr: SAN MAC address
250 * Reads the SAN MAC address from the EEPROM, if it's available. This is
251 * per-port, so set_lan_id() must be called before reading the addresses.
253 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
255 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
256 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
260 * ixgbe_set_san_mac_addr - Write a SAN MAC address
261 * @hw: pointer to hardware structure
262 * @san_mac_addr: SAN MAC address
264 * Writes A SAN MAC address to the EEPROM.
266 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
268 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
269 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
273 * ixgbe_get_device_caps - Get additional device capabilities
274 * @hw: pointer to hardware structure
275 * @device_caps: the EEPROM word for device capabilities
277 * Reads the extra device capabilities from the EEPROM
279 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
281 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
282 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
286 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
287 * @hw: pointer to hardware structure
288 * @wwnn_prefix: the alternative WWNN prefix
289 * @wwpn_prefix: the alternative WWPN prefix
291 * This function will read the EEPROM from the alternative SAN MAC address
292 * block to check the support for the alternative WWNN/WWPN prefix support.
294 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
297 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
298 (hw, wwnn_prefix, wwpn_prefix),
299 IXGBE_NOT_IMPLEMENTED);
303 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
304 * @hw: pointer to hardware structure
305 * @bs: the fcoe boot status
307 * This function will read the FCOE boot status from the iSCSI FCOE block
309 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
311 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
313 IXGBE_NOT_IMPLEMENTED);
317 * ixgbe_get_bus_info - Set PCI bus info
318 * @hw: pointer to hardware structure
320 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
322 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
324 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
325 IXGBE_NOT_IMPLEMENTED);
329 * ixgbe_get_num_of_tx_queues - Get Tx queues
330 * @hw: pointer to hardware structure
332 * Returns the number of transmit queues for the given adapter.
334 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
336 return hw->mac.max_tx_queues;
340 * ixgbe_get_num_of_rx_queues - Get Rx queues
341 * @hw: pointer to hardware structure
343 * Returns the number of receive queues for the given adapter.
345 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
347 return hw->mac.max_rx_queues;
351 * ixgbe_stop_adapter - Disable Rx/Tx units
352 * @hw: pointer to hardware structure
354 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
355 * disables transmit and receive units. The adapter_stopped flag is used by
356 * the shared code and drivers to determine if the adapter is in a stopped
357 * state and should not touch the hardware.
359 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
361 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
362 IXGBE_NOT_IMPLEMENTED);
366 * ixgbe_read_pba_string - Reads part number string from EEPROM
367 * @hw: pointer to hardware structure
368 * @pba_num: stores the part number string from the EEPROM
369 * @pba_num_size: part number string buffer length
371 * Reads the part number string from the EEPROM.
373 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
375 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
379 * ixgbe_read_pba_num - Reads part number from EEPROM
380 * @hw: pointer to hardware structure
381 * @pba_num: stores the part number from the EEPROM
383 * Reads the part number from the EEPROM.
385 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
387 return ixgbe_read_pba_num_generic(hw, pba_num);
391 * ixgbe_identify_phy - Get PHY type
392 * @hw: pointer to hardware structure
394 * Determines the physical layer module found on the current adapter.
396 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
398 s32 status = IXGBE_SUCCESS;
400 if (hw->phy.type == ixgbe_phy_unknown) {
401 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
402 IXGBE_NOT_IMPLEMENTED);
409 * ixgbe_reset_phy - Perform a PHY reset
410 * @hw: pointer to hardware structure
412 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
414 s32 status = IXGBE_SUCCESS;
416 if (hw->phy.type == ixgbe_phy_unknown) {
417 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
418 status = IXGBE_ERR_PHY;
421 if (status == IXGBE_SUCCESS) {
422 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
423 IXGBE_NOT_IMPLEMENTED);
429 * ixgbe_get_phy_firmware_version -
430 * @hw: pointer to hardware structure
431 * @firmware_version: pointer to firmware version
433 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
435 s32 status = IXGBE_SUCCESS;
437 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
438 (hw, firmware_version),
439 IXGBE_NOT_IMPLEMENTED);
444 * ixgbe_read_phy_reg - Read PHY register
445 * @hw: pointer to hardware structure
446 * @reg_addr: 32 bit address of PHY register to read
447 * @phy_data: Pointer to read data from PHY register
449 * Reads a value from a specified PHY register
451 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
455 ixgbe_identify_phy(hw);
457 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
458 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
462 * ixgbe_write_phy_reg - Write PHY register
463 * @hw: pointer to hardware structure
464 * @reg_addr: 32 bit PHY register to write
465 * @phy_data: Data to write to the PHY register
467 * Writes a value to specified PHY register
469 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
473 ixgbe_identify_phy(hw);
475 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
476 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
480 * ixgbe_setup_phy_link - Restart PHY autoneg
481 * @hw: pointer to hardware structure
483 * Restart autonegotiation and PHY and waits for completion.
485 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
487 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
488 IXGBE_NOT_IMPLEMENTED);
492 * ixgbe_check_phy_link - Determine link and speed status
493 * @hw: pointer to hardware structure
495 * Reads a PHY register to determine if link is up and the current speed for
498 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
501 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
502 link_up), IXGBE_NOT_IMPLEMENTED);
506 * ixgbe_setup_phy_link_speed - Set auto advertise
507 * @hw: pointer to hardware structure
508 * @speed: new link speed
509 * @autoneg: true if autonegotiation enabled
511 * Sets the auto advertised capabilities
513 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
515 bool autoneg_wait_to_complete)
517 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
518 autoneg, autoneg_wait_to_complete),
519 IXGBE_NOT_IMPLEMENTED);
523 * ixgbe_check_link - Get link and speed status
524 * @hw: pointer to hardware structure
526 * Reads the links register to determine if link is up and the current speed
528 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
529 bool *link_up, bool link_up_wait_to_complete)
531 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
532 link_up, link_up_wait_to_complete),
533 IXGBE_NOT_IMPLEMENTED);
537 * ixgbe_disable_tx_laser - Disable Tx laser
538 * @hw: pointer to hardware structure
540 * If the driver needs to disable the laser on SFI optics.
542 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
544 if (hw->mac.ops.disable_tx_laser)
545 hw->mac.ops.disable_tx_laser(hw);
549 * ixgbe_enable_tx_laser - Enable Tx laser
550 * @hw: pointer to hardware structure
552 * If the driver needs to enable the laser on SFI optics.
554 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
556 if (hw->mac.ops.enable_tx_laser)
557 hw->mac.ops.enable_tx_laser(hw);
561 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
562 * @hw: pointer to hardware structure
564 * When the driver changes the link speeds that it can support then
565 * flap the tx laser to alert the link partner to start autotry
566 * process on its end.
568 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
570 if (hw->mac.ops.flap_tx_laser)
571 hw->mac.ops.flap_tx_laser(hw);
575 * ixgbe_setup_link - Set link speed
576 * @hw: pointer to hardware structure
577 * @speed: new link speed
578 * @autoneg: true if autonegotiation enabled
580 * Configures link settings. Restarts the link.
581 * Performs autonegotiation if needed.
583 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
585 bool autoneg_wait_to_complete)
587 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
588 autoneg, autoneg_wait_to_complete),
589 IXGBE_NOT_IMPLEMENTED);
593 * ixgbe_get_link_capabilities - Returns link capabilities
594 * @hw: pointer to hardware structure
596 * Determines the link capabilities of the current configuration.
598 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
601 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
602 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
606 * ixgbe_led_on - Turn on LEDs
607 * @hw: pointer to hardware structure
608 * @index: led number to turn on
610 * Turns on the software controllable LEDs.
612 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
614 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
615 IXGBE_NOT_IMPLEMENTED);
619 * ixgbe_led_off - Turn off LEDs
620 * @hw: pointer to hardware structure
621 * @index: led number to turn off
623 * Turns off the software controllable LEDs.
625 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
627 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
628 IXGBE_NOT_IMPLEMENTED);
632 * ixgbe_blink_led_start - Blink LEDs
633 * @hw: pointer to hardware structure
634 * @index: led number to blink
636 * Blink LED based on index.
638 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
640 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
641 IXGBE_NOT_IMPLEMENTED);
645 * ixgbe_blink_led_stop - Stop blinking LEDs
646 * @hw: pointer to hardware structure
648 * Stop blinking LED based on index.
650 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
652 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
653 IXGBE_NOT_IMPLEMENTED);
657 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
658 * @hw: pointer to hardware structure
660 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
661 * ixgbe_hw struct in order to set up EEPROM access.
663 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
665 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
666 IXGBE_NOT_IMPLEMENTED);
671 * ixgbe_write_eeprom - Write word to EEPROM
672 * @hw: pointer to hardware structure
673 * @offset: offset within the EEPROM to be written to
674 * @data: 16 bit word to be written to the EEPROM
676 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
677 * called after this function, the EEPROM will most likely contain an
680 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
682 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
683 IXGBE_NOT_IMPLEMENTED);
687 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
688 * @hw: pointer to hardware structure
689 * @offset: offset within the EEPROM to be written to
690 * @data: 16 bit word(s) to be written to the EEPROM
691 * @words: number of words
693 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
694 * called after this function, the EEPROM will most likely contain an
697 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
700 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
701 (hw, offset, words, data),
702 IXGBE_NOT_IMPLEMENTED);
706 * ixgbe_read_eeprom - Read word from EEPROM
707 * @hw: pointer to hardware structure
708 * @offset: offset within the EEPROM to be read
709 * @data: read 16 bit value from EEPROM
711 * Reads 16 bit value from EEPROM
713 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
715 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
716 IXGBE_NOT_IMPLEMENTED);
720 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
721 * @hw: pointer to hardware structure
722 * @offset: offset within the EEPROM to be read
723 * @data: read 16 bit word(s) from EEPROM
724 * @words: number of words
726 * Reads 16 bit word(s) from EEPROM
728 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
729 u16 words, u16 *data)
731 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
732 (hw, offset, words, data),
733 IXGBE_NOT_IMPLEMENTED);
737 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
738 * @hw: pointer to hardware structure
739 * @checksum_val: calculated checksum
741 * Performs checksum calculation and validates the EEPROM checksum
743 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
745 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
746 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
750 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
751 * @hw: pointer to hardware structure
753 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
755 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
756 IXGBE_NOT_IMPLEMENTED);
760 * ixgbe_insert_mac_addr - Find a RAR for this mac address
761 * @hw: pointer to hardware structure
762 * @addr: Address to put into receive address register
763 * @vmdq: VMDq pool to assign
765 * Puts an ethernet address into a receive address register, or
766 * finds the rar that it is aleady in; adds to the pool list
768 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
770 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
772 IXGBE_NOT_IMPLEMENTED);
776 * ixgbe_set_rar - Set Rx address register
777 * @hw: pointer to hardware structure
778 * @index: Receive address register to write
779 * @addr: Address to put into receive address register
781 * @enable_addr: set flag that address is active
783 * Puts an ethernet address into a receive address register.
785 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
788 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
789 enable_addr), IXGBE_NOT_IMPLEMENTED);
793 * ixgbe_clear_rar - Clear Rx address register
794 * @hw: pointer to hardware structure
795 * @index: Receive address register to write
797 * Puts an ethernet address into a receive address register.
799 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
801 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
802 IXGBE_NOT_IMPLEMENTED);
806 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
807 * @hw: pointer to hardware structure
808 * @rar: receive address register index to associate with VMDq index
809 * @vmdq: VMDq set or pool index
811 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
813 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
814 IXGBE_NOT_IMPLEMENTED);
819 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
820 * @hw: pointer to hardware structure
821 * @vmdq: VMDq default pool index
823 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
825 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
826 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
830 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
831 * @hw: pointer to hardware structure
832 * @rar: receive address register index to disassociate with VMDq index
833 * @vmdq: VMDq set or pool index
835 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
837 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
838 IXGBE_NOT_IMPLEMENTED);
842 * ixgbe_init_rx_addrs - Initializes receive address filters.
843 * @hw: pointer to hardware structure
845 * Places the MAC address in receive address register 0 and clears the rest
846 * of the receive address registers. Clears the multicast table. Assumes
847 * the receiver is in reset when the routine is called.
849 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
851 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
852 IXGBE_NOT_IMPLEMENTED);
856 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
857 * @hw: pointer to hardware structure
859 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
861 return hw->mac.num_rar_entries;
865 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
866 * @hw: pointer to hardware structure
867 * @addr_list: the list of new multicast addresses
868 * @addr_count: number of addresses
869 * @func: iterator function to walk the multicast address list
871 * The given list replaces any existing list. Clears the secondary addrs from
872 * receive address registers. Uses unused receive address registers for the
873 * first secondary addresses, and falls back to promiscuous mode as needed.
875 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
876 u32 addr_count, ixgbe_mc_addr_itr func)
878 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
879 addr_list, addr_count, func),
880 IXGBE_NOT_IMPLEMENTED);
884 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
885 * @hw: pointer to hardware structure
886 * @mc_addr_list: the list of new multicast addresses
887 * @mc_addr_count: number of addresses
888 * @func: iterator function to walk the multicast address list
890 * The given list replaces any existing list. Clears the MC addrs from receive
891 * address registers and the multicast table. Uses unused receive address
892 * registers for the first multicast addresses, and hashes the rest into the
895 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
896 u32 mc_addr_count, ixgbe_mc_addr_itr func,
899 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
900 mc_addr_list, mc_addr_count, func, clear),
901 IXGBE_NOT_IMPLEMENTED);
905 * ixgbe_enable_mc - Enable multicast address in RAR
906 * @hw: pointer to hardware structure
908 * Enables multicast address in RAR and the use of the multicast hash table.
910 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
912 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
913 IXGBE_NOT_IMPLEMENTED);
917 * ixgbe_disable_mc - Disable multicast address in RAR
918 * @hw: pointer to hardware structure
920 * Disables multicast address in RAR and the use of the multicast hash table.
922 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
924 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
925 IXGBE_NOT_IMPLEMENTED);
929 * ixgbe_clear_vfta - Clear VLAN filter table
930 * @hw: pointer to hardware structure
932 * Clears the VLAN filer table, and the VMDq index associated with the filter
934 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
936 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
937 IXGBE_NOT_IMPLEMENTED);
941 * ixgbe_set_vfta - Set VLAN filter table
942 * @hw: pointer to hardware structure
943 * @vlan: VLAN id to write to VLAN filter
944 * @vind: VMDq output index that maps queue to VLAN id in VFTA
945 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
947 * Turn on/off specified VLAN in the VLAN filter table.
949 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
951 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
952 vlan_on), IXGBE_NOT_IMPLEMENTED);
956 * ixgbe_set_vlvf - Set VLAN Pool Filter
957 * @hw: pointer to hardware structure
958 * @vlan: VLAN id to write to VLAN filter
959 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
960 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
961 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
964 * Turn on/off specified bit in VLVF table.
966 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
969 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
970 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
974 * ixgbe_fc_enable - Enable flow control
975 * @hw: pointer to hardware structure
977 * Configures the flow control settings based on SW configuration.
979 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
981 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
982 IXGBE_NOT_IMPLEMENTED);
986 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
987 * @hw: pointer to hardware structure
988 * @maj: driver major number to be sent to firmware
989 * @min: driver minor number to be sent to firmware
990 * @build: driver build number to be sent to firmware
991 * @ver: driver version number to be sent to firmware
993 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
996 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
997 build, ver), IXGBE_NOT_IMPLEMENTED);
1002 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1003 * @hw: pointer to hardware structure
1004 * @reg: analog register to read
1007 * Performs write operation to analog register specified.
1009 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1011 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1012 val), IXGBE_NOT_IMPLEMENTED);
1016 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1017 * @hw: pointer to hardware structure
1018 * @reg: analog register to write
1019 * @val: value to write
1021 * Performs write operation to Atlas analog register specified.
1023 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1025 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1026 val), IXGBE_NOT_IMPLEMENTED);
1030 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1031 * @hw: pointer to hardware structure
1033 * Initializes the Unicast Table Arrays to zero on device load. This
1034 * is part of the Rx init addr execution path.
1036 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1038 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1039 IXGBE_NOT_IMPLEMENTED);
1043 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1044 * @hw: pointer to hardware structure
1045 * @byte_offset: byte offset to read
1048 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1050 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1053 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1054 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1058 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1059 * @hw: pointer to hardware structure
1060 * @byte_offset: byte offset to write
1061 * @data: value to write
1063 * Performs byte write operation to SFP module's EEPROM over I2C interface
1064 * at a specified device address.
1066 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1069 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1070 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1074 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1075 * @hw: pointer to hardware structure
1076 * @byte_offset: EEPROM byte offset to write
1077 * @eeprom_data: value to write
1079 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1081 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1082 u8 byte_offset, u8 eeprom_data)
1084 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1085 (hw, byte_offset, eeprom_data),
1086 IXGBE_NOT_IMPLEMENTED);
1090 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1091 * @hw: pointer to hardware structure
1092 * @byte_offset: EEPROM byte offset to read
1093 * @eeprom_data: value read
1095 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1097 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1099 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1100 (hw, byte_offset, eeprom_data),
1101 IXGBE_NOT_IMPLEMENTED);
1105 * ixgbe_get_supported_physical_layer - Returns physical layer type
1106 * @hw: pointer to hardware structure
1108 * Determines physical layer capabilities of the current configuration.
1110 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1112 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1113 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1117 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1118 * @hw: pointer to hardware structure
1119 * @regval: bitfield to write to the Rx DMA register
1121 * Enables the Rx DMA unit of the device.
1123 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1125 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1126 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1130 * ixgbe_disable_sec_rx_path - Stops the receive data path
1131 * @hw: pointer to hardware structure
1133 * Stops the receive data path.
1135 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1137 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1138 (hw), IXGBE_NOT_IMPLEMENTED);
1142 * ixgbe_enable_sec_rx_path - Enables the receive data path
1143 * @hw: pointer to hardware structure
1145 * Enables the receive data path.
1147 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1149 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1150 (hw), IXGBE_NOT_IMPLEMENTED);
1154 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1155 * @hw: pointer to hardware structure
1156 * @mask: Mask to specify which semaphore to acquire
1158 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1159 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1161 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1163 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1164 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1168 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1169 * @hw: pointer to hardware structure
1170 * @mask: Mask to specify which semaphore to release
1172 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1173 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1175 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1177 if (hw->mac.ops.release_swfw_sync)
1178 hw->mac.ops.release_swfw_sync(hw, mask);