lib/librte_pmd_ixgbe/ixgbe/ixgbe_api.h

   1 /*******************************************************************************
   2
   3 Copyright (c) 2001-2012, Intel Corporation
   4 All rights reserved.
   5
   6 Redistribution and use in source and binary forms, with or without
   7 modification, are permitted provided that the following conditions are met:
   8
   9  1. Redistributions of source code must retain the above copyright notice,
  10     this list of conditions and the following disclaimer.
  11
  12  2. Redistributions in binary form must reproduce the above copyright
  13     notice, this list of conditions and the following disclaimer in the
  14     documentation and/or other materials provided with the distribution.
  15
  16  3. Neither the name of the Intel Corporation nor the names of its
  17     contributors may be used to endorse or promote products derived from
  18     this software without specific prior written permission.
  19
  20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30 POSSIBILITY OF SUCH DAMAGE.
  31
  32 ***************************************************************************/
  33
  34 #ifndef _IXGBE_API_H_
  35 #define _IXGBE_API_H_
  36
  37 #include "ixgbe_type.h"
  38
  39 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
  40
  41 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
  42 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
  43 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
  44 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
  45 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
  46 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
  47 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
  48 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
  49 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
  50 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
  51 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
  52 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
  53 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
  54 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
  55
  56 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
  57 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
  58 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  59                        u16 *phy_data);
  60 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  61                         u16 phy_data);
  62
  63 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
  64 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
  65                          ixgbe_link_speed *speed,
  66                          bool *link_up);
  67 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
  68                                ixgbe_link_speed speed,
  69                                bool autoneg,
  70                                bool autoneg_wait_to_complete);
  71 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
  72 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
  73 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
  74 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  75                            bool autoneg, bool autoneg_wait_to_complete);
  76 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  77                      bool *link_up, bool link_up_wait_to_complete);
  78 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  79                             bool *autoneg);
  80 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
  81 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
  82 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
  83 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
  84
  85 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
  86 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
  87 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
  88                               u16 words, u16 *data);
  89 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
  90 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
  91                              u16 words, u16 *data);
  92
  93 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
  94 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
  95
  96 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
  97 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  98                   u32 enable_addr);
  99 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
 100 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 101 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 102 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
 103 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
 104 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
 105                               u32 addr_count, ixgbe_mc_addr_itr func);
 106 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
 107                               u32 mc_addr_count, ixgbe_mc_addr_itr func,
 108                               bool clear);
 109 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
 110 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
 111 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
 112 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
 113 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
 114                    u32 vind, bool vlan_on);
 115
 116 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
 117 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
 118                          u8 ver);
 119 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
 120 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
 121                                    u16 *firmware_version);
 122 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
 123 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
 124 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
 125 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
 126 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
 127 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
 128 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
 129 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 130 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 131 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
 132                                           union ixgbe_atr_hash_dword input,
 133                                           union ixgbe_atr_hash_dword common,
 134                                           u8 queue);
 135 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 136                                     union ixgbe_atr_input *input_mask);
 137 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
 138                                           union ixgbe_atr_input *input,
 139                                           u16 soft_id, u8 queue);
 140 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
 141                                           union ixgbe_atr_input *input,
 142                                           u16 soft_id);
 143 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
 144                                         union ixgbe_atr_input *input,
 145                                         union ixgbe_atr_input *mask,
 146                                         u16 soft_id,
 147                                         u8 queue);
 148 void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
 149                                           union ixgbe_atr_input *mask);
 150 u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
 151                                      union ixgbe_atr_hash_dword common);
 152 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 153                         u8 *data);
 154 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 155                          u8 data);
 156 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
 157 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 158 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 159 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
 160 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
 161 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
 162 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 163                          u16 *wwpn_prefix);
 164 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
 165
 166 #endif /* _IXGBE_API_H_ */