1 /*******************************************************************************
3 Copyright (c) 2001-2012, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
39 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
40 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);
41 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);
42 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);
43 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw);
44 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
45 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
46 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);
47 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
48 ixgbe_link_speed speed, bool autoneg,
49 bool autoneg_wait_to_complete);
50 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
51 bool *link_up, bool autoneg_wait_to_complete);
52 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
54 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
55 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
56 u32 mc_addr_count, ixgbe_mc_addr_itr,
58 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
60 #ifndef IXGBE_VFWRITE_REG
61 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
63 #ifndef IXGBE_VFREAD_REG
64 #define IXGBE_VFREAD_REG IXGBE_READ_REG
68 * ixgbe_init_ops_vf - Initialize the pointers for vf
69 * @hw: pointer to hardware structure
71 * This will assign function pointers, adapter-specific functions can
72 * override the assignment of generic function pointers by assigning
73 * their own adapter-specific function pointers.
74 * Does not touch the hardware.
76 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
79 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
80 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
81 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
82 /* Cannot clear stats on VF */
83 hw->mac.ops.clear_hw_cntrs = NULL;
84 hw->mac.ops.get_media_type = NULL;
85 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
86 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
87 hw->mac.ops.get_bus_info = NULL;
90 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
91 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
92 hw->mac.ops.get_link_capabilities = NULL;
94 /* RAR, Multicast, VLAN */
95 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
96 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
97 hw->mac.ops.init_rx_addrs = NULL;
98 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
99 hw->mac.ops.enable_mc = NULL;
100 hw->mac.ops.disable_mc = NULL;
101 hw->mac.ops.clear_vfta = NULL;
102 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
104 hw->mac.max_tx_queues = 1;
105 hw->mac.max_rx_queues = 1;
107 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
109 return IXGBE_SUCCESS;
113 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
114 * @hw: pointer to hardware structure
116 * Starts the hardware by filling the bus info structure and media type, clears
117 * all on chip counters, initializes receive address registers, multicast
118 * table, VLAN filter table, calls routine to set up link and flow control
119 * settings, and leaves transmit and receive units disabled and uninitialized
121 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
123 /* Clear adapter stopped flag */
124 hw->adapter_stopped = FALSE;
126 return IXGBE_SUCCESS;
130 * ixgbe_init_hw_vf - virtual function hardware initialization
131 * @hw: pointer to hardware structure
133 * Initialize the hardware by resetting the hardware and then starting
136 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
138 s32 status = hw->mac.ops.start_hw(hw);
140 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
146 * ixgbe_reset_hw_vf - Performs hardware reset
147 * @hw: pointer to hardware structure
149 * Resets the hardware by reseting the transmit and receive units, masks and
150 * clears all interrupts.
152 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
154 struct ixgbe_mbx_info *mbx = &hw->mbx;
155 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
156 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
157 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
158 u8 *addr = (u8 *)(&msgbuf[1]);
160 DEBUGFUNC("ixgbevf_reset_hw_vf");
162 /* Call adapter stop to disable tx/rx and clear interrupts */
163 hw->mac.ops.stop_adapter(hw);
165 DEBUGOUT("Issuing a function level reset to MAC\n");
167 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST;
168 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl);
169 IXGBE_WRITE_FLUSH(hw);
173 /* we cannot reset while the RSTI / RSTD bits are asserted */
174 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
180 /* mailbox timeout can now become active */
181 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
183 msgbuf[0] = IXGBE_VF_RESET;
184 mbx->ops.write_posted(hw, msgbuf, 1, 0);
189 * set our "perm_addr" based on info provided by PF
190 * also set up the mc_filter_type which is piggy backed
191 * on the mac address in word 3
193 ret_val = mbx->ops.read_posted(hw, msgbuf,
194 IXGBE_VF_PERMADDR_MSG_LEN, 0);
196 if (msgbuf[0] == (IXGBE_VF_RESET |
197 IXGBE_VT_MSGTYPE_ACK)) {
198 memcpy(hw->mac.perm_addr, addr,
199 IXGBE_ETH_LENGTH_OF_ADDRESS);
200 hw->mac.mc_filter_type =
201 msgbuf[IXGBE_VF_MC_TYPE_WORD];
203 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
212 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
213 * @hw: pointer to hardware structure
215 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
216 * disables transmit and receive units. The adapter_stopped flag is used by
217 * the shared code and drivers to determine if the adapter is in a stopped
218 * state and should not touch the hardware.
220 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
226 * Set the adapter_stopped flag so other driver functions stop touching
229 hw->adapter_stopped = TRUE;
231 /* Clear interrupt mask to stop from interrupts being generated */
232 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
234 /* Clear any pending interrupts, flush previous writes */
235 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
237 /* Disable the transmit unit. Each queue must be disabled. */
238 for (i = 0; i < hw->mac.max_tx_queues; i++)
239 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
241 /* Disable the receive unit by stopping each queue */
242 for (i = 0; i < hw->mac.max_rx_queues; i++) {
243 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
244 reg_val &= ~IXGBE_RXDCTL_ENABLE;
245 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
248 /* flush all queues disables */
249 IXGBE_WRITE_FLUSH(hw);
252 return IXGBE_SUCCESS;
256 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
257 * @hw: pointer to hardware structure
258 * @mc_addr: the multicast address
260 * Extracts the 12 bits, from a multicast address, to determine which
261 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
262 * incoming rx multicast addresses, to determine the bit-vector to check in
263 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
264 * by the MO field of the MCSTCTRL. The MO field is set during initialization
267 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
271 switch (hw->mac.mc_filter_type) {
272 case 0: /* use bits [47:36] of the address */
273 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
275 case 1: /* use bits [46:35] of the address */
276 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
278 case 2: /* use bits [45:34] of the address */
279 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
281 case 3: /* use bits [43:32] of the address */
282 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
284 default: /* Invalid mc_filter_type */
285 DEBUGOUT("MC filter type param set incorrectly\n");
290 /* vector can only be 12-bits or boundary will be exceeded */
296 * ixgbe_set_rar_vf - set device MAC address
297 * @hw: pointer to hardware structure
298 * @index: Receive address register to write
299 * @addr: Address to put into receive address register
300 * @vmdq: VMDq "set" or "pool" index
301 * @enable_addr: set flag that address is active
303 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
306 struct ixgbe_mbx_info *mbx = &hw->mbx;
308 u8 *msg_addr = (u8 *)(&msgbuf[1]);
310 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
312 memset(msgbuf, 0, 12);
313 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
314 memcpy(msg_addr, addr, 6);
315 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
318 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
320 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
322 /* if nacked the address was rejected, use "perm_addr" */
324 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
325 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
331 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
332 * @hw: pointer to the HW structure
333 * @mc_addr_list: array of multicast addresses to program
334 * @mc_addr_count: number of multicast addresses to program
335 * @next: caller supplied function to return next address in list
337 * Updates the Multicast Table Array.
339 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
340 u32 mc_addr_count, ixgbe_mc_addr_itr next,
343 struct ixgbe_mbx_info *mbx = &hw->mbx;
344 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
345 u16 *vector_list = (u16 *)&msgbuf[1];
350 UNREFERENCED_1PARAMETER(clear);
352 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
354 /* Each entry in the list uses 1 16 bit word. We have 30
355 * 16 bit words available in our HW msg buffer (minus 1 for the
356 * msg type). That's 30 hash values if we pack 'em right. If
357 * there are more than 30 MC addresses to add then punt the
358 * extras for now and then add code to handle more than 30 later.
359 * It would be unusual for a server to request that many multi-cast
360 * addresses except for in large enterprise network environments.
363 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
365 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
366 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
367 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
369 for (i = 0; i < cnt; i++) {
370 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
371 DEBUGOUT1("Hash value = 0x%03X\n", vector);
372 vector_list[i] = (u16)vector;
375 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
379 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
380 * @hw: pointer to the HW structure
381 * @vlan: 12 bit VLAN ID
382 * @vind: unused by VF drivers
383 * @vlan_on: if TRUE then set bit, else clear bit
385 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
387 struct ixgbe_mbx_info *mbx = &hw->mbx;
389 UNREFERENCED_1PARAMETER(vind);
391 msgbuf[0] = IXGBE_VF_SET_VLAN;
393 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
394 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
396 return(mbx->ops.write_posted(hw, msgbuf, 2, 0));
400 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
401 * @hw: pointer to hardware structure
403 * Returns the number of transmit queues for the given adapter.
405 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
407 UNREFERENCED_1PARAMETER(hw);
408 return IXGBE_VF_MAX_TX_QUEUES;
412 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
413 * @hw: pointer to hardware structure
415 * Returns the number of receive queues for the given adapter.
417 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
419 UNREFERENCED_1PARAMETER(hw);
420 return IXGBE_VF_MAX_RX_QUEUES;
424 * ixgbe_get_mac_addr_vf - Read device MAC address
425 * @hw: pointer to the HW structure
427 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
431 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
432 mac_addr[i] = hw->mac.perm_addr[i];
434 return IXGBE_SUCCESS;
437 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
439 struct ixgbe_mbx_info *mbx = &hw->mbx;
441 u8 *msg_addr = (u8 *)(&msgbuf[1]);
444 memset(msgbuf, 0, sizeof(msgbuf));
446 * If index is one then this is the start of a new list and needs
447 * indication to the PF so it can do it's own list management.
448 * If it is zero then that tells the PF to just clear all of
449 * this VF's macvlans and there is no new list.
451 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
452 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
454 memcpy(msg_addr, addr, 6);
455 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
458 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
460 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
464 (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
465 ret_val = IXGBE_ERR_OUT_OF_MEM;
471 * ixgbe_setup_mac_link_vf - Setup MAC link settings
472 * @hw: pointer to hardware structure
473 * @speed: new link speed
474 * @autoneg: TRUE if autonegotiation enabled
475 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
477 * Set the link speed in the AUTOC register and restarts link.
479 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
480 ixgbe_link_speed speed, bool autoneg,
481 bool autoneg_wait_to_complete)
483 UNREFERENCED_4PARAMETER(hw, speed, autoneg, autoneg_wait_to_complete);
484 return IXGBE_SUCCESS;
488 * ixgbe_check_mac_link_vf - Get link/speed status
489 * @hw: pointer to hardware structure
490 * @speed: pointer to link speed
491 * @link_up: TRUE is link is up, FALSE otherwise
492 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
494 * Reads the links register to determine if link is up and the current speed
496 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
497 bool *link_up, bool autoneg_wait_to_complete)
500 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
502 if (!(hw->mbx.ops.check_for_rst(hw, 0))) {
508 links_reg = IXGBE_VFREAD_REG(hw, IXGBE_VFLINKS);
510 if (links_reg & IXGBE_LINKS_UP)
515 if ((links_reg & IXGBE_LINKS_SPEED_10G_82599) ==
516 IXGBE_LINKS_SPEED_10G_82599)
517 *speed = IXGBE_LINK_SPEED_10GB_FULL;
519 *speed = IXGBE_LINK_SPEED_1GB_FULL;
521 return IXGBE_SUCCESS;