1 /******************************************************************************
3 Copyright (c) 2001-2010, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ******************************************************************************/
36 #include "ixgbe_api.h"
37 #include "ixgbe_type.h"
40 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
41 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);
42 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);
43 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);
44 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw);
45 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
46 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
47 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);
48 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
49 ixgbe_link_speed speed, bool autoneg,
50 bool autoneg_wait_to_complete);
51 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
52 bool *link_up, bool autoneg_wait_to_complete);
53 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
55 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
56 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
57 u32 mc_addr_count, ixgbe_mc_addr_itr,
59 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
61 #ifndef IXGBE_VFWRITE_REG
62 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
64 #ifndef IXGBE_VFREAD_REG
65 #define IXGBE_VFREAD_REG IXGBE_READ_REG
69 * ixgbe_init_ops_vf - Initialize the pointers for vf
70 * @hw: pointer to hardware structure
72 * This will assign function pointers, adapter-specific functions can
73 * override the assignment of generic function pointers by assigning
74 * their own adapter-specific function pointers.
75 * Does not touch the hardware.
77 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
80 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
81 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
82 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
83 /* Cannot clear stats on VF */
84 hw->mac.ops.clear_hw_cntrs = NULL;
85 hw->mac.ops.get_media_type = NULL;
86 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
87 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
88 hw->mac.ops.get_bus_info = NULL;
91 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
92 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
93 hw->mac.ops.get_link_capabilities = NULL;
95 /* RAR, Multicast, VLAN */
96 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
97 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
98 hw->mac.ops.init_rx_addrs = NULL;
99 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
100 hw->mac.ops.enable_mc = NULL;
101 hw->mac.ops.disable_mc = NULL;
102 hw->mac.ops.clear_vfta = NULL;
103 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
105 hw->mac.max_tx_queues = 1;
106 hw->mac.max_rx_queues = 1;
108 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
110 return IXGBE_SUCCESS;
114 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
115 * @hw: pointer to hardware structure
117 * Starts the hardware by filling the bus info structure and media type, clears
118 * all on chip counters, initializes receive address registers, multicast
119 * table, VLAN filter table, calls routine to set up link and flow control
120 * settings, and leaves transmit and receive units disabled and uninitialized
122 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
124 /* Clear adapter stopped flag */
125 hw->adapter_stopped = FALSE;
127 return IXGBE_SUCCESS;
131 * ixgbe_init_hw_vf - virtual function hardware initialization
132 * @hw: pointer to hardware structure
134 * Initialize the hardware by resetting the hardware and then starting
137 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
139 s32 status = hw->mac.ops.start_hw(hw);
141 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
147 * ixgbe_reset_hw_vf - Performs hardware reset
148 * @hw: pointer to hardware structure
150 * Resets the hardware by reseting the transmit and receive units, masks and
151 * clears all interrupts.
153 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
155 struct ixgbe_mbx_info *mbx = &hw->mbx;
156 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
157 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
158 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
159 u8 *addr = (u8 *)(&msgbuf[1]);
161 DEBUGFUNC("ixgbevf_reset_hw_vf");
163 /* Call adapter stop to disable tx/rx and clear interrupts */
164 hw->mac.ops.stop_adapter(hw);
166 DEBUGOUT("Issuing a function level reset to MAC\n");
168 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST;
169 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl);
170 IXGBE_WRITE_FLUSH(hw);
174 /* we cannot reset while the RSTI / RSTD bits are asserted */
175 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
181 /* mailbox timeout can now become active */
182 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
184 msgbuf[0] = IXGBE_VF_RESET;
185 mbx->ops.write_posted(hw, msgbuf, 1, 0);
190 * set our "perm_addr" based on info provided by PF
191 * also set up the mc_filter_type which is piggy backed
192 * on the mac address in word 3
194 ret_val = mbx->ops.read_posted(hw, msgbuf,
195 IXGBE_VF_PERMADDR_MSG_LEN, 0);
197 if (msgbuf[0] == (IXGBE_VF_RESET |
198 IXGBE_VT_MSGTYPE_ACK)) {
199 memcpy(hw->mac.perm_addr, addr,
200 IXGBE_ETH_LENGTH_OF_ADDRESS);
201 hw->mac.mc_filter_type =
202 msgbuf[IXGBE_VF_MC_TYPE_WORD];
204 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
213 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
214 * @hw: pointer to hardware structure
216 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
217 * disables transmit and receive units. The adapter_stopped flag is used by
218 * the shared code and drivers to determine if the adapter is in a stopped
219 * state and should not touch the hardware.
221 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
227 * Set the adapter_stopped flag so other driver functions stop touching
230 hw->adapter_stopped = TRUE;
232 /* Clear interrupt mask to stop from interrupts being generated */
233 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
235 /* Clear any pending interrupts, flush previous writes */
236 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
238 /* Disable the transmit unit. Each queue must be disabled. */
239 for (i = 0; i < hw->mac.max_tx_queues; i++)
240 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
242 /* Disable the receive unit by stopping each queue */
243 for (i = 0; i < hw->mac.max_rx_queues; i++) {
244 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
245 reg_val &= ~IXGBE_RXDCTL_ENABLE;
246 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
249 /* flush all queues disables */
250 IXGBE_WRITE_FLUSH(hw);
253 return IXGBE_SUCCESS;
257 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
258 * @hw: pointer to hardware structure
259 * @mc_addr: the multicast address
261 * Extracts the 12 bits, from a multicast address, to determine which
262 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
263 * incoming rx multicast addresses, to determine the bit-vector to check in
264 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
265 * by the MO field of the MCSTCTRL. The MO field is set during initialization
268 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
272 switch (hw->mac.mc_filter_type) {
273 case 0: /* use bits [47:36] of the address */
274 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
276 case 1: /* use bits [46:35] of the address */
277 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
279 case 2: /* use bits [45:34] of the address */
280 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
282 case 3: /* use bits [43:32] of the address */
283 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
285 default: /* Invalid mc_filter_type */
286 DEBUGOUT("MC filter type param set incorrectly\n");
291 /* vector can only be 12-bits or boundary will be exceeded */
297 * ixgbe_set_rar_vf - set device MAC address
298 * @hw: pointer to hardware structure
299 * @index: Receive address register to write
300 * @addr: Address to put into receive address register
301 * @vmdq: VMDq "set" or "pool" index
302 * @enable_addr: set flag that address is active
304 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
307 struct ixgbe_mbx_info *mbx = &hw->mbx;
309 u8 *msg_addr = (u8 *)(&msgbuf[1]);
311 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
313 memset(msgbuf, 0, 12);
314 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
315 memcpy(msg_addr, addr, 6);
316 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
319 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
321 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
323 /* if nacked the address was rejected, use "perm_addr" */
325 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
326 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
332 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
333 * @hw: pointer to the HW structure
334 * @mc_addr_list: array of multicast addresses to program
335 * @mc_addr_count: number of multicast addresses to program
336 * @next: caller supplied function to return next address in list
338 * Updates the Multicast Table Array.
340 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
341 u32 mc_addr_count, ixgbe_mc_addr_itr next,
344 struct ixgbe_mbx_info *mbx = &hw->mbx;
345 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
346 u16 *vector_list = (u16 *)&msgbuf[1];
351 UNREFERENCED_1PARAMETER(clear);
353 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
355 /* Each entry in the list uses 1 16 bit word. We have 30
356 * 16 bit words available in our HW msg buffer (minus 1 for the
357 * msg type). That's 30 hash values if we pack 'em right. If
358 * there are more than 30 MC addresses to add then punt the
359 * extras for now and then add code to handle more than 30 later.
360 * It would be unusual for a server to request that many multi-cast
361 * addresses except for in large enterprise network environments.
364 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
366 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
367 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
368 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
370 for (i = 0; i < cnt; i++) {
371 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
372 DEBUGOUT1("Hash value = 0x%03X\n", vector);
373 vector_list[i] = (u16)vector;
376 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
380 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
381 * @hw: pointer to the HW structure
382 * @vlan: 12 bit VLAN ID
383 * @vind: unused by VF drivers
384 * @vlan_on: if TRUE then set bit, else clear bit
386 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
388 struct ixgbe_mbx_info *mbx = &hw->mbx;
390 UNREFERENCED_1PARAMETER(vind);
392 msgbuf[0] = IXGBE_VF_SET_VLAN;
394 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
395 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
397 return(mbx->ops.write_posted(hw, msgbuf, 2, 0));
401 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
402 * @hw: pointer to hardware structure
404 * Returns the number of transmit queues for the given adapter.
406 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
408 UNREFERENCED_1PARAMETER(hw);
409 return IXGBE_VF_MAX_TX_QUEUES;
413 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
414 * @hw: pointer to hardware structure
416 * Returns the number of receive queues for the given adapter.
418 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
420 UNREFERENCED_1PARAMETER(hw);
421 return IXGBE_VF_MAX_RX_QUEUES;
425 * ixgbe_get_mac_addr_vf - Read device MAC address
426 * @hw: pointer to the HW structure
428 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
432 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
433 mac_addr[i] = hw->mac.perm_addr[i];
435 return IXGBE_SUCCESS;
438 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
440 struct ixgbe_mbx_info *mbx = &hw->mbx;
442 u8 *msg_addr = (u8 *)(&msgbuf[1]);
445 memset(msgbuf, 0, sizeof(msgbuf));
447 * If index is one then this is the start of a new list and needs
448 * indication to the PF so it can do it's own list management.
449 * If it is zero then that tells the PF to just clear all of
450 * this VF's macvlans and there is no new list.
452 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
453 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
455 memcpy(msg_addr, addr, 6);
456 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
459 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
461 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
465 (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
466 ret_val = IXGBE_ERR_OUT_OF_MEM;
472 * ixgbe_setup_mac_link_vf - Setup MAC link settings
473 * @hw: pointer to hardware structure
474 * @speed: new link speed
475 * @autoneg: TRUE if autonegotiation enabled
476 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
478 * Set the link speed in the AUTOC register and restarts link.
480 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
481 ixgbe_link_speed speed, bool autoneg,
482 bool autoneg_wait_to_complete)
484 UNREFERENCED_4PARAMETER(hw, speed, autoneg, autoneg_wait_to_complete);
485 return IXGBE_SUCCESS;
489 * ixgbe_check_mac_link_vf - Get link/speed status
490 * @hw: pointer to hardware structure
491 * @speed: pointer to link speed
492 * @link_up: TRUE is link is up, FALSE otherwise
493 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
495 * Reads the links register to determine if link is up and the current speed
497 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
498 bool *link_up, bool autoneg_wait_to_complete)
501 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
503 if (!(hw->mbx.ops.check_for_rst(hw, 0))) {
509 links_reg = IXGBE_VFREAD_REG(hw, IXGBE_VFLINKS);
511 if (links_reg & IXGBE_LINKS_UP)
516 if ((links_reg & IXGBE_LINKS_SPEED_10G_82599) ==
517 IXGBE_LINKS_SPEED_10G_82599)
518 *speed = IXGBE_LINK_SPEED_10GB_FULL;
520 *speed = IXGBE_LINK_SPEED_1GB_FULL;
522 return IXGBE_SUCCESS;