1 /*******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
38 #ident "$Id: ixgbe_vf.c,v 1.62 2013/06/27 21:30:59 jtkirshe Exp $"
40 #ifndef IXGBE_VFWRITE_REG
41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
43 #ifndef IXGBE_VFREAD_REG
44 #define IXGBE_VFREAD_REG IXGBE_READ_REG
48 * ixgbe_init_ops_vf - Initialize the pointers for vf
49 * @hw: pointer to hardware structure
51 * This will assign function pointers, adapter-specific functions can
52 * override the assignment of generic function pointers by assigning
53 * their own adapter-specific function pointers.
54 * Does not touch the hardware.
56 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
59 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
60 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
61 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
62 /* Cannot clear stats on VF */
63 hw->mac.ops.clear_hw_cntrs = NULL;
64 hw->mac.ops.get_media_type = NULL;
65 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
66 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
67 hw->mac.ops.get_bus_info = NULL;
70 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
71 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
72 hw->mac.ops.get_link_capabilities = NULL;
74 /* RAR, Multicast, VLAN */
75 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
76 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
77 hw->mac.ops.init_rx_addrs = NULL;
78 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
93 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
94 * @hw: pointer to hardware structure
96 * Starts the hardware by filling the bus info structure and media type, clears
97 * all on chip counters, initializes receive address registers, multicast
98 * table, VLAN filter table, calls routine to set up link and flow control
99 * settings, and leaves transmit and receive units disabled and uninitialized
101 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
103 /* Clear adapter stopped flag */
104 hw->adapter_stopped = false;
106 return IXGBE_SUCCESS;
110 * ixgbe_init_hw_vf - virtual function hardware initialization
111 * @hw: pointer to hardware structure
113 * Initialize the hardware by resetting the hardware and then starting
116 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
118 s32 status = hw->mac.ops.start_hw(hw);
120 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
126 * ixgbe_reset_hw_vf - Performs hardware reset
127 * @hw: pointer to hardware structure
129 * Resets the hardware by reseting the transmit and receive units, masks and
130 * clears all interrupts.
132 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
134 struct ixgbe_mbx_info *mbx = &hw->mbx;
135 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
136 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
137 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
138 u8 *addr = (u8 *)(&msgbuf[1]);
140 DEBUGFUNC("ixgbevf_reset_hw_vf");
142 /* Call adapter stop to disable tx/rx and clear interrupts */
143 hw->mac.ops.stop_adapter(hw);
145 /* reset the api version */
146 hw->api_version = ixgbe_mbox_api_10;
148 DEBUGOUT("Issuing a function level reset to MAC\n");
150 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
151 IXGBE_WRITE_FLUSH(hw);
155 /* we cannot reset while the RSTI / RSTD bits are asserted */
156 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
162 return IXGBE_ERR_RESET_FAILED;
164 /* mailbox timeout can now become active */
165 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
167 msgbuf[0] = IXGBE_VF_RESET;
168 mbx->ops.write_posted(hw, msgbuf, 1, 0);
173 * set our "perm_addr" based on info provided by PF
174 * also set up the mc_filter_type which is piggy backed
175 * on the mac address in word 3
177 ret_val = mbx->ops.read_posted(hw, msgbuf,
178 IXGBE_VF_PERMADDR_MSG_LEN, 0);
182 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
183 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
184 return IXGBE_ERR_INVALID_MAC_ADDR;
186 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
187 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
193 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
194 * @hw: pointer to hardware structure
196 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
197 * disables transmit and receive units. The adapter_stopped flag is used by
198 * the shared code and drivers to determine if the adapter is in a stopped
199 * state and should not touch the hardware.
201 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
207 * Set the adapter_stopped flag so other driver functions stop touching
210 hw->adapter_stopped = true;
212 /* Clear interrupt mask to stop from interrupts being generated */
213 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
215 /* Clear any pending interrupts, flush previous writes */
216 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
218 /* Disable the transmit unit. Each queue must be disabled. */
219 for (i = 0; i < hw->mac.max_tx_queues; i++)
220 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
222 /* Disable the receive unit by stopping each queue */
223 for (i = 0; i < hw->mac.max_rx_queues; i++) {
224 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
225 reg_val &= ~IXGBE_RXDCTL_ENABLE;
226 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
228 /* Clear packet split and pool config */
229 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
231 /* flush all queues disables */
232 IXGBE_WRITE_FLUSH(hw);
235 return IXGBE_SUCCESS;
239 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
240 * @hw: pointer to hardware structure
241 * @mc_addr: the multicast address
243 * Extracts the 12 bits, from a multicast address, to determine which
244 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
245 * incoming rx multicast addresses, to determine the bit-vector to check in
246 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
247 * by the MO field of the MCSTCTRL. The MO field is set during initialization
250 STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
254 switch (hw->mac.mc_filter_type) {
255 case 0: /* use bits [47:36] of the address */
256 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
258 case 1: /* use bits [46:35] of the address */
259 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
261 case 2: /* use bits [45:34] of the address */
262 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
264 case 3: /* use bits [43:32] of the address */
265 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
267 default: /* Invalid mc_filter_type */
268 DEBUGOUT("MC filter type param set incorrectly\n");
273 /* vector can only be 12-bits or boundary will be exceeded */
278 STATIC void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
281 struct ixgbe_mbx_info *mbx = &hw->mbx;
282 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
283 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
286 mbx->ops.read_posted(hw, retmsg, size, 0);
290 * ixgbe_set_rar_vf - set device MAC address
291 * @hw: pointer to hardware structure
292 * @index: Receive address register to write
293 * @addr: Address to put into receive address register
294 * @vmdq: VMDq "set" or "pool" index
295 * @enable_addr: set flag that address is active
297 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
300 struct ixgbe_mbx_info *mbx = &hw->mbx;
302 u8 *msg_addr = (u8 *)(&msgbuf[1]);
304 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
306 memset(msgbuf, 0, 12);
307 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
308 memcpy(msg_addr, addr, 6);
309 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
312 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
314 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
316 /* if nacked the address was rejected, use "perm_addr" */
318 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
319 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
325 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
326 * @hw: pointer to the HW structure
327 * @mc_addr_list: array of multicast addresses to program
328 * @mc_addr_count: number of multicast addresses to program
329 * @next: caller supplied function to return next address in list
331 * Updates the Multicast Table Array.
333 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
334 u32 mc_addr_count, ixgbe_mc_addr_itr next,
337 struct ixgbe_mbx_info *mbx = &hw->mbx;
338 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
339 u16 *vector_list = (u16 *)&msgbuf[1];
344 UNREFERENCED_1PARAMETER(clear);
346 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
348 /* Each entry in the list uses 1 16 bit word. We have 30
349 * 16 bit words available in our HW msg buffer (minus 1 for the
350 * msg type). That's 30 hash values if we pack 'em right. If
351 * there are more than 30 MC addresses to add then punt the
352 * extras for now and then add code to handle more than 30 later.
353 * It would be unusual for a server to request that many multi-cast
354 * addresses except for in large enterprise network environments.
357 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
359 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
360 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
361 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
363 for (i = 0; i < cnt; i++) {
364 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
365 DEBUGOUT1("Hash value = 0x%03X\n", vector);
366 vector_list[i] = (u16)vector;
369 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
373 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
374 * @hw: pointer to the HW structure
375 * @vlan: 12 bit VLAN ID
376 * @vind: unused by VF drivers
377 * @vlan_on: if true then set bit, else clear bit
379 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
381 struct ixgbe_mbx_info *mbx = &hw->mbx;
384 UNREFERENCED_1PARAMETER(vind);
386 msgbuf[0] = IXGBE_VF_SET_VLAN;
388 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
389 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
391 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
393 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
395 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
396 return IXGBE_SUCCESS;
398 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
402 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
403 * @hw: pointer to hardware structure
405 * Returns the number of transmit queues for the given adapter.
407 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
409 UNREFERENCED_1PARAMETER(hw);
410 return IXGBE_VF_MAX_TX_QUEUES;
414 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
415 * @hw: pointer to hardware structure
417 * Returns the number of receive queues for the given adapter.
419 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
421 UNREFERENCED_1PARAMETER(hw);
422 return IXGBE_VF_MAX_RX_QUEUES;
426 * ixgbe_get_mac_addr_vf - Read device MAC address
427 * @hw: pointer to the HW structure
429 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
433 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
434 mac_addr[i] = hw->mac.perm_addr[i];
436 return IXGBE_SUCCESS;
439 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
441 struct ixgbe_mbx_info *mbx = &hw->mbx;
443 u8 *msg_addr = (u8 *)(&msgbuf[1]);
446 memset(msgbuf, 0, sizeof(msgbuf));
448 * If index is one then this is the start of a new list and needs
449 * indication to the PF so it can do it's own list management.
450 * If it is zero then that tells the PF to just clear all of
451 * this VF's macvlans and there is no new list.
453 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
454 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
456 memcpy(msg_addr, addr, 6);
457 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
460 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
462 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
465 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
466 ret_val = IXGBE_ERR_OUT_OF_MEM;
472 * ixgbe_setup_mac_link_vf - Setup MAC link settings
473 * @hw: pointer to hardware structure
474 * @speed: new link speed
475 * @autoneg: true if autonegotiation enabled
476 * @autoneg_wait_to_complete: true when waiting for completion is needed
478 * Set the link speed in the AUTOC register and restarts link.
480 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
481 bool autoneg_wait_to_complete)
483 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
484 return IXGBE_SUCCESS;
488 * ixgbe_check_mac_link_vf - Get link/speed status
489 * @hw: pointer to hardware structure
490 * @speed: pointer to link speed
491 * @link_up: true is link is up, false otherwise
492 * @autoneg_wait_to_complete: true when waiting for completion is needed
494 * Reads the links register to determine if link is up and the current speed
496 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
497 bool *link_up, bool autoneg_wait_to_complete)
499 struct ixgbe_mbx_info *mbx = &hw->mbx;
500 struct ixgbe_mac_info *mac = &hw->mac;
501 s32 ret_val = IXGBE_SUCCESS;
504 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
506 /* If we were hit with a reset drop the link */
507 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
508 mac->get_link_status = true;
510 if (!mac->get_link_status)
513 /* if link status is down no point in checking to see if pf is up */
514 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
515 if (!(links_reg & IXGBE_LINKS_UP))
518 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
519 case IXGBE_LINKS_SPEED_10G_82599:
520 *speed = IXGBE_LINK_SPEED_10GB_FULL;
522 case IXGBE_LINKS_SPEED_1G_82599:
523 *speed = IXGBE_LINK_SPEED_1GB_FULL;
525 case IXGBE_LINKS_SPEED_100_82599:
526 *speed = IXGBE_LINK_SPEED_100_FULL;
530 /* if the read failed it could just be a mailbox collision, best wait
531 * until we are called again and don't report an error
533 if (mbx->ops.read(hw, &in_msg, 1, 0))
536 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
537 /* msg is not CTS and is NACK we must have lost CTS status */
538 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
543 /* the pf is talking, if we timed out in the past we reinit */
549 /* if we passed all the tests above then the link is up and we no
550 * longer need to check for link
552 mac->get_link_status = false;
555 *link_up = !mac->get_link_status;
560 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
561 * @hw: pointer to the HW structure
562 * @max_size: value to assign to max frame size
564 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
568 msgbuf[0] = IXGBE_VF_SET_LPE;
569 msgbuf[1] = max_size;
570 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
574 * ixgbevf_negotiate_api_version - Negotiate supported API version
575 * @hw: pointer to the HW structure
576 * @api: integer containing requested API version
578 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
583 /* Negotiate the mailbox API version */
584 msg[0] = IXGBE_VF_API_NEGOTIATE;
587 err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
590 err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
593 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
595 /* Store value and return 0 on success */
596 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
597 hw->api_version = api;
601 err = IXGBE_ERR_INVALID_ARGUMENT;
607 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
608 unsigned int *default_tc)
613 /* do nothing if API doesn't support ixgbevf_get_queues */
614 switch (hw->api_version) {
615 case ixgbe_mbox_api_11:
621 /* Fetch queue configuration from the PF */
622 msg[0] = IXGBE_VF_GET_QUEUES;
623 msg[1] = msg[2] = msg[3] = msg[4] = 0;
624 err = hw->mbx.ops.write_posted(hw, msg, 5, 0);
627 err = hw->mbx.ops.read_posted(hw, msg, 5, 0);
630 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
633 * if we we didn't get an ACK there must have been
634 * some sort of mailbox error so we should treat it
637 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
638 return IXGBE_ERR_MBX;
640 /* record and validate values from message */
641 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
642 if (hw->mac.max_tx_queues == 0 ||
643 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
644 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
646 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
647 if (hw->mac.max_rx_queues == 0 ||
648 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
649 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
651 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
652 /* in case of unknown state assume we cannot tag frames */
653 if (*num_tcs > hw->mac.max_rx_queues)
656 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
657 /* default to queue 0 on out-of-bounds queue number */
658 if (*default_tc >= hw->mac.max_tx_queues)