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34 #ifndef RTE_PMD_MLX4_H_
35 #define RTE_PMD_MLX4_H_
42 * Maximum number of simultaneous MAC addresses supported.
44 * According to ConnectX's Programmer Reference Manual:
45 * The L2 Address Match is implemented by comparing a MAC/VLAN combination
46 * of 128 MAC addresses and 127 VLAN values, comprising 128x127 possible
49 #define MLX4_MAX_MAC_ADDRESSES 128
51 /* Maximum number of simultaneous VLAN filters supported. See above. */
52 #define MLX4_MAX_VLAN_IDS 127
54 /* Maximum number of Scatter/Gather Elements per Work Request. */
55 #ifndef MLX4_PMD_SGE_WR_N
56 #define MLX4_PMD_SGE_WR_N 4
59 /* Maximum size for inline data. */
60 #ifndef MLX4_PMD_MAX_INLINE
61 #define MLX4_PMD_MAX_INLINE 0
65 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
66 * from which buffers are to be transmitted will have to be mapped by this
67 * driver to their own Memory Region (MR). This is a slow operation.
69 * This value is always 1 for RX queues.
71 #ifndef MLX4_PMD_TX_MP_CACHE
72 #define MLX4_PMD_TX_MP_CACHE 8
76 * If defined, only use software counters. The PMD will never ask the hardware
77 * for these, and many of them won't be available.
79 #ifndef MLX4_PMD_SOFT_COUNTERS
80 #define MLX4_PMD_SOFT_COUNTERS 1
84 * If defined, enable VMware compatibility code. It also requires the
85 * environment variable MLX4_COMPAT_VMWARE set to a nonzero value at runtime.
87 #ifndef MLX4_COMPAT_VMWARE
88 #define MLX4_COMPAT_VMWARE 1
92 PCI_VENDOR_ID_MELLANOX = 0x15b3,
96 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
97 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
98 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
101 #define MLX4_DRIVER_NAME "librte_pmd_mlx4"
103 /* Bit-field manipulation. */
104 #define BITFIELD_DECLARE(bf, type, size) \
105 type bf[(((size_t)(size) / (sizeof(type) * CHAR_BIT)) + \
106 !!((size_t)(size) % (sizeof(type) * CHAR_BIT)))]
107 #define BITFIELD_DEFINE(bf, type, size) \
108 BITFIELD_DECLARE((bf), type, (size)) = { 0 }
109 #define BITFIELD_SET(bf, b) \
110 (assert((size_t)(b) < (sizeof(bf) * CHAR_BIT)), \
111 (void)((bf)[((b) / (sizeof((bf)[0]) * CHAR_BIT))] |= \
112 ((size_t)1 << ((b) % (sizeof((bf)[0]) * CHAR_BIT)))))
113 #define BITFIELD_RESET(bf, b) \
114 (assert((size_t)(b) < (sizeof(bf) * CHAR_BIT)), \
115 (void)((bf)[((b) / (sizeof((bf)[0]) * CHAR_BIT))] &= \
116 ~((size_t)1 << ((b) % (sizeof((bf)[0]) * CHAR_BIT)))))
117 #define BITFIELD_ISSET(bf, b) \
118 (assert((size_t)(b) < (sizeof(bf) * CHAR_BIT)), \
119 !!(((bf)[((b) / (sizeof((bf)[0]) * CHAR_BIT))] & \
120 ((size_t)1 << ((b) % (sizeof((bf)[0]) * CHAR_BIT))))))
122 /* Number of elements in array. */
123 #define elemof(a) (sizeof(a) / sizeof((a)[0]))
125 /* Cast pointer p to structure member m to its parent structure of type t. */
126 #define containerof(p, t, m) ((t *)((uint8_t *)(p) - offsetof(t, m)))
128 /* Branch prediction helpers. */
130 #define likely(c) __builtin_expect(!!(c), 1)
133 #define unlikely(c) __builtin_expect(!!(c), 0)
139 #define DEBUG__(m, ...) \
140 (fprintf(stderr, "%s:%d: %s(): " m "%c", \
141 __FILE__, __LINE__, __func__, __VA_ARGS__), \
145 * Save/restore errno around DEBUG__().
146 * XXX somewhat undefined behavior, but works.
148 #define DEBUG_(...) \
149 (errno = ((int []){ \
150 *(volatile int *)&errno, \
151 (DEBUG__(__VA_ARGS__), 0) \
153 #define DEBUG(...) DEBUG_(__VA_ARGS__, '\n')
154 #define claim_zero(...) assert((__VA_ARGS__) == 0)
155 #define claim_nonzero(...) assert((__VA_ARGS__) != 0)
156 #define claim_positive(...) assert((__VA_ARGS__) >= 0)
159 #define DEBUG(...) (void)0
160 #define claim_zero(...) (__VA_ARGS__)
161 #define claim_nonzero(...) (__VA_ARGS__)
162 #define claim_positive(...) (__VA_ARGS__)
165 #endif /* RTE_PMD_MLX4_H_ */