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34 #include <sys/queue.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
49 #include <rte_debug.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
55 #include <rte_tailq.h>
57 #include <rte_alarm.h>
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_atomic.h>
61 #include <rte_string_fns.h>
62 #include <rte_malloc.h>
64 #include "vmxnet3/vmxnet3_defs.h"
66 #include "vmxnet3_ring.h"
67 #include "vmxnet3_logs.h"
68 #include "vmxnet3_ethdev.h"
70 #define PROCESS_SYS_EVENTS 0
72 static int eth_vmxnet3_dev_init(struct eth_driver *eth_drv,
73 struct rte_eth_dev *eth_dev);
74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
84 int wait_to_complete);
85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
86 struct rte_eth_stats *stats);
87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
88 struct rte_eth_dev_info *dev_info);
89 #if PROCESS_SYS_EVENTS == 1
90 static void vmxnet3_process_events(struct vmxnet3_hw *);
93 * The set of PCI devices this driver supports
95 static struct rte_pci_id pci_id_vmxnet3_map[] = {
97 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
98 #include "rte_pci_dev_ids.h"
100 { .vendor_id = 0, /* sentinel */ },
103 static struct eth_dev_ops vmxnet3_eth_dev_ops = {
104 .dev_configure = vmxnet3_dev_configure,
105 .dev_start = vmxnet3_dev_start,
106 .dev_stop = vmxnet3_dev_stop,
107 .dev_close = vmxnet3_dev_close,
108 .promiscuous_enable = vmxnet3_dev_promiscuous_enable,
109 .promiscuous_disable = vmxnet3_dev_promiscuous_disable,
110 .allmulticast_enable = vmxnet3_dev_allmulticast_enable,
111 .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
112 .link_update = vmxnet3_dev_link_update,
113 .stats_get = vmxnet3_dev_stats_get,
114 .dev_infos_get = vmxnet3_dev_info_get,
115 .rx_queue_setup = vmxnet3_dev_rx_queue_setup,
116 .rx_queue_release = vmxnet3_dev_rx_queue_release,
117 .tx_queue_setup = vmxnet3_dev_tx_queue_setup,
118 .tx_queue_release = vmxnet3_dev_tx_queue_release,
121 static const struct rte_memzone *
122 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
123 const char *post_string, int socket_id, uint16_t align)
125 char z_name[RTE_MEMZONE_NAMESIZE];
126 const struct rte_memzone *mz;
128 rte_snprintf(z_name, sizeof(z_name), "%s_%d_%s",
129 dev->driver->pci_drv.name, dev->data->port_id, post_string);
131 mz = rte_memzone_lookup(z_name);
135 return rte_memzone_reserve_aligned(z_name, size,
136 socket_id, 0, align);
140 * Atomically reads the link status information from global
141 * structure rte_eth_dev.
144 * - Pointer to the structure rte_eth_dev to read from.
145 * - Pointer to the buffer to be saved with the link status.
148 * - On success, zero.
149 * - On failure, negative value.
152 rte_vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
153 struct rte_eth_link *link)
155 struct rte_eth_link *dst = &(dev->data->dev_link);
156 struct rte_eth_link *src = link;
158 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
159 *(uint64_t *)src) == 0)
166 * This function is based on vmxnet3_disable_intr()
169 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
173 PMD_INIT_FUNC_TRACE();
175 hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
176 for (i = 0; i < VMXNET3_MAX_INTRS; i++)
177 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
181 * It returns 0 on success.
184 eth_vmxnet3_dev_init(__attribute__((unused)) struct eth_driver *eth_drv,
185 struct rte_eth_dev *eth_dev)
187 struct rte_pci_device *pci_dev;
188 struct vmxnet3_hw *hw =
189 VMXNET3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
190 uint32_t mac_hi, mac_lo, ver;
192 PMD_INIT_FUNC_TRACE();
194 eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
195 eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
196 eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
197 pci_dev = eth_dev->pci_dev;
200 * for secondary processes, we don't initialise any further as primary
201 * has already done this work.
203 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
206 /* Vendor and Device ID need to be set before init of shared code */
207 hw->device_id = pci_dev->id.device_id;
208 hw->vendor_id = pci_dev->id.vendor_id;
209 hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
210 hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
212 hw->num_rx_queues = 1;
213 hw->num_tx_queues = 1;
214 hw->cur_mtu = ETHER_MTU;
215 hw->bufs_per_pkt = 1;
217 /* Check h/w version compatibility with driver. */
218 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
219 PMD_INIT_LOG(DEBUG, "Harware version : %d\n", ver);
221 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
223 PMD_INIT_LOG(ERR, "Uncompatiable h/w version, should be 0x1\n");
227 /* Check UPT version compatibility with driver. */
228 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
229 PMD_INIT_LOG(DEBUG, "UPT harware version : %d\n", ver);
231 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
233 PMD_INIT_LOG(ERR, "Incompatiable UPT version.\n");
237 /* Getting MAC Address */
238 mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
239 mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
240 memcpy(hw->perm_addr , &mac_lo, 4);
241 memcpy(hw->perm_addr+4, &mac_hi, 2);
243 /* Allocate memory for storing MAC addresses */
244 eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
245 VMXNET3_MAX_MAC_ADDRS, 0);
246 if (eth_dev->data->mac_addrs == NULL) {
248 "Failed to allocate %d bytes needed to store MAC addresses",
249 ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
252 /* Copy the permanent MAC address */
253 ether_addr_copy((struct ether_addr *) hw->perm_addr,
254 ð_dev->data->mac_addrs[0]);
256 PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x \n",
257 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
258 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
260 /* Put device in Quiesce Mode */
261 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
266 static struct eth_driver rte_vmxnet3_pmd = {
268 .name = "rte_vmxnet3_pmd",
269 .id_table = pci_id_vmxnet3_map,
270 #ifdef RTE_EAL_UNBIND_PORTS
271 .drv_flags = RTE_PCI_DRV_NEED_IGB_UIO,
274 .eth_dev_init = eth_vmxnet3_dev_init,
275 .dev_private_size = sizeof(struct vmxnet3_adapter),
279 * Driver initialization routine.
280 * Invoked once at EAL init time.
281 * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
284 rte_vmxnet3_pmd_init(void)
286 PMD_INIT_FUNC_TRACE();
288 rte_eth_driver_register(&rte_vmxnet3_pmd);
293 vmxnet3_dev_configure(struct rte_eth_dev *dev)
295 const struct rte_memzone *mz;
296 struct vmxnet3_hw *hw =
297 VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
300 PMD_INIT_FUNC_TRACE();
302 if (dev->data->nb_rx_queues > UINT8_MAX ||
303 dev->data->nb_tx_queues > UINT8_MAX)
306 size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
307 dev->data->nb_tx_queues * sizeof (struct Vmxnet3_RxQueueDesc);
309 if (size > UINT16_MAX)
312 hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
313 hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
316 * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
319 mz = gpa_zone_reserve(dev, sizeof (struct Vmxnet3_DriverShared),
320 "shared", rte_socket_id(), 8);
323 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone\n");
326 memset(mz->addr, 0, mz->len);
328 hw->shared = mz->addr;
329 hw->sharedPA = mz->phys_addr;
332 * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
335 mz = gpa_zone_reserve(dev, size, "queuedesc",
336 rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
338 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone\n");
341 memset(mz->addr, 0, mz->len);
343 hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
344 hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
346 hw->queueDescPA = mz->phys_addr;
347 hw->queue_desc_len = (uint16_t)size;
349 if(dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
351 /* Allocate memory structure for UPT1_RSSConf and configure */
352 mz = gpa_zone_reserve(dev, sizeof (struct VMXNET3_RSSConf), "rss_conf",
353 rte_socket_id(), CACHE_LINE_SIZE);
355 PMD_INIT_LOG(ERR, "ERROR: Creating rss_conf structure zone\n");
358 memset(mz->addr, 0, mz->len);
360 hw->rss_conf = mz->addr;
361 hw->rss_confPA = mz->phys_addr;
368 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
370 struct rte_eth_conf port_conf = dev->data->dev_conf;
371 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
372 Vmxnet3_DriverShared *shared = hw->shared;
373 Vmxnet3_DSDevRead *devRead = &shared->devRead;
378 shared->magic = VMXNET3_REV1_MAGIC;
379 devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
381 /* Setting up Guest OS information */
382 devRead->misc.driverInfo.gos.gosBits = sizeof(void *) == 4 ?
383 VMXNET3_GOS_BITS_32 :
385 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
386 devRead->misc.driverInfo.vmxnet3RevSpt = 1;
387 devRead->misc.driverInfo.uptVerSpt = 1;
389 devRead->misc.queueDescPA = hw->queueDescPA;
390 devRead->misc.queueDescLen = hw->queue_desc_len;
391 devRead->misc.mtu = hw->cur_mtu;
392 devRead->misc.numTxQueues = hw->num_tx_queues;
393 devRead->misc.numRxQueues = hw->num_rx_queues;
396 * Set number of interrupts to 1
397 * PMD disables all the interrupts but this is MUST to activate device
398 * It needs at least one interrupt for link events to handle
399 * So we'll disable it later after device activation if needed
401 devRead->intrConf.numIntrs = 1;
402 devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
404 for (i = 0; i < hw->num_tx_queues; i++) {
405 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
406 vmxnet3_tx_queue_t *txq = dev->data->tx_queues[i];
408 tqd->ctrl.txNumDeferred = 0;
409 tqd->ctrl.txThreshold = 1;
410 tqd->conf.txRingBasePA = txq->cmd_ring.basePA;
411 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
413 tqd->conf.txRingSize = txq->cmd_ring.size;
414 tqd->conf.compRingSize = txq->comp_ring.size;
415 tqd->conf.intrIdx = txq->comp_ring.intr_idx;
416 tqd->status.stopped = TRUE;
417 tqd->status.error = 0;
418 memset(&tqd->stats, 0, sizeof(tqd->stats));
421 for (i = 0; i < hw->num_rx_queues; i++) {
422 Vmxnet3_RxQueueDesc *rqd = &hw->rqd_start[i];
423 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
425 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
426 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
427 rqd->conf.compRingBasePA = rxq->comp_ring.basePA;
429 rqd->conf.rxRingSize[0] = rxq->cmd_ring[0].size;
430 rqd->conf.rxRingSize[1] = rxq->cmd_ring[1].size;
431 rqd->conf.compRingSize = rxq->comp_ring.size;
432 rqd->conf.intrIdx = rxq->comp_ring.intr_idx;
433 rqd->status.stopped = TRUE;
434 rqd->status.error = 0;
435 memset(&rqd->stats, 0, sizeof(rqd->stats));
438 /* RxMode set to 0 of VMXNET3_RXM_xxx */
439 devRead->rxFilterConf.rxMode = 0;
441 /* Setting up feature flags */
442 if(dev->data->dev_conf.rxmode.hw_ip_checksum) {
443 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
446 if(dev->data->dev_conf.rxmode.hw_vlan_strip) {
447 devRead->misc.uptFeatures |= VMXNET3_F_RXVLAN;
450 if(port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
451 ret = vmxnet3_rss_configure(dev);
452 if(ret != VMXNET3_SUCCESS) {
455 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
456 devRead->rssConfDesc.confVer = 1;
457 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
458 devRead->rssConfDesc.confPA = hw->rss_confPA;
461 if(dev->data->dev_conf.rxmode.hw_vlan_filter) {
462 ret = vmxnet3_vlan_configure(dev);
463 if(ret != VMXNET3_SUCCESS) {
468 PMD_INIT_LOG(DEBUG, "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x \n",
469 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
470 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
472 /* Write MAC Address back to device */
473 mac_ptr = (uint32_t *)hw->perm_addr;
475 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
477 val = (hw->perm_addr[5] << 8) | hw->perm_addr[4];
478 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
480 return VMXNET3_SUCCESS;
484 * Configure device link speed and setup link.
485 * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
486 * It returns 0 on success.
489 vmxnet3_dev_start(struct rte_eth_dev *dev)
492 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
494 PMD_INIT_FUNC_TRACE();
496 ret = vmxnet3_setup_driver_shared(dev);
497 if(ret != VMXNET3_SUCCESS) {
501 /* Exchange shared data with device */
502 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
504 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
507 /* Activate device by register write */
508 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
509 status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
512 PMD_INIT_LOG(ERR, "Device activation in %s(): UNSUCCESSFUL\n", __func__);
516 /* Disable interrupts */
517 vmxnet3_disable_intr(hw);
520 * Load RX queues with blank mbufs and update next2fill index for device
521 * Update RxMode of the device
523 ret = vmxnet3_dev_rxtx_init(dev);
524 if(ret != VMXNET3_SUCCESS) {
525 PMD_INIT_LOG(ERR, "Device receive init in %s: UNSUCCESSFUL\n", __func__);
529 /* Setting proper Rx Mode and issue Rx Mode Update command */
530 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_ALL_MULTI, 1);
533 * Don't need to handle events for now
535 #if PROCESS_SYS_EVENTS == 1
536 events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
537 PMD_INIT_LOG(DEBUG, "Reading events: 0x%X\n\n", events);
538 vmxnet3_process_events(hw);
544 * Stop device: disable rx and tx functions to allow for reconfiguring.
547 vmxnet3_dev_stop(struct rte_eth_dev *dev)
549 struct rte_eth_link link;
550 struct vmxnet3_hw *hw =
551 VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
553 PMD_INIT_FUNC_TRACE();
555 if(hw->adapter_stopped == TRUE) {
556 PMD_INIT_LOG(DEBUG, "Device already closed.\n");
560 /* disable interrupts */
561 vmxnet3_disable_intr(hw);
563 /* quiesce the device first */
564 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
565 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
566 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
568 /* reset the device */
569 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
570 PMD_INIT_LOG(DEBUG, "Device reset.\n");
571 hw->adapter_stopped = FALSE;
573 vmxnet3_dev_clear_queues(dev);
575 /* Clear recorded link status */
576 memset(&link, 0, sizeof(link));
577 rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
581 * Reset and stop device.
584 vmxnet3_dev_close(struct rte_eth_dev *dev)
586 struct vmxnet3_hw *hw =
587 VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
589 PMD_INIT_FUNC_TRACE();
591 vmxnet3_dev_stop(dev);
592 hw->adapter_stopped = TRUE;
597 vmxnet3_dev_stats_get( struct rte_eth_dev *dev, struct rte_eth_stats *stats)
600 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
602 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
609 stats->rx_nombuf = 0;
612 stats->fdirmatch = 0;
615 for (i = 0; i < hw->num_tx_queues; i++) {
616 stats->opackets += hw->tqd_start[i].stats.ucastPktsTxOK +
617 hw->tqd_start[i].stats.mcastPktsTxOK +
618 hw->tqd_start[i].stats.bcastPktsTxOK;
619 stats->obytes += hw->tqd_start[i].stats.ucastBytesTxOK +
620 hw->tqd_start[i].stats.mcastBytesTxOK +
621 hw->tqd_start[i].stats.bcastBytesTxOK;
622 stats->oerrors += hw->tqd_start[i].stats.pktsTxError +
623 hw->tqd_start[i].stats.pktsTxDiscard;
626 for (i = 0; i < hw->num_rx_queues; i++) {
627 stats->ipackets += hw->rqd_start[i].stats.ucastPktsRxOK +
628 hw->rqd_start[i].stats.mcastPktsRxOK +
629 hw->rqd_start[i].stats.bcastPktsRxOK;
630 stats->ibytes += hw->rqd_start[i].stats.ucastBytesRxOK +
631 hw->rqd_start[i].stats.mcastBytesRxOK +
632 hw->rqd_start[i].stats.bcastBytesRxOK;
633 stats->rx_nombuf += hw->rqd_start[i].stats.pktsRxOutOfBuf;
634 stats->ierrors += hw->rqd_start[i].stats.pktsRxError;
640 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
642 dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
643 dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
644 dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
645 dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
646 dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
649 /* return 0 means link status changed, -1 means not changed */
651 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
653 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
654 struct rte_eth_link link;
657 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
658 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
661 PMD_INIT_LOG(ERR, "Link Status Negative : %s()\n", __func__);
666 link.link_status = 1;
667 link.link_duplex = ETH_LINK_FULL_DUPLEX;
668 link.link_speed = ETH_LINK_SPEED_10000;
670 rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
678 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
680 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
682 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
684 rxConf->rxMode = rxConf->rxMode | feature;
686 rxConf->rxMode = rxConf->rxMode & (~feature);
688 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
691 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
693 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
695 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
696 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
699 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
701 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
703 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
704 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
707 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
709 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
711 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
712 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
715 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
717 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
719 struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
720 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
723 #if PROCESS_SYS_EVENTS == 1
725 vmxnet3_process_events(struct vmxnet3_hw *hw)
727 uint32_t events = hw->shared->ecr;
729 PMD_INIT_LOG(ERR, "No events to process in %s()\n", __func__);
734 * ECR bits when written with 1b are cleared. Hence write
735 * events back to ECR so that the bits which were set will be reset.
737 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
739 /* Check if link state has changed */
740 if (events & VMXNET3_ECR_LINK){
741 PMD_INIT_LOG(ERR, "Process events in %s(): VMXNET3_ECR_LINK event\n", __func__);
744 /* Check if there is an error on xmit/recv queues */
745 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
746 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
748 if (hw->tqd_start->status.stopped)
749 PMD_INIT_LOG(ERR, "tq error 0x%x\n",
750 hw->tqd_start->status.error);
752 if (hw->rqd_start->status.stopped)
753 PMD_INIT_LOG(ERR, "rq error 0x%x\n",
754 hw->rqd_start->status.error);
756 /* Reset the device */
757 /* Have to reset the device */
760 if (events & VMXNET3_ECR_DIC)
761 PMD_INIT_LOG(ERR, "Device implementation change event.\n");
763 if (events & VMXNET3_ECR_DEBUG)
764 PMD_INIT_LOG(ERR, "Debug event generated by device.\n");