1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
17 #include <rte_atomic.h>
18 #include <rte_memcpy.h>
19 #include <rte_memory.h>
20 #include <rte_string_fns.h>
22 #include "power_pstate_cpufreq.h"
23 #include "power_common.h"
26 #ifdef RTE_LIBRTE_POWER_DEBUG
27 #define POWER_DEBUG_TRACE(fmt, args...) do { \
28 RTE_LOG(ERR, POWER, "%s: " fmt, __func__, ## args); \
31 #define POWER_DEBUG_TRACE(fmt, args...)
34 #define FOPEN_OR_ERR_RET(f, retval) do { \
36 RTE_LOG(ERR, POWER, "File not opened\n"); \
41 #define FOPS_OR_NULL_GOTO(ret, label) do { \
42 if ((ret) == NULL) { \
43 RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
48 #define FOPS_OR_ERR_GOTO(ret, label) do { \
50 RTE_LOG(ERR, POWER, "File operations failed\n"); \
56 #define POWER_CONVERT_TO_DECIMAL 10
57 #define BUS_FREQ 100000
59 #define POWER_GOVERNOR_PERF "performance"
60 #define POWER_SYSFILE_GOVERNOR \
61 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor"
62 #define POWER_SYSFILE_MAX_FREQ \
63 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
64 #define POWER_SYSFILE_MIN_FREQ \
65 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
66 #define POWER_SYSFILE_CUR_FREQ \
67 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
68 #define POWER_SYSFILE_BASE_MAX_FREQ \
69 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
70 #define POWER_SYSFILE_BASE_MIN_FREQ \
71 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
72 #define POWER_SYSFILE_BASE_FREQ \
73 "/sys/devices/system/cpu/cpu%u/cpufreq/base_frequency"
74 #define POWER_PSTATE_DRIVER "intel_pstate"
75 #define POWER_MSR_PATH "/dev/cpu/%u/msr"
80 #define PLATFORM_INFO 0x0CE
81 #define NON_TURBO_MASK 0xFF00
82 #define NON_TURBO_OFFSET 0x8
92 struct pstate_power_info {
93 unsigned int lcore_id; /**< Logical core id */
94 uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
95 uint32_t nb_freqs; /**< number of available freqs */
96 FILE *f_cur_min; /**< FD of scaling_min */
97 FILE *f_cur_max; /**< FD of scaling_max */
98 char governor_ori[32]; /**< Original governor name */
99 uint32_t curr_idx; /**< Freq index in freqs array */
100 uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
101 uint32_t sys_max_freq; /**< system wide max freq */
102 uint32_t core_base_freq; /**< core base freq */
103 volatile uint32_t state; /**< Power in use state */
104 uint16_t turbo_available; /**< Turbo Boost available */
105 uint16_t turbo_enable; /**< Turbo Boost enable/disable */
106 uint16_t priority_core; /**< High Performance core */
107 } __rte_cache_aligned;
110 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
113 * It is to read the specific MSR.
117 power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
120 char fullpath[PATH_MAX];
122 snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
124 fd = open(fullpath, O_RDONLY);
127 RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
132 ret = pread(fd, val, sizeof(uint64_t), msr);
135 RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
140 POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
141 fullpath, msr, lcore_id);
143 POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
150 * It is to fopen the sys file for the future setting the lcore frequency.
153 power_init_for_setting_freq(struct pstate_power_info *pi)
155 FILE *f_min, *f_max, *f_base;
156 char fullpath_min[PATH_MAX];
157 char fullpath_max[PATH_MAX];
158 char fullpath_base[PATH_MAX];
159 char buf_base[BUFSIZ];
161 uint32_t base_ratio = 0;
162 uint64_t max_non_turbo = 0;
165 snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
168 f_min = fopen(fullpath_min, "rw+");
169 FOPEN_OR_ERR_RET(f_min, -1);
171 snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
174 f_max = fopen(fullpath_max, "rw+");
178 FOPEN_OR_ERR_RET(f_max, -1);
180 pi->f_cur_min = f_min;
181 pi->f_cur_max = f_max;
183 snprintf(fullpath_base, sizeof(fullpath_base), POWER_SYSFILE_BASE_FREQ,
186 f_base = fopen(fullpath_base, "r");
187 if (f_base == NULL) {
188 /* No sysfs base_frequency, that's OK, continue without */
191 s_base = fgets(buf_base, sizeof(buf_base), f_base);
192 FOPS_OR_NULL_GOTO(s_base, out);
194 buf_base[BUFSIZ-1] = '\0';
195 if (strlen(buf_base))
196 /* Strip off terminating '\n' */
197 strtok(buf_base, "\n");
199 base_ratio = strtoul(buf_base, NULL, POWER_CONVERT_TO_DECIMAL)
203 /* Add MSR read to detect turbo status */
205 if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0) {
210 max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
212 POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
214 pi->non_turbo_max_ratio = max_non_turbo;
217 * If base_frequency is reported as greater than the maximum
218 * non-turbo frequency, then mark it as a high priority core.
220 if (base_ratio > max_non_turbo)
221 pi->priority_core = 1;
223 pi->priority_core = 0;
224 pi->core_base_freq = base_ratio * BUS_FREQ;
233 set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
235 uint32_t target_freq = 0;
237 if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
238 RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
239 "should be less than %u\n", idx, pi->nb_freqs);
243 /* Check if it is the same as current */
244 if (idx == pi->curr_idx)
247 /* Because Intel Pstate Driver only allow user change min/max hint
248 * User need change the min/max as same value.
250 if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
251 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
252 "for setting frequency for lcore %u\n",
257 if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
258 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
259 "for setting frequency for lcore %u\n",
264 /* Turbo is available and enabled, first freq bucket is sys max freq */
265 if (pi->turbo_available && idx == 0) {
266 if (pi->turbo_enable)
267 target_freq = pi->sys_max_freq;
269 RTE_LOG(ERR, POWER, "Turbo is off, frequency can't be scaled up more %u\n",
274 target_freq = pi->freqs[idx];
276 /* Decrease freq, the min freq should be updated first */
277 if (idx > pi->curr_idx) {
279 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
280 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
281 "lcore %u\n", pi->lcore_id);
285 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
286 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
287 "lcore %u\n", pi->lcore_id);
291 POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
292 target_freq, pi->lcore_id);
294 fflush(pi->f_cur_min);
295 fflush(pi->f_cur_max);
299 /* Increase freq, the max freq should be updated first */
300 if (idx < pi->curr_idx) {
302 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
303 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
304 "lcore %u\n", pi->lcore_id);
308 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
309 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
310 "lcore %u\n", pi->lcore_id);
314 POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
315 target_freq, pi->lcore_id);
317 fflush(pi->f_cur_max);
318 fflush(pi->f_cur_min);
327 * It is to check the current scaling governor by reading sys file, and then
328 * set it into 'performance' if it is not by writing the sys file. The original
329 * governor will be saved for rolling back.
332 power_set_governor_performance(struct pstate_power_info *pi)
337 char fullpath[PATH_MAX];
341 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
343 f = fopen(fullpath, "rw+");
344 FOPEN_OR_ERR_RET(f, ret);
346 s = fgets(buf, sizeof(buf), f);
347 FOPS_OR_NULL_GOTO(s, out);
348 /* Strip off terminating '\n' */
351 /* Check if current governor is performance */
352 if (strncmp(buf, POWER_GOVERNOR_PERF,
353 sizeof(POWER_GOVERNOR_PERF)) == 0) {
355 POWER_DEBUG_TRACE("Power management governor of lcore %u is "
356 "already performance\n", pi->lcore_id);
359 /* Save the original governor */
360 strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
362 /* Write 'performance' to the governor */
363 val = fseek(f, 0, SEEK_SET);
364 FOPS_OR_ERR_GOTO(val, out);
366 val = fputs(POWER_GOVERNOR_PERF, f);
367 FOPS_OR_ERR_GOTO(val, out);
369 /* We need to flush to see if the fputs succeeds */
371 FOPS_OR_ERR_GOTO(val, out);
374 RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
375 "set to performance successfully\n", pi->lcore_id);
383 * It is to check the governor and then set the original governor back if
384 * needed by writing the sys file.
387 power_set_governor_original(struct pstate_power_info *pi)
392 char fullpath[PATH_MAX];
396 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
398 f = fopen(fullpath, "rw+");
399 FOPEN_OR_ERR_RET(f, ret);
401 s = fgets(buf, sizeof(buf), f);
402 FOPS_OR_NULL_GOTO(s, out);
404 /* Check if the governor to be set is the same as current */
405 if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
407 POWER_DEBUG_TRACE("Power management governor of lcore %u "
408 "has already been set to %s\n",
409 pi->lcore_id, pi->governor_ori);
413 /* Write back the original governor */
414 val = fseek(f, 0, SEEK_SET);
415 FOPS_OR_ERR_GOTO(val, out);
417 val = fputs(pi->governor_ori, f);
418 FOPS_OR_ERR_GOTO(val, out);
421 RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
422 "has been set back to %s successfully\n",
423 pi->lcore_id, pi->governor_ori);
431 * It is to get the available frequencies of the specific lcore by reading the
435 power_get_available_freqs(struct pstate_power_info *pi)
440 char buf_min[BUFSIZ];
441 char buf_max[BUFSIZ];
442 char fullpath_min[PATH_MAX];
443 char fullpath_max[PATH_MAX];
445 uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
446 uint32_t i, num_freqs = 0;
448 snprintf(fullpath_max, sizeof(fullpath_max),
449 POWER_SYSFILE_BASE_MAX_FREQ,
451 snprintf(fullpath_min, sizeof(fullpath_min),
452 POWER_SYSFILE_BASE_MIN_FREQ,
455 f_min = fopen(fullpath_min, "r");
456 FOPEN_OR_ERR_RET(f_min, ret);
458 f_max = fopen(fullpath_max, "r");
462 FOPEN_OR_ERR_RET(f_max, ret);
464 s_min = fgets(buf_min, sizeof(buf_min), f_min);
465 FOPS_OR_NULL_GOTO(s_min, out);
467 s_max = fgets(buf_max, sizeof(buf_max), f_max);
468 FOPS_OR_NULL_GOTO(s_max, out);
471 /* Strip the line break if there is */
472 p_min = strchr(buf_min, '\n');
476 p_max = strchr(buf_max, '\n');
480 sys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);
481 sys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);
483 if (sys_max_freq < sys_min_freq)
486 pi->sys_max_freq = sys_max_freq;
488 if (pi->priority_core == 1)
489 base_max_freq = pi->core_base_freq;
491 base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
493 POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
498 if (base_max_freq < sys_max_freq)
499 pi->turbo_available = 1;
501 pi->turbo_available = 0;
503 /* If turbo is available then there is one extra freq bucket
504 * to store the sys max freq which value is base_max +1
506 num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
509 /* Generate the freq bucket array.
510 * If turbo is available the freq bucket[0] value is base_max +1
511 * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
513 * If turbo is not available bucket[0] is base_max and so on
515 for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
516 if ((i == 0) && pi->turbo_available)
517 pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
519 pi->freqs[pi->nb_freqs++] =
520 base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
525 POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
526 num_freqs, pi->lcore_id);
536 power_pstate_cpufreq_check_supported(void)
538 return cpufreq_check_scaling_driver(POWER_PSTATE_DRIVER);
542 power_pstate_cpufreq_init(unsigned int lcore_id)
544 struct pstate_power_info *pi;
546 if (lcore_id >= RTE_MAX_LCORE) {
547 RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
548 lcore_id, RTE_MAX_LCORE - 1U);
552 pi = &lcore_power_info[lcore_id];
553 if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
555 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
556 "in use\n", lcore_id);
560 pi->lcore_id = lcore_id;
561 /* Check and set the governor */
562 if (power_set_governor_performance(pi) < 0) {
563 RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
564 "performance\n", lcore_id);
567 /* Init for setting lcore frequency */
568 if (power_init_for_setting_freq(pi) < 0) {
569 RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
570 "lcore %u\n", lcore_id);
574 /* Get the available frequencies */
575 if (power_get_available_freqs(pi) < 0) {
576 RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
577 "lcore %u\n", lcore_id);
582 /* Set freq to max by default */
583 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
584 RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
585 "to max\n", lcore_id);
589 RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
590 "power management\n", lcore_id);
591 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
596 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
602 power_pstate_cpufreq_exit(unsigned int lcore_id)
604 struct pstate_power_info *pi;
606 if (lcore_id >= RTE_MAX_LCORE) {
607 RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
608 lcore_id, RTE_MAX_LCORE - 1U);
611 pi = &lcore_power_info[lcore_id];
613 if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
615 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
616 "not used\n", lcore_id);
620 /* Close FD of setting freq */
621 fclose(pi->f_cur_min);
622 fclose(pi->f_cur_max);
623 pi->f_cur_min = NULL;
624 pi->f_cur_max = NULL;
626 /* Set the governor back to the original */
627 if (power_set_governor_original(pi) < 0) {
628 RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
629 "to the original\n", lcore_id);
633 RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
634 "'performance' mode and been set back to the "
635 "original\n", lcore_id);
636 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
641 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
648 power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
650 struct pstate_power_info *pi;
652 if (lcore_id >= RTE_MAX_LCORE) {
653 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
658 RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
662 pi = &lcore_power_info[lcore_id];
663 if (num < pi->nb_freqs) {
664 RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
667 rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
673 power_pstate_cpufreq_get_freq(unsigned int lcore_id)
675 if (lcore_id >= RTE_MAX_LCORE) {
676 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
677 return RTE_POWER_INVALID_FREQ_INDEX;
680 return lcore_power_info[lcore_id].curr_idx;
685 power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
687 if (lcore_id >= RTE_MAX_LCORE) {
688 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
692 return set_freq_internal(&(lcore_power_info[lcore_id]), index);
696 power_pstate_cpufreq_freq_up(unsigned int lcore_id)
698 struct pstate_power_info *pi;
700 if (lcore_id >= RTE_MAX_LCORE) {
701 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
705 pi = &lcore_power_info[lcore_id];
706 if (pi->curr_idx == 0 ||
707 (pi->curr_idx == 1 && pi->turbo_available && !pi->turbo_enable))
710 /* Frequencies in the array are from high to low. */
711 return set_freq_internal(pi, pi->curr_idx - 1);
715 power_pstate_cpufreq_freq_down(unsigned int lcore_id)
717 struct pstate_power_info *pi;
719 if (lcore_id >= RTE_MAX_LCORE) {
720 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
724 pi = &lcore_power_info[lcore_id];
725 if (pi->curr_idx + 1 == pi->nb_freqs)
728 /* Frequencies in the array are from high to low. */
729 return set_freq_internal(pi, pi->curr_idx + 1);
733 power_pstate_cpufreq_freq_max(unsigned int lcore_id)
735 if (lcore_id >= RTE_MAX_LCORE) {
736 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
740 /* Frequencies in the array are from high to low. */
741 if (lcore_power_info[lcore_id].turbo_available) {
742 if (lcore_power_info[lcore_id].turbo_enable)
744 return set_freq_internal(
745 &lcore_power_info[lcore_id], 0);
747 /* Set to max non-turbo */
748 return set_freq_internal(
749 &lcore_power_info[lcore_id], 1);
751 return set_freq_internal(&lcore_power_info[lcore_id], 0);
756 power_pstate_cpufreq_freq_min(unsigned int lcore_id)
758 struct pstate_power_info *pi;
760 if (lcore_id >= RTE_MAX_LCORE) {
761 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
765 pi = &lcore_power_info[lcore_id];
767 /* Frequencies in the array are from high to low. */
768 return set_freq_internal(pi, pi->nb_freqs - 1);
773 power_pstate_turbo_status(unsigned int lcore_id)
775 struct pstate_power_info *pi;
777 if (lcore_id >= RTE_MAX_LCORE) {
778 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
782 pi = &lcore_power_info[lcore_id];
784 return pi->turbo_enable;
788 power_pstate_enable_turbo(unsigned int lcore_id)
790 struct pstate_power_info *pi;
792 if (lcore_id >= RTE_MAX_LCORE) {
793 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
797 pi = &lcore_power_info[lcore_id];
799 if (pi->turbo_available)
800 pi->turbo_enable = 1;
802 pi->turbo_enable = 0;
804 "Failed to enable turbo on lcore %u\n",
814 power_pstate_disable_turbo(unsigned int lcore_id)
816 struct pstate_power_info *pi;
818 if (lcore_id >= RTE_MAX_LCORE) {
819 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
823 pi = &lcore_power_info[lcore_id];
825 pi->turbo_enable = 0;
827 if (pi->turbo_available && pi->curr_idx <= 1) {
828 /* Try to set freq to max by default coming out of turbo */
829 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
831 "Failed to set frequency of lcore %u to max\n",
841 int power_pstate_get_capabilities(unsigned int lcore_id,
842 struct rte_power_core_capabilities *caps)
844 struct pstate_power_info *pi;
846 if (lcore_id >= RTE_MAX_LCORE) {
847 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
851 RTE_LOG(ERR, POWER, "Invalid argument\n");
855 pi = &lcore_power_info[lcore_id];
856 caps->capabilities = 0;
857 caps->turbo = !!(pi->turbo_available);
858 caps->priority = pi->priority_core;