1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
17 #include <rte_memcpy.h>
18 #include <rte_atomic.h>
20 #include "power_pstate_cpufreq.h"
21 #include "power_common.h"
24 #ifdef RTE_LIBRTE_POWER_DEBUG
25 #define POWER_DEBUG_TRACE(fmt, args...) do { \
26 RTE_LOG(ERR, POWER, "%s: " fmt, __func__, ## args); \
29 #define POWER_DEBUG_TRACE(fmt, args...)
32 #define FOPEN_OR_ERR_RET(f, retval) do { \
34 RTE_LOG(ERR, POWER, "File not openned\n"); \
39 #define FOPS_OR_NULL_GOTO(ret, label) do { \
40 if ((ret) == NULL) { \
41 RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
46 #define FOPS_OR_ERR_GOTO(ret, label) do { \
48 RTE_LOG(ERR, POWER, "File operations failed\n"); \
54 #define POWER_CONVERT_TO_DECIMAL 10
55 #define BUS_FREQ 100000
57 #define POWER_GOVERNOR_PERF "performance"
58 #define POWER_SYSFILE_GOVERNOR \
59 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor"
60 #define POWER_SYSFILE_MAX_FREQ \
61 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
62 #define POWER_SYSFILE_MIN_FREQ \
63 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
64 #define POWER_SYSFILE_CUR_FREQ \
65 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
66 #define POWER_SYSFILE_BASE_MAX_FREQ \
67 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
68 #define POWER_SYSFILE_BASE_MIN_FREQ \
69 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
70 #define POWER_SYSFILE_BASE_FREQ \
71 "/sys/devices/system/cpu/cpu%u/cpufreq/base_frequency"
72 #define POWER_MSR_PATH "/dev/cpu/%u/msr"
77 #define PLATFORM_INFO 0x0CE
78 #define NON_TURBO_MASK 0xFF00
79 #define NON_TURBO_OFFSET 0x8
89 struct pstate_power_info {
90 unsigned int lcore_id; /**< Logical core id */
91 uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
92 uint32_t nb_freqs; /**< number of available freqs */
93 FILE *f_cur_min; /**< FD of scaling_min */
94 FILE *f_cur_max; /**< FD of scaling_max */
95 char governor_ori[32]; /**< Original governor name */
96 uint32_t curr_idx; /**< Freq index in freqs array */
97 uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
98 uint32_t sys_max_freq; /**< system wide max freq */
99 uint32_t core_base_freq; /**< core base freq */
100 volatile uint32_t state; /**< Power in use state */
101 uint16_t turbo_available; /**< Turbo Boost available */
102 uint16_t turbo_enable; /**< Turbo Boost enable/disable */
103 uint16_t priority_core; /**< High Performance core */
104 } __rte_cache_aligned;
107 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
110 * It is to read the specific MSR.
114 power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
117 char fullpath[PATH_MAX];
119 snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
121 fd = open(fullpath, O_RDONLY);
124 RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
129 ret = pread(fd, val, sizeof(uint64_t), msr);
132 RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
137 POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
138 fullpath, msr, lcore_id);
140 POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
147 * It is to fopen the sys file for the future setting the lcore frequency.
150 power_init_for_setting_freq(struct pstate_power_info *pi)
152 FILE *f_min, *f_max, *f_base;
153 char fullpath_min[PATH_MAX];
154 char fullpath_max[PATH_MAX];
155 char fullpath_base[PATH_MAX];
156 char buf_base[BUFSIZ];
158 uint32_t base_ratio = 0;
159 uint64_t max_non_turbo = 0;
161 snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
164 f_min = fopen(fullpath_min, "rw+");
165 FOPEN_OR_ERR_RET(f_min, -1);
167 snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
170 f_max = fopen(fullpath_max, "rw+");
174 FOPEN_OR_ERR_RET(f_max, -1);
176 pi->f_cur_min = f_min;
177 pi->f_cur_max = f_max;
179 snprintf(fullpath_base, sizeof(fullpath_base), POWER_SYSFILE_BASE_FREQ,
182 f_base = fopen(fullpath_base, "r");
183 if (f_base == NULL) {
184 /* No sysfs base_frequency, that's OK, continue without */
187 s_base = fgets(buf_base, sizeof(buf_base), f_base);
188 FOPS_OR_NULL_GOTO(s_base, out);
190 buf_base[BUFSIZ-1] = '\0';
191 if (strlen(buf_base))
192 /* Strip off terminating '\n' */
193 strtok(buf_base, "\n");
195 base_ratio = strtoul(buf_base, NULL, POWER_CONVERT_TO_DECIMAL)
199 /* Add MSR read to detect turbo status */
201 if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)
204 max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
206 POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
208 pi->non_turbo_max_ratio = max_non_turbo;
211 * If base_frequency is reported as greater than the maximum
212 * non-turbo frequency, then mark it as a high priority core.
214 if (base_ratio > max_non_turbo)
215 pi->priority_core = 1;
217 pi->priority_core = 0;
218 pi->core_base_freq = base_ratio * BUS_FREQ;
225 set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
227 uint32_t target_freq = 0;
229 if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
230 RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
231 "should be less than %u\n", idx, pi->nb_freqs);
235 /* Check if it is the same as current */
236 if (idx == pi->curr_idx)
239 /* Because Intel Pstate Driver only allow user change min/max hint
240 * User need change the min/max as same value.
242 if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
243 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
244 "for setting frequency for lcore %u\n",
249 if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
250 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
251 "for setting frequency for lcore %u\n",
256 /* Turbo is available and enabled, first freq bucket is sys max freq */
257 if (pi->turbo_available && idx == 0) {
258 if (pi->turbo_enable)
259 target_freq = pi->sys_max_freq;
261 RTE_LOG(ERR, POWER, "Turbo is off, frequency can't be scaled up more %u\n",
266 target_freq = pi->freqs[idx];
268 /* Decrease freq, the min freq should be updated first */
269 if (idx > pi->curr_idx) {
271 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
272 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
273 "lcore %u\n", pi->lcore_id);
277 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
278 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
279 "lcore %u\n", pi->lcore_id);
283 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
284 target_freq, pi->lcore_id);
286 fflush(pi->f_cur_min);
287 fflush(pi->f_cur_max);
291 /* Increase freq, the max freq should be updated first */
292 if (idx < pi->curr_idx) {
294 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
295 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
296 "lcore %u\n", pi->lcore_id);
300 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
301 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
302 "lcore %u\n", pi->lcore_id);
306 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
307 target_freq, pi->lcore_id);
309 fflush(pi->f_cur_max);
310 fflush(pi->f_cur_min);
319 * It is to check the current scaling governor by reading sys file, and then
320 * set it into 'performance' if it is not by writing the sys file. The original
321 * governor will be saved for rolling back.
324 power_set_governor_performance(struct pstate_power_info *pi)
329 char fullpath[PATH_MAX];
333 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
335 f = fopen(fullpath, "rw+");
336 FOPEN_OR_ERR_RET(f, ret);
338 s = fgets(buf, sizeof(buf), f);
339 FOPS_OR_NULL_GOTO(s, out);
340 /* Strip off terminating '\n' */
343 /* Check if current governor is performance */
344 if (strncmp(buf, POWER_GOVERNOR_PERF,
345 sizeof(POWER_GOVERNOR_PERF)) == 0) {
347 POWER_DEBUG_TRACE("Power management governor of lcore %u is "
348 "already performance\n", pi->lcore_id);
351 /* Save the original governor */
352 snprintf(pi->governor_ori, sizeof(pi->governor_ori), "%s", buf);
354 /* Write 'performance' to the governor */
355 val = fseek(f, 0, SEEK_SET);
356 FOPS_OR_ERR_GOTO(val, out);
358 val = fputs(POWER_GOVERNOR_PERF, f);
359 FOPS_OR_ERR_GOTO(val, out);
361 /* We need to flush to see if the fputs succeeds */
363 FOPS_OR_ERR_GOTO(val, out);
366 RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
367 "set to performance successfully\n", pi->lcore_id);
375 * It is to check the governor and then set the original governor back if
376 * needed by writing the sys file.
379 power_set_governor_original(struct pstate_power_info *pi)
384 char fullpath[PATH_MAX];
388 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
390 f = fopen(fullpath, "rw+");
391 FOPEN_OR_ERR_RET(f, ret);
393 s = fgets(buf, sizeof(buf), f);
394 FOPS_OR_NULL_GOTO(s, out);
396 /* Check if the governor to be set is the same as current */
397 if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
399 POWER_DEBUG_TRACE("Power management governor of lcore %u "
400 "has already been set to %s\n",
401 pi->lcore_id, pi->governor_ori);
405 /* Write back the original governor */
406 val = fseek(f, 0, SEEK_SET);
407 FOPS_OR_ERR_GOTO(val, out);
409 val = fputs(pi->governor_ori, f);
410 FOPS_OR_ERR_GOTO(val, out);
413 RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
414 "has been set back to %s successfully\n",
415 pi->lcore_id, pi->governor_ori);
423 * It is to get the available frequencies of the specific lcore by reading the
427 power_get_available_freqs(struct pstate_power_info *pi)
432 char buf_min[BUFSIZ];
433 char buf_max[BUFSIZ];
434 char fullpath_min[PATH_MAX];
435 char fullpath_max[PATH_MAX];
437 uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
438 uint32_t i, num_freqs = 0;
440 snprintf(fullpath_max, sizeof(fullpath_max),
441 POWER_SYSFILE_BASE_MAX_FREQ,
443 snprintf(fullpath_min, sizeof(fullpath_min),
444 POWER_SYSFILE_BASE_MIN_FREQ,
447 f_min = fopen(fullpath_min, "r");
448 FOPEN_OR_ERR_RET(f_min, ret);
450 f_max = fopen(fullpath_max, "r");
454 FOPEN_OR_ERR_RET(f_max, ret);
456 s_min = fgets(buf_min, sizeof(buf_min), f_min);
457 FOPS_OR_NULL_GOTO(s_min, out);
459 s_max = fgets(buf_max, sizeof(buf_max), f_max);
460 FOPS_OR_NULL_GOTO(s_max, out);
463 /* Strip the line break if there is */
464 p_min = strchr(buf_min, '\n');
468 p_max = strchr(buf_max, '\n');
472 sys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);
473 sys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);
475 if (sys_max_freq < sys_min_freq)
478 pi->sys_max_freq = sys_max_freq;
480 if (pi->priority_core == 1)
481 base_max_freq = pi->core_base_freq;
483 base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
485 POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
490 if (base_max_freq < sys_max_freq)
491 pi->turbo_available = 1;
493 pi->turbo_available = 0;
495 /* If turbo is available then there is one extra freq bucket
496 * to store the sys max freq which value is base_max +1
498 num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
501 /* Generate the freq bucket array.
502 * If turbo is available the freq bucket[0] value is base_max +1
503 * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
505 * If turbo is not available bucket[0] is base_max and so on
507 for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
508 if ((i == 0) && pi->turbo_available)
509 pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
511 pi->freqs[pi->nb_freqs++] =
512 base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
517 POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
518 num_freqs, pi->lcore_id);
528 power_pstate_cpufreq_init(unsigned int lcore_id)
530 struct pstate_power_info *pi;
532 if (lcore_id >= RTE_MAX_LCORE) {
533 RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
534 lcore_id, RTE_MAX_LCORE - 1U);
538 pi = &lcore_power_info[lcore_id];
539 if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
541 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
542 "in use\n", lcore_id);
546 pi->lcore_id = lcore_id;
547 /* Check and set the governor */
548 if (power_set_governor_performance(pi) < 0) {
549 RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
550 "performance\n", lcore_id);
553 /* Init for setting lcore frequency */
554 if (power_init_for_setting_freq(pi) < 0) {
555 RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
556 "lcore %u\n", lcore_id);
560 /* Get the available frequencies */
561 if (power_get_available_freqs(pi) < 0) {
562 RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
563 "lcore %u\n", lcore_id);
568 /* Set freq to max by default */
569 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
570 RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
571 "to max\n", lcore_id);
575 RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
576 "power management\n", lcore_id);
577 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
582 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
588 power_pstate_cpufreq_exit(unsigned int lcore_id)
590 struct pstate_power_info *pi;
592 if (lcore_id >= RTE_MAX_LCORE) {
593 RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
594 lcore_id, RTE_MAX_LCORE - 1U);
597 pi = &lcore_power_info[lcore_id];
599 if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
601 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
602 "not used\n", lcore_id);
606 /* Close FD of setting freq */
607 fclose(pi->f_cur_min);
608 fclose(pi->f_cur_max);
609 pi->f_cur_min = NULL;
610 pi->f_cur_max = NULL;
612 /* Set the governor back to the original */
613 if (power_set_governor_original(pi) < 0) {
614 RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
615 "to the original\n", lcore_id);
619 RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
620 "'performance' mode and been set back to the "
621 "original\n", lcore_id);
622 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
627 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
634 power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
636 struct pstate_power_info *pi;
638 if (lcore_id >= RTE_MAX_LCORE) {
639 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
644 RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
648 pi = &lcore_power_info[lcore_id];
649 if (num < pi->nb_freqs) {
650 RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
653 rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
659 power_pstate_cpufreq_get_freq(unsigned int lcore_id)
661 if (lcore_id >= RTE_MAX_LCORE) {
662 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
663 return RTE_POWER_INVALID_FREQ_INDEX;
666 return lcore_power_info[lcore_id].curr_idx;
671 power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
673 if (lcore_id >= RTE_MAX_LCORE) {
674 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
678 return set_freq_internal(&(lcore_power_info[lcore_id]), index);
682 power_pstate_cpufreq_freq_up(unsigned int lcore_id)
684 struct pstate_power_info *pi;
686 if (lcore_id >= RTE_MAX_LCORE) {
687 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
691 pi = &lcore_power_info[lcore_id];
692 if (pi->curr_idx == 0)
695 /* Frequencies in the array are from high to low. */
696 return set_freq_internal(pi, pi->curr_idx - 1);
700 power_pstate_cpufreq_freq_down(unsigned int lcore_id)
702 struct pstate_power_info *pi;
704 if (lcore_id >= RTE_MAX_LCORE) {
705 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
709 pi = &lcore_power_info[lcore_id];
710 if (pi->curr_idx + 1 == pi->nb_freqs)
713 /* Frequencies in the array are from high to low. */
714 return set_freq_internal(pi, pi->curr_idx + 1);
718 power_pstate_cpufreq_freq_max(unsigned int lcore_id)
720 if (lcore_id >= RTE_MAX_LCORE) {
721 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
725 /* Frequencies in the array are from high to low. */
726 if (lcore_power_info[lcore_id].turbo_available) {
727 if (lcore_power_info[lcore_id].turbo_enable)
729 return set_freq_internal(
730 &lcore_power_info[lcore_id], 0);
732 /* Set to max non-turbo */
733 return set_freq_internal(
734 &lcore_power_info[lcore_id], 1);
736 return set_freq_internal(&lcore_power_info[lcore_id], 0);
741 power_pstate_cpufreq_freq_min(unsigned int lcore_id)
743 struct pstate_power_info *pi;
745 if (lcore_id >= RTE_MAX_LCORE) {
746 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
750 pi = &lcore_power_info[lcore_id];
752 /* Frequencies in the array are from high to low. */
753 return set_freq_internal(pi, pi->nb_freqs - 1);
758 power_pstate_turbo_status(unsigned int lcore_id)
760 struct pstate_power_info *pi;
762 if (lcore_id >= RTE_MAX_LCORE) {
763 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
767 pi = &lcore_power_info[lcore_id];
769 return pi->turbo_enable;
773 power_pstate_enable_turbo(unsigned int lcore_id)
775 struct pstate_power_info *pi;
777 if (lcore_id >= RTE_MAX_LCORE) {
778 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
782 pi = &lcore_power_info[lcore_id];
784 if (pi->turbo_available)
785 pi->turbo_enable = 1;
787 pi->turbo_enable = 0;
789 "Failed to enable turbo on lcore %u\n",
799 power_pstate_disable_turbo(unsigned int lcore_id)
801 struct pstate_power_info *pi;
803 if (lcore_id >= RTE_MAX_LCORE) {
804 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
808 pi = &lcore_power_info[lcore_id];
810 pi->turbo_enable = 0;
817 int power_pstate_get_capabilities(unsigned int lcore_id,
818 struct rte_power_core_capabilities *caps)
820 struct pstate_power_info *pi;
822 if (lcore_id >= RTE_MAX_LCORE) {
823 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
827 RTE_LOG(ERR, POWER, "Invalid argument\n");
831 pi = &lcore_power_info[lcore_id];
832 caps->capabilities = 0;
833 caps->turbo = !!(pi->turbo_available);
834 caps->priority = pi->priority_core;