1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
17 #include <rte_memcpy.h>
18 #include <rte_atomic.h>
20 #include "power_pstate_cpufreq.h"
21 #include "power_common.h"
24 #ifdef RTE_LIBRTE_POWER_DEBUG
25 #define POWER_DEBUG_TRACE(fmt, args...) do { \
26 RTE_LOG(ERR, POWER, "%s: " fmt, __func__, ## args); \
29 #define POWER_DEBUG_TRACE(fmt, args...)
32 #define FOPEN_OR_ERR_RET(f, retval) do { \
34 RTE_LOG(ERR, POWER, "File not openned\n"); \
39 #define FOPS_OR_NULL_GOTO(ret, label) do { \
40 if ((ret) == NULL) { \
41 RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
46 #define FOPS_OR_ERR_GOTO(ret, label) do { \
48 RTE_LOG(ERR, POWER, "File operations failed\n"); \
54 #define POWER_CONVERT_TO_DECIMAL 10
55 #define BUS_FREQ 100000
57 #define POWER_GOVERNOR_PERF "performance"
58 #define POWER_SYSFILE_GOVERNOR \
59 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor"
60 #define POWER_SYSFILE_MAX_FREQ \
61 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
62 #define POWER_SYSFILE_MIN_FREQ \
63 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
64 #define POWER_SYSFILE_CUR_FREQ \
65 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
66 #define POWER_SYSFILE_BASE_MAX_FREQ \
67 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
68 #define POWER_SYSFILE_BASE_MIN_FREQ \
69 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
70 #define POWER_MSR_PATH "/dev/cpu/%u/msr"
75 #define PLATFORM_INFO 0x0CE
76 #define NON_TURBO_MASK 0xFF00
77 #define NON_TURBO_OFFSET 0x8
87 struct pstate_power_info {
88 unsigned int lcore_id; /**< Logical core id */
89 uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
90 uint32_t nb_freqs; /**< number of available freqs */
91 FILE *f_cur_min; /**< FD of scaling_min */
92 FILE *f_cur_max; /**< FD of scaling_max */
93 char governor_ori[32]; /**< Original governor name */
94 uint32_t curr_idx; /**< Freq index in freqs array */
95 uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
96 uint32_t sys_max_freq; /**< system wide max freq */
97 volatile uint32_t state; /**< Power in use state */
98 uint16_t turbo_available; /**< Turbo Boost available */
99 uint16_t turbo_enable; /**< Turbo Boost enable/disable */
100 } __rte_cache_aligned;
103 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
106 * It is to read the specific MSR.
110 power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
113 char fullpath[PATH_MAX];
115 snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
117 fd = open(fullpath, O_RDONLY);
120 RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
125 ret = pread(fd, val, sizeof(uint64_t), msr);
128 RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
133 POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
134 fullpath, msr, lcore_id);
136 POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
143 * It is to fopen the sys file for the future setting the lcore frequency.
146 power_init_for_setting_freq(struct pstate_power_info *pi)
149 char fullpath_min[PATH_MAX];
150 char fullpath_max[PATH_MAX];
151 uint64_t max_non_turbo = 0;
153 snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
156 f_min = fopen(fullpath_min, "rw+");
157 FOPEN_OR_ERR_RET(f_min, -1);
159 snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
162 f_max = fopen(fullpath_max, "rw+");
166 FOPEN_OR_ERR_RET(f_max, -1);
168 pi->f_cur_min = f_min;
169 pi->f_cur_max = f_max;
171 /* Add MSR read to detect turbo status */
173 if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)
176 max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
178 POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
180 pi->non_turbo_max_ratio = max_non_turbo;
186 set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
188 uint32_t target_freq = 0;
190 if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
191 RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
192 "should be less than %u\n", idx, pi->nb_freqs);
196 /* Check if it is the same as current */
197 if (idx == pi->curr_idx)
200 /* Because Intel Pstate Driver only allow user change min/max hint
201 * User need change the min/max as same value.
203 if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
204 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
205 "for setting frequency for lcore %u\n",
210 if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
211 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
212 "for setting frequency for lcore %u\n",
217 /* Turbo is available and enabled, first freq bucket is sys max freq */
218 if (pi->turbo_available && pi->turbo_enable && (idx == 0))
219 target_freq = pi->sys_max_freq;
221 target_freq = pi->freqs[idx];
223 /* Decrease freq, the min freq should be updated first */
224 if (idx > pi->curr_idx) {
226 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
227 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
228 "lcore %u\n", pi->lcore_id);
232 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
233 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
234 "lcore %u\n", pi->lcore_id);
238 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
239 target_freq, pi->lcore_id);
241 fflush(pi->f_cur_min);
242 fflush(pi->f_cur_max);
246 /* Increase freq, the max freq should be updated first */
247 if (idx < pi->curr_idx) {
249 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
250 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
251 "lcore %u\n", pi->lcore_id);
255 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
256 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
257 "lcore %u\n", pi->lcore_id);
261 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
262 target_freq, pi->lcore_id);
264 fflush(pi->f_cur_max);
265 fflush(pi->f_cur_min);
274 * It is to check the current scaling governor by reading sys file, and then
275 * set it into 'performance' if it is not by writing the sys file. The original
276 * governor will be saved for rolling back.
279 power_set_governor_performance(struct pstate_power_info *pi)
284 char fullpath[PATH_MAX];
288 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
290 f = fopen(fullpath, "rw+");
291 FOPEN_OR_ERR_RET(f, ret);
293 s = fgets(buf, sizeof(buf), f);
294 FOPS_OR_NULL_GOTO(s, out);
296 /* Check if current governor is performance */
297 if (strncmp(buf, POWER_GOVERNOR_PERF,
298 sizeof(POWER_GOVERNOR_PERF)) == 0) {
300 POWER_DEBUG_TRACE("Power management governor of lcore %u is "
301 "already performance\n", pi->lcore_id);
304 /* Save the original governor */
305 snprintf(pi->governor_ori, sizeof(pi->governor_ori), "%s", buf);
307 /* Write 'performance' to the governor */
308 val = fseek(f, 0, SEEK_SET);
309 FOPS_OR_ERR_GOTO(val, out);
311 val = fputs(POWER_GOVERNOR_PERF, f);
312 FOPS_OR_ERR_GOTO(val, out);
314 /* We need to flush to see if the fputs succeeds */
316 FOPS_OR_ERR_GOTO(val, out);
319 RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
320 "set to performance successfully\n", pi->lcore_id);
328 * It is to check the governor and then set the original governor back if
329 * needed by writing the sys file.
332 power_set_governor_original(struct pstate_power_info *pi)
337 char fullpath[PATH_MAX];
341 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
343 f = fopen(fullpath, "rw+");
344 FOPEN_OR_ERR_RET(f, ret);
346 s = fgets(buf, sizeof(buf), f);
347 FOPS_OR_NULL_GOTO(s, out);
349 /* Check if the governor to be set is the same as current */
350 if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
352 POWER_DEBUG_TRACE("Power management governor of lcore %u "
353 "has already been set to %s\n",
354 pi->lcore_id, pi->governor_ori);
358 /* Write back the original governor */
359 val = fseek(f, 0, SEEK_SET);
360 FOPS_OR_ERR_GOTO(val, out);
362 val = fputs(pi->governor_ori, f);
363 FOPS_OR_ERR_GOTO(val, out);
366 RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
367 "has been set back to %s successfully\n",
368 pi->lcore_id, pi->governor_ori);
376 * It is to get the available frequencies of the specific lcore by reading the
380 power_get_available_freqs(struct pstate_power_info *pi)
385 char buf_min[BUFSIZ];
386 char buf_max[BUFSIZ];
387 char fullpath_min[PATH_MAX];
388 char fullpath_max[PATH_MAX];
390 uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
391 uint32_t i, num_freqs = 0;
393 snprintf(fullpath_max, sizeof(fullpath_max),
394 POWER_SYSFILE_BASE_MAX_FREQ,
396 snprintf(fullpath_min, sizeof(fullpath_min),
397 POWER_SYSFILE_BASE_MIN_FREQ,
400 f_min = fopen(fullpath_min, "r");
401 FOPEN_OR_ERR_RET(f_min, ret);
403 f_max = fopen(fullpath_max, "r");
407 FOPEN_OR_ERR_RET(f_max, ret);
409 s_min = fgets(buf_min, sizeof(buf_min), f_min);
410 FOPS_OR_NULL_GOTO(s_min, out);
412 s_max = fgets(buf_max, sizeof(buf_max), f_max);
413 FOPS_OR_NULL_GOTO(s_max, out);
416 /* Strip the line break if there is */
417 p_min = strchr(buf_min, '\n');
421 p_max = strchr(buf_max, '\n');
425 sys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);
426 sys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);
428 if (sys_max_freq < sys_min_freq)
431 pi->sys_max_freq = sys_max_freq;
433 base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
435 POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
440 if (base_max_freq < sys_max_freq)
441 pi->turbo_available = 1;
443 pi->turbo_available = 0;
445 /* If turbo is available then there is one extra freq bucket
446 * to store the sys max freq which value is base_max +1
448 num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
451 /* Generate the freq bucket array.
452 * If turbo is available the freq bucket[0] value is base_max +1
453 * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
455 * If turbo is not available bucket[0] is base_max and so on
457 for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
458 if ((i == 0) && pi->turbo_available)
459 pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
461 pi->freqs[pi->nb_freqs++] =
462 base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
467 POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
468 num_freqs, pi->lcore_id);
478 power_pstate_cpufreq_init(unsigned int lcore_id)
480 struct pstate_power_info *pi;
482 if (lcore_id >= RTE_MAX_LCORE) {
483 RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
484 lcore_id, RTE_MAX_LCORE - 1U);
488 pi = &lcore_power_info[lcore_id];
489 if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
491 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
492 "in use\n", lcore_id);
496 pi->lcore_id = lcore_id;
497 /* Check and set the governor */
498 if (power_set_governor_performance(pi) < 0) {
499 RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
500 "performance\n", lcore_id);
503 /* Init for setting lcore frequency */
504 if (power_init_for_setting_freq(pi) < 0) {
505 RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
506 "lcore %u\n", lcore_id);
510 /* Get the available frequencies */
511 if (power_get_available_freqs(pi) < 0) {
512 RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
513 "lcore %u\n", lcore_id);
518 /* Set freq to max by default */
519 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
520 RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
521 "to max\n", lcore_id);
525 RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
526 "power management\n", lcore_id);
527 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
532 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
538 power_pstate_cpufreq_exit(unsigned int lcore_id)
540 struct pstate_power_info *pi;
542 if (lcore_id >= RTE_MAX_LCORE) {
543 RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
544 lcore_id, RTE_MAX_LCORE - 1U);
547 pi = &lcore_power_info[lcore_id];
549 if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
551 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
552 "not used\n", lcore_id);
556 /* Close FD of setting freq */
557 fclose(pi->f_cur_min);
558 fclose(pi->f_cur_max);
559 pi->f_cur_min = NULL;
560 pi->f_cur_max = NULL;
562 /* Set the governor back to the original */
563 if (power_set_governor_original(pi) < 0) {
564 RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
565 "to the original\n", lcore_id);
569 RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
570 "'performance' mode and been set back to the "
571 "original\n", lcore_id);
572 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
577 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
584 power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
586 struct pstate_power_info *pi;
588 if (lcore_id >= RTE_MAX_LCORE) {
589 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
594 RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
598 pi = &lcore_power_info[lcore_id];
599 if (num < pi->nb_freqs) {
600 RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
603 rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
609 power_pstate_cpufreq_get_freq(unsigned int lcore_id)
611 if (lcore_id >= RTE_MAX_LCORE) {
612 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
613 return RTE_POWER_INVALID_FREQ_INDEX;
616 return lcore_power_info[lcore_id].curr_idx;
621 power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
623 if (lcore_id >= RTE_MAX_LCORE) {
624 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
628 return set_freq_internal(&(lcore_power_info[lcore_id]), index);
632 power_pstate_cpufreq_freq_up(unsigned int lcore_id)
634 struct pstate_power_info *pi;
636 if (lcore_id >= RTE_MAX_LCORE) {
637 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
641 pi = &lcore_power_info[lcore_id];
642 if (pi->curr_idx == 0)
645 /* Frequencies in the array are from high to low. */
646 return set_freq_internal(pi, pi->curr_idx - 1);
650 power_pstate_cpufreq_freq_down(unsigned int lcore_id)
652 struct pstate_power_info *pi;
654 if (lcore_id >= RTE_MAX_LCORE) {
655 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
659 pi = &lcore_power_info[lcore_id];
660 if (pi->curr_idx + 1 == pi->nb_freqs)
663 /* Frequencies in the array are from high to low. */
664 return set_freq_internal(pi, pi->curr_idx + 1);
668 power_pstate_cpufreq_freq_max(unsigned int lcore_id)
670 if (lcore_id >= RTE_MAX_LCORE) {
671 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
675 /* Frequencies in the array are from high to low. */
676 if (lcore_power_info[lcore_id].turbo_available) {
677 if (lcore_power_info[lcore_id].turbo_enable)
679 return set_freq_internal(
680 &lcore_power_info[lcore_id], 0);
682 /* Set to max non-turbo */
683 return set_freq_internal(
684 &lcore_power_info[lcore_id], 1);
686 return set_freq_internal(&lcore_power_info[lcore_id], 0);
691 power_pstate_cpufreq_freq_min(unsigned int lcore_id)
693 struct pstate_power_info *pi;
695 if (lcore_id >= RTE_MAX_LCORE) {
696 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
700 pi = &lcore_power_info[lcore_id];
702 /* Frequencies in the array are from high to low. */
703 return set_freq_internal(pi, pi->nb_freqs - 1);
708 power_pstate_turbo_status(unsigned int lcore_id)
710 struct pstate_power_info *pi;
712 if (lcore_id >= RTE_MAX_LCORE) {
713 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
717 pi = &lcore_power_info[lcore_id];
719 return pi->turbo_enable;
723 power_pstate_enable_turbo(unsigned int lcore_id)
725 struct pstate_power_info *pi;
727 if (lcore_id >= RTE_MAX_LCORE) {
728 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
732 pi = &lcore_power_info[lcore_id];
734 if (pi->turbo_available)
735 pi->turbo_enable = 1;
737 pi->turbo_enable = 0;
739 "Failed to enable turbo on lcore %u\n",
749 power_pstate_disable_turbo(unsigned int lcore_id)
751 struct pstate_power_info *pi;
753 if (lcore_id >= RTE_MAX_LCORE) {
754 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
758 pi = &lcore_power_info[lcore_id];
760 pi->turbo_enable = 0;
767 int power_pstate_get_capabilities(unsigned int lcore_id,
768 struct rte_power_core_capabilities *caps)
770 struct pstate_power_info *pi;
772 if (lcore_id >= RTE_MAX_LCORE) {
773 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
777 RTE_LOG(ERR, POWER, "Invalid argument\n");
781 pi = &lcore_power_info[lcore_id];
782 caps->capabilities = 0;
783 caps->turbo = !!(pi->turbo_available);