1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
17 #include <rte_memcpy.h>
18 #include <rte_memory.h>
19 #include <rte_string_fns.h>
21 #include "power_pstate_cpufreq.h"
22 #include "power_common.h"
25 #ifdef RTE_LIBRTE_POWER_DEBUG
26 #define POWER_DEBUG_TRACE(fmt, args...) do { \
27 RTE_LOG(ERR, POWER, "%s: " fmt, __func__, ## args); \
30 #define POWER_DEBUG_TRACE(fmt, args...)
33 #define FOPEN_OR_ERR_RET(f, retval) do { \
35 RTE_LOG(ERR, POWER, "File not opened\n"); \
40 #define FOPS_OR_NULL_GOTO(ret, label) do { \
41 if ((ret) == NULL) { \
42 RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
47 #define FOPS_OR_ERR_GOTO(ret, label) do { \
49 RTE_LOG(ERR, POWER, "File operations failed\n"); \
55 #define POWER_CONVERT_TO_DECIMAL 10
56 #define BUS_FREQ 100000
58 #define POWER_GOVERNOR_PERF "performance"
59 #define POWER_SYSFILE_GOVERNOR \
60 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor"
61 #define POWER_SYSFILE_MAX_FREQ \
62 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
63 #define POWER_SYSFILE_MIN_FREQ \
64 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
65 #define POWER_SYSFILE_CUR_FREQ \
66 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
67 #define POWER_SYSFILE_BASE_MAX_FREQ \
68 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
69 #define POWER_SYSFILE_BASE_MIN_FREQ \
70 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
71 #define POWER_SYSFILE_BASE_FREQ \
72 "/sys/devices/system/cpu/cpu%u/cpufreq/base_frequency"
73 #define POWER_PSTATE_DRIVER "intel_pstate"
74 #define POWER_MSR_PATH "/dev/cpu/%u/msr"
79 #define PLATFORM_INFO 0x0CE
80 #define NON_TURBO_MASK 0xFF00
81 #define NON_TURBO_OFFSET 0x8
91 struct pstate_power_info {
92 unsigned int lcore_id; /**< Logical core id */
93 uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
94 uint32_t nb_freqs; /**< number of available freqs */
95 FILE *f_cur_min; /**< FD of scaling_min */
96 FILE *f_cur_max; /**< FD of scaling_max */
97 char governor_ori[32]; /**< Original governor name */
98 uint32_t curr_idx; /**< Freq index in freqs array */
99 uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
100 uint32_t sys_max_freq; /**< system wide max freq */
101 uint32_t core_base_freq; /**< core base freq */
102 uint32_t state; /**< Power in use state */
103 uint16_t turbo_available; /**< Turbo Boost available */
104 uint16_t turbo_enable; /**< Turbo Boost enable/disable */
105 uint16_t priority_core; /**< High Performance core */
106 } __rte_cache_aligned;
109 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
112 * It is to read the specific MSR.
116 power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
119 char fullpath[PATH_MAX];
121 snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
123 fd = open(fullpath, O_RDONLY);
126 RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
131 ret = pread(fd, val, sizeof(uint64_t), msr);
134 RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
139 POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
140 fullpath, msr, lcore_id);
142 POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
149 * It is to fopen the sys file for the future setting the lcore frequency.
152 power_init_for_setting_freq(struct pstate_power_info *pi)
154 FILE *f_min, *f_max, *f_base;
155 char fullpath_min[PATH_MAX];
156 char fullpath_max[PATH_MAX];
157 char fullpath_base[PATH_MAX];
158 char buf_base[BUFSIZ];
160 uint32_t base_ratio = 0;
161 uint64_t max_non_turbo = 0;
164 snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
167 f_min = fopen(fullpath_min, "rw+");
168 FOPEN_OR_ERR_RET(f_min, -1);
170 snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
173 f_max = fopen(fullpath_max, "rw+");
177 FOPEN_OR_ERR_RET(f_max, -1);
179 pi->f_cur_min = f_min;
180 pi->f_cur_max = f_max;
182 snprintf(fullpath_base, sizeof(fullpath_base), POWER_SYSFILE_BASE_FREQ,
185 f_base = fopen(fullpath_base, "r");
186 if (f_base == NULL) {
187 /* No sysfs base_frequency, that's OK, continue without */
190 s_base = fgets(buf_base, sizeof(buf_base), f_base);
191 FOPS_OR_NULL_GOTO(s_base, out);
193 buf_base[BUFSIZ-1] = '\0';
194 if (strlen(buf_base))
195 /* Strip off terminating '\n' */
196 strtok(buf_base, "\n");
198 base_ratio = strtoul(buf_base, NULL, POWER_CONVERT_TO_DECIMAL)
202 /* Add MSR read to detect turbo status */
204 if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0) {
209 max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
211 POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
213 pi->non_turbo_max_ratio = max_non_turbo;
216 * If base_frequency is reported as greater than the maximum
217 * non-turbo frequency, then mark it as a high priority core.
219 if (base_ratio > max_non_turbo)
220 pi->priority_core = 1;
222 pi->priority_core = 0;
223 pi->core_base_freq = base_ratio * BUS_FREQ;
232 set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
234 uint32_t target_freq = 0;
236 if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
237 RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
238 "should be less than %u\n", idx, pi->nb_freqs);
242 /* Check if it is the same as current */
243 if (idx == pi->curr_idx)
246 /* Because Intel Pstate Driver only allow user change min/max hint
247 * User need change the min/max as same value.
249 if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
250 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
251 "for setting frequency for lcore %u\n",
256 if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
257 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
258 "for setting frequency for lcore %u\n",
263 /* Turbo is available and enabled, first freq bucket is sys max freq */
264 if (pi->turbo_available && idx == 0) {
265 if (pi->turbo_enable)
266 target_freq = pi->sys_max_freq;
268 RTE_LOG(ERR, POWER, "Turbo is off, frequency can't be scaled up more %u\n",
273 target_freq = pi->freqs[idx];
275 /* Decrease freq, the min freq should be updated first */
276 if (idx > pi->curr_idx) {
278 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
279 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
280 "lcore %u\n", pi->lcore_id);
284 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
285 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
286 "lcore %u\n", pi->lcore_id);
290 POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
291 target_freq, pi->lcore_id);
293 fflush(pi->f_cur_min);
294 fflush(pi->f_cur_max);
298 /* Increase freq, the max freq should be updated first */
299 if (idx < pi->curr_idx) {
301 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
302 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
303 "lcore %u\n", pi->lcore_id);
307 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
308 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
309 "lcore %u\n", pi->lcore_id);
313 POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
314 target_freq, pi->lcore_id);
316 fflush(pi->f_cur_max);
317 fflush(pi->f_cur_min);
326 * It is to check the current scaling governor by reading sys file, and then
327 * set it into 'performance' if it is not by writing the sys file. The original
328 * governor will be saved for rolling back.
331 power_set_governor_performance(struct pstate_power_info *pi)
336 char fullpath[PATH_MAX];
340 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
342 f = fopen(fullpath, "rw+");
343 FOPEN_OR_ERR_RET(f, ret);
345 s = fgets(buf, sizeof(buf), f);
346 FOPS_OR_NULL_GOTO(s, out);
347 /* Strip off terminating '\n' */
350 /* Check if current governor is performance */
351 if (strncmp(buf, POWER_GOVERNOR_PERF,
352 sizeof(POWER_GOVERNOR_PERF)) == 0) {
354 POWER_DEBUG_TRACE("Power management governor of lcore %u is "
355 "already performance\n", pi->lcore_id);
358 /* Save the original governor */
359 strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
361 /* Write 'performance' to the governor */
362 val = fseek(f, 0, SEEK_SET);
363 FOPS_OR_ERR_GOTO(val, out);
365 val = fputs(POWER_GOVERNOR_PERF, f);
366 FOPS_OR_ERR_GOTO(val, out);
368 /* We need to flush to see if the fputs succeeds */
370 FOPS_OR_ERR_GOTO(val, out);
373 RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
374 "set to performance successfully\n", pi->lcore_id);
382 * It is to check the governor and then set the original governor back if
383 * needed by writing the sys file.
386 power_set_governor_original(struct pstate_power_info *pi)
391 char fullpath[PATH_MAX];
395 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
397 f = fopen(fullpath, "rw+");
398 FOPEN_OR_ERR_RET(f, ret);
400 s = fgets(buf, sizeof(buf), f);
401 FOPS_OR_NULL_GOTO(s, out);
403 /* Check if the governor to be set is the same as current */
404 if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
406 POWER_DEBUG_TRACE("Power management governor of lcore %u "
407 "has already been set to %s\n",
408 pi->lcore_id, pi->governor_ori);
412 /* Write back the original governor */
413 val = fseek(f, 0, SEEK_SET);
414 FOPS_OR_ERR_GOTO(val, out);
416 val = fputs(pi->governor_ori, f);
417 FOPS_OR_ERR_GOTO(val, out);
420 RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
421 "has been set back to %s successfully\n",
422 pi->lcore_id, pi->governor_ori);
430 * It is to get the available frequencies of the specific lcore by reading the
434 power_get_available_freqs(struct pstate_power_info *pi)
439 char buf_min[BUFSIZ];
440 char buf_max[BUFSIZ];
441 char fullpath_min[PATH_MAX];
442 char fullpath_max[PATH_MAX];
444 uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
445 uint32_t i, num_freqs = 0;
447 snprintf(fullpath_max, sizeof(fullpath_max),
448 POWER_SYSFILE_BASE_MAX_FREQ,
450 snprintf(fullpath_min, sizeof(fullpath_min),
451 POWER_SYSFILE_BASE_MIN_FREQ,
454 f_min = fopen(fullpath_min, "r");
455 FOPEN_OR_ERR_RET(f_min, ret);
457 f_max = fopen(fullpath_max, "r");
461 FOPEN_OR_ERR_RET(f_max, ret);
463 s_min = fgets(buf_min, sizeof(buf_min), f_min);
464 FOPS_OR_NULL_GOTO(s_min, out);
466 s_max = fgets(buf_max, sizeof(buf_max), f_max);
467 FOPS_OR_NULL_GOTO(s_max, out);
470 /* Strip the line break if there is */
471 p_min = strchr(buf_min, '\n');
475 p_max = strchr(buf_max, '\n');
479 sys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);
480 sys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);
482 if (sys_max_freq < sys_min_freq)
485 pi->sys_max_freq = sys_max_freq;
487 if (pi->priority_core == 1)
488 base_max_freq = pi->core_base_freq;
490 base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
492 POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
497 if (base_max_freq < sys_max_freq)
498 pi->turbo_available = 1;
500 pi->turbo_available = 0;
502 /* If turbo is available then there is one extra freq bucket
503 * to store the sys max freq which value is base_max +1
505 num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
508 /* Generate the freq bucket array.
509 * If turbo is available the freq bucket[0] value is base_max +1
510 * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
512 * If turbo is not available bucket[0] is base_max and so on
514 for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
515 if ((i == 0) && pi->turbo_available)
516 pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
518 pi->freqs[pi->nb_freqs++] =
519 base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
524 POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
525 num_freqs, pi->lcore_id);
535 power_pstate_cpufreq_check_supported(void)
537 return cpufreq_check_scaling_driver(POWER_PSTATE_DRIVER);
541 power_pstate_cpufreq_init(unsigned int lcore_id)
543 struct pstate_power_info *pi;
546 if (lcore_id >= RTE_MAX_LCORE) {
547 RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
548 lcore_id, RTE_MAX_LCORE - 1U);
552 pi = &lcore_power_info[lcore_id];
553 exp_state = POWER_IDLE;
554 /* The power in use state works as a guard variable between
555 * the CPU frequency control initialization and exit process.
556 * The ACQUIRE memory ordering here pairs with the RELEASE
557 * ordering below as lock to make sure the frequency operations
558 * in the critical section are done under the correct state.
560 if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
562 __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
563 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
564 "in use\n", lcore_id);
568 pi->lcore_id = lcore_id;
569 /* Check and set the governor */
570 if (power_set_governor_performance(pi) < 0) {
571 RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
572 "performance\n", lcore_id);
575 /* Init for setting lcore frequency */
576 if (power_init_for_setting_freq(pi) < 0) {
577 RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
578 "lcore %u\n", lcore_id);
582 /* Get the available frequencies */
583 if (power_get_available_freqs(pi) < 0) {
584 RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
585 "lcore %u\n", lcore_id);
590 /* Set freq to max by default */
591 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
592 RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
593 "to max\n", lcore_id);
597 RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
598 "power management\n", lcore_id);
599 exp_state = POWER_ONGOING;
600 __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,
601 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
606 exp_state = POWER_ONGOING;
607 __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
608 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
614 power_pstate_cpufreq_exit(unsigned int lcore_id)
616 struct pstate_power_info *pi;
619 if (lcore_id >= RTE_MAX_LCORE) {
620 RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
621 lcore_id, RTE_MAX_LCORE - 1U);
624 pi = &lcore_power_info[lcore_id];
626 exp_state = POWER_USED;
627 /* The power in use state works as a guard variable between
628 * the CPU frequency control initialization and exit process.
629 * The ACQUIRE memory ordering here pairs with the RELEASE
630 * ordering below as lock to make sure the frequency operations
631 * in the critical section are under done the correct state.
633 if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
635 __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
636 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
637 "not used\n", lcore_id);
641 /* Close FD of setting freq */
642 fclose(pi->f_cur_min);
643 fclose(pi->f_cur_max);
644 pi->f_cur_min = NULL;
645 pi->f_cur_max = NULL;
647 /* Set the governor back to the original */
648 if (power_set_governor_original(pi) < 0) {
649 RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
650 "to the original\n", lcore_id);
654 RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
655 "'performance' mode and been set back to the "
656 "original\n", lcore_id);
657 exp_state = POWER_ONGOING;
658 __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,
659 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
664 exp_state = POWER_ONGOING;
665 __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
666 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
673 power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
675 struct pstate_power_info *pi;
677 if (lcore_id >= RTE_MAX_LCORE) {
678 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
683 RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
687 pi = &lcore_power_info[lcore_id];
688 if (num < pi->nb_freqs) {
689 RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
692 rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
698 power_pstate_cpufreq_get_freq(unsigned int lcore_id)
700 if (lcore_id >= RTE_MAX_LCORE) {
701 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
702 return RTE_POWER_INVALID_FREQ_INDEX;
705 return lcore_power_info[lcore_id].curr_idx;
710 power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
712 if (lcore_id >= RTE_MAX_LCORE) {
713 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
717 return set_freq_internal(&(lcore_power_info[lcore_id]), index);
721 power_pstate_cpufreq_freq_up(unsigned int lcore_id)
723 struct pstate_power_info *pi;
725 if (lcore_id >= RTE_MAX_LCORE) {
726 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
730 pi = &lcore_power_info[lcore_id];
731 if (pi->curr_idx == 0 ||
732 (pi->curr_idx == 1 && pi->turbo_available && !pi->turbo_enable))
735 /* Frequencies in the array are from high to low. */
736 return set_freq_internal(pi, pi->curr_idx - 1);
740 power_pstate_cpufreq_freq_down(unsigned int lcore_id)
742 struct pstate_power_info *pi;
744 if (lcore_id >= RTE_MAX_LCORE) {
745 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
749 pi = &lcore_power_info[lcore_id];
750 if (pi->curr_idx + 1 == pi->nb_freqs)
753 /* Frequencies in the array are from high to low. */
754 return set_freq_internal(pi, pi->curr_idx + 1);
758 power_pstate_cpufreq_freq_max(unsigned int lcore_id)
760 if (lcore_id >= RTE_MAX_LCORE) {
761 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
765 /* Frequencies in the array are from high to low. */
766 if (lcore_power_info[lcore_id].turbo_available) {
767 if (lcore_power_info[lcore_id].turbo_enable)
769 return set_freq_internal(
770 &lcore_power_info[lcore_id], 0);
772 /* Set to max non-turbo */
773 return set_freq_internal(
774 &lcore_power_info[lcore_id], 1);
776 return set_freq_internal(&lcore_power_info[lcore_id], 0);
781 power_pstate_cpufreq_freq_min(unsigned int lcore_id)
783 struct pstate_power_info *pi;
785 if (lcore_id >= RTE_MAX_LCORE) {
786 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
790 pi = &lcore_power_info[lcore_id];
792 /* Frequencies in the array are from high to low. */
793 return set_freq_internal(pi, pi->nb_freqs - 1);
798 power_pstate_turbo_status(unsigned int lcore_id)
800 struct pstate_power_info *pi;
802 if (lcore_id >= RTE_MAX_LCORE) {
803 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
807 pi = &lcore_power_info[lcore_id];
809 return pi->turbo_enable;
813 power_pstate_enable_turbo(unsigned int lcore_id)
815 struct pstate_power_info *pi;
817 if (lcore_id >= RTE_MAX_LCORE) {
818 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
822 pi = &lcore_power_info[lcore_id];
824 if (pi->turbo_available)
825 pi->turbo_enable = 1;
827 pi->turbo_enable = 0;
829 "Failed to enable turbo on lcore %u\n",
839 power_pstate_disable_turbo(unsigned int lcore_id)
841 struct pstate_power_info *pi;
843 if (lcore_id >= RTE_MAX_LCORE) {
844 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
848 pi = &lcore_power_info[lcore_id];
850 pi->turbo_enable = 0;
852 if (pi->turbo_available && pi->curr_idx <= 1) {
853 /* Try to set freq to max by default coming out of turbo */
854 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
856 "Failed to set frequency of lcore %u to max\n",
866 int power_pstate_get_capabilities(unsigned int lcore_id,
867 struct rte_power_core_capabilities *caps)
869 struct pstate_power_info *pi;
871 if (lcore_id >= RTE_MAX_LCORE) {
872 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
876 RTE_LOG(ERR, POWER, "Invalid argument\n");
880 pi = &lcore_power_info[lcore_id];
881 caps->capabilities = 0;
882 caps->turbo = !!(pi->turbo_available);
883 caps->priority = pi->priority_core;