1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
17 #include <rte_memcpy.h>
18 #include <rte_atomic.h>
20 #include "power_pstate_cpufreq.h"
21 #include "power_common.h"
24 #ifdef RTE_LIBRTE_POWER_DEBUG
25 #define POWER_DEBUG_TRACE(fmt, args...) do { \
26 RTE_LOG(ERR, POWER, "%s: " fmt, __func__, ## args); \
29 #define POWER_DEBUG_TRACE(fmt, args...)
32 #define FOPEN_OR_ERR_RET(f, retval) do { \
34 RTE_LOG(ERR, POWER, "File not openned\n"); \
39 #define FOPS_OR_NULL_GOTO(ret, label) do { \
40 if ((ret) == NULL) { \
41 RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
46 #define FOPS_OR_ERR_GOTO(ret, label) do { \
48 RTE_LOG(ERR, POWER, "File operations failed\n"); \
54 #define POWER_CONVERT_TO_DECIMAL 10
55 #define BUS_FREQ 100000
57 #define POWER_GOVERNOR_PERF "performance"
58 #define POWER_SYSFILE_GOVERNOR \
59 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor"
60 #define POWER_SYSFILE_MAX_FREQ \
61 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
62 #define POWER_SYSFILE_MIN_FREQ \
63 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
64 #define POWER_SYSFILE_CUR_FREQ \
65 "/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
66 #define POWER_SYSFILE_BASE_MAX_FREQ \
67 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
68 #define POWER_SYSFILE_BASE_MIN_FREQ \
69 "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
70 #define POWER_MSR_PATH "/dev/cpu/%u/msr"
75 #define PLATFORM_INFO 0x0CE
76 #define NON_TURBO_MASK 0xFF00
77 #define NON_TURBO_OFFSET 0x8
87 struct pstate_power_info {
88 unsigned int lcore_id; /**< Logical core id */
89 uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
90 uint32_t nb_freqs; /**< number of available freqs */
91 FILE *f_cur_min; /**< FD of scaling_min */
92 FILE *f_cur_max; /**< FD of scaling_max */
93 char governor_ori[32]; /**< Original governor name */
94 uint32_t curr_idx; /**< Freq index in freqs array */
95 uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
96 uint32_t sys_max_freq; /**< system wide max freq */
97 volatile uint32_t state; /**< Power in use state */
98 uint16_t turbo_available; /**< Turbo Boost available */
99 uint16_t turbo_enable; /**< Turbo Boost enable/disable */
100 } __rte_cache_aligned;
103 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
106 * It is to read the specific MSR.
110 power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
113 char fullpath[PATH_MAX];
115 snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
117 fd = open(fullpath, O_RDONLY);
120 RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
125 ret = pread(fd, val, sizeof(uint64_t), msr);
128 RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
133 POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
134 fullpath, msr, lcore_id);
136 POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
143 * It is to fopen the sys file for the future setting the lcore frequency.
146 power_init_for_setting_freq(struct pstate_power_info *pi)
149 char fullpath_min[PATH_MAX];
150 char fullpath_max[PATH_MAX];
151 uint64_t max_non_turbo = 0;
153 snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
156 f_min = fopen(fullpath_min, "rw+");
157 FOPEN_OR_ERR_RET(f_min, -1);
159 snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
162 f_max = fopen(fullpath_max, "rw+");
163 FOPEN_OR_ERR_RET(f_max, -1);
165 pi->f_cur_min = f_min;
166 pi->f_cur_max = f_max;
168 /* Add MSR read to detect turbo status */
170 if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)
173 max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
175 POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
177 pi->non_turbo_max_ratio = max_non_turbo;
183 set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
185 uint32_t target_freq = 0;
187 if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
188 RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
189 "should be less than %u\n", idx, pi->nb_freqs);
193 /* Check if it is the same as current */
194 if (idx == pi->curr_idx)
197 /* Because Intel Pstate Driver only allow user change min/max hint
198 * User need change the min/max as same value.
200 if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
201 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
202 "for setting frequency for lcore %u\n",
207 if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
208 RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
209 "for setting frequency for lcore %u\n",
214 /* Turbo is available and enabled, first freq bucket is sys max freq */
215 if (pi->turbo_available && pi->turbo_enable && (idx == 0))
216 target_freq = pi->sys_max_freq;
218 target_freq = pi->freqs[idx];
220 /* Decrease freq, the min freq should be updated first */
221 if (idx > pi->curr_idx) {
223 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
224 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
225 "lcore %u\n", pi->lcore_id);
229 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
230 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
231 "lcore %u\n", pi->lcore_id);
235 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
236 target_freq, pi->lcore_id);
238 fflush(pi->f_cur_min);
239 fflush(pi->f_cur_max);
243 /* Increase freq, the max freq should be updated first */
244 if (idx < pi->curr_idx) {
246 if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
247 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
248 "lcore %u\n", pi->lcore_id);
252 if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
253 RTE_LOG(ERR, POWER, "Fail to write new frequency for "
254 "lcore %u\n", pi->lcore_id);
258 POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
259 target_freq, pi->lcore_id);
261 fflush(pi->f_cur_max);
262 fflush(pi->f_cur_min);
271 * It is to check the current scaling governor by reading sys file, and then
272 * set it into 'performance' if it is not by writing the sys file. The original
273 * governor will be saved for rolling back.
276 power_set_governor_performance(struct pstate_power_info *pi)
281 char fullpath[PATH_MAX];
285 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
287 f = fopen(fullpath, "rw+");
288 FOPEN_OR_ERR_RET(f, ret);
290 s = fgets(buf, sizeof(buf), f);
291 FOPS_OR_NULL_GOTO(s, out);
293 /* Check if current governor is performance */
294 if (strncmp(buf, POWER_GOVERNOR_PERF,
295 sizeof(POWER_GOVERNOR_PERF)) == 0) {
297 POWER_DEBUG_TRACE("Power management governor of lcore %u is "
298 "already performance\n", pi->lcore_id);
301 /* Save the original governor */
302 snprintf(pi->governor_ori, sizeof(pi->governor_ori), "%s", buf);
304 /* Write 'performance' to the governor */
305 val = fseek(f, 0, SEEK_SET);
306 FOPS_OR_ERR_GOTO(val, out);
308 val = fputs(POWER_GOVERNOR_PERF, f);
309 FOPS_OR_ERR_GOTO(val, out);
311 /* We need to flush to see if the fputs succeeds */
313 FOPS_OR_ERR_GOTO(val, out);
316 RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
317 "set to performance successfully\n", pi->lcore_id);
325 * It is to check the governor and then set the original governor back if
326 * needed by writing the sys file.
329 power_set_governor_original(struct pstate_power_info *pi)
334 char fullpath[PATH_MAX];
338 snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
340 f = fopen(fullpath, "rw+");
341 FOPEN_OR_ERR_RET(f, ret);
343 s = fgets(buf, sizeof(buf), f);
344 FOPS_OR_NULL_GOTO(s, out);
346 /* Check if the governor to be set is the same as current */
347 if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
349 POWER_DEBUG_TRACE("Power management governor of lcore %u "
350 "has already been set to %s\n",
351 pi->lcore_id, pi->governor_ori);
355 /* Write back the original governor */
356 val = fseek(f, 0, SEEK_SET);
357 FOPS_OR_ERR_GOTO(val, out);
359 val = fputs(pi->governor_ori, f);
360 FOPS_OR_ERR_GOTO(val, out);
363 RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
364 "has been set back to %s successfully\n",
365 pi->lcore_id, pi->governor_ori);
373 * It is to get the available frequencies of the specific lcore by reading the
377 power_get_available_freqs(struct pstate_power_info *pi)
382 char buf_min[BUFSIZ];
383 char buf_max[BUFSIZ];
384 char fullpath_min[PATH_MAX];
385 char fullpath_max[PATH_MAX];
387 uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
388 uint32_t i, num_freqs = 0;
390 snprintf(fullpath_max, sizeof(fullpath_max),
391 POWER_SYSFILE_BASE_MAX_FREQ,
393 snprintf(fullpath_min, sizeof(fullpath_min),
394 POWER_SYSFILE_BASE_MIN_FREQ,
397 f_min = fopen(fullpath_min, "r");
398 FOPEN_OR_ERR_RET(f_min, ret);
400 f_max = fopen(fullpath_max, "r");
401 FOPEN_OR_ERR_RET(f_max, ret);
403 s_min = fgets(buf_min, sizeof(buf_min), f_min);
404 FOPS_OR_NULL_GOTO(s_min, out);
406 s_max = fgets(buf_max, sizeof(buf_max), f_max);
407 FOPS_OR_NULL_GOTO(s_max, out);
410 /* Strip the line break if there is */
411 p_min = strchr(buf_min, '\n');
415 p_max = strchr(buf_max, '\n');
419 sys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);
420 sys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);
422 if (sys_max_freq < sys_min_freq)
425 pi->sys_max_freq = sys_max_freq;
427 base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
429 POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
434 if (base_max_freq < sys_max_freq)
435 pi->turbo_available = 1;
437 pi->turbo_available = 0;
439 /* If turbo is available then there is one extra freq bucket
440 * to store the sys max freq which value is base_max +1
442 num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
445 /* Generate the freq bucket array.
446 * If turbo is available the freq bucket[0] value is base_max +1
447 * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
449 * If turbo is not available bucket[0] is base_max and so on
451 for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
452 if ((i == 0) && pi->turbo_available)
453 pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
455 pi->freqs[pi->nb_freqs++] =
456 base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
461 POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
462 num_freqs, pi->lcore_id);
472 power_pstate_cpufreq_init(unsigned int lcore_id)
474 struct pstate_power_info *pi;
476 if (lcore_id >= RTE_MAX_LCORE) {
477 RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
478 lcore_id, RTE_MAX_LCORE - 1U);
482 pi = &lcore_power_info[lcore_id];
483 if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
485 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
486 "in use\n", lcore_id);
490 pi->lcore_id = lcore_id;
491 /* Check and set the governor */
492 if (power_set_governor_performance(pi) < 0) {
493 RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
494 "performance\n", lcore_id);
497 /* Init for setting lcore frequency */
498 if (power_init_for_setting_freq(pi) < 0) {
499 RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
500 "lcore %u\n", lcore_id);
504 /* Get the available frequencies */
505 if (power_get_available_freqs(pi) < 0) {
506 RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
507 "lcore %u\n", lcore_id);
512 /* Set freq to max by default */
513 if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
514 RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
515 "to max\n", lcore_id);
519 RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
520 "power management\n", lcore_id);
521 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
526 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
532 power_pstate_cpufreq_exit(unsigned int lcore_id)
534 struct pstate_power_info *pi;
536 if (lcore_id >= RTE_MAX_LCORE) {
537 RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
538 lcore_id, RTE_MAX_LCORE - 1U);
541 pi = &lcore_power_info[lcore_id];
543 if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
545 RTE_LOG(INFO, POWER, "Power management of lcore %u is "
546 "not used\n", lcore_id);
550 /* Close FD of setting freq */
551 fclose(pi->f_cur_min);
552 fclose(pi->f_cur_max);
553 pi->f_cur_min = NULL;
554 pi->f_cur_max = NULL;
556 /* Set the governor back to the original */
557 if (power_set_governor_original(pi) < 0) {
558 RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
559 "to the original\n", lcore_id);
563 RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
564 "'performance' mode and been set back to the "
565 "original\n", lcore_id);
566 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
571 rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
578 power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
580 struct pstate_power_info *pi;
582 if (lcore_id >= RTE_MAX_LCORE) {
583 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
588 RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
592 pi = &lcore_power_info[lcore_id];
593 if (num < pi->nb_freqs) {
594 RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
597 rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
603 power_pstate_cpufreq_get_freq(unsigned int lcore_id)
605 if (lcore_id >= RTE_MAX_LCORE) {
606 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
607 return RTE_POWER_INVALID_FREQ_INDEX;
610 return lcore_power_info[lcore_id].curr_idx;
615 power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
617 if (lcore_id >= RTE_MAX_LCORE) {
618 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
622 return set_freq_internal(&(lcore_power_info[lcore_id]), index);
626 power_pstate_cpufreq_freq_up(unsigned int lcore_id)
628 struct pstate_power_info *pi;
630 if (lcore_id >= RTE_MAX_LCORE) {
631 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
635 pi = &lcore_power_info[lcore_id];
636 if (pi->curr_idx == 0)
639 /* Frequencies in the array are from high to low. */
640 return set_freq_internal(pi, pi->curr_idx - 1);
644 power_pstate_cpufreq_freq_down(unsigned int lcore_id)
646 struct pstate_power_info *pi;
648 if (lcore_id >= RTE_MAX_LCORE) {
649 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
653 pi = &lcore_power_info[lcore_id];
654 if (pi->curr_idx + 1 == pi->nb_freqs)
657 /* Frequencies in the array are from high to low. */
658 return set_freq_internal(pi, pi->curr_idx + 1);
662 power_pstate_cpufreq_freq_max(unsigned int lcore_id)
664 if (lcore_id >= RTE_MAX_LCORE) {
665 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
669 /* Frequencies in the array are from high to low. */
670 if (lcore_power_info[lcore_id].turbo_available) {
671 if (lcore_power_info[lcore_id].turbo_enable)
673 return set_freq_internal(
674 &lcore_power_info[lcore_id], 0);
676 /* Set to max non-turbo */
677 return set_freq_internal(
678 &lcore_power_info[lcore_id], 1);
680 return set_freq_internal(&lcore_power_info[lcore_id], 0);
685 power_pstate_cpufreq_freq_min(unsigned int lcore_id)
687 struct pstate_power_info *pi;
689 if (lcore_id >= RTE_MAX_LCORE) {
690 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
694 pi = &lcore_power_info[lcore_id];
696 /* Frequencies in the array are from high to low. */
697 return set_freq_internal(pi, pi->nb_freqs - 1);
702 power_pstate_turbo_status(unsigned int lcore_id)
704 struct pstate_power_info *pi;
706 if (lcore_id >= RTE_MAX_LCORE) {
707 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
711 pi = &lcore_power_info[lcore_id];
713 return pi->turbo_enable;
717 power_pstate_enable_turbo(unsigned int lcore_id)
719 struct pstate_power_info *pi;
721 if (lcore_id >= RTE_MAX_LCORE) {
722 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
726 pi = &lcore_power_info[lcore_id];
728 if (pi->turbo_available)
729 pi->turbo_enable = 1;
731 pi->turbo_enable = 0;
733 "Failed to enable turbo on lcore %u\n",
743 power_pstate_disable_turbo(unsigned int lcore_id)
745 struct pstate_power_info *pi;
747 if (lcore_id >= RTE_MAX_LCORE) {
748 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
752 pi = &lcore_power_info[lcore_id];
754 pi->turbo_enable = 0;
761 int power_pstate_get_capabilities(unsigned int lcore_id,
762 struct rte_power_core_capabilities *caps)
764 struct pstate_power_info *pi;
766 if (lcore_id >= RTE_MAX_LCORE) {
767 RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
771 RTE_LOG(ERR, POWER, "Invalid argument\n");
775 pi = &lcore_power_info[lcore_id];
776 caps->capabilities = 0;
777 caps->turbo = !!(pi->turbo_available);