4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
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19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <rte_common.h>
39 #include <rte_memory.h>
40 #include <rte_malloc.h>
41 #include <rte_cycles.h>
42 #include <rte_prefetch.h>
43 #include <rte_branch_prediction.h>
46 #include "rte_sched.h"
47 #include "rte_bitmap.h"
48 #include "rte_sched_common.h"
49 #include "rte_approx.h"
51 #ifdef __INTEL_COMPILER
52 #pragma warning(disable:2259) /* conversion may lose significant bits */
55 #ifndef RTE_SCHED_OPTIMIZATIONS
56 #define RTE_SCHED_OPTIMIZATIONS 0
59 #if RTE_SCHED_OPTIMIZATIONS
60 #include <immintrin.h>
63 #define RTE_SCHED_ENQUEUE 1
65 #define RTE_SCHED_TS 1
67 #if RTE_SCHED_TS == 0 /* Infinite credits. Traffic shaping disabled. */
68 #define RTE_SCHED_TS_CREDITS_UPDATE 0
69 #define RTE_SCHED_TS_CREDITS_CHECK 0
70 #else /* Real Credits. Full traffic shaping implemented. */
71 #define RTE_SCHED_TS_CREDITS_UPDATE 1
72 #define RTE_SCHED_TS_CREDITS_CHECK 1
75 #ifndef RTE_SCHED_TB_RATE_CONFIG_ERR
76 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
79 #define RTE_SCHED_WRR 1
81 #ifndef RTE_SCHED_WRR_SHIFT
82 #define RTE_SCHED_WRR_SHIFT 3
85 #ifndef RTE_SCHED_PORT_N_GRINDERS
86 #define RTE_SCHED_PORT_N_GRINDERS 8
88 #if (RTE_SCHED_PORT_N_GRINDERS == 0) || (RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1))
89 #error Number of grinders must be non-zero and a power of 2
91 #if (RTE_SCHED_OPTIMIZATIONS && (RTE_SCHED_PORT_N_GRINDERS != 8))
92 #error Number of grinders must be 8 when RTE_SCHED_OPTIMIZATIONS is set
95 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
97 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
99 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
101 struct rte_sched_subport {
102 /* Token bucket (TB) */
103 uint64_t tb_time; /* time of last update */
105 uint32_t tb_credits_per_period;
109 /* Traffic classes (TCs) */
110 uint64_t tc_time; /* time of next update */
111 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
112 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
115 /* TC oversubscription */
117 uint32_t tc_ov_wm_min;
118 uint32_t tc_ov_wm_max;
119 uint8_t tc_ov_period_id;
125 struct rte_sched_subport_stats stats;
128 struct rte_sched_pipe_profile {
129 /* Token bucket (TB) */
131 uint32_t tb_credits_per_period;
134 /* Pipe traffic classes */
136 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
137 uint8_t tc_ov_weight;
140 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
143 struct rte_sched_pipe {
144 /* Token bucket (TB) */
145 uint64_t tb_time; /* time of last update */
148 /* Pipe profile and flags */
151 /* Traffic classes (TCs) */
152 uint64_t tc_time; /* time of next update */
153 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
155 /* Weighted Round Robin (WRR) */
156 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
158 /* TC oversubscription */
159 uint32_t tc_ov_credits;
160 uint8_t tc_ov_period_id;
162 } __rte_cache_aligned;
164 struct rte_sched_queue {
169 struct rte_sched_queue_extra {
170 struct rte_sched_queue_stats stats;
177 e_GRINDER_PREFETCH_PIPE = 0,
178 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
179 e_GRINDER_PREFETCH_MBUF,
184 * Path through the scheduler hierarchy used by the scheduler enqueue
185 * operation to identify the destination queue for the current
186 * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
187 * each packet, typically written by the classification stage and read
188 * by scheduler enqueue.
190 struct rte_sched_port_hierarchy {
191 uint32_t queue:2; /**< Queue ID (0 .. 3) */
192 uint32_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/
193 uint32_t pipe:20; /**< Pipe ID */
194 uint32_t subport:6; /**< Subport ID */
195 uint32_t color:2; /**< Color */
198 struct rte_sched_grinder {
200 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
201 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
206 enum grinder_state state;
209 struct rte_sched_subport *subport;
210 struct rte_sched_pipe *pipe;
211 struct rte_sched_pipe_profile *pipe_params;
214 uint8_t tccache_qmask[4];
215 uint32_t tccache_qindex[4];
221 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
222 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
223 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
227 struct rte_mbuf *pkt;
230 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
231 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
232 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
235 struct rte_sched_port {
236 /* User parameters */
237 uint32_t n_subports_per_port;
238 uint32_t n_pipes_per_subport;
241 uint32_t frame_overhead;
242 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
243 uint32_t n_pipe_profiles;
244 uint32_t pipe_tc3_rate_max;
246 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
250 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
251 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
252 uint64_t time; /* Current NIC TX time measured in bytes */
253 double cycles_per_byte; /* CPU cycles per byte */
255 /* Scheduling loop detection */
257 uint32_t pipe_exhaustion;
260 struct rte_bitmap *bmp;
261 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
264 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
265 uint32_t busy_grinders;
266 struct rte_mbuf **pkts_out;
269 /* Queue base calculation */
270 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
273 /* Large data structures */
274 struct rte_sched_subport *subport;
275 struct rte_sched_pipe *pipe;
276 struct rte_sched_queue *queue;
277 struct rte_sched_queue_extra *queue_extra;
278 struct rte_sched_pipe_profile *pipe_profiles;
280 struct rte_mbuf **queue_array;
281 uint8_t memory[0] __rte_cache_aligned;
282 } __rte_cache_aligned;
284 enum rte_sched_port_array {
285 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
286 e_RTE_SCHED_PORT_ARRAY_PIPE,
287 e_RTE_SCHED_PORT_ARRAY_QUEUE,
288 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
289 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
290 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
291 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
292 e_RTE_SCHED_PORT_ARRAY_TOTAL,
295 #ifdef RTE_SCHED_COLLECT_STATS
297 static inline uint32_t
298 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
300 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
305 static inline uint32_t
306 rte_sched_port_queues_per_port(struct rte_sched_port *port)
308 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
312 rte_sched_port_check_params(struct rte_sched_port_params *params)
316 if (params == NULL) {
321 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) {
326 if (params->rate == 0) {
331 if (params->mtu == 0) {
335 /* n_subports_per_port: non-zero, power of 2 */
336 if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
340 /* n_pipes_per_subport: non-zero, power of 2 */
341 if ((params->n_pipes_per_subport == 0) || (!rte_is_power_of_2(params->n_pipes_per_subport))) {
345 /* qsize: non-zero, power of 2,
346 * no bigger than 32K (due to 16-bit read/write pointers) */
347 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
348 uint16_t qsize = params->qsize[i];
350 if ((qsize == 0) || (!rte_is_power_of_2(qsize))) {
355 /* pipe_profiles and n_pipe_profiles */
356 if ((params->pipe_profiles == NULL) ||
357 (params->n_pipe_profiles == 0) ||
358 (params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)) {
362 for (i = 0; i < params->n_pipe_profiles; i ++) {
363 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
365 /* TB rate: non-zero, not greater than port rate */
366 if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
370 /* TB size: non-zero */
371 if (p->tb_size == 0) {
375 /* TC rate: non-zero, less than pipe rate */
376 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
377 if ((p->tc_rate[j] == 0) || (p->tc_rate[j] > p->tb_rate)) {
382 /* TC period: non-zero */
383 if (p->tc_period == 0) {
387 #ifdef RTE_SCHED_SUBPORT_TC_OV
388 /* TC3 oversubscription weight: non-zero */
389 if (p->tc_ov_weight == 0) {
394 /* Queue WRR weights: non-zero */
395 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j ++) {
396 if (p->wrr_weights[j] == 0) {
406 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
408 uint32_t n_subports_per_port = params->n_subports_per_port;
409 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
410 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
411 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
413 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
414 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
415 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
416 uint32_t size_queue_extra = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
417 uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
418 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
419 uint32_t size_per_pipe_queue_array, size_queue_array;
423 size_per_pipe_queue_array = 0;
424 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
425 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
427 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
431 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) return base;
432 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
434 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
435 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
437 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
438 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
440 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
441 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
443 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
444 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
446 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) return base;
447 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
449 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) return base;
450 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
456 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
458 uint32_t size0, size1;
461 status = rte_sched_port_check_params(params);
463 RTE_LOG(NOTICE, SCHED,
464 "Port scheduler params check failed (%d)\n", status);
469 size0 = sizeof(struct rte_sched_port);
470 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
472 return (size0 + size1);
476 rte_sched_port_config_qsize(struct rte_sched_port *port)
479 port->qsize_add[0] = 0;
480 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
481 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
482 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
485 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
486 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
487 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
488 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
491 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
492 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
493 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
494 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
497 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
498 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
499 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
500 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
502 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
506 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
508 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
510 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
511 " Token bucket: period = %u, credits per period = %u, size = %u\n"
512 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
513 " Traffic class 3 oversubscription: weight = %hhu\n"
514 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
519 p->tb_credits_per_period,
522 /* Traffic classes */
524 p->tc_credits_per_period[0],
525 p->tc_credits_per_period[1],
526 p->tc_credits_per_period[2],
527 p->tc_credits_per_period[3],
529 /* Traffic class 3 oversubscription */
533 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
534 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
535 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
536 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
539 static inline uint64_t
540 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
542 uint64_t time = time_ms;
543 time = (time * rate) / 1000;
549 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
553 for (i = 0; i < port->n_pipe_profiles; i ++) {
554 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
555 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
558 if (src->tb_rate == params->rate) {
559 dst->tb_credits_per_period = 1;
562 double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
563 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
565 rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
567 dst->tb_size = src->tb_size;
569 /* Traffic Classes */
570 dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
571 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
572 dst->tc_credits_per_period[j] = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[j]);
574 #ifdef RTE_SCHED_SUBPORT_TC_OV
575 dst->tc_ov_weight = src->tc_ov_weight;
579 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
580 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
581 uint32_t lcd, lcd1, lcd2;
584 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
586 wrr_cost[0] = src->wrr_weights[qindex];
587 wrr_cost[1] = src->wrr_weights[qindex + 1];
588 wrr_cost[2] = src->wrr_weights[qindex + 2];
589 wrr_cost[3] = src->wrr_weights[qindex + 3];
591 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
592 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
593 lcd = rte_get_lcd(lcd1, lcd2);
595 wrr_cost[0] = lcd / wrr_cost[0];
596 wrr_cost[1] = lcd / wrr_cost[1];
597 wrr_cost[2] = lcd / wrr_cost[2];
598 wrr_cost[3] = lcd / wrr_cost[3];
600 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
601 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
602 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
603 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
606 rte_sched_port_log_pipe_profile(port, i);
609 port->pipe_tc3_rate_max = 0;
610 for (i = 0; i < port->n_pipe_profiles; i ++) {
611 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
612 uint32_t pipe_tc3_rate = src->tc_rate[3];
614 if (port->pipe_tc3_rate_max < pipe_tc3_rate) {
615 port->pipe_tc3_rate_max = pipe_tc3_rate;
620 struct rte_sched_port *
621 rte_sched_port_config(struct rte_sched_port_params *params)
623 struct rte_sched_port *port = NULL;
624 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
626 /* Check user parameters. Determine the amount of memory to allocate */
627 mem_size = rte_sched_port_get_memory_footprint(params);
632 /* Allocate memory to store the data structures */
633 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
638 /* User parameters */
639 port->n_subports_per_port = params->n_subports_per_port;
640 port->n_pipes_per_subport = params->n_pipes_per_subport;
641 port->rate = params->rate;
642 port->mtu = params->mtu + params->frame_overhead;
643 port->frame_overhead = params->frame_overhead;
644 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
645 port->n_pipe_profiles = params->n_pipe_profiles;
648 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
651 for (j = 0; j < e_RTE_METER_COLORS; j++) {
652 /* if min/max are both zero, then RED is disabled */
653 if ((params->red_params[i][j].min_th |
654 params->red_params[i][j].max_th) == 0) {
658 if (rte_red_config_init(&port->red_config[i][j],
659 params->red_params[i][j].wq_log2,
660 params->red_params[i][j].min_th,
661 params->red_params[i][j].max_th,
662 params->red_params[i][j].maxp_inv) != 0) {
670 port->time_cpu_cycles = rte_get_tsc_cycles();
671 port->time_cpu_bytes = 0;
673 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
675 /* Scheduling loop detection */
676 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
677 port->pipe_exhaustion = 0;
680 port->busy_grinders = 0;
681 port->pkts_out = NULL;
682 port->n_pkts_out = 0;
684 /* Queue base calculation */
685 rte_sched_port_config_qsize(port);
687 /* Large data structures */
688 port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
689 port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
690 port->queue = (struct rte_sched_queue *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE));
691 port->queue_extra = (struct rte_sched_queue_extra *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
692 port->pipe_profiles = (struct rte_sched_pipe_profile *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
693 port->bmp_array = port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
694 port->queue_array = (struct rte_mbuf **) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
696 /* Pipe profile table */
697 rte_sched_port_config_pipe_profile_table(port, params);
700 n_queues_per_port = rte_sched_port_queues_per_port(port);
701 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
702 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, bmp_mem_size);
703 if (port->bmp == NULL) {
704 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
707 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
708 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
715 rte_sched_port_free(struct rte_sched_port *port)
717 /* Check user parameters */
722 rte_bitmap_free(port->bmp);
727 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
729 struct rte_sched_subport *s = port->subport + i;
731 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
732 " Token bucket: period = %u, credits per period = %u, size = %u\n"
733 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
734 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
739 s->tb_credits_per_period,
742 /* Traffic classes */
744 s->tc_credits_per_period[0],
745 s->tc_credits_per_period[1],
746 s->tc_credits_per_period[2],
747 s->tc_credits_per_period[3],
749 /* Traffic class 3 oversubscription */
755 rte_sched_subport_config(struct rte_sched_port *port,
757 struct rte_sched_subport_params *params)
759 struct rte_sched_subport *s;
762 /* Check user parameters */
763 if ((port == NULL) ||
764 (subport_id >= port->n_subports_per_port) ||
769 if ((params->tb_rate == 0) || (params->tb_rate > port->rate)) {
773 if (params->tb_size == 0) {
777 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
778 if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
783 if (params->tc_period == 0) {
787 s = port->subport + subport_id;
789 /* Token Bucket (TB) */
790 if (params->tb_rate == port->rate) {
791 s->tb_credits_per_period = 1;
794 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
795 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
797 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
799 s->tb_size = params->tb_size;
800 s->tb_time = port->time;
801 s->tb_credits = s->tb_size / 2;
803 /* Traffic Classes (TCs) */
804 s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
805 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
806 s->tc_credits_per_period[i] = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, params->tc_rate[i]);
808 s->tc_time = port->time + s->tc_period;
809 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
810 s->tc_credits[i] = s->tc_credits_per_period[i];
813 #ifdef RTE_SCHED_SUBPORT_TC_OV
814 /* TC oversubscription */
815 s->tc_ov_wm_min = port->mtu;
816 s->tc_ov_wm_max = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->pipe_tc3_rate_max);
817 s->tc_ov_wm = s->tc_ov_wm_max;
818 s->tc_ov_period_id = 0;
824 rte_sched_port_log_subport_config(port, subport_id);
830 rte_sched_pipe_config(struct rte_sched_port *port,
833 int32_t pipe_profile)
835 struct rte_sched_subport *s;
836 struct rte_sched_pipe *p;
837 struct rte_sched_pipe_profile *params;
838 uint32_t deactivate, profile, i;
840 /* Check user parameters */
841 profile = (uint32_t) pipe_profile;
842 deactivate = (pipe_profile < 0);
843 if ((port == NULL) ||
844 (subport_id >= port->n_subports_per_port) ||
845 (pipe_id >= port->n_pipes_per_subport) ||
846 ((!deactivate) && (profile >= port->n_pipe_profiles))) {
850 /* Check that subport configuration is valid */
851 s = port->subport + subport_id;
852 if (s->tb_period == 0) {
856 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
858 /* Handle the case when pipe already has a valid configuration */
860 params = port->pipe_profiles + p->profile;
862 #ifdef RTE_SCHED_SUBPORT_TC_OV
863 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
864 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
865 uint32_t tc3_ov = s->tc_ov;
867 /* Unplug pipe from its subport */
868 s->tc_ov_n -= params->tc_ov_weight;
869 s->tc_ov_rate -= pipe_tc3_rate;
870 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
872 if (s->tc_ov != tc3_ov) {
873 RTE_LOG(DEBUG, SCHED,
874 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
875 subport_id, subport_tc3_rate, s->tc_ov_rate);
880 memset(p, 0, sizeof(struct rte_sched_pipe));
887 /* Apply the new pipe configuration */
888 p->profile = profile;
889 params = port->pipe_profiles + p->profile;
891 /* Token Bucket (TB) */
892 p->tb_time = port->time;
893 p->tb_credits = params->tb_size / 2;
895 /* Traffic Classes (TCs) */
896 p->tc_time = port->time + params->tc_period;
897 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
898 p->tc_credits[i] = params->tc_credits_per_period[i];
901 #ifdef RTE_SCHED_SUBPORT_TC_OV
903 /* Subport TC3 oversubscription */
904 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
905 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
906 uint32_t tc3_ov = s->tc_ov;
908 s->tc_ov_n += params->tc_ov_weight;
909 s->tc_ov_rate += pipe_tc3_rate;
910 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
912 if (s->tc_ov != tc3_ov) {
913 RTE_LOG(DEBUG, SCHED,
914 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
915 subport_id, subport_tc3_rate, s->tc_ov_rate);
917 p->tc_ov_period_id = s->tc_ov_period_id;
918 p->tc_ov_credits = s->tc_ov_wm;
926 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
927 uint32_t subport, uint32_t pipe, uint32_t traffic_class,
928 uint32_t queue, enum rte_meter_color color)
930 struct rte_sched_port_hierarchy *sched
931 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
933 sched->color = (uint32_t) color;
934 sched->subport = subport;
936 sched->traffic_class = traffic_class;
937 sched->queue = queue;
941 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
942 uint32_t *subport, uint32_t *pipe,
943 uint32_t *traffic_class, uint32_t *queue)
945 const struct rte_sched_port_hierarchy *sched
946 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
948 *subport = sched->subport;
950 *traffic_class = sched->traffic_class;
951 *queue = sched->queue;
956 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
958 const struct rte_sched_port_hierarchy *sched
959 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
961 return (enum rte_meter_color) sched->color;
965 rte_sched_subport_read_stats(struct rte_sched_port *port,
967 struct rte_sched_subport_stats *stats,
970 struct rte_sched_subport *s;
972 /* Check user parameters */
973 if ((port == NULL) ||
974 (subport_id >= port->n_subports_per_port) ||
979 s = port->subport + subport_id;
981 /* Copy subport stats and clear */
982 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
983 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
985 /* Subport TC ovesubscription status */
992 rte_sched_queue_read_stats(struct rte_sched_port *port,
994 struct rte_sched_queue_stats *stats,
997 struct rte_sched_queue *q;
998 struct rte_sched_queue_extra *qe;
1000 /* Check user parameters */
1001 if ((port == NULL) ||
1002 (queue_id >= rte_sched_port_queues_per_port(port)) ||
1007 q = port->queue + queue_id;
1008 qe = port->queue_extra + queue_id;
1010 /* Copy queue stats and clear */
1011 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1012 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1015 *qlen = q->qw - q->qr;
1020 static inline uint32_t
1021 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1025 result = subport * port->n_pipes_per_subport + pipe;
1026 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1027 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1032 static inline struct rte_mbuf **
1033 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
1035 uint32_t pindex = qindex >> 4;
1036 uint32_t qpos = qindex & 0xF;
1038 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
1041 static inline uint16_t
1042 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
1044 uint32_t tc = (qindex >> 2) & 0x3;
1046 return port->qsize[tc];
1049 #ifdef RTE_SCHED_DEBUG
1052 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1054 struct rte_sched_queue *queue = port->queue + qindex;
1056 return (queue->qr == queue->qw);
1060 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1062 struct rte_sched_queue *queue = port->queue + qindex;
1063 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1064 uint16_t qlen = queue->qw - queue->qr;
1066 return (qlen >= qsize);
1069 #endif /* RTE_SCHED_DEBUG */
1071 #ifdef RTE_SCHED_COLLECT_STATS
1074 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1076 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1077 uint32_t tc_index = (qindex >> 2) & 0x3;
1078 uint32_t pkt_len = pkt->pkt_len;
1080 s->stats.n_pkts_tc[tc_index] += 1;
1081 s->stats.n_bytes_tc[tc_index] += pkt_len;
1085 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1087 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1088 uint32_t tc_index = (qindex >> 2) & 0x3;
1089 uint32_t pkt_len = pkt->pkt_len;
1091 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1092 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1096 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1098 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1099 uint32_t pkt_len = pkt->pkt_len;
1101 qe->stats.n_pkts += 1;
1102 qe->stats.n_bytes += pkt_len;
1106 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1108 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1109 uint32_t pkt_len = pkt->pkt_len;
1111 qe->stats.n_pkts_dropped += 1;
1112 qe->stats.n_bytes_dropped += pkt_len;
1115 #endif /* RTE_SCHED_COLLECT_STATS */
1117 #ifdef RTE_SCHED_RED
1120 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1122 struct rte_sched_queue_extra *qe;
1123 struct rte_red_config *red_cfg;
1124 struct rte_red *red;
1126 enum rte_meter_color color;
1128 tc_index = (qindex >> 2) & 0x3;
1129 color = rte_sched_port_pkt_read_color(pkt);
1130 red_cfg = &port->red_config[tc_index][color];
1132 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1135 qe = port->queue_extra + qindex;
1138 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1142 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1144 struct rte_sched_queue_extra *qe;
1145 struct rte_red *red;
1147 qe = port->queue_extra + qindex;
1150 rte_red_mark_queue_empty(red, port->time);
1155 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1157 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1159 #endif /* RTE_SCHED_RED */
1161 #ifdef RTE_SCHED_DEBUG
1164 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1168 qindex = pindex << 4;
1170 for (i = 0; i < 16; i ++){
1171 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1172 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1174 if (queue_empty != bmp_bit_clear){
1175 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1187 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, uint64_t bmp_slab)
1193 rte_panic("Empty slab at position %u\n", bmp_pos);
1197 for (i = 0, mask = 1; i < 64; i ++, mask <<= 1) {
1198 if (mask & bmp_slab){
1199 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1200 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1207 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1212 #endif /* RTE_SCHED_DEBUG */
1214 static inline uint32_t
1215 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, struct rte_mbuf *pkt)
1217 struct rte_sched_queue *q;
1218 #ifdef RTE_SCHED_COLLECT_STATS
1219 struct rte_sched_queue_extra *qe;
1221 uint32_t subport, pipe, traffic_class, queue, qindex;
1223 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1225 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1226 q = port->queue + qindex;
1228 #ifdef RTE_SCHED_COLLECT_STATS
1229 qe = port->queue_extra + qindex;
1237 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
1239 struct rte_sched_queue *q;
1240 struct rte_mbuf **q_qw;
1243 q = port->queue + qindex;
1244 qsize = rte_sched_port_qsize(port, qindex);
1245 q_qw = qbase + (q->qw & (qsize - 1));
1247 rte_prefetch0(q_qw);
1248 rte_bitmap_prefetch0(port->bmp, qindex);
1252 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1254 struct rte_sched_queue *q;
1258 q = port->queue + qindex;
1259 qsize = rte_sched_port_qsize(port, qindex);
1260 qlen = q->qw - q->qr;
1262 /* Drop the packet (and update drop stats) when queue is full */
1263 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || (qlen >= qsize))) {
1264 rte_pktmbuf_free(pkt);
1265 #ifdef RTE_SCHED_COLLECT_STATS
1266 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1267 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1272 /* Enqueue packet */
1273 qbase[q->qw & (qsize - 1)] = pkt;
1276 /* Activate queue in the port bitmap */
1277 rte_bitmap_set(port->bmp, qindex);
1280 #ifdef RTE_SCHED_COLLECT_STATS
1281 rte_sched_port_update_subport_stats(port, qindex, pkt);
1282 rte_sched_port_update_queue_stats(port, qindex, pkt);
1288 #if RTE_SCHED_ENQUEUE == 0
1291 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1297 for (i = 0; i < n_pkts; i ++) {
1298 struct rte_mbuf *pkt;
1299 struct rte_mbuf **q_base;
1300 uint32_t subport, pipe, traffic_class, queue, qindex;
1304 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1306 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1308 q_base = rte_sched_port_qbase(port, qindex);
1310 result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
1319 * The enqueue function implements a 4-level pipeline with each stage processing
1320 * two different packets. The purpose of using a pipeline is to hide the latency
1321 * of prefetching the data structures. The naming convention is presented in the
1324 * p00 _______ p10 _______ p20 _______ p30 _______
1325 * ----->| |----->| |----->| |----->| |----->
1326 * | 0 | | 1 | | 2 | | 3 |
1327 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1332 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1334 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, *pkt30, *pkt31, *pkt_last;
1335 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1336 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1337 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1342 /* Less then 6 input packets available, which is not enough to feed the pipeline */
1343 if (unlikely(n_pkts < 6)) {
1344 struct rte_mbuf **q_base[5];
1347 /* Prefetch the mbuf structure of each packet */
1348 for (i = 0; i < n_pkts; i ++) {
1349 rte_prefetch0(pkts[i]);
1352 /* Prefetch the queue structure for each queue */
1353 for (i = 0; i < n_pkts; i ++) {
1354 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
1357 /* Prefetch the write pointer location of each queue */
1358 for (i = 0; i < n_pkts; i ++) {
1359 q_base[i] = rte_sched_port_qbase(port, q[i]);
1360 rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
1363 /* Write each packet to its queue */
1364 for (i = 0; i < n_pkts; i ++) {
1365 result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
1371 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1374 rte_prefetch0(pkt20);
1375 rte_prefetch0(pkt21);
1379 rte_prefetch0(pkt10);
1380 rte_prefetch0(pkt11);
1382 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1383 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1387 rte_prefetch0(pkt00);
1388 rte_prefetch0(pkt01);
1390 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1391 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1393 q20_base = rte_sched_port_qbase(port, q20);
1394 q21_base = rte_sched_port_qbase(port, q21);
1395 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1396 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1398 /* Run the pipeline */
1399 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1400 /* Propagate stage inputs */
1411 q30_base = q20_base;
1412 q31_base = q21_base;
1414 /* Stage 0: Get packets in */
1416 pkt01 = pkts[i + 1];
1417 rte_prefetch0(pkt00);
1418 rte_prefetch0(pkt01);
1420 /* Stage 1: Prefetch queue structure storing queue pointers */
1421 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1422 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1424 /* Stage 2: Prefetch queue write location */
1425 q20_base = rte_sched_port_qbase(port, q20);
1426 q21_base = rte_sched_port_qbase(port, q21);
1427 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1428 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1430 /* Stage 3: Write packet to queue and activate queue */
1431 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1432 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1433 result += r30 + r31;
1436 /* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
1437 of an odd number of input packets. */
1438 pkt_last = pkts[n_pkts - 1];
1439 rte_prefetch0(pkt_last);
1441 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1442 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1444 q10_base = rte_sched_port_qbase(port, q10);
1445 q11_base = rte_sched_port_qbase(port, q11);
1446 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1447 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1449 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1450 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1451 result += r20 + r21;
1453 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1455 q00_base = rte_sched_port_qbase(port, q00);
1456 q01_base = rte_sched_port_qbase(port, q01);
1457 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1458 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1460 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1461 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1462 result += r10 + r11;
1464 q_last_base = rte_sched_port_qbase(port, q_last);
1465 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1467 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1468 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1469 result += r00 + r01;
1472 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1479 #endif /* RTE_SCHED_ENQUEUE */
1481 #if RTE_SCHED_TS_CREDITS_UPDATE == 0
1483 #define grinder_credits_update(port, pos)
1485 #elif !defined(RTE_SCHED_SUBPORT_TC_OV)
1488 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1490 struct rte_sched_grinder *grinder = port->grinder + pos;
1491 struct rte_sched_subport *subport = grinder->subport;
1492 struct rte_sched_pipe *pipe = grinder->pipe;
1493 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1497 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1498 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1499 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1500 subport->tb_time += n_periods * subport->tb_period;
1503 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1504 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1505 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1506 pipe->tb_time += n_periods * params->tb_period;
1509 if (unlikely(port->time >= subport->tc_time)) {
1510 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1511 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1512 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1513 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1514 subport->tc_time = port->time + subport->tc_period;
1518 if (unlikely(port->time >= pipe->tc_time)) {
1519 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1520 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1521 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1522 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1523 pipe->tc_time = port->time + params->tc_period;
1529 static inline uint32_t
1530 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1532 struct rte_sched_grinder *grinder = port->grinder + pos;
1533 struct rte_sched_subport *subport = grinder->subport;
1534 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1535 uint32_t tc_ov_consumption_max;
1536 uint32_t tc_ov_wm = subport->tc_ov_wm;
1538 if (subport->tc_ov == 0) {
1539 return subport->tc_ov_wm_max;
1542 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1543 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1544 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1545 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1547 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1548 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1550 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1551 tc_ov_wm -= tc_ov_wm >> 7;
1552 if (tc_ov_wm < subport->tc_ov_wm_min) {
1553 tc_ov_wm = subport->tc_ov_wm_min;
1558 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1559 if (tc_ov_wm > subport->tc_ov_wm_max) {
1560 tc_ov_wm = subport->tc_ov_wm_max;
1566 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1568 struct rte_sched_grinder *grinder = port->grinder + pos;
1569 struct rte_sched_subport *subport = grinder->subport;
1570 struct rte_sched_pipe *pipe = grinder->pipe;
1571 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1575 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1576 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1577 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1578 subport->tb_time += n_periods * subport->tb_period;
1581 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1582 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1583 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1584 pipe->tb_time += n_periods * params->tb_period;
1587 if (unlikely(port->time >= subport->tc_time)) {
1588 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1590 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1591 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1592 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1593 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1595 subport->tc_time = port->time + subport->tc_period;
1596 subport->tc_ov_period_id ++;
1600 if (unlikely(port->time >= pipe->tc_time)) {
1601 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1602 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1603 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1604 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1605 pipe->tc_time = port->time + params->tc_period;
1608 /* Pipe TCs - Oversubscription */
1609 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1610 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1612 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1616 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1618 #if RTE_SCHED_TS_CREDITS_CHECK
1620 #ifndef RTE_SCHED_SUBPORT_TC_OV
1623 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1625 struct rte_sched_grinder *grinder = port->grinder + pos;
1626 struct rte_sched_subport *subport = grinder->subport;
1627 struct rte_sched_pipe *pipe = grinder->pipe;
1628 struct rte_mbuf *pkt = grinder->pkt;
1629 uint32_t tc_index = grinder->tc_index;
1630 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1631 uint32_t subport_tb_credits = subport->tb_credits;
1632 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1633 uint32_t pipe_tb_credits = pipe->tb_credits;
1634 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1637 /* Check queue credits */
1638 enough_credits = (pkt_len <= subport_tb_credits) &&
1639 (pkt_len <= subport_tc_credits) &&
1640 (pkt_len <= pipe_tb_credits) &&
1641 (pkt_len <= pipe_tc_credits);
1643 if (!enough_credits) {
1647 /* Update port credits */
1648 subport->tb_credits -= pkt_len;
1649 subport->tc_credits[tc_index] -= pkt_len;
1650 pipe->tb_credits -= pkt_len;
1651 pipe->tc_credits[tc_index] -= pkt_len;
1659 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1661 struct rte_sched_grinder *grinder = port->grinder + pos;
1662 struct rte_sched_subport *subport = grinder->subport;
1663 struct rte_sched_pipe *pipe = grinder->pipe;
1664 struct rte_mbuf *pkt = grinder->pkt;
1665 uint32_t tc_index = grinder->tc_index;
1666 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1667 uint32_t subport_tb_credits = subport->tb_credits;
1668 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1669 uint32_t pipe_tb_credits = pipe->tb_credits;
1670 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1671 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1672 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1673 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1676 /* Check pipe and subport credits */
1677 enough_credits = (pkt_len <= subport_tb_credits) &&
1678 (pkt_len <= subport_tc_credits) &&
1679 (pkt_len <= pipe_tb_credits) &&
1680 (pkt_len <= pipe_tc_credits) &&
1681 (pkt_len <= pipe_tc_ov_credits);
1683 if (!enough_credits) {
1687 /* Update pipe and subport credits */
1688 subport->tb_credits -= pkt_len;
1689 subport->tc_credits[tc_index] -= pkt_len;
1690 pipe->tb_credits -= pkt_len;
1691 pipe->tc_credits[tc_index] -= pkt_len;
1692 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1697 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1699 #endif /* RTE_SCHED_TS_CREDITS_CHECK */
1702 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1704 struct rte_sched_grinder *grinder = port->grinder + pos;
1705 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1706 struct rte_mbuf *pkt = grinder->pkt;
1707 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1709 #if RTE_SCHED_TS_CREDITS_CHECK
1710 if (!grinder_credits_check(port, pos)) {
1715 /* Advance port time */
1716 port->time += pkt_len;
1719 port->pkts_out[port->n_pkts_out ++] = pkt;
1721 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1722 if (queue->qr == queue->qw) {
1723 uint32_t qindex = grinder->qindex[grinder->qpos];
1725 rte_bitmap_clear(port->bmp, qindex);
1726 grinder->qmask &= ~(1 << grinder->qpos);
1727 grinder->wrr_mask[grinder->qpos] = 0;
1728 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1731 /* Reset pipe loop detection */
1732 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1733 grinder->productive = 1;
1738 #if RTE_SCHED_OPTIMIZATIONS
1741 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1743 __m128i index = _mm_set1_epi32 (base_pipe);
1744 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1745 __m128i res = _mm_cmpeq_epi32(pipes, index);
1746 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1747 pipes = _mm_cmpeq_epi32(pipes, index);
1748 res = _mm_or_si128(res, pipes);
1750 if (_mm_testz_si128(res, res))
1759 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1763 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
1764 if (port->grinder_base_bmp_pos[i] == base_pipe) {
1772 #endif /* RTE_SCHED_OPTIMIZATIONS */
1775 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1777 struct rte_sched_grinder *grinder = port->grinder + pos;
1780 grinder->pcache_w = 0;
1781 grinder->pcache_r = 0;
1783 w[0] = (uint16_t) bmp_slab;
1784 w[1] = (uint16_t) (bmp_slab >> 16);
1785 w[2] = (uint16_t) (bmp_slab >> 32);
1786 w[3] = (uint16_t) (bmp_slab >> 48);
1788 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1789 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1790 grinder->pcache_w += (w[0] != 0);
1792 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1793 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1794 grinder->pcache_w += (w[1] != 0);
1796 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1797 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1798 grinder->pcache_w += (w[2] != 0);
1800 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1801 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1802 grinder->pcache_w += (w[3] != 0);
1806 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1808 struct rte_sched_grinder *grinder = port->grinder + pos;
1811 grinder->tccache_w = 0;
1812 grinder->tccache_r = 0;
1814 b[0] = (uint8_t) (qmask & 0xF);
1815 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1816 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1817 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1819 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1820 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1821 grinder->tccache_w += (b[0] != 0);
1823 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1824 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1825 grinder->tccache_w += (b[1] != 0);
1827 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1828 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1829 grinder->tccache_w += (b[2] != 0);
1831 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1832 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1833 grinder->tccache_w += (b[3] != 0);
1837 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1839 struct rte_sched_grinder *grinder = port->grinder + pos;
1840 struct rte_mbuf **qbase;
1844 if (grinder->tccache_r == grinder->tccache_w) {
1848 qindex = grinder->tccache_qindex[grinder->tccache_r];
1849 qbase = rte_sched_port_qbase(port, qindex);
1850 qsize = rte_sched_port_qsize(port, qindex);
1852 grinder->tc_index = (qindex >> 2) & 0x3;
1853 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1854 grinder->qsize = qsize;
1856 grinder->qindex[0] = qindex;
1857 grinder->qindex[1] = qindex + 1;
1858 grinder->qindex[2] = qindex + 2;
1859 grinder->qindex[3] = qindex + 3;
1861 grinder->queue[0] = port->queue + qindex;
1862 grinder->queue[1] = port->queue + qindex + 1;
1863 grinder->queue[2] = port->queue + qindex + 2;
1864 grinder->queue[3] = port->queue + qindex + 3;
1866 grinder->qbase[0] = qbase;
1867 grinder->qbase[1] = qbase + qsize;
1868 grinder->qbase[2] = qbase + 2 * qsize;
1869 grinder->qbase[3] = qbase + 3 * qsize;
1871 grinder->tccache_r ++;
1876 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1878 struct rte_sched_grinder *grinder = port->grinder + pos;
1879 uint32_t pipe_qindex;
1880 uint16_t pipe_qmask;
1882 if (grinder->pcache_r < grinder->pcache_w) {
1883 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1884 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1885 grinder->pcache_r ++;
1887 uint64_t bmp_slab = 0;
1888 uint32_t bmp_pos = 0;
1890 /* Get another non-empty pipe group */
1891 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) {
1895 #ifdef RTE_SCHED_DEBUG
1896 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1899 /* Return if pipe group already in one of the other grinders */
1900 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1901 if (unlikely(grinder_pipe_exists(port, bmp_pos))) {
1904 port->grinder_base_bmp_pos[pos] = bmp_pos;
1906 /* Install new pipe group into grinder's pipe cache */
1907 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1909 pipe_qmask = grinder->pcache_qmask[0];
1910 pipe_qindex = grinder->pcache_qindex[0];
1911 grinder->pcache_r = 1;
1914 /* Install new pipe in the grinder */
1915 grinder->pindex = pipe_qindex >> 4;
1916 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1917 grinder->pipe = port->pipe + grinder->pindex;
1918 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1919 grinder->productive = 0;
1921 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1922 grinder_next_tc(port, pos);
1924 /* Check for pipe exhaustion */
1925 if (grinder->pindex == port->pipe_loop) {
1926 port->pipe_exhaustion = 1;
1927 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1933 #if RTE_SCHED_WRR == 0
1935 #define grinder_wrr_load(a,b)
1937 #define grinder_wrr_store(a,b)
1940 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1942 struct rte_sched_grinder *grinder = port->grinder + pos;
1943 uint64_t slab = grinder->qmask;
1945 if (rte_bsf64(slab, &grinder->qpos) == 0) {
1946 rte_panic("grinder wrr\n");
1950 #elif RTE_SCHED_WRR == 1
1953 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1955 struct rte_sched_grinder *grinder = port->grinder + pos;
1956 struct rte_sched_pipe *pipe = grinder->pipe;
1957 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1958 uint32_t tc_index = grinder->tc_index;
1959 uint32_t qmask = grinder->qmask;
1962 qindex = tc_index * 4;
1964 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1965 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1966 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1967 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1969 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1970 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1971 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1972 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1974 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1975 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1976 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1977 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1981 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1983 struct rte_sched_grinder *grinder = port->grinder + pos;
1984 struct rte_sched_pipe *pipe = grinder->pipe;
1985 uint32_t tc_index = grinder->tc_index;
1988 qindex = tc_index * 4;
1990 pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
1991 pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
1992 pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
1993 pipe->wrr_tokens[qindex + 3] = (uint8_t) ((grinder->wrr_tokens[3] & grinder->wrr_mask[3]) >> RTE_SCHED_WRR_SHIFT);
1997 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1999 struct rte_sched_grinder *grinder = port->grinder + pos;
2000 uint16_t wrr_tokens_min;
2002 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
2003 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
2004 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
2005 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
2007 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
2008 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
2010 grinder->wrr_tokens[0] -= wrr_tokens_min;
2011 grinder->wrr_tokens[1] -= wrr_tokens_min;
2012 grinder->wrr_tokens[2] -= wrr_tokens_min;
2013 grinder->wrr_tokens[3] -= wrr_tokens_min;
2018 #error Invalid value for RTE_SCHED_WRR
2020 #endif /* RTE_SCHED_WRR */
2022 #define grinder_evict(port, pos)
2025 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2027 struct rte_sched_grinder *grinder = port->grinder + pos;
2029 rte_prefetch0(grinder->pipe);
2030 rte_prefetch0(grinder->queue[0]);
2034 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2036 struct rte_sched_grinder *grinder = port->grinder + pos;
2037 uint16_t qsize, qr[4];
2039 qsize = grinder->qsize;
2040 qr[0] = grinder->queue[0]->qr & (qsize - 1);
2041 qr[1] = grinder->queue[1]->qr & (qsize - 1);
2042 qr[2] = grinder->queue[2]->qr & (qsize - 1);
2043 qr[3] = grinder->queue[3]->qr & (qsize - 1);
2045 rte_prefetch0(grinder->qbase[0] + qr[0]);
2046 rte_prefetch0(grinder->qbase[1] + qr[1]);
2048 grinder_wrr_load(port, pos);
2049 grinder_wrr(port, pos);
2051 rte_prefetch0(grinder->qbase[2] + qr[2]);
2052 rte_prefetch0(grinder->qbase[3] + qr[3]);
2056 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2058 struct rte_sched_grinder *grinder = port->grinder + pos;
2059 uint32_t qpos = grinder->qpos;
2060 struct rte_mbuf **qbase = grinder->qbase[qpos];
2061 uint16_t qsize = grinder->qsize;
2062 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2064 grinder->pkt = qbase[qr];
2065 rte_prefetch0(grinder->pkt);
2067 if (unlikely((qr & 0x7) == 7)) {
2068 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2070 rte_prefetch0(qbase + qr_next);
2074 static inline uint32_t
2075 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2077 struct rte_sched_grinder *grinder = port->grinder + pos;
2079 switch (grinder->state) {
2080 case e_GRINDER_PREFETCH_PIPE:
2082 if (grinder_next_pipe(port, pos)) {
2083 grinder_prefetch_pipe(port, pos);
2084 port->busy_grinders ++;
2086 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2093 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2095 struct rte_sched_pipe *pipe = grinder->pipe;
2097 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2098 grinder_prefetch_tc_queue_arrays(port, pos);
2099 grinder_credits_update(port, pos);
2101 grinder->state = e_GRINDER_PREFETCH_MBUF;
2105 case e_GRINDER_PREFETCH_MBUF:
2107 grinder_prefetch_mbuf(port, pos);
2109 grinder->state = e_GRINDER_READ_MBUF;
2113 case e_GRINDER_READ_MBUF:
2115 uint32_t result = 0;
2117 result = grinder_schedule(port, pos);
2119 /* Look for next packet within the same TC */
2120 if (result && grinder->qmask) {
2121 grinder_wrr(port, pos);
2122 grinder_prefetch_mbuf(port, pos);
2126 grinder_wrr_store(port, pos);
2128 /* Look for another active TC within same pipe */
2129 if (grinder_next_tc(port, pos)) {
2130 grinder_prefetch_tc_queue_arrays(port, pos);
2132 grinder->state = e_GRINDER_PREFETCH_MBUF;
2135 if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
2136 port->pipe_loop = grinder->pindex;
2138 grinder_evict(port, pos);
2140 /* Look for another active pipe */
2141 if (grinder_next_pipe(port, pos)) {
2142 grinder_prefetch_pipe(port, pos);
2144 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2148 /* No active pipe found */
2149 port->busy_grinders --;
2151 grinder->state = e_GRINDER_PREFETCH_PIPE;
2156 rte_panic("Algorithmic error (invalid state)\n");
2162 rte_sched_port_time_resync(struct rte_sched_port *port)
2164 uint64_t cycles = rte_get_tsc_cycles();
2165 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2166 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2168 /* Advance port time */
2169 port->time_cpu_cycles = cycles;
2170 port->time_cpu_bytes += (uint64_t) bytes_diff;
2171 if (port->time < port->time_cpu_bytes) {
2172 port->time = port->time_cpu_bytes;
2175 /* Reset pipe loop detection */
2176 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2180 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2184 /* Check if any exception flag is set */
2185 exceptions = (second_pass && port->busy_grinders == 0) ||
2186 (port->pipe_exhaustion == 1);
2188 /* Clear exception flags */
2189 port->pipe_exhaustion = 0;
2195 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2199 port->pkts_out = pkts;
2200 port->n_pkts_out = 0;
2202 rte_sched_port_time_resync(port);
2204 /* Take each queue in the grinder one step further */
2205 for (i = 0, count = 0; ; i ++) {
2206 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2207 if ((count == n_pkts) ||
2208 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {